target-i386: use gen_update_cc_op()
This patch simplifies target-i386/translate.c a bit by replacing somecode with gen_update_cc_op()
Signed-off-by: Jun Koi <junkoi2004@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
use symbol for DisasContext->is_jmp
This patch replaces constant value assigned for (DisasContext*)->is_jmp with DISAS_TB_JUMP.
Signed-off-by: Jun Koi <junkoi2004@gmail.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
remove exec-all.h inclusion from cpu.h
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
move cpu_pc_from_tb to target-*/exec.h
remove unused stuff from */exec.h
Don't declare XSAVE as supported
i386 cpuid.c currently claims XSAVE is supported in the CPUID filter,but that's not true: Only FXSAVE is supported. Remove that bitfrom the filter.
Signed-off-by: Andi Kleen <ak@linux.intel.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Add more boundary checking to sse3/4 parsing
ssse3 uses tables with only two entries per op, but it is indexedwith b1 which can contain variables upto 3. This happens when ssse3or sse4 are used with REP* prefixes.
Add boundary checking for this case....
target-i386: fix xchg rax,r8
We were ignoring REX_B while special-casing NOP, i.e. xchg eax,eax.
Signed-off-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
x86: svm: Always clear event_inj on vmexit
We currently only clear SVM_EVTINJ_VALID after successful interruptdelivery. This apparently does not match real hardware which clears thewhole event_inj field on every vmexit, including unsuccessful interrupt...
fix CPUID vendor override
the meaning of vendor_override is actually the opposite of how itis currently used :-(Fix it to allow KVM to export the non-native CPUID vendor ifexplicitly requested by the user.
The intended behavior is:With TCG: - always inject the configured vendor (either hard-coded, in config...
kvm: Extend kvm_arch_get_supported_cpuid() to support index
Would use it later for XSAVE related CPUID.
Signed-off-by: Sheng Yang <sheng@linux.intel.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
Enable XSAVE related CPUID
We can support it in KVM now. The 0xd leaf is queried from KVM.
kvm: Enable XSAVE live migration support
kvm: init mp_state
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Avi Kivity <avi@redhat.com>
kvm: Fix cpu_is_bsp() compilation warning
Signed-off-by: Sheng Yang <sheng@linux.intel.com>Signed-off-by: Avi Kivity <avi@redhat.com>
x86: Fix INIT processing
This fixes a regression of 0e26b7b892: Reset halted also on INIT.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
apic: qdev conversion cleanup
Make APICState completely private to apic.c by using DeviceStatein external APIs.
Move apic_init() to pc.c.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
apic: avoid using CPUState internals
Move the actual CPUState contents handling to cpu.h and cpuid.c.
Handle CPU reset and set env->halted in pc.c.
Add a function to get the local APIC state of the currentCPU for the MMIO.
apic: avoid passing CPUState from CPU code
Pass only APICState when accessing APIC from CPU code.
tcg: Optionally sign-extend 32-bit arguments for 64-bit hosts.
Some hosts (amd64, ia64) have an ABI that ignores the high bitsof the 64-bit register when passing 32-bit arguments. Othersrequire the value to be properly sign-extended for the type.I.e. "int32_t" must be sign-extended and "uint32_t" must be...
target-i386: fix decoding of negative 4-byte displacements
Negative four byte displacements need to be sign-extended afterc086b783eb7a578993d6d2ab62c4c2666800b63d. Do so.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Acked-by: Richard Henderson <rth@twiddle.net>...
resent: x86/cpuid: Add kvm32 CPU model
Create a kvm32 CPU model that describes a least common denominatorfor KVM capable guest CPUs. Useful for migration purposes.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
kvm: fix 80000001.EDX supported bit filtering
On AMD some bits from 1.EDX are reported in 80000001.EDX. The mask usedto copy bits from 1.EDX to 80000001.EDX is incorrect resulting inunsupported features passed into a guest.
Signed-off-by: Gleb Natapov <gleb@redhat.com>...
Do not stop VM if emulation failed in userspace.
Continue vcpu execution in case emulation failure happened while vcpuwas in userspace. In this case #UD will be injected into the guestallowing guest OS to kill offending process and continue.
kvm: validate context for kvm cpu get/put operations
Validate that KVM vcpu state is only read/written from cpu thread itselfor that cpu is stopped.
kvm: enable smp > 1
Process INIT/SIPI requests and enable -smp > 1.
target-i386: Remove duplicate CPU log.
The proper logging for -d cpu is done in generic code.
KVM: x86: Add debug register saving and restoring
Make use of the new KVM_GET/SET_DEBUGREGS to save/restore the x86 debugregisters.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>
target-i386: print EFER in cpu_dump_state
kvm: allow qemu to set EPT identity mapping address
If we use larger BIOS image than current 256KB, we would need move reservedTSS and EPT identity mapping pages. Currently TSS support this, but notEPT.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>...
x86: remove dead assignments, spotted by clang analyzer
Value stored is never read.
kvm: avoid collision with dprintf macro in stdio.h, spotted by clang
Fixes clang errors: CC i386-softmmu/kvm.o/src/qemu/target-i386/kvm.c:40:9: error: 'dprintf' macro redefinedIn file included from /src/qemu/target-i386/kvm.c:21:In file included from /src/qemu/qemu-common.h:27:...
target-i386: Fix variable in (disabled) debugging code
Signed-off-by: Adam Lackorzynski <adam@os.inf.tu-dresden.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: Fix compiler warning
With argument checking for cpu_fprintf, gcc throws this warning:
CC i386-softmmu/helper.occ1: warnings being treated as errors/qemu/ar7/target-i386/helper.c: In function ‘cpu_x86_dump_seg_cache’:/qemu/ar7/target-i386/helper.c:220: error: format not a string literal and no format arguments...
remove TARGET_* defines from translate-all.c
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Large page TLB flush
QEMU uses a fixed page size for the CPU TLB. If the guest uses largepages then we effectively split these into multiple smaller pages, andpopulate the corresponding TLB entries on demand.
When the guest invalidates the TLB by virtual address we must invalidate...
x86/cpuid: move CPUID functions into separate file
about half of target-i386/helper.c consist of CPUID related functions.Only one of them is a real TCG helper function. So move the wholeCPUID stuff out of this into a separate file to get bettermaintainable parts....
x86/cpuid: replace magic number with named constant
CPUID leaf Fn8000_0001.EDX contains a copy of many Fn0000_0001.EDX bits.Define a name for this mask to improve readability and avoid typos.
Signed-off-by: Andre Przywara <andre.przywara@amd.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
x86/cpuid: fix missing feature set bits
This one was accidently removed with commitbb0300dc57c10b3721451b0ff566a03f9276cc77
x86/cpuid: moved host_cpuid function and remove prototype
the host_cpuid function was located at the end of the file and hada prototype before it's first use. Move it up and remove theprototype.
x86/cpuid: add missing CPUID feature flag names
Some CPUID feature flags had no string value, so they could not beswitched on or off from the command line.Add names for the missing ones mentioned in the current public CPUIDspecification from both Intel and AMD. Those only mentioned in the...
x86/cpuid: add "host" to the list of supported CPU models
x86/cpuid: remove unnecessary kvm_trim function
Correct me if I am wrong, but kvm_trim looks like a really bloatedimplementation of a bitwise AND. So remove this function and replaceit with the real stuff(TM).
Signed-off-by: Andre Przywara <andre.przywara@amd.com>...
x86/cpuid: add TCG feature bit trimming
In KVM we trim the user provided CPUID bits to match the host CPU'sone. Introduce a similar feature to QEMU/TCG. Create a mask of TCG'scapabilities and apply it to the user bits.This allows to let the CPU models reflect their native archetypes....
x86/cpuid: Always expose 32 and 64-bit CPUs
Since 64-bit capability is just another CPUID bit we now properlymask, there is no reason anymore to hide the 64-bit capable CPUmodels from a 32-bit only QEMU. All 64-bit CPUs can be usedperfectly in 32-bit legacy mode anyway, so these models also make...
x86/cpuid: fix CPUID levels
Bump up the xlevel number for qemu32 to allow parsing of the processorname string for this model.Similiarly the 486 processor should have at least the feature bitleaf enabled.
x86/cpuid: Enable all features of real CPU
Enable all features of real CPU, unsupported features will betrimmed depending on TCG or KVM capabilities.
Move the list of unsupported TCG features near the TCG capabilitiesmasks.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
x86/cpuid: fix indentation
target-i386: fix commit c22549204a6edc431e8e4358e61bd56386ff6957
The commit c22549204a6edc431e8e4358e61bd56386ff6957 led movntps &movntdq to be translated incorrectly.
Signed-off-by: TeLeMan <geleman@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Remove cpu_get_phys_page_debug from userspace emulation
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.
Removes a set of ifdefs from exec.c.
Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets otherthan Alpha. This will be used for page_find_alloc, which issupposed to be using virtual addresses in the first place....
target-i386: fix SIB decoding with index = 4
A SIB byte with an index of 4 means "no scaled index", even if the scalevalue is not 0. In 64-bit mode, if REX.X is used, an index of 4 selects%r12. This is correctly handled by the computation of the index variable,...
target-i386: Fix long jumps/calls in long mode with REX.W set
Signed-off-by: malc <av1474@comtv.ru>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: fix lddqu SSE instruction
This instruction load data from memory to register and not the reverse.
KVM: x86: Restrict writeback of VCPU state
Do not write nmi_pending, sipi_vector, and mpstate unless we at least gothrough a reset. And TSC as well as KVM wallclocks should only bewritten on full sync, otherwise we risk to drop some time on stateread-modify-write....
KVM: Rework VCPU state writeback API
This grand cleanup drops all reset and vmsave/load relatedsynchronization points in favor of four(!) generic hooks:
- cpu_synchronize_all_states in qemu_savevm_state_complete (initial sync from kernel before vmsave)...
KVM: Rework of guest debug state writing
So far we synchronized any dirty VCPU state back into the kernel beforeupdating the guest debug state. This was a tribute to a deficite in x86kernels before 2.6.33. But as this is an arch-dependent issue, it isbetter handle in the x86 part of KVM and remove the writeback point for...
Move ioport.h out of cpu-all.h
Only include ioport.h where it is actually needed.
target-i386: fix crash on x86 32bit linux host with hw breakpoint exceptions
If you make use of hw breakpoints on a 32bit x86 linux host, qemuwill segmentation fault when processing the exception.
The problem is that the value of env is stored in $ebp in the op_helper...
Fix OpenBSD linker warning
helper.o(.text+0x11e0): In function `listflags':/src/qemu/target-i386/helper.c:661: warning: sprintf() is often misused, please use snprintf()
Fix i386-bsd-user build
Merge remote branch 'qemu-kvm/uq/master' into staging
Add cpu model configuration support..
This is a reimplementation of prior versions which addsthe ability to define cpu models for contemporary processors.The added models are likewise selected via -cpu <name>,and are intended to displace the existing convention...
kvm: Kill CR3_CACHE feature references
Remove all references to KVM_CR3_CACHE as it was never implemented.
Signed-off-by: Jes Sorensen <Jes.Sorensen@redhat.com>Signed-off-by: Avi Kivity <avi@redhat.com>
QEMU e820 reservation patch
Hi,
Kevin and I have agreed on the approach for this one now. So here isthe latest version of the patch for QEMU, submitting e820 reservationentries via fw_cfg.
Cheers,Jes
Use qemu-cfg to provide the BIOS with an optional table of e820 entries....
Merge remote branch 'qemu-kvm/uq/master' into staging-tmp
remove two dead assignments in target-i386/translate.c
KVM: x86: Fix up misreported CPU features
From qemu-kvm: Kernels before 2.6.30 misreported some essential CPUfeatures via KVM_GET_SUPPORTED_CPUID. Fix them up.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
KVM: Request setting of nmi_pending and sipi_vector
The final version of VCPU events in 2.6.33 will allow to skipnmi_pending and sipi_vector on KVM_SET_VCPU_EVENTS. For now let's writethem unconditionally, which is unproblematic for upstream due to missing...
remove dead code from target-i386/exec.h
These are unused since edea5f0 (no need to define global registers incpu-exec.c, 2008-05-10).
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
kill regs_to_env and env_to_regs
Add KVM paravirt cpuid leaf
Initialize KVM paravirt cpuid leaf and allow user to control guestvisible PV features through -cpu flag.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
x86: translate.c: remove dead assignment
clang-analyzer points out a redundant assignment.
Signed-off-by: Amit Shah <amit.shah@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
MCE: Fix bug of IA32_MCG_STATUS after system reset
Now, if we inject a fatal MCE into guest OS, for example Linux, Linuxwill go panic and then reboot. But if we inject another MCE now,system will reset directly instead of go panic firstly, becauseMCG_STATUS.MCIP is set to 1 and not cleared after reboot. This is does...
remove pending exception on vcpu reset.
Without this qemu can even start on kvm modules with events supportsince default value of exception_injected in zero and this is #DEexception.
target-i386: Fix "call im" on x86_64 when executing 32-bit code
Similarly to what is done in 32938e127f50a40844a0fb9c5abb8691aeeccf7efor "jmp im", trunc the immediate to 32-bit when not running in 64-bitmode.
Reported-by: Kevin O'Connor <kevin@koconnor.net>...
Intel CPUs starting from pentium have apic
Intel CPUs starting from pentium have apic. Lets advertise it.
Signed-off-by: Gleb Natapov <gleb@redhat.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
Revert "kvm: x86: Save/restore exception_index"
This reverts commit ebbc8a3d8e76d0402f8a08c10c0f32e24715d41d.
As suggested by Jan Kiszka,
"It was obsoleted by d1793b836f8f123b961c613de1bb1c0c185c84cc and now saves/restores a useless field."
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
kvm: x86: Use separate exception_injected CPUState field
Marcelo correctly remarked that there are usage conflicts between QEMUcore code and KVM /wrt exception_index. So spend a separate field andalso save/restore it properly.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
target-i386: Fix evaluation of DR7 register
hw_breakpoint_type and hw_breakpoint_len used the wrong index multiplierto extract type and len.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-i386: Update CPUID feature set for TCG
The CPUID features QEMU presented to the guest were not up-to-datewith QEMU's emulated feature set.Add the missing bits of recent (and not so recent) additions toQEMU's emulation engine.For stability reasons only the user mode usable bits are exposed for...
v2: properly save kvm system time msr registers
Currently, the msrs involved in setting up pvclock are not saved overmigration and/or save/restore. This patch puts their value in specialfields in our CPUState, and deal with them using vmstate.
kvm also has to account for it, by including them in the msr list...
kvm: x86: Save/restore exception_index
As KVM now makes use of exception_index to keep pending exceptions, wehave to save&restore this field as well.
NOTE: We have to nail the arch-independent exception_index down to acertain bit width for proper vmstate processing, namely to 32 bit....
cpuid: Fix multicore setup on Intel
The multicore CPUID code detects whether the guest is an Intel or anAMD CPU, because the Linux kernel is picky about the CmpLegacy bit.KVM by default passes through the host's vendor, which was notcatched by the code. So fork out the vendor determining bits into a...
kvm: x86: Fix initial kvm_has_msr_star
KVM_GET_MSR_INDEX_LIST returns -E2BIG when the provided space is toosmall for all MSRs. But this is precisely the error we trigger with theinitial request in order to obtain that size. Do not fail in that case.
This caused a subtle corruption of the guest state as MSR_STAR was not...
kvm: x86: Add support for VCPU event states
This patch extends the qemu-kvm state sync logic with support forKVM_GET/SET_VCPU_EVENTS, giving access to yet missing exception,interrupt and NMI states.
kvm: x86: Fix merge artifact of f8d926e9 about mp_state
kvm: Add arch reset handler
Will be required by succeeding changes.
kvm: x86: Refactor use of interrupt_bitmap
Drop interrupt_bitmap from the cpustate and solely rely on the integerinterupt_injected. This prepares us for the new injected-interruptinterface, which will deprecate the bitmap, while preservingcompatibility....
kvm: Move KVM mp_state accessors to i386-specific code
Unbreaks PowerPC and S390 KVM builds.
Signed-off-by: Hollis Blanchard <hollisb@us.ibm.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
user: move CPU reset call to main.c for x86/PPC/Sparc
v3: don't call reset functions on cpu initialization
There is absolutely no need to call reset functions when initializingdevices. Since we are already registering them, calling qemu_system_reset()should suffice. Actually, it is what happens when we reboot the machine,...
vmstate: Add version arg to VMSTATE_SINGLE_TEST()
This allows to define VMSTATE_SINGLE with VMSTATE_SINGLE_TESTSigned-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
target-i386: implement lzcnt emulation
lzcnt is a AMD Phenom/Barcelona added instruction returning thenumber of leading zero bits in a word.As this is similar to the "bsr" instruction, reuse the existingcode. There need to be some more changes, though, as lzcnt always...
x86: add 'static' to please Sparse
target-i386: fix ARPL
The arpl implementation in target-i386/translate.c uses cpu_A0temporary across a brcond op. This patch fixes that issue.
Signed-off-by: Laurent Desnogues <laurent.desnogues@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-i386: move recently added vmstate fields at the end of the structure
This reduce the impact on hosts that have addressing modes with limitedoffsets. Suggested by Laurent Desnogues.
x86: fix miss merge
There was a missmerge, and then we got a tail recursive call to cpu_post_loadwithout case base :)
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
gdbstub: x86: Switch 64/32 bit registers dynamically
Commit 56aebc891674cd2d07b3f64183415697be200084 changed gdbstub in waythat debugging 32 or 16-bit guest code is no longer possible with qemufor x86_64 guest CPUs. Since that commit, qemu only provides registers...
x86: port cpu to vmstate