xics: convert init() to realize()
This fixes XICS according new QOM rules.
This converts ICS's init() callbacks to realize().
This converts legacy qdev_init_nofail() to property_set(realized).
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Reviewed-by: Andreas Färber <afaerber@suse.de>...
xics: add missing const specifiers to TypeInfo
This adds missing const specifiers to ICS and ICP TypeInfo's.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Reviewed-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
xics: split to xics and xics-common
The upcoming XICS-KVM support will use bits of emulated XICS code.So this introduces new level of hierarchy - "xics-common" class. Bothemulated XICS and XICS-KVM will inherit from it and override classcallbacks when required....
xics: add cpu_setup callback
This adds a cpu_setup callback to the XICS device class (as XICS-KVMwill do it different), xics_cpu_setup() will call it if it is set.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Signed-off-by: Alexander Graf <agraf@suse.de>
xics-kvm: Support for in-kernel XICS interrupt controller
Recent (host) kernels support emulating the PAPR defined "XICS" interruptcontroller system within KVM. This patch allows qemu to initialize andconfigure the in-kernel XICS, and keep its state in sync with qemu's XICS...
xics: Implement H_IPOLL
This adds support for the H_IPOLL hypercall which the guestuses to poll for a pending interrupt. This hypercall ismandatory for PAPR+ and there is no way for the guest todetect whether it is supported or not so just add it.
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>...
xics: Implement H_XIRR_X
This implements H_XIRR_X hypercall in addition to H_XIRR asit is mandatory for PAPR+ and there is no way for the guest todetect whether it is supported or not so just add it.
As the Partition Adjunct Option is not supported at the moment,...
xics-kvm: enable irqfd for MSI
This enables IRQFD support for sPAPR. The feature decreases the latencyof interrupt handling.
To enable IRQFD for MSI, this sets kvm_gsi_direct_mapping to true whichenables direct MSI mapping.
To enable IRQFD for LSI (level triggered INTx interrupts), a PCI host bus...
xics: move reset and cpu_setup
This simple change makes following patches nicer.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Acked-by: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Alexander Graf <agraf@suse.de>
xics: replace fprintf with error_report
This replaces old-style fprintf with new style error_report.
Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru>Reviewed-by: Andreas Färber <afaerber@suse.de>Acked-by: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Alexander Graf <agraf@suse.de>
xics: add pre_save/post_load dispatchers
The upcoming support of in-kernel XICS will redefine migration callbacksfor both ICS and ICP so classes and callback pointers are added.
Merge remote-tracking branch 'afaerber/tags/qom-devices-for-anthony' into staging
QOM device refactorings
xics: move registration of global state to realize()
Registration of global state belongs into realize so move it there.
qom: Pass available size to object_initialize()
To be passed on to object_initialize_with_type().
Acked-by: Cornelia Huck <cornelia.huck@de.ibm.com> (virtio-ccw)Signed-off-by: Andreas Färber <afaerber@suse.de>
aio / timers: Switch entire codebase to the new timer API
This is an autogenerated patch using scripts/switch-timer-api.
Switch the entire code base to using the new timer API.
Note this patch may introduce some line length issues.
Signed-off-by: Alex Bligh <alex@alex.org.uk>...
ioapic: QOM cast cleanup
Signed-off-by: Andreas Färber <afaerber@suse.de>
omap_intc: QOM'ify omap-intc and omap2-intc
Create a new abstract base type and let omap-intc and omap2-intc inheritfrom it. Introduce a type constant and use QOM casts.
pl190: Rename pl190_state to PL190State
pl190: QOM cast cleanup
puv3_intc: QOM cast cleanup
realview_gic: QOM cast cleanup
slavio_intctl: QOM cast cleanup
xilinx_intc: QOM cast cleanup
arm_gic: QOM cast cleanup
etraxfs_pic: QOM cast cleanup
exynos4210_combiner: QOM cast cleanup
exynos4210_gic: QOM cast cleanup for exynos4210.gic
exynos4210_gic: QOM cast cleanup for exynos4210.irq_gate
grlib_irqmp: QOM cast cleanup
lm32_pic: QOM cast cleanup
imx_avic: QOM cast cleanup
Introduce type constant, use QOM casts and prepare SysBus initfn for QOMrealize by resolving SysBusDevice vs. DeviceState "dev" name conflict.
Acked-by: Peter Chubb <peter.chubb@nicta.com.au>Signed-off-by: Andreas Färber <afaerber@suse.de>
xics: rename types to be sane and follow coding style
Basically, in HW the layout of the interrupt network is:
- One ICP per processor thread (the "presenter"). This contains the registers to fetch a pending interrupt (ack), EOI, and control the...
ioapic: Use QOM realize for ioapic
Signed-off-by: Hu Tao <hutao@cn.fujitsu.com>[AF: Tweaked error message]Signed-off-by: Andreas Färber <afaerber@suse.de>
pseries: move interrupt controllers to hw/intc/
intc/arm_gic: Build arm_gic only once
Since current_cpu is CPUState it no longer needs CPUArchState.
intc/openpic: Build openpic only once
Since current_cpu is CPUState it no longer depends on CPUPPCState.
Move ppce500_set_mpic_proxy() to a new hw/ppc/ppc_e500.h becausehw/ppc/ppc.h is too heavily using CPUPPCState and PowerPCCPU.
cpu: Make first_cpu and next_cpu CPUState
Move next_cpu from CPU_COMMON to CPUState.Move first_cpu variable to qom/cpu.h.
gdbstub needs to use CPUState::env_ptr for now.cpu_copy() no longer needs to save and restore cpu_next.
Acked-by: Paolo Bonzini <pbonzini@redhat.com>...
cpu: Replace cpu_single_env with CPUState current_cpu
Move it to qom/cpu.h.
hw/i*: pass owner to memory_region_init* functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
memory: add owner argument to initialization functions
intc/openpic: Convert to QOM realize
Split qdev initfn into instance_init and realize functions.Change one occurrence of "klass" while at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
intc/openpic_kvm: Fix QOM and build issues
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Alexander Graf <agraf@suse.de>
openpic: factor out some common defines into openpic.h
...for use by the KVM in-kernel irqchip stub.
Signed-off-by: Scott Wood <scottwood@freescale.com>Signed-off-by: Alexander Graf <agraf@suse.de>
kvm/openpic: in-kernel mpic support
Enables support for the in-kernel MPIC that thas been merged into theKVM next branch. This includes irqfd/KVM_IRQ_LINE support from AlexGraf (along with some other improvements).
Note from Alex regarding kvm_irqchip_create():...
intc/openpic: QOM'ify
Introduce type constant and cast macro.
Signed-off-by: Andreas Färber <afaerber@suse.de>Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Alexander Graf <agraf@suse.de>
intc/xilinx_intc: Handle level interrupt retriggering
Acking a level sensitive interrupt should have no effect if theinterrupt pin is still asserted. The current implementation requiresand edge condition to occur for setting a level sensitive IRQ, which...
intc/xilinx_intc: Inhibit write to ISR when HIE
When the Hardware Interrupt Enable (HIE) bit is set, software cannotchange ISR. Add write guard accordingly.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
intc/xilinx_intc: Dont lower IRQ when HIE cleared
This is a little strange. It is lowering the parent IRQ pin on inputwhen HIE is cleared. There is no such behaviour in the real hardware.
ISR changes based on interrupt pin state are already guarded on HIE...
intc/xilinx_intc: Don't clear level sens. IRQs without ACK
For level sensitive interrupts, ISR bits are cleared when the input pinis lowered. This is incorrect. Only software can clear ISR bits (viaIAR or direct write to ISR with !MER).
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>...
Merge branch 'realize-isa.v2' of git://github.com/afaerber/qemu-cpu
intc/xilinx_intc: Use qemu_set_irq
Use qemu_set_irq rather than if-elsing qemu_irq_(lower|raise). Nofunctional change, just reduces verbosity.
Cc: qemu-trivial@nongnu.org
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
isa: QOM'ify ISADevice
Rename its parent field and use DEVICE where necessary.
i8259: QOM'ify some more
Introduce type constant.
Prepares for PIC realizefn.
i8259: Convert PICCommonState to use QOM realizefn
Instead of having the parent provide PICCommonClass::init,let the children override DeviceClass::realize themselves.This pushes the responsibility of saving and calling the parent'srealizefn to the children....
isa: Use realizefn for ISADevice
Drop ISADeviceClass::init and the resulting no-op initfn and letchildren implement their own realizefn. Adapt error handling.Split off an instance_init where sensible.
apic: rename apic specific bitopts
apic has its own version of bitops, with thedifference that it works on u32 and not long.Add apic_ prefix to avoid namespace clashes.
We should look into reusing standard bitops long-term,but that's not entirely trivial....
Remove Sun4c, Sun4d and a few CPUs
Sun4c and Sun4d architectures and related CPUs are not fully implemented(especially Sun4c MMU) and there has been no interest for them.
Likewise, a few CPUs (Cypress, Ross etc) are only half implemented.
Remove the machines and CPUs, they can be re-added if needed later....
remove double semicolons
Signed-off-by: Dong Xu Wang <wdongxu@linux.vnet.ibm.com>Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
target-i386: Move APIC to ICC bus
It allows APIC to be hotplugged.
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Replace MSI_SPACE_SIZE with APIC_SPACE_SIZE
Put APIC_SPACE_SIZE in a public header so that it can bereused elsewhere later.
i8259: QOM cleanups
Eliminate DO_UPCAST() for PICCommonState. Prepares for ISA realizefn.
Also give the i8259_common type registration functions unique nameswhile at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>Signed-off-by: Andreas Färber <afaerber@suse.de>...
ioapic: Replace FROM_SYSBUS() with QOM type cast
arm: fix location of some include files
The recent rearrangement of include files had some minor errors: devices.h is not ARM specific and should not be in arm/ arm.h should be in arm/
Move these two headers to correct this.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
Typo, spelling and grammatical fixes
Minor fixes to documentation and code comments.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
hw: move interrupt controllers to hw/intc/, configure with default-configs/
hw: move private headers to hw/ subdirectories.
Many headers are used only in a single directory. These can bekept in hw/.
hw: move target-independent files to subdirectories
This patch tackles all files that are compiled once, movingthem to subdirectories of hw/.
hw: make subdirectories for devices
Prepare the new directory structure.