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1 | 31e31b8a | bellard | /*
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2 | 93ac68bc | bellard | * qemu user main
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3 | 5fafdf24 | ths | *
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4 | 68d0f70e | bellard | * Copyright (c) 2003-2008 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 8167ee88 | Blue Swirl | * along with this program; if not, see <http://www.gnu.org/licenses/>.
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18 | 31e31b8a | bellard | */
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19 | 31e31b8a | bellard | #include <stdlib.h> |
20 | 31e31b8a | bellard | #include <stdio.h> |
21 | 31e31b8a | bellard | #include <stdarg.h> |
22 | 04369ff2 | bellard | #include <string.h> |
23 | 31e31b8a | bellard | #include <errno.h> |
24 | 0ecfa993 | bellard | #include <unistd.h> |
25 | e441570f | balrog | #include <sys/mman.h> |
26 | edf8e2af | Mika Westerberg | #include <sys/syscall.h> |
27 | 703e0e89 | Richard Henderson | #include <sys/resource.h> |
28 | 31e31b8a | bellard | |
29 | 3ef693a0 | bellard | #include "qemu.h" |
30 | ca10f867 | aurel32 | #include "qemu-common.h" |
31 | 902b3d5c | malc | #include "cache-utils.h" |
32 | 2b41f10e | Blue Swirl | #include "cpu.h" |
33 | 9002ec79 | Richard Henderson | #include "tcg.h" |
34 | 29e922b6 | Blue Swirl | #include "qemu-timer.h" |
35 | 04a6dfeb | aurel32 | #include "envlist.h" |
36 | 04a6dfeb | aurel32 | |
37 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
38 | 586314f2 | bellard | |
39 | d088d664 | aurel32 | char *exec_path;
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40 | d088d664 | aurel32 | |
41 | 1b530a6d | aurel32 | int singlestep;
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42 | 379f6698 | Paul Brook | unsigned long mmap_min_addr; |
43 | 14f24e14 | Richard Henderson | #if defined(CONFIG_USE_GUEST_BASE)
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44 | 379f6698 | Paul Brook | unsigned long guest_base; |
45 | 379f6698 | Paul Brook | int have_guest_base;
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46 | 68a1c816 | Paul Brook | unsigned long reserved_va; |
47 | 379f6698 | Paul Brook | #endif
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48 | 1b530a6d | aurel32 | |
49 | 7ee2822c | Paolo Bonzini | static const char *interp_prefix = CONFIG_QEMU_INTERP_PREFIX; |
50 | c5937220 | pbrook | const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
51 | 586314f2 | bellard | |
52 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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53 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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54 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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55 | 703e0e89 | Richard Henderson | unsigned long guest_stack_size = 8 * 1024 * 1024UL; |
56 | 31e31b8a | bellard | |
57 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
58 | 31e31b8a | bellard | { |
59 | 31e31b8a | bellard | va_list ap; |
60 | 31e31b8a | bellard | |
61 | 31e31b8a | bellard | va_start(ap, fmt); |
62 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
63 | 31e31b8a | bellard | va_end(ap); |
64 | 31e31b8a | bellard | } |
65 | 31e31b8a | bellard | |
66 | 8fcd3692 | blueswir1 | #if defined(TARGET_I386)
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67 | a541f297 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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68 | 92ccca6a | bellard | { |
69 | 92ccca6a | bellard | return -1; |
70 | 92ccca6a | bellard | } |
71 | 8fcd3692 | blueswir1 | #endif
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72 | 92ccca6a | bellard | |
73 | 28ab0e2e | bellard | /* timers for rdtsc */
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74 | 28ab0e2e | bellard | |
75 | 1dce7c3c | bellard | #if 0
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76 | 28ab0e2e | bellard | |
77 | 28ab0e2e | bellard | static uint64_t emu_time;
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78 | 28ab0e2e | bellard | |
79 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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80 | 28ab0e2e | bellard | {
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81 | 28ab0e2e | bellard | return emu_time++;
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82 | 28ab0e2e | bellard | }
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83 | 28ab0e2e | bellard | |
84 | 28ab0e2e | bellard | #endif
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85 | 28ab0e2e | bellard | |
86 | 2f7bb878 | Juan Quintela | #if defined(CONFIG_USE_NPTL)
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87 | d5975363 | pbrook | /***********************************************************/
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88 | d5975363 | pbrook | /* Helper routines for implementing atomic operations. */
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89 | d5975363 | pbrook | |
90 | d5975363 | pbrook | /* To implement exclusive operations we force all cpus to syncronise.
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91 | d5975363 | pbrook | We don't require a full sync, only that no cpus are executing guest code.
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92 | d5975363 | pbrook | The alternative is to map target atomic ops onto host equivalents,
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93 | d5975363 | pbrook | which requires quite a lot of per host/target work. */
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94 | c2764719 | pbrook | static pthread_mutex_t cpu_list_mutex = PTHREAD_MUTEX_INITIALIZER;
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95 | d5975363 | pbrook | static pthread_mutex_t exclusive_lock = PTHREAD_MUTEX_INITIALIZER;
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96 | d5975363 | pbrook | static pthread_cond_t exclusive_cond = PTHREAD_COND_INITIALIZER;
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97 | d5975363 | pbrook | static pthread_cond_t exclusive_resume = PTHREAD_COND_INITIALIZER;
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98 | d5975363 | pbrook | static int pending_cpus; |
99 | d5975363 | pbrook | |
100 | d5975363 | pbrook | /* Make sure everything is in a consistent state for calling fork(). */
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101 | d5975363 | pbrook | void fork_start(void) |
102 | d5975363 | pbrook | { |
103 | d5975363 | pbrook | pthread_mutex_lock(&tb_lock); |
104 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
105 | d032d1b4 | Riku Voipio | mmap_fork_start(); |
106 | d5975363 | pbrook | } |
107 | d5975363 | pbrook | |
108 | d5975363 | pbrook | void fork_end(int child) |
109 | d5975363 | pbrook | { |
110 | d032d1b4 | Riku Voipio | mmap_fork_end(child); |
111 | d5975363 | pbrook | if (child) {
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112 | d5975363 | pbrook | /* Child processes created by fork() only have a single thread.
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113 | d5975363 | pbrook | Discard information about the parent threads. */
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114 | d5975363 | pbrook | first_cpu = thread_env; |
115 | d5975363 | pbrook | thread_env->next_cpu = NULL;
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116 | d5975363 | pbrook | pending_cpus = 0;
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117 | d5975363 | pbrook | pthread_mutex_init(&exclusive_lock, NULL);
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118 | c2764719 | pbrook | pthread_mutex_init(&cpu_list_mutex, NULL);
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119 | d5975363 | pbrook | pthread_cond_init(&exclusive_cond, NULL);
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120 | d5975363 | pbrook | pthread_cond_init(&exclusive_resume, NULL);
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121 | d5975363 | pbrook | pthread_mutex_init(&tb_lock, NULL);
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122 | 2b1319c8 | aurel32 | gdbserver_fork(thread_env); |
123 | d5975363 | pbrook | } else {
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124 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
125 | d5975363 | pbrook | pthread_mutex_unlock(&tb_lock); |
126 | d5975363 | pbrook | } |
127 | d5975363 | pbrook | } |
128 | d5975363 | pbrook | |
129 | d5975363 | pbrook | /* Wait for pending exclusive operations to complete. The exclusive lock
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130 | d5975363 | pbrook | must be held. */
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131 | d5975363 | pbrook | static inline void exclusive_idle(void) |
132 | d5975363 | pbrook | { |
133 | d5975363 | pbrook | while (pending_cpus) {
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134 | d5975363 | pbrook | pthread_cond_wait(&exclusive_resume, &exclusive_lock); |
135 | d5975363 | pbrook | } |
136 | d5975363 | pbrook | } |
137 | d5975363 | pbrook | |
138 | d5975363 | pbrook | /* Start an exclusive operation.
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139 | d5975363 | pbrook | Must only be called from outside cpu_arm_exec. */
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140 | d5975363 | pbrook | static inline void start_exclusive(void) |
141 | d5975363 | pbrook | { |
142 | d5975363 | pbrook | CPUState *other; |
143 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
144 | d5975363 | pbrook | exclusive_idle(); |
145 | d5975363 | pbrook | |
146 | d5975363 | pbrook | pending_cpus = 1;
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147 | d5975363 | pbrook | /* Make all other cpus stop executing. */
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148 | d5975363 | pbrook | for (other = first_cpu; other; other = other->next_cpu) {
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149 | d5975363 | pbrook | if (other->running) {
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150 | d5975363 | pbrook | pending_cpus++; |
151 | 3098dba0 | aurel32 | cpu_exit(other); |
152 | d5975363 | pbrook | } |
153 | d5975363 | pbrook | } |
154 | d5975363 | pbrook | if (pending_cpus > 1) { |
155 | d5975363 | pbrook | pthread_cond_wait(&exclusive_cond, &exclusive_lock); |
156 | d5975363 | pbrook | } |
157 | d5975363 | pbrook | } |
158 | d5975363 | pbrook | |
159 | d5975363 | pbrook | /* Finish an exclusive operation. */
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160 | d5975363 | pbrook | static inline void end_exclusive(void) |
161 | d5975363 | pbrook | { |
162 | d5975363 | pbrook | pending_cpus = 0;
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163 | d5975363 | pbrook | pthread_cond_broadcast(&exclusive_resume); |
164 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
165 | d5975363 | pbrook | } |
166 | d5975363 | pbrook | |
167 | d5975363 | pbrook | /* Wait for exclusive ops to finish, and begin cpu execution. */
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168 | d5975363 | pbrook | static inline void cpu_exec_start(CPUState *env) |
169 | d5975363 | pbrook | { |
170 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
171 | d5975363 | pbrook | exclusive_idle(); |
172 | d5975363 | pbrook | env->running = 1;
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173 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
174 | d5975363 | pbrook | } |
175 | d5975363 | pbrook | |
176 | d5975363 | pbrook | /* Mark cpu as not executing, and release pending exclusive ops. */
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177 | d5975363 | pbrook | static inline void cpu_exec_end(CPUState *env) |
178 | d5975363 | pbrook | { |
179 | d5975363 | pbrook | pthread_mutex_lock(&exclusive_lock); |
180 | d5975363 | pbrook | env->running = 0;
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181 | d5975363 | pbrook | if (pending_cpus > 1) { |
182 | d5975363 | pbrook | pending_cpus--; |
183 | d5975363 | pbrook | if (pending_cpus == 1) { |
184 | d5975363 | pbrook | pthread_cond_signal(&exclusive_cond); |
185 | d5975363 | pbrook | } |
186 | d5975363 | pbrook | } |
187 | d5975363 | pbrook | exclusive_idle(); |
188 | d5975363 | pbrook | pthread_mutex_unlock(&exclusive_lock); |
189 | d5975363 | pbrook | } |
190 | c2764719 | pbrook | |
191 | c2764719 | pbrook | void cpu_list_lock(void) |
192 | c2764719 | pbrook | { |
193 | c2764719 | pbrook | pthread_mutex_lock(&cpu_list_mutex); |
194 | c2764719 | pbrook | } |
195 | c2764719 | pbrook | |
196 | c2764719 | pbrook | void cpu_list_unlock(void) |
197 | c2764719 | pbrook | { |
198 | c2764719 | pbrook | pthread_mutex_unlock(&cpu_list_mutex); |
199 | c2764719 | pbrook | } |
200 | 2f7bb878 | Juan Quintela | #else /* if !CONFIG_USE_NPTL */ |
201 | d5975363 | pbrook | /* These are no-ops because we are not threadsafe. */
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202 | d5975363 | pbrook | static inline void cpu_exec_start(CPUState *env) |
203 | d5975363 | pbrook | { |
204 | d5975363 | pbrook | } |
205 | d5975363 | pbrook | |
206 | d5975363 | pbrook | static inline void cpu_exec_end(CPUState *env) |
207 | d5975363 | pbrook | { |
208 | d5975363 | pbrook | } |
209 | d5975363 | pbrook | |
210 | d5975363 | pbrook | static inline void start_exclusive(void) |
211 | d5975363 | pbrook | { |
212 | d5975363 | pbrook | } |
213 | d5975363 | pbrook | |
214 | d5975363 | pbrook | static inline void end_exclusive(void) |
215 | d5975363 | pbrook | { |
216 | d5975363 | pbrook | } |
217 | d5975363 | pbrook | |
218 | d5975363 | pbrook | void fork_start(void) |
219 | d5975363 | pbrook | { |
220 | d5975363 | pbrook | } |
221 | d5975363 | pbrook | |
222 | d5975363 | pbrook | void fork_end(int child) |
223 | d5975363 | pbrook | { |
224 | 2b1319c8 | aurel32 | if (child) {
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225 | 2b1319c8 | aurel32 | gdbserver_fork(thread_env); |
226 | 2b1319c8 | aurel32 | } |
227 | d5975363 | pbrook | } |
228 | c2764719 | pbrook | |
229 | c2764719 | pbrook | void cpu_list_lock(void) |
230 | c2764719 | pbrook | { |
231 | c2764719 | pbrook | } |
232 | c2764719 | pbrook | |
233 | c2764719 | pbrook | void cpu_list_unlock(void) |
234 | c2764719 | pbrook | { |
235 | c2764719 | pbrook | } |
236 | d5975363 | pbrook | #endif
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237 | d5975363 | pbrook | |
238 | d5975363 | pbrook | |
239 | a541f297 | bellard | #ifdef TARGET_I386
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240 | a541f297 | bellard | /***********************************************************/
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241 | a541f297 | bellard | /* CPUX86 core interface */
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242 | a541f297 | bellard | |
243 | 02a1602e | bellard | void cpu_smm_update(CPUState *env)
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244 | 02a1602e | bellard | { |
245 | 02a1602e | bellard | } |
246 | 02a1602e | bellard | |
247 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
248 | 28ab0e2e | bellard | { |
249 | 28ab0e2e | bellard | return cpu_get_real_ticks();
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250 | 28ab0e2e | bellard | } |
251 | 28ab0e2e | bellard | |
252 | 5fafdf24 | ths | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
253 | f4beb510 | bellard | int flags)
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254 | 6dbad63e | bellard | { |
255 | f4beb510 | bellard | unsigned int e1, e2; |
256 | 53a5960a | pbrook | uint32_t *p; |
257 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
258 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
259 | f4beb510 | bellard | e2 |= flags; |
260 | 53a5960a | pbrook | p = ptr; |
261 | d538e8f5 | malc | p[0] = tswap32(e1);
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262 | d538e8f5 | malc | p[1] = tswap32(e2);
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263 | f4beb510 | bellard | } |
264 | f4beb510 | bellard | |
265 | e441570f | balrog | static uint64_t *idt_table;
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266 | eb38c52c | blueswir1 | #ifdef TARGET_X86_64
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267 | d2fd1af7 | bellard | static void set_gate64(void *ptr, unsigned int type, unsigned int dpl, |
268 | d2fd1af7 | bellard | uint64_t addr, unsigned int sel) |
269 | f4beb510 | bellard | { |
270 | 4dbc422b | bellard | uint32_t *p, e1, e2; |
271 | f4beb510 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
272 | f4beb510 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
273 | 53a5960a | pbrook | p = ptr; |
274 | 4dbc422b | bellard | p[0] = tswap32(e1);
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275 | 4dbc422b | bellard | p[1] = tswap32(e2);
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276 | 4dbc422b | bellard | p[2] = tswap32(addr >> 32); |
277 | 4dbc422b | bellard | p[3] = 0; |
278 | 6dbad63e | bellard | } |
279 | d2fd1af7 | bellard | /* only dpl matters as we do only user space emulation */
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280 | d2fd1af7 | bellard | static void set_idt(int n, unsigned int dpl) |
281 | d2fd1af7 | bellard | { |
282 | d2fd1af7 | bellard | set_gate64(idt_table + n * 2, 0, dpl, 0, 0); |
283 | d2fd1af7 | bellard | } |
284 | d2fd1af7 | bellard | #else
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285 | d2fd1af7 | bellard | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
286 | d2fd1af7 | bellard | uint32_t addr, unsigned int sel) |
287 | d2fd1af7 | bellard | { |
288 | 4dbc422b | bellard | uint32_t *p, e1, e2; |
289 | d2fd1af7 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
290 | d2fd1af7 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
291 | d2fd1af7 | bellard | p = ptr; |
292 | 4dbc422b | bellard | p[0] = tswap32(e1);
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293 | 4dbc422b | bellard | p[1] = tswap32(e2);
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294 | d2fd1af7 | bellard | } |
295 | d2fd1af7 | bellard | |
296 | f4beb510 | bellard | /* only dpl matters as we do only user space emulation */
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297 | f4beb510 | bellard | static void set_idt(int n, unsigned int dpl) |
298 | f4beb510 | bellard | { |
299 | f4beb510 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
300 | f4beb510 | bellard | } |
301 | d2fd1af7 | bellard | #endif
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302 | 31e31b8a | bellard | |
303 | 89e957e7 | bellard | void cpu_loop(CPUX86State *env)
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304 | 1b6b029e | bellard | { |
305 | bc8a22cc | bellard | int trapnr;
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306 | 992f48a0 | blueswir1 | abi_ulong pc; |
307 | c227f099 | Anthony Liguori | target_siginfo_t info; |
308 | 851e67a1 | bellard | |
309 | 1b6b029e | bellard | for(;;) {
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310 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
311 | bc8a22cc | bellard | switch(trapnr) {
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312 | f4beb510 | bellard | case 0x80: |
313 | d2fd1af7 | bellard | /* linux syscall from int $0x80 */
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314 | 5fafdf24 | ths | env->regs[R_EAX] = do_syscall(env, |
315 | 5fafdf24 | ths | env->regs[R_EAX], |
316 | f4beb510 | bellard | env->regs[R_EBX], |
317 | f4beb510 | bellard | env->regs[R_ECX], |
318 | f4beb510 | bellard | env->regs[R_EDX], |
319 | f4beb510 | bellard | env->regs[R_ESI], |
320 | f4beb510 | bellard | env->regs[R_EDI], |
321 | 5945cfcb | Peter Maydell | env->regs[R_EBP], |
322 | 5945cfcb | Peter Maydell | 0, 0); |
323 | f4beb510 | bellard | break;
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324 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
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325 | d2fd1af7 | bellard | case EXCP_SYSCALL:
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326 | 5ba18547 | Stefan Weil | /* linux syscall from syscall instruction */
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327 | d2fd1af7 | bellard | env->regs[R_EAX] = do_syscall(env, |
328 | d2fd1af7 | bellard | env->regs[R_EAX], |
329 | d2fd1af7 | bellard | env->regs[R_EDI], |
330 | d2fd1af7 | bellard | env->regs[R_ESI], |
331 | d2fd1af7 | bellard | env->regs[R_EDX], |
332 | d2fd1af7 | bellard | env->regs[10],
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333 | d2fd1af7 | bellard | env->regs[8],
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334 | 5945cfcb | Peter Maydell | env->regs[9],
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335 | 5945cfcb | Peter Maydell | 0, 0); |
336 | d2fd1af7 | bellard | env->eip = env->exception_next_eip; |
337 | d2fd1af7 | bellard | break;
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338 | d2fd1af7 | bellard | #endif
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339 | f4beb510 | bellard | case EXCP0B_NOSEG:
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340 | f4beb510 | bellard | case EXCP0C_STACK:
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341 | f4beb510 | bellard | info.si_signo = SIGBUS; |
342 | f4beb510 | bellard | info.si_errno = 0;
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343 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
344 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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345 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
346 | f4beb510 | bellard | break;
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347 | 1b6b029e | bellard | case EXCP0D_GPF:
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348 | d2fd1af7 | bellard | /* XXX: potential problem if ABI32 */
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349 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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350 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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351 | 89e957e7 | bellard | handle_vm86_fault(env); |
352 | 84409ddb | j_mayer | } else
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353 | 84409ddb | j_mayer | #endif
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354 | 84409ddb | j_mayer | { |
355 | f4beb510 | bellard | info.si_signo = SIGSEGV; |
356 | f4beb510 | bellard | info.si_errno = 0;
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357 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
358 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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359 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
360 | 1b6b029e | bellard | } |
361 | 1b6b029e | bellard | break;
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362 | b689bc57 | bellard | case EXCP0E_PAGE:
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363 | b689bc57 | bellard | info.si_signo = SIGSEGV; |
364 | b689bc57 | bellard | info.si_errno = 0;
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365 | b689bc57 | bellard | if (!(env->error_code & 1)) |
366 | b689bc57 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
367 | b689bc57 | bellard | else
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368 | b689bc57 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
369 | 970a87a6 | bellard | info._sifields._sigfault._addr = env->cr[2];
|
370 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
371 | b689bc57 | bellard | break;
|
372 | 9de5e440 | bellard | case EXCP00_DIVZ:
|
373 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
374 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
|
375 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
376 | 84409ddb | j_mayer | } else
|
377 | 84409ddb | j_mayer | #endif
|
378 | 84409ddb | j_mayer | { |
379 | bc8a22cc | bellard | /* division by zero */
|
380 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
381 | bc8a22cc | bellard | info.si_errno = 0;
|
382 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
383 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
384 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
385 | bc8a22cc | bellard | } |
386 | 9de5e440 | bellard | break;
|
387 | 01df040b | aliguori | case EXCP01_DB:
|
388 | 447db213 | bellard | case EXCP03_INT3:
|
389 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
390 | 447db213 | bellard | if (env->eflags & VM_MASK) {
|
391 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
392 | 84409ddb | j_mayer | } else
|
393 | 84409ddb | j_mayer | #endif
|
394 | 84409ddb | j_mayer | { |
395 | 447db213 | bellard | info.si_signo = SIGTRAP; |
396 | 447db213 | bellard | info.si_errno = 0;
|
397 | 01df040b | aliguori | if (trapnr == EXCP01_DB) {
|
398 | 447db213 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
399 | 447db213 | bellard | info._sifields._sigfault._addr = env->eip; |
400 | 447db213 | bellard | } else {
|
401 | 447db213 | bellard | info.si_code = TARGET_SI_KERNEL; |
402 | 447db213 | bellard | info._sifields._sigfault._addr = 0;
|
403 | 447db213 | bellard | } |
404 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
405 | 447db213 | bellard | } |
406 | 447db213 | bellard | break;
|
407 | 9de5e440 | bellard | case EXCP04_INTO:
|
408 | 9de5e440 | bellard | case EXCP05_BOUND:
|
409 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
|
410 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
|
411 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
412 | 84409ddb | j_mayer | } else
|
413 | 84409ddb | j_mayer | #endif
|
414 | 84409ddb | j_mayer | { |
415 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
416 | bc8a22cc | bellard | info.si_errno = 0;
|
417 | b689bc57 | bellard | info.si_code = TARGET_SI_KERNEL; |
418 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
|
419 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
420 | bc8a22cc | bellard | } |
421 | 9de5e440 | bellard | break;
|
422 | 9de5e440 | bellard | case EXCP06_ILLOP:
|
423 | 9de5e440 | bellard | info.si_signo = SIGILL; |
424 | 9de5e440 | bellard | info.si_errno = 0;
|
425 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
426 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
427 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
428 | 9de5e440 | bellard | break;
|
429 | 9de5e440 | bellard | case EXCP_INTERRUPT:
|
430 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
|
431 | 9de5e440 | bellard | break;
|
432 | 1fddef4b | bellard | case EXCP_DEBUG:
|
433 | 1fddef4b | bellard | { |
434 | 1fddef4b | bellard | int sig;
|
435 | 1fddef4b | bellard | |
436 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
437 | 1fddef4b | bellard | if (sig)
|
438 | 1fddef4b | bellard | { |
439 | 1fddef4b | bellard | info.si_signo = sig; |
440 | 1fddef4b | bellard | info.si_errno = 0;
|
441 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
442 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
443 | 1fddef4b | bellard | } |
444 | 1fddef4b | bellard | } |
445 | 1fddef4b | bellard | break;
|
446 | 1b6b029e | bellard | default:
|
447 | 970a87a6 | bellard | pc = env->segs[R_CS].base + env->eip; |
448 | 5fafdf24 | ths | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
|
449 | bc8a22cc | bellard | (long)pc, trapnr);
|
450 | 1b6b029e | bellard | abort(); |
451 | 1b6b029e | bellard | } |
452 | 66fb9763 | bellard | process_pending_signals(env); |
453 | 1b6b029e | bellard | } |
454 | 1b6b029e | bellard | } |
455 | b346ff46 | bellard | #endif
|
456 | b346ff46 | bellard | |
457 | b346ff46 | bellard | #ifdef TARGET_ARM
|
458 | b346ff46 | bellard | |
459 | fbb4a2e3 | pbrook | /* Handle a jump to the kernel code page. */
|
460 | fbb4a2e3 | pbrook | static int |
461 | fbb4a2e3 | pbrook | do_kernel_trap(CPUARMState *env) |
462 | fbb4a2e3 | pbrook | { |
463 | fbb4a2e3 | pbrook | uint32_t addr; |
464 | fbb4a2e3 | pbrook | uint32_t cpsr; |
465 | fbb4a2e3 | pbrook | uint32_t val; |
466 | fbb4a2e3 | pbrook | |
467 | fbb4a2e3 | pbrook | switch (env->regs[15]) { |
468 | fbb4a2e3 | pbrook | case 0xffff0fa0: /* __kernel_memory_barrier */ |
469 | fbb4a2e3 | pbrook | /* ??? No-op. Will need to do better for SMP. */
|
470 | fbb4a2e3 | pbrook | break;
|
471 | fbb4a2e3 | pbrook | case 0xffff0fc0: /* __kernel_cmpxchg */ |
472 | d5975363 | pbrook | /* XXX: This only works between threads, not between processes.
|
473 | d5975363 | pbrook | It's probably possible to implement this with native host
|
474 | d5975363 | pbrook | operations. However things like ldrex/strex are much harder so
|
475 | d5975363 | pbrook | there's not much point trying. */
|
476 | d5975363 | pbrook | start_exclusive(); |
477 | fbb4a2e3 | pbrook | cpsr = cpsr_read(env); |
478 | fbb4a2e3 | pbrook | addr = env->regs[2];
|
479 | fbb4a2e3 | pbrook | /* FIXME: This should SEGV if the access fails. */
|
480 | fbb4a2e3 | pbrook | if (get_user_u32(val, addr))
|
481 | fbb4a2e3 | pbrook | val = ~env->regs[0];
|
482 | fbb4a2e3 | pbrook | if (val == env->regs[0]) { |
483 | fbb4a2e3 | pbrook | val = env->regs[1];
|
484 | fbb4a2e3 | pbrook | /* FIXME: Check for segfaults. */
|
485 | fbb4a2e3 | pbrook | put_user_u32(val, addr); |
486 | fbb4a2e3 | pbrook | env->regs[0] = 0; |
487 | fbb4a2e3 | pbrook | cpsr |= CPSR_C; |
488 | fbb4a2e3 | pbrook | } else {
|
489 | fbb4a2e3 | pbrook | env->regs[0] = -1; |
490 | fbb4a2e3 | pbrook | cpsr &= ~CPSR_C; |
491 | fbb4a2e3 | pbrook | } |
492 | fbb4a2e3 | pbrook | cpsr_write(env, cpsr, CPSR_C); |
493 | d5975363 | pbrook | end_exclusive(); |
494 | fbb4a2e3 | pbrook | break;
|
495 | fbb4a2e3 | pbrook | case 0xffff0fe0: /* __kernel_get_tls */ |
496 | fbb4a2e3 | pbrook | env->regs[0] = env->cp15.c13_tls2;
|
497 | fbb4a2e3 | pbrook | break;
|
498 | fbb4a2e3 | pbrook | default:
|
499 | fbb4a2e3 | pbrook | return 1; |
500 | fbb4a2e3 | pbrook | } |
501 | fbb4a2e3 | pbrook | /* Jump back to the caller. */
|
502 | fbb4a2e3 | pbrook | addr = env->regs[14];
|
503 | fbb4a2e3 | pbrook | if (addr & 1) { |
504 | fbb4a2e3 | pbrook | env->thumb = 1;
|
505 | fbb4a2e3 | pbrook | addr &= ~1;
|
506 | fbb4a2e3 | pbrook | } |
507 | fbb4a2e3 | pbrook | env->regs[15] = addr;
|
508 | fbb4a2e3 | pbrook | |
509 | fbb4a2e3 | pbrook | return 0; |
510 | fbb4a2e3 | pbrook | } |
511 | fbb4a2e3 | pbrook | |
512 | 426f5abc | Paul Brook | static int do_strex(CPUARMState *env) |
513 | 426f5abc | Paul Brook | { |
514 | 426f5abc | Paul Brook | uint32_t val; |
515 | 426f5abc | Paul Brook | int size;
|
516 | 426f5abc | Paul Brook | int rc = 1; |
517 | 426f5abc | Paul Brook | int segv = 0; |
518 | 426f5abc | Paul Brook | uint32_t addr; |
519 | 426f5abc | Paul Brook | start_exclusive(); |
520 | 426f5abc | Paul Brook | addr = env->exclusive_addr; |
521 | 426f5abc | Paul Brook | if (addr != env->exclusive_test) {
|
522 | 426f5abc | Paul Brook | goto fail;
|
523 | 426f5abc | Paul Brook | } |
524 | 426f5abc | Paul Brook | size = env->exclusive_info & 0xf;
|
525 | 426f5abc | Paul Brook | switch (size) {
|
526 | 426f5abc | Paul Brook | case 0: |
527 | 426f5abc | Paul Brook | segv = get_user_u8(val, addr); |
528 | 426f5abc | Paul Brook | break;
|
529 | 426f5abc | Paul Brook | case 1: |
530 | 426f5abc | Paul Brook | segv = get_user_u16(val, addr); |
531 | 426f5abc | Paul Brook | break;
|
532 | 426f5abc | Paul Brook | case 2: |
533 | 426f5abc | Paul Brook | case 3: |
534 | 426f5abc | Paul Brook | segv = get_user_u32(val, addr); |
535 | 426f5abc | Paul Brook | break;
|
536 | f7001a3b | Aurelien Jarno | default:
|
537 | f7001a3b | Aurelien Jarno | abort(); |
538 | 426f5abc | Paul Brook | } |
539 | 426f5abc | Paul Brook | if (segv) {
|
540 | 426f5abc | Paul Brook | env->cp15.c6_data = addr; |
541 | 426f5abc | Paul Brook | goto done;
|
542 | 426f5abc | Paul Brook | } |
543 | 426f5abc | Paul Brook | if (val != env->exclusive_val) {
|
544 | 426f5abc | Paul Brook | goto fail;
|
545 | 426f5abc | Paul Brook | } |
546 | 426f5abc | Paul Brook | if (size == 3) { |
547 | 426f5abc | Paul Brook | segv = get_user_u32(val, addr + 4);
|
548 | 426f5abc | Paul Brook | if (segv) {
|
549 | 426f5abc | Paul Brook | env->cp15.c6_data = addr + 4;
|
550 | 426f5abc | Paul Brook | goto done;
|
551 | 426f5abc | Paul Brook | } |
552 | 426f5abc | Paul Brook | if (val != env->exclusive_high) {
|
553 | 426f5abc | Paul Brook | goto fail;
|
554 | 426f5abc | Paul Brook | } |
555 | 426f5abc | Paul Brook | } |
556 | 426f5abc | Paul Brook | val = env->regs[(env->exclusive_info >> 8) & 0xf]; |
557 | 426f5abc | Paul Brook | switch (size) {
|
558 | 426f5abc | Paul Brook | case 0: |
559 | 426f5abc | Paul Brook | segv = put_user_u8(val, addr); |
560 | 426f5abc | Paul Brook | break;
|
561 | 426f5abc | Paul Brook | case 1: |
562 | 426f5abc | Paul Brook | segv = put_user_u16(val, addr); |
563 | 426f5abc | Paul Brook | break;
|
564 | 426f5abc | Paul Brook | case 2: |
565 | 426f5abc | Paul Brook | case 3: |
566 | 426f5abc | Paul Brook | segv = put_user_u32(val, addr); |
567 | 426f5abc | Paul Brook | break;
|
568 | 426f5abc | Paul Brook | } |
569 | 426f5abc | Paul Brook | if (segv) {
|
570 | 426f5abc | Paul Brook | env->cp15.c6_data = addr; |
571 | 426f5abc | Paul Brook | goto done;
|
572 | 426f5abc | Paul Brook | } |
573 | 426f5abc | Paul Brook | if (size == 3) { |
574 | 426f5abc | Paul Brook | val = env->regs[(env->exclusive_info >> 12) & 0xf]; |
575 | 2c9adbda | Peter Maydell | segv = put_user_u32(val, addr + 4);
|
576 | 426f5abc | Paul Brook | if (segv) {
|
577 | 426f5abc | Paul Brook | env->cp15.c6_data = addr + 4;
|
578 | 426f5abc | Paul Brook | goto done;
|
579 | 426f5abc | Paul Brook | } |
580 | 426f5abc | Paul Brook | } |
581 | 426f5abc | Paul Brook | rc = 0;
|
582 | 426f5abc | Paul Brook | fail:
|
583 | 725b8a69 | Paul Brook | env->regs[15] += 4; |
584 | 426f5abc | Paul Brook | env->regs[(env->exclusive_info >> 4) & 0xf] = rc; |
585 | 426f5abc | Paul Brook | done:
|
586 | 426f5abc | Paul Brook | end_exclusive(); |
587 | 426f5abc | Paul Brook | return segv;
|
588 | 426f5abc | Paul Brook | } |
589 | 426f5abc | Paul Brook | |
590 | b346ff46 | bellard | void cpu_loop(CPUARMState *env)
|
591 | b346ff46 | bellard | { |
592 | b346ff46 | bellard | int trapnr;
|
593 | b346ff46 | bellard | unsigned int n, insn; |
594 | c227f099 | Anthony Liguori | target_siginfo_t info; |
595 | b5ff1b31 | bellard | uint32_t addr; |
596 | 3b46e624 | ths | |
597 | b346ff46 | bellard | for(;;) {
|
598 | d5975363 | pbrook | cpu_exec_start(env); |
599 | b346ff46 | bellard | trapnr = cpu_arm_exec(env); |
600 | d5975363 | pbrook | cpu_exec_end(env); |
601 | b346ff46 | bellard | switch(trapnr) {
|
602 | b346ff46 | bellard | case EXCP_UDEF:
|
603 | c6981055 | bellard | { |
604 | c6981055 | bellard | TaskState *ts = env->opaque; |
605 | c6981055 | bellard | uint32_t opcode; |
606 | 6d9a42be | aurel32 | int rc;
|
607 | c6981055 | bellard | |
608 | c6981055 | bellard | /* we handle the FPU emulation here, as Linux */
|
609 | c6981055 | bellard | /* we get the opcode */
|
610 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
611 | 2f619698 | bellard | get_user_u32(opcode, env->regs[15]);
|
612 | 3b46e624 | ths | |
613 | 6d9a42be | aurel32 | rc = EmulateAll(opcode, &ts->fpa, env); |
614 | 6d9a42be | aurel32 | if (rc == 0) { /* illegal instruction */ |
615 | c6981055 | bellard | info.si_signo = SIGILL; |
616 | c6981055 | bellard | info.si_errno = 0;
|
617 | c6981055 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
618 | c6981055 | bellard | info._sifields._sigfault._addr = env->regs[15];
|
619 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
620 | 6d9a42be | aurel32 | } else if (rc < 0) { /* FP exception */ |
621 | 6d9a42be | aurel32 | int arm_fpe=0; |
622 | 6d9a42be | aurel32 | |
623 | 6d9a42be | aurel32 | /* translate softfloat flags to FPSR flags */
|
624 | 6d9a42be | aurel32 | if (-rc & float_flag_invalid)
|
625 | 6d9a42be | aurel32 | arm_fpe |= BIT_IOC; |
626 | 6d9a42be | aurel32 | if (-rc & float_flag_divbyzero)
|
627 | 6d9a42be | aurel32 | arm_fpe |= BIT_DZC; |
628 | 6d9a42be | aurel32 | if (-rc & float_flag_overflow)
|
629 | 6d9a42be | aurel32 | arm_fpe |= BIT_OFC; |
630 | 6d9a42be | aurel32 | if (-rc & float_flag_underflow)
|
631 | 6d9a42be | aurel32 | arm_fpe |= BIT_UFC; |
632 | 6d9a42be | aurel32 | if (-rc & float_flag_inexact)
|
633 | 6d9a42be | aurel32 | arm_fpe |= BIT_IXC; |
634 | 6d9a42be | aurel32 | |
635 | 6d9a42be | aurel32 | FPSR fpsr = ts->fpa.fpsr; |
636 | 6d9a42be | aurel32 | //printf("fpsr 0x%x, arm_fpe 0x%x\n",fpsr,arm_fpe);
|
637 | 6d9a42be | aurel32 | |
638 | 6d9a42be | aurel32 | if (fpsr & (arm_fpe << 16)) { /* exception enabled? */ |
639 | 6d9a42be | aurel32 | info.si_signo = SIGFPE; |
640 | 6d9a42be | aurel32 | info.si_errno = 0;
|
641 | 6d9a42be | aurel32 | |
642 | 6d9a42be | aurel32 | /* ordered by priority, least first */
|
643 | 6d9a42be | aurel32 | if (arm_fpe & BIT_IXC) info.si_code = TARGET_FPE_FLTRES;
|
644 | 6d9a42be | aurel32 | if (arm_fpe & BIT_UFC) info.si_code = TARGET_FPE_FLTUND;
|
645 | 6d9a42be | aurel32 | if (arm_fpe & BIT_OFC) info.si_code = TARGET_FPE_FLTOVF;
|
646 | 6d9a42be | aurel32 | if (arm_fpe & BIT_DZC) info.si_code = TARGET_FPE_FLTDIV;
|
647 | 6d9a42be | aurel32 | if (arm_fpe & BIT_IOC) info.si_code = TARGET_FPE_FLTINV;
|
648 | 6d9a42be | aurel32 | |
649 | 6d9a42be | aurel32 | info._sifields._sigfault._addr = env->regs[15];
|
650 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
651 | 6d9a42be | aurel32 | } else {
|
652 | 6d9a42be | aurel32 | env->regs[15] += 4; |
653 | 6d9a42be | aurel32 | } |
654 | 6d9a42be | aurel32 | |
655 | 6d9a42be | aurel32 | /* accumulate unenabled exceptions */
|
656 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_IXE)) && (arm_fpe & BIT_IXC))
|
657 | 6d9a42be | aurel32 | fpsr |= BIT_IXC; |
658 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_UFE)) && (arm_fpe & BIT_UFC))
|
659 | 6d9a42be | aurel32 | fpsr |= BIT_UFC; |
660 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_OFE)) && (arm_fpe & BIT_OFC))
|
661 | 6d9a42be | aurel32 | fpsr |= BIT_OFC; |
662 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_DZE)) && (arm_fpe & BIT_DZC))
|
663 | 6d9a42be | aurel32 | fpsr |= BIT_DZC; |
664 | 6d9a42be | aurel32 | if ((!(fpsr & BIT_IOE)) && (arm_fpe & BIT_IOC))
|
665 | 6d9a42be | aurel32 | fpsr |= BIT_IOC; |
666 | 6d9a42be | aurel32 | ts->fpa.fpsr=fpsr; |
667 | 6d9a42be | aurel32 | } else { /* everything OK */ |
668 | c6981055 | bellard | /* increment PC */
|
669 | c6981055 | bellard | env->regs[15] += 4; |
670 | c6981055 | bellard | } |
671 | c6981055 | bellard | } |
672 | b346ff46 | bellard | break;
|
673 | b346ff46 | bellard | case EXCP_SWI:
|
674 | 06c949e6 | pbrook | case EXCP_BKPT:
|
675 | b346ff46 | bellard | { |
676 | ce4defa0 | pbrook | env->eabi = 1;
|
677 | b346ff46 | bellard | /* system call */
|
678 | 06c949e6 | pbrook | if (trapnr == EXCP_BKPT) {
|
679 | 06c949e6 | pbrook | if (env->thumb) {
|
680 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
681 | 2f619698 | bellard | get_user_u16(insn, env->regs[15]);
|
682 | 06c949e6 | pbrook | n = insn & 0xff;
|
683 | 06c949e6 | pbrook | env->regs[15] += 2; |
684 | 06c949e6 | pbrook | } else {
|
685 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
686 | 2f619698 | bellard | get_user_u32(insn, env->regs[15]);
|
687 | 06c949e6 | pbrook | n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
688 | 06c949e6 | pbrook | env->regs[15] += 4; |
689 | 06c949e6 | pbrook | } |
690 | 192c7bd9 | bellard | } else {
|
691 | 06c949e6 | pbrook | if (env->thumb) {
|
692 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
693 | 2f619698 | bellard | get_user_u16(insn, env->regs[15] - 2); |
694 | 06c949e6 | pbrook | n = insn & 0xff;
|
695 | 06c949e6 | pbrook | } else {
|
696 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
697 | 2f619698 | bellard | get_user_u32(insn, env->regs[15] - 4); |
698 | 06c949e6 | pbrook | n = insn & 0xffffff;
|
699 | 06c949e6 | pbrook | } |
700 | 192c7bd9 | bellard | } |
701 | 192c7bd9 | bellard | |
702 | 6f1f31c0 | bellard | if (n == ARM_NR_cacheflush) {
|
703 | dcfd14b3 | Blue Swirl | /* nop */
|
704 | a4f81979 | bellard | } else if (n == ARM_NR_semihosting |
705 | a4f81979 | bellard | || n == ARM_NR_thumb_semihosting) { |
706 | a4f81979 | bellard | env->regs[0] = do_arm_semihosting (env);
|
707 | ce4defa0 | pbrook | } else if (n == 0 || n >= ARM_SYSCALL_BASE |
708 | 192c7bd9 | bellard | || (env->thumb && n == ARM_THUMB_SYSCALL)) { |
709 | b346ff46 | bellard | /* linux syscall */
|
710 | ce4defa0 | pbrook | if (env->thumb || n == 0) { |
711 | 192c7bd9 | bellard | n = env->regs[7];
|
712 | 192c7bd9 | bellard | } else {
|
713 | 192c7bd9 | bellard | n -= ARM_SYSCALL_BASE; |
714 | ce4defa0 | pbrook | env->eabi = 0;
|
715 | 192c7bd9 | bellard | } |
716 | fbb4a2e3 | pbrook | if ( n > ARM_NR_BASE) {
|
717 | fbb4a2e3 | pbrook | switch (n) {
|
718 | fbb4a2e3 | pbrook | case ARM_NR_cacheflush:
|
719 | dcfd14b3 | Blue Swirl | /* nop */
|
720 | fbb4a2e3 | pbrook | break;
|
721 | fbb4a2e3 | pbrook | case ARM_NR_set_tls:
|
722 | fbb4a2e3 | pbrook | cpu_set_tls(env, env->regs[0]);
|
723 | fbb4a2e3 | pbrook | env->regs[0] = 0; |
724 | fbb4a2e3 | pbrook | break;
|
725 | fbb4a2e3 | pbrook | default:
|
726 | fbb4a2e3 | pbrook | gemu_log("qemu: Unsupported ARM syscall: 0x%x\n",
|
727 | fbb4a2e3 | pbrook | n); |
728 | fbb4a2e3 | pbrook | env->regs[0] = -TARGET_ENOSYS;
|
729 | fbb4a2e3 | pbrook | break;
|
730 | fbb4a2e3 | pbrook | } |
731 | fbb4a2e3 | pbrook | } else {
|
732 | fbb4a2e3 | pbrook | env->regs[0] = do_syscall(env,
|
733 | fbb4a2e3 | pbrook | n, |
734 | fbb4a2e3 | pbrook | env->regs[0],
|
735 | fbb4a2e3 | pbrook | env->regs[1],
|
736 | fbb4a2e3 | pbrook | env->regs[2],
|
737 | fbb4a2e3 | pbrook | env->regs[3],
|
738 | fbb4a2e3 | pbrook | env->regs[4],
|
739 | 5945cfcb | Peter Maydell | env->regs[5],
|
740 | 5945cfcb | Peter Maydell | 0, 0); |
741 | fbb4a2e3 | pbrook | } |
742 | b346ff46 | bellard | } else {
|
743 | b346ff46 | bellard | goto error;
|
744 | b346ff46 | bellard | } |
745 | b346ff46 | bellard | } |
746 | b346ff46 | bellard | break;
|
747 | 43fff238 | bellard | case EXCP_INTERRUPT:
|
748 | 43fff238 | bellard | /* just indicate that signals should be handled asap */
|
749 | 43fff238 | bellard | break;
|
750 | 68016c62 | bellard | case EXCP_PREFETCH_ABORT:
|
751 | eae473c1 | balrog | addr = env->cp15.c6_insn; |
752 | b5ff1b31 | bellard | goto do_segv;
|
753 | 68016c62 | bellard | case EXCP_DATA_ABORT:
|
754 | eae473c1 | balrog | addr = env->cp15.c6_data; |
755 | b5ff1b31 | bellard | goto do_segv;
|
756 | b5ff1b31 | bellard | do_segv:
|
757 | 68016c62 | bellard | { |
758 | 68016c62 | bellard | info.si_signo = SIGSEGV; |
759 | 68016c62 | bellard | info.si_errno = 0;
|
760 | 68016c62 | bellard | /* XXX: check env->error_code */
|
761 | 68016c62 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
762 | b5ff1b31 | bellard | info._sifields._sigfault._addr = addr; |
763 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
764 | 68016c62 | bellard | } |
765 | 68016c62 | bellard | break;
|
766 | 1fddef4b | bellard | case EXCP_DEBUG:
|
767 | 1fddef4b | bellard | { |
768 | 1fddef4b | bellard | int sig;
|
769 | 1fddef4b | bellard | |
770 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
771 | 1fddef4b | bellard | if (sig)
|
772 | 1fddef4b | bellard | { |
773 | 1fddef4b | bellard | info.si_signo = sig; |
774 | 1fddef4b | bellard | info.si_errno = 0;
|
775 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
776 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
777 | 1fddef4b | bellard | } |
778 | 1fddef4b | bellard | } |
779 | 1fddef4b | bellard | break;
|
780 | fbb4a2e3 | pbrook | case EXCP_KERNEL_TRAP:
|
781 | fbb4a2e3 | pbrook | if (do_kernel_trap(env))
|
782 | fbb4a2e3 | pbrook | goto error;
|
783 | fbb4a2e3 | pbrook | break;
|
784 | 426f5abc | Paul Brook | case EXCP_STREX:
|
785 | 426f5abc | Paul Brook | if (do_strex(env)) {
|
786 | 426f5abc | Paul Brook | addr = env->cp15.c6_data; |
787 | 426f5abc | Paul Brook | goto do_segv;
|
788 | 426f5abc | Paul Brook | } |
789 | e9273455 | Paul Brook | break;
|
790 | b346ff46 | bellard | default:
|
791 | b346ff46 | bellard | error:
|
792 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
793 | b346ff46 | bellard | trapnr); |
794 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
795 | b346ff46 | bellard | abort(); |
796 | b346ff46 | bellard | } |
797 | b346ff46 | bellard | process_pending_signals(env); |
798 | b346ff46 | bellard | } |
799 | b346ff46 | bellard | } |
800 | b346ff46 | bellard | |
801 | b346ff46 | bellard | #endif
|
802 | 1b6b029e | bellard | |
803 | d2fbca94 | Guan Xuetao | #ifdef TARGET_UNICORE32
|
804 | d2fbca94 | Guan Xuetao | |
805 | d2fbca94 | Guan Xuetao | void cpu_loop(CPUState *env)
|
806 | d2fbca94 | Guan Xuetao | { |
807 | d2fbca94 | Guan Xuetao | int trapnr;
|
808 | d2fbca94 | Guan Xuetao | unsigned int n, insn; |
809 | d2fbca94 | Guan Xuetao | target_siginfo_t info; |
810 | d2fbca94 | Guan Xuetao | |
811 | d2fbca94 | Guan Xuetao | for (;;) {
|
812 | d2fbca94 | Guan Xuetao | cpu_exec_start(env); |
813 | d2fbca94 | Guan Xuetao | trapnr = uc32_cpu_exec(env); |
814 | d2fbca94 | Guan Xuetao | cpu_exec_end(env); |
815 | d2fbca94 | Guan Xuetao | switch (trapnr) {
|
816 | d2fbca94 | Guan Xuetao | case UC32_EXCP_PRIV:
|
817 | d2fbca94 | Guan Xuetao | { |
818 | d2fbca94 | Guan Xuetao | /* system call */
|
819 | d2fbca94 | Guan Xuetao | get_user_u32(insn, env->regs[31] - 4); |
820 | d2fbca94 | Guan Xuetao | n = insn & 0xffffff;
|
821 | d2fbca94 | Guan Xuetao | |
822 | d2fbca94 | Guan Xuetao | if (n >= UC32_SYSCALL_BASE) {
|
823 | d2fbca94 | Guan Xuetao | /* linux syscall */
|
824 | d2fbca94 | Guan Xuetao | n -= UC32_SYSCALL_BASE; |
825 | d2fbca94 | Guan Xuetao | if (n == UC32_SYSCALL_NR_set_tls) {
|
826 | d2fbca94 | Guan Xuetao | cpu_set_tls(env, env->regs[0]);
|
827 | d2fbca94 | Guan Xuetao | env->regs[0] = 0; |
828 | d2fbca94 | Guan Xuetao | } else {
|
829 | d2fbca94 | Guan Xuetao | env->regs[0] = do_syscall(env,
|
830 | d2fbca94 | Guan Xuetao | n, |
831 | d2fbca94 | Guan Xuetao | env->regs[0],
|
832 | d2fbca94 | Guan Xuetao | env->regs[1],
|
833 | d2fbca94 | Guan Xuetao | env->regs[2],
|
834 | d2fbca94 | Guan Xuetao | env->regs[3],
|
835 | d2fbca94 | Guan Xuetao | env->regs[4],
|
836 | 5945cfcb | Peter Maydell | env->regs[5],
|
837 | 5945cfcb | Peter Maydell | 0, 0); |
838 | d2fbca94 | Guan Xuetao | } |
839 | d2fbca94 | Guan Xuetao | } else {
|
840 | d2fbca94 | Guan Xuetao | goto error;
|
841 | d2fbca94 | Guan Xuetao | } |
842 | d2fbca94 | Guan Xuetao | } |
843 | d2fbca94 | Guan Xuetao | break;
|
844 | d2fbca94 | Guan Xuetao | case UC32_EXCP_TRAP:
|
845 | d2fbca94 | Guan Xuetao | info.si_signo = SIGSEGV; |
846 | d2fbca94 | Guan Xuetao | info.si_errno = 0;
|
847 | d2fbca94 | Guan Xuetao | /* XXX: check env->error_code */
|
848 | d2fbca94 | Guan Xuetao | info.si_code = TARGET_SEGV_MAPERR; |
849 | d2fbca94 | Guan Xuetao | info._sifields._sigfault._addr = env->cp0.c4_faultaddr; |
850 | d2fbca94 | Guan Xuetao | queue_signal(env, info.si_signo, &info); |
851 | d2fbca94 | Guan Xuetao | break;
|
852 | d2fbca94 | Guan Xuetao | case EXCP_INTERRUPT:
|
853 | d2fbca94 | Guan Xuetao | /* just indicate that signals should be handled asap */
|
854 | d2fbca94 | Guan Xuetao | break;
|
855 | d2fbca94 | Guan Xuetao | case EXCP_DEBUG:
|
856 | d2fbca94 | Guan Xuetao | { |
857 | d2fbca94 | Guan Xuetao | int sig;
|
858 | d2fbca94 | Guan Xuetao | |
859 | d2fbca94 | Guan Xuetao | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
860 | d2fbca94 | Guan Xuetao | if (sig) {
|
861 | d2fbca94 | Guan Xuetao | info.si_signo = sig; |
862 | d2fbca94 | Guan Xuetao | info.si_errno = 0;
|
863 | d2fbca94 | Guan Xuetao | info.si_code = TARGET_TRAP_BRKPT; |
864 | d2fbca94 | Guan Xuetao | queue_signal(env, info.si_signo, &info); |
865 | d2fbca94 | Guan Xuetao | } |
866 | d2fbca94 | Guan Xuetao | } |
867 | d2fbca94 | Guan Xuetao | break;
|
868 | d2fbca94 | Guan Xuetao | default:
|
869 | d2fbca94 | Guan Xuetao | goto error;
|
870 | d2fbca94 | Guan Xuetao | } |
871 | d2fbca94 | Guan Xuetao | process_pending_signals(env); |
872 | d2fbca94 | Guan Xuetao | } |
873 | d2fbca94 | Guan Xuetao | |
874 | d2fbca94 | Guan Xuetao | error:
|
875 | d2fbca94 | Guan Xuetao | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n", trapnr);
|
876 | d2fbca94 | Guan Xuetao | cpu_dump_state(env, stderr, fprintf, 0);
|
877 | d2fbca94 | Guan Xuetao | abort(); |
878 | d2fbca94 | Guan Xuetao | } |
879 | d2fbca94 | Guan Xuetao | #endif
|
880 | d2fbca94 | Guan Xuetao | |
881 | 93ac68bc | bellard | #ifdef TARGET_SPARC
|
882 | ed23fbd9 | blueswir1 | #define SPARC64_STACK_BIAS 2047 |
883 | 93ac68bc | bellard | |
884 | 060366c5 | bellard | //#define DEBUG_WIN
|
885 | 060366c5 | bellard | |
886 | 2623cbaf | bellard | /* WARNING: dealing with register windows _is_ complicated. More info
|
887 | 2623cbaf | bellard | can be found at http://www.sics.se/~psm/sparcstack.html */
|
888 | 060366c5 | bellard | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
889 | 060366c5 | bellard | { |
890 | 1a14026e | blueswir1 | index = (index + cwp * 16) % (16 * env->nwindows); |
891 | 060366c5 | bellard | /* wrap handling : if cwp is on the last window, then we use the
|
892 | 060366c5 | bellard | registers 'after' the end */
|
893 | 1a14026e | blueswir1 | if (index < 8 && env->cwp == env->nwindows - 1) |
894 | 1a14026e | blueswir1 | index += 16 * env->nwindows;
|
895 | 060366c5 | bellard | return index;
|
896 | 060366c5 | bellard | } |
897 | 060366c5 | bellard | |
898 | 2623cbaf | bellard | /* save the register window 'cwp1' */
|
899 | 2623cbaf | bellard | static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
900 | 060366c5 | bellard | { |
901 | 2623cbaf | bellard | unsigned int i; |
902 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
903 | 3b46e624 | ths | |
904 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
905 | ed23fbd9 | blueswir1 | #ifdef TARGET_SPARC64
|
906 | ed23fbd9 | blueswir1 | if (sp_ptr & 3) |
907 | ed23fbd9 | blueswir1 | sp_ptr += SPARC64_STACK_BIAS; |
908 | ed23fbd9 | blueswir1 | #endif
|
909 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
910 | 2daf0284 | blueswir1 | printf("win_overflow: sp_ptr=0x" TARGET_ABI_FMT_lx " save_cwp=%d\n", |
911 | 2daf0284 | blueswir1 | sp_ptr, cwp1); |
912 | 060366c5 | bellard | #endif
|
913 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
914 | 2f619698 | bellard | /* FIXME - what to do if put_user() fails? */
|
915 | 2f619698 | bellard | put_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
|
916 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
917 | 2623cbaf | bellard | } |
918 | 060366c5 | bellard | } |
919 | 060366c5 | bellard | |
920 | 060366c5 | bellard | static void save_window(CPUSPARCState *env) |
921 | 060366c5 | bellard | { |
922 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
923 | 2623cbaf | bellard | unsigned int new_wim; |
924 | 1a14026e | blueswir1 | new_wim = ((env->wim >> 1) | (env->wim << (env->nwindows - 1))) & |
925 | 1a14026e | blueswir1 | ((1LL << env->nwindows) - 1); |
926 | 1a14026e | blueswir1 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
|
927 | 2623cbaf | bellard | env->wim = new_wim; |
928 | 5ef54116 | bellard | #else
|
929 | 1a14026e | blueswir1 | save_window_offset(env, cpu_cwp_dec(env, env->cwp - 2));
|
930 | 5ef54116 | bellard | env->cansave++; |
931 | 5ef54116 | bellard | env->canrestore--; |
932 | 5ef54116 | bellard | #endif
|
933 | 060366c5 | bellard | } |
934 | 060366c5 | bellard | |
935 | 060366c5 | bellard | static void restore_window(CPUSPARCState *env) |
936 | 060366c5 | bellard | { |
937 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
938 | eda52953 | blueswir1 | unsigned int new_wim; |
939 | eda52953 | blueswir1 | #endif
|
940 | eda52953 | blueswir1 | unsigned int i, cwp1; |
941 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
942 | 3b46e624 | ths | |
943 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
944 | 1a14026e | blueswir1 | new_wim = ((env->wim << 1) | (env->wim >> (env->nwindows - 1))) & |
945 | 1a14026e | blueswir1 | ((1LL << env->nwindows) - 1); |
946 | eda52953 | blueswir1 | #endif
|
947 | 3b46e624 | ths | |
948 | 060366c5 | bellard | /* restore the invalid window */
|
949 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + 1);
|
950 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
951 | ed23fbd9 | blueswir1 | #ifdef TARGET_SPARC64
|
952 | ed23fbd9 | blueswir1 | if (sp_ptr & 3) |
953 | ed23fbd9 | blueswir1 | sp_ptr += SPARC64_STACK_BIAS; |
954 | ed23fbd9 | blueswir1 | #endif
|
955 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
956 | 2daf0284 | blueswir1 | printf("win_underflow: sp_ptr=0x" TARGET_ABI_FMT_lx " load_cwp=%d\n", |
957 | 2daf0284 | blueswir1 | sp_ptr, cwp1); |
958 | 060366c5 | bellard | #endif
|
959 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
960 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
961 | 2f619698 | bellard | get_user_ual(env->regbase[get_reg_index(env, cwp1, 8 + i)], sp_ptr);
|
962 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
963 | 2623cbaf | bellard | } |
964 | 5ef54116 | bellard | #ifdef TARGET_SPARC64
|
965 | 5ef54116 | bellard | env->canrestore++; |
966 | 1a14026e | blueswir1 | if (env->cleanwin < env->nwindows - 1) |
967 | 1a14026e | blueswir1 | env->cleanwin++; |
968 | 5ef54116 | bellard | env->cansave--; |
969 | eda52953 | blueswir1 | #else
|
970 | eda52953 | blueswir1 | env->wim = new_wim; |
971 | 5ef54116 | bellard | #endif
|
972 | 060366c5 | bellard | } |
973 | 060366c5 | bellard | |
974 | 060366c5 | bellard | static void flush_windows(CPUSPARCState *env) |
975 | 060366c5 | bellard | { |
976 | 060366c5 | bellard | int offset, cwp1;
|
977 | 2623cbaf | bellard | |
978 | 2623cbaf | bellard | offset = 1;
|
979 | 060366c5 | bellard | for(;;) {
|
980 | 060366c5 | bellard | /* if restore would invoke restore_window(), then we can stop */
|
981 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + offset); |
982 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
983 | 060366c5 | bellard | if (env->wim & (1 << cwp1)) |
984 | 060366c5 | bellard | break;
|
985 | eda52953 | blueswir1 | #else
|
986 | eda52953 | blueswir1 | if (env->canrestore == 0) |
987 | eda52953 | blueswir1 | break;
|
988 | eda52953 | blueswir1 | env->cansave++; |
989 | eda52953 | blueswir1 | env->canrestore--; |
990 | eda52953 | blueswir1 | #endif
|
991 | 2623cbaf | bellard | save_window_offset(env, cwp1); |
992 | 060366c5 | bellard | offset++; |
993 | 060366c5 | bellard | } |
994 | 1a14026e | blueswir1 | cwp1 = cpu_cwp_inc(env, env->cwp + 1);
|
995 | eda52953 | blueswir1 | #ifndef TARGET_SPARC64
|
996 | eda52953 | blueswir1 | /* set wim so that restore will reload the registers */
|
997 | 2623cbaf | bellard | env->wim = 1 << cwp1;
|
998 | eda52953 | blueswir1 | #endif
|
999 | 2623cbaf | bellard | #if defined(DEBUG_WIN)
|
1000 | 2623cbaf | bellard | printf("flush_windows: nb=%d\n", offset - 1); |
1001 | 80a9d035 | bellard | #endif
|
1002 | 2623cbaf | bellard | } |
1003 | 060366c5 | bellard | |
1004 | 93ac68bc | bellard | void cpu_loop (CPUSPARCState *env)
|
1005 | 93ac68bc | bellard | { |
1006 | 2cc20260 | Richard Henderson | int trapnr;
|
1007 | 2cc20260 | Richard Henderson | abi_long ret; |
1008 | c227f099 | Anthony Liguori | target_siginfo_t info; |
1009 | 3b46e624 | ths | |
1010 | 060366c5 | bellard | while (1) { |
1011 | 060366c5 | bellard | trapnr = cpu_sparc_exec (env); |
1012 | 3b46e624 | ths | |
1013 | 060366c5 | bellard | switch (trapnr) {
|
1014 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
1015 | 5fafdf24 | ths | case 0x88: |
1016 | 060366c5 | bellard | case 0x90: |
1017 | 5ef54116 | bellard | #else
|
1018 | cb33da57 | blueswir1 | case 0x110: |
1019 | 5ef54116 | bellard | case 0x16d: |
1020 | 5ef54116 | bellard | #endif
|
1021 | 060366c5 | bellard | ret = do_syscall (env, env->gregs[1],
|
1022 | 5fafdf24 | ths | env->regwptr[0], env->regwptr[1], |
1023 | 5fafdf24 | ths | env->regwptr[2], env->regwptr[3], |
1024 | 5945cfcb | Peter Maydell | env->regwptr[4], env->regwptr[5], |
1025 | 5945cfcb | Peter Maydell | 0, 0); |
1026 | 2cc20260 | Richard Henderson | if ((abi_ulong)ret >= (abi_ulong)(-515)) { |
1027 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
1028 | 27908725 | bellard | env->xcc |= PSR_CARRY; |
1029 | 27908725 | bellard | #else
|
1030 | 060366c5 | bellard | env->psr |= PSR_CARRY; |
1031 | 27908725 | bellard | #endif
|
1032 | 060366c5 | bellard | ret = -ret; |
1033 | 060366c5 | bellard | } else {
|
1034 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
1035 | 27908725 | bellard | env->xcc &= ~PSR_CARRY; |
1036 | 27908725 | bellard | #else
|
1037 | 060366c5 | bellard | env->psr &= ~PSR_CARRY; |
1038 | 27908725 | bellard | #endif
|
1039 | 060366c5 | bellard | } |
1040 | 060366c5 | bellard | env->regwptr[0] = ret;
|
1041 | 060366c5 | bellard | /* next instruction */
|
1042 | 060366c5 | bellard | env->pc = env->npc; |
1043 | 060366c5 | bellard | env->npc = env->npc + 4;
|
1044 | 060366c5 | bellard | break;
|
1045 | 060366c5 | bellard | case 0x83: /* flush windows */ |
1046 | 992f48a0 | blueswir1 | #ifdef TARGET_ABI32
|
1047 | 992f48a0 | blueswir1 | case 0x103: |
1048 | 992f48a0 | blueswir1 | #endif
|
1049 | 2623cbaf | bellard | flush_windows(env); |
1050 | 060366c5 | bellard | /* next instruction */
|
1051 | 060366c5 | bellard | env->pc = env->npc; |
1052 | 060366c5 | bellard | env->npc = env->npc + 4;
|
1053 | 060366c5 | bellard | break;
|
1054 | 3475187d | bellard | #ifndef TARGET_SPARC64
|
1055 | 060366c5 | bellard | case TT_WIN_OVF: /* window overflow */ |
1056 | 060366c5 | bellard | save_window(env); |
1057 | 060366c5 | bellard | break;
|
1058 | 060366c5 | bellard | case TT_WIN_UNF: /* window underflow */ |
1059 | 060366c5 | bellard | restore_window(env); |
1060 | 060366c5 | bellard | break;
|
1061 | 61ff6f58 | bellard | case TT_TFAULT:
|
1062 | 61ff6f58 | bellard | case TT_DFAULT:
|
1063 | 61ff6f58 | bellard | { |
1064 | 61ff6f58 | bellard | info.si_signo = SIGSEGV; |
1065 | 61ff6f58 | bellard | info.si_errno = 0;
|
1066 | 61ff6f58 | bellard | /* XXX: check env->error_code */
|
1067 | 61ff6f58 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1068 | 61ff6f58 | bellard | info._sifields._sigfault._addr = env->mmuregs[4];
|
1069 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1070 | 61ff6f58 | bellard | } |
1071 | 61ff6f58 | bellard | break;
|
1072 | 3475187d | bellard | #else
|
1073 | 5ef54116 | bellard | case TT_SPILL: /* window overflow */ |
1074 | 5ef54116 | bellard | save_window(env); |
1075 | 5ef54116 | bellard | break;
|
1076 | 5ef54116 | bellard | case TT_FILL: /* window underflow */ |
1077 | 5ef54116 | bellard | restore_window(env); |
1078 | 5ef54116 | bellard | break;
|
1079 | 7f84a729 | blueswir1 | case TT_TFAULT:
|
1080 | 7f84a729 | blueswir1 | case TT_DFAULT:
|
1081 | 7f84a729 | blueswir1 | { |
1082 | 7f84a729 | blueswir1 | info.si_signo = SIGSEGV; |
1083 | 7f84a729 | blueswir1 | info.si_errno = 0;
|
1084 | 7f84a729 | blueswir1 | /* XXX: check env->error_code */
|
1085 | 7f84a729 | blueswir1 | info.si_code = TARGET_SEGV_MAPERR; |
1086 | 7f84a729 | blueswir1 | if (trapnr == TT_DFAULT)
|
1087 | 7f84a729 | blueswir1 | info._sifields._sigfault._addr = env->dmmuregs[4];
|
1088 | 7f84a729 | blueswir1 | else
|
1089 | 8194f35a | Igor Kovalenko | info._sifields._sigfault._addr = cpu_tsptr(env)->tpc; |
1090 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1091 | 7f84a729 | blueswir1 | } |
1092 | 7f84a729 | blueswir1 | break;
|
1093 | 27524dc3 | bellard | #ifndef TARGET_ABI32
|
1094 | 5bfb56b2 | blueswir1 | case 0x16e: |
1095 | 5bfb56b2 | blueswir1 | flush_windows(env); |
1096 | 5bfb56b2 | blueswir1 | sparc64_get_context(env); |
1097 | 5bfb56b2 | blueswir1 | break;
|
1098 | 5bfb56b2 | blueswir1 | case 0x16f: |
1099 | 5bfb56b2 | blueswir1 | flush_windows(env); |
1100 | 5bfb56b2 | blueswir1 | sparc64_set_context(env); |
1101 | 5bfb56b2 | blueswir1 | break;
|
1102 | 3475187d | bellard | #endif
|
1103 | 27524dc3 | bellard | #endif
|
1104 | 48dc41eb | bellard | case EXCP_INTERRUPT:
|
1105 | 48dc41eb | bellard | /* just indicate that signals should be handled asap */
|
1106 | 48dc41eb | bellard | break;
|
1107 | 1fddef4b | bellard | case EXCP_DEBUG:
|
1108 | 1fddef4b | bellard | { |
1109 | 1fddef4b | bellard | int sig;
|
1110 | 1fddef4b | bellard | |
1111 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1112 | 1fddef4b | bellard | if (sig)
|
1113 | 1fddef4b | bellard | { |
1114 | 1fddef4b | bellard | info.si_signo = sig; |
1115 | 1fddef4b | bellard | info.si_errno = 0;
|
1116 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
1117 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1118 | 1fddef4b | bellard | } |
1119 | 1fddef4b | bellard | } |
1120 | 1fddef4b | bellard | break;
|
1121 | 060366c5 | bellard | default:
|
1122 | 060366c5 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
1123 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
1124 | 060366c5 | bellard | exit (1);
|
1125 | 060366c5 | bellard | } |
1126 | 060366c5 | bellard | process_pending_signals (env); |
1127 | 060366c5 | bellard | } |
1128 | 93ac68bc | bellard | } |
1129 | 93ac68bc | bellard | |
1130 | 93ac68bc | bellard | #endif
|
1131 | 93ac68bc | bellard | |
1132 | 67867308 | bellard | #ifdef TARGET_PPC
|
1133 | 9fddaa0c | bellard | static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
1134 | 9fddaa0c | bellard | { |
1135 | 9fddaa0c | bellard | /* TO FIX */
|
1136 | 9fddaa0c | bellard | return 0; |
1137 | 9fddaa0c | bellard | } |
1138 | 3b46e624 | ths | |
1139 | e3ea6529 | Alexander Graf | uint64_t cpu_ppc_load_tbl (CPUState *env) |
1140 | 9fddaa0c | bellard | { |
1141 | e3ea6529 | Alexander Graf | return cpu_ppc_get_tb(env);
|
1142 | 9fddaa0c | bellard | } |
1143 | 3b46e624 | ths | |
1144 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbu (CPUState *env) |
1145 | 9fddaa0c | bellard | { |
1146 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) >> 32; |
1147 | 9fddaa0c | bellard | } |
1148 | 3b46e624 | ths | |
1149 | b711de95 | Aurelien Jarno | uint64_t cpu_ppc_load_atbl (CPUState *env) |
1150 | 9fddaa0c | bellard | { |
1151 | b711de95 | Aurelien Jarno | return cpu_ppc_get_tb(env);
|
1152 | 9fddaa0c | bellard | } |
1153 | 5fafdf24 | ths | |
1154 | a062e36c | j_mayer | uint32_t cpu_ppc_load_atbu (CPUState *env) |
1155 | 9fddaa0c | bellard | { |
1156 | a062e36c | j_mayer | return cpu_ppc_get_tb(env) >> 32; |
1157 | 9fddaa0c | bellard | } |
1158 | 76a66253 | j_mayer | |
1159 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
1160 | 76a66253 | j_mayer | __attribute__ (( alias ("cpu_ppc_load_tbu") ));
|
1161 | 76a66253 | j_mayer | |
1162 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
1163 | 9fddaa0c | bellard | { |
1164 | 76a66253 | j_mayer | return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
1165 | 9fddaa0c | bellard | } |
1166 | 76a66253 | j_mayer | |
1167 | a750fc0b | j_mayer | /* XXX: to be fixed */
|
1168 | 73b01960 | Alexander Graf | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, uint32_t *valp) |
1169 | a750fc0b | j_mayer | { |
1170 | a750fc0b | j_mayer | return -1; |
1171 | a750fc0b | j_mayer | } |
1172 | a750fc0b | j_mayer | |
1173 | 73b01960 | Alexander Graf | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, uint32_t val) |
1174 | a750fc0b | j_mayer | { |
1175 | a750fc0b | j_mayer | return -1; |
1176 | a750fc0b | j_mayer | } |
1177 | a750fc0b | j_mayer | |
1178 | 001faf32 | Blue Swirl | #define EXCP_DUMP(env, fmt, ...) \
|
1179 | 001faf32 | Blue Swirl | do { \
|
1180 | 001faf32 | Blue Swirl | fprintf(stderr, fmt , ## __VA_ARGS__); \ |
1181 | 001faf32 | Blue Swirl | cpu_dump_state(env, stderr, fprintf, 0); \
|
1182 | 001faf32 | Blue Swirl | qemu_log(fmt, ## __VA_ARGS__); \ |
1183 | 430c7ec7 | malc | if (logfile) \
|
1184 | 430c7ec7 | malc | log_cpu_state(env, 0); \
|
1185 | e1833e1f | j_mayer | } while (0) |
1186 | e1833e1f | j_mayer | |
1187 | 56f066bb | Nathan Froyd | static int do_store_exclusive(CPUPPCState *env) |
1188 | 56f066bb | Nathan Froyd | { |
1189 | 56f066bb | Nathan Froyd | target_ulong addr; |
1190 | 56f066bb | Nathan Froyd | target_ulong page_addr; |
1191 | 56f066bb | Nathan Froyd | target_ulong val; |
1192 | 56f066bb | Nathan Froyd | int flags;
|
1193 | 56f066bb | Nathan Froyd | int segv = 0; |
1194 | 56f066bb | Nathan Froyd | |
1195 | 56f066bb | Nathan Froyd | addr = env->reserve_ea; |
1196 | 56f066bb | Nathan Froyd | page_addr = addr & TARGET_PAGE_MASK; |
1197 | 56f066bb | Nathan Froyd | start_exclusive(); |
1198 | 56f066bb | Nathan Froyd | mmap_lock(); |
1199 | 56f066bb | Nathan Froyd | flags = page_get_flags(page_addr); |
1200 | 56f066bb | Nathan Froyd | if ((flags & PAGE_READ) == 0) { |
1201 | 56f066bb | Nathan Froyd | segv = 1;
|
1202 | 56f066bb | Nathan Froyd | } else {
|
1203 | 56f066bb | Nathan Froyd | int reg = env->reserve_info & 0x1f; |
1204 | 56f066bb | Nathan Froyd | int size = (env->reserve_info >> 5) & 0xf; |
1205 | 56f066bb | Nathan Froyd | int stored = 0; |
1206 | 56f066bb | Nathan Froyd | |
1207 | 56f066bb | Nathan Froyd | if (addr == env->reserve_addr) {
|
1208 | 56f066bb | Nathan Froyd | switch (size) {
|
1209 | 56f066bb | Nathan Froyd | case 1: segv = get_user_u8(val, addr); break; |
1210 | 56f066bb | Nathan Froyd | case 2: segv = get_user_u16(val, addr); break; |
1211 | 56f066bb | Nathan Froyd | case 4: segv = get_user_u32(val, addr); break; |
1212 | 56f066bb | Nathan Froyd | #if defined(TARGET_PPC64)
|
1213 | 56f066bb | Nathan Froyd | case 8: segv = get_user_u64(val, addr); break; |
1214 | 56f066bb | Nathan Froyd | #endif
|
1215 | 56f066bb | Nathan Froyd | default: abort();
|
1216 | 56f066bb | Nathan Froyd | } |
1217 | 56f066bb | Nathan Froyd | if (!segv && val == env->reserve_val) {
|
1218 | 56f066bb | Nathan Froyd | val = env->gpr[reg]; |
1219 | 56f066bb | Nathan Froyd | switch (size) {
|
1220 | 56f066bb | Nathan Froyd | case 1: segv = put_user_u8(val, addr); break; |
1221 | 56f066bb | Nathan Froyd | case 2: segv = put_user_u16(val, addr); break; |
1222 | 56f066bb | Nathan Froyd | case 4: segv = put_user_u32(val, addr); break; |
1223 | 56f066bb | Nathan Froyd | #if defined(TARGET_PPC64)
|
1224 | 56f066bb | Nathan Froyd | case 8: segv = put_user_u64(val, addr); break; |
1225 | 56f066bb | Nathan Froyd | #endif
|
1226 | 56f066bb | Nathan Froyd | default: abort();
|
1227 | 56f066bb | Nathan Froyd | } |
1228 | 56f066bb | Nathan Froyd | if (!segv) {
|
1229 | 56f066bb | Nathan Froyd | stored = 1;
|
1230 | 56f066bb | Nathan Froyd | } |
1231 | 56f066bb | Nathan Froyd | } |
1232 | 56f066bb | Nathan Froyd | } |
1233 | 56f066bb | Nathan Froyd | env->crf[0] = (stored << 1) | xer_so; |
1234 | 56f066bb | Nathan Froyd | env->reserve_addr = (target_ulong)-1;
|
1235 | 56f066bb | Nathan Froyd | } |
1236 | 56f066bb | Nathan Froyd | if (!segv) {
|
1237 | 56f066bb | Nathan Froyd | env->nip += 4;
|
1238 | 56f066bb | Nathan Froyd | } |
1239 | 56f066bb | Nathan Froyd | mmap_unlock(); |
1240 | 56f066bb | Nathan Froyd | end_exclusive(); |
1241 | 56f066bb | Nathan Froyd | return segv;
|
1242 | 56f066bb | Nathan Froyd | } |
1243 | 56f066bb | Nathan Froyd | |
1244 | 67867308 | bellard | void cpu_loop(CPUPPCState *env)
|
1245 | 67867308 | bellard | { |
1246 | c227f099 | Anthony Liguori | target_siginfo_t info; |
1247 | 61190b14 | bellard | int trapnr;
|
1248 | 61190b14 | bellard | uint32_t ret; |
1249 | 3b46e624 | ths | |
1250 | 67867308 | bellard | for(;;) {
|
1251 | 56f066bb | Nathan Froyd | cpu_exec_start(env); |
1252 | 67867308 | bellard | trapnr = cpu_ppc_exec(env); |
1253 | 56f066bb | Nathan Froyd | cpu_exec_end(env); |
1254 | 67867308 | bellard | switch(trapnr) {
|
1255 | e1833e1f | j_mayer | case POWERPC_EXCP_NONE:
|
1256 | e1833e1f | j_mayer | /* Just go on */
|
1257 | 67867308 | bellard | break;
|
1258 | e1833e1f | j_mayer | case POWERPC_EXCP_CRITICAL: /* Critical input */ |
1259 | e1833e1f | j_mayer | cpu_abort(env, "Critical interrupt while in user mode. "
|
1260 | e1833e1f | j_mayer | "Aborting\n");
|
1261 | 61190b14 | bellard | break;
|
1262 | e1833e1f | j_mayer | case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
1263 | e1833e1f | j_mayer | cpu_abort(env, "Machine check exception while in user mode. "
|
1264 | e1833e1f | j_mayer | "Aborting\n");
|
1265 | e1833e1f | j_mayer | break;
|
1266 | e1833e1f | j_mayer | case POWERPC_EXCP_DSI: /* Data storage exception */ |
1267 | 90e189ec | Blue Swirl | EXCP_DUMP(env, "Invalid data memory access: 0x" TARGET_FMT_lx "\n", |
1268 | e1833e1f | j_mayer | env->spr[SPR_DAR]); |
1269 | e1833e1f | j_mayer | /* XXX: check this. Seems bugged */
|
1270 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
1271 | 2be0071f | bellard | case 0x40000000: |
1272 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1273 | 61190b14 | bellard | info.si_errno = 0;
|
1274 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1275 | 61190b14 | bellard | break;
|
1276 | 2be0071f | bellard | case 0x04000000: |
1277 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1278 | 61190b14 | bellard | info.si_errno = 0;
|
1279 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
1280 | 61190b14 | bellard | break;
|
1281 | 2be0071f | bellard | case 0x08000000: |
1282 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1283 | 61190b14 | bellard | info.si_errno = 0;
|
1284 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
1285 | 61190b14 | bellard | break;
|
1286 | 61190b14 | bellard | default:
|
1287 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
1288 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
1289 | e1833e1f | j_mayer | env->error_code); |
1290 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1291 | 61190b14 | bellard | info.si_errno = 0;
|
1292 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1293 | 61190b14 | bellard | break;
|
1294 | 61190b14 | bellard | } |
1295 | 67867308 | bellard | info._sifields._sigfault._addr = env->nip; |
1296 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1297 | 67867308 | bellard | break;
|
1298 | e1833e1f | j_mayer | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
1299 | 90e189ec | Blue Swirl | EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" TARGET_FMT_lx
|
1300 | 90e189ec | Blue Swirl | "\n", env->spr[SPR_SRR0]);
|
1301 | e1833e1f | j_mayer | /* XXX: check this */
|
1302 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
1303 | 2be0071f | bellard | case 0x40000000: |
1304 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1305 | 67867308 | bellard | info.si_errno = 0;
|
1306 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1307 | 61190b14 | bellard | break;
|
1308 | 2be0071f | bellard | case 0x10000000: |
1309 | 2be0071f | bellard | case 0x08000000: |
1310 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1311 | 61190b14 | bellard | info.si_errno = 0;
|
1312 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
1313 | 61190b14 | bellard | break;
|
1314 | 61190b14 | bellard | default:
|
1315 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
1316 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
1317 | e1833e1f | j_mayer | env->error_code); |
1318 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
1319 | 61190b14 | bellard | info.si_errno = 0;
|
1320 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
1321 | 61190b14 | bellard | break;
|
1322 | 61190b14 | bellard | } |
1323 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1324 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1325 | 67867308 | bellard | break;
|
1326 | e1833e1f | j_mayer | case POWERPC_EXCP_EXTERNAL: /* External input */ |
1327 | e1833e1f | j_mayer | cpu_abort(env, "External interrupt while in user mode. "
|
1328 | e1833e1f | j_mayer | "Aborting\n");
|
1329 | e1833e1f | j_mayer | break;
|
1330 | e1833e1f | j_mayer | case POWERPC_EXCP_ALIGN: /* Alignment exception */ |
1331 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unaligned memory access\n");
|
1332 | e1833e1f | j_mayer | /* XXX: check this */
|
1333 | 61190b14 | bellard | info.si_signo = TARGET_SIGBUS; |
1334 | 67867308 | bellard | info.si_errno = 0;
|
1335 | 61190b14 | bellard | info.si_code = TARGET_BUS_ADRALN; |
1336 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1337 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1338 | 67867308 | bellard | break;
|
1339 | e1833e1f | j_mayer | case POWERPC_EXCP_PROGRAM: /* Program exception */ |
1340 | e1833e1f | j_mayer | /* XXX: check this */
|
1341 | 61190b14 | bellard | switch (env->error_code & ~0xF) { |
1342 | e1833e1f | j_mayer | case POWERPC_EXCP_FP:
|
1343 | e1833e1f | j_mayer | EXCP_DUMP(env, "Floating point program exception\n");
|
1344 | 61190b14 | bellard | info.si_signo = TARGET_SIGFPE; |
1345 | 61190b14 | bellard | info.si_errno = 0;
|
1346 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1347 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_OX:
|
1348 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTOVF; |
1349 | 61190b14 | bellard | break;
|
1350 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_UX:
|
1351 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTUND; |
1352 | 61190b14 | bellard | break;
|
1353 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_ZX:
|
1354 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXZDZ:
|
1355 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTDIV; |
1356 | 61190b14 | bellard | break;
|
1357 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_XX:
|
1358 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTRES; |
1359 | 61190b14 | bellard | break;
|
1360 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSOFT:
|
1361 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTINV; |
1362 | 61190b14 | bellard | break;
|
1363 | 7c58044c | j_mayer | case POWERPC_EXCP_FP_VXSNAN:
|
1364 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXISI:
|
1365 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIDI:
|
1366 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIMZ:
|
1367 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXVC:
|
1368 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSQRT:
|
1369 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXCVI:
|
1370 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTSUB; |
1371 | 61190b14 | bellard | break;
|
1372 | 61190b14 | bellard | default:
|
1373 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
|
1374 | e1833e1f | j_mayer | env->error_code); |
1375 | e1833e1f | j_mayer | break;
|
1376 | 61190b14 | bellard | } |
1377 | e1833e1f | j_mayer | break;
|
1378 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL:
|
1379 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid instruction\n");
|
1380 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1381 | 61190b14 | bellard | info.si_errno = 0;
|
1382 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1383 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_INVAL:
|
1384 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLOPC; |
1385 | 61190b14 | bellard | break;
|
1386 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_LSWX:
|
1387 | a750fc0b | j_mayer | info.si_code = TARGET_ILL_ILLOPN; |
1388 | 61190b14 | bellard | break;
|
1389 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_SPR:
|
1390 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
1391 | 61190b14 | bellard | break;
|
1392 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_FP:
|
1393 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
1394 | 61190b14 | bellard | break;
|
1395 | 61190b14 | bellard | default:
|
1396 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
|
1397 | e1833e1f | j_mayer | env->error_code & 0xF);
|
1398 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
1399 | 61190b14 | bellard | break;
|
1400 | 61190b14 | bellard | } |
1401 | 61190b14 | bellard | break;
|
1402 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV:
|
1403 | e1833e1f | j_mayer | EXCP_DUMP(env, "Privilege violation\n");
|
1404 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1405 | 61190b14 | bellard | info.si_errno = 0;
|
1406 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
1407 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_OPC:
|
1408 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
1409 | 61190b14 | bellard | break;
|
1410 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_REG:
|
1411 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
1412 | e1833e1f | j_mayer | break;
|
1413 | 61190b14 | bellard | default:
|
1414 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
|
1415 | e1833e1f | j_mayer | env->error_code & 0xF);
|
1416 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
1417 | 61190b14 | bellard | break;
|
1418 | 61190b14 | bellard | } |
1419 | 61190b14 | bellard | break;
|
1420 | e1833e1f | j_mayer | case POWERPC_EXCP_TRAP:
|
1421 | e1833e1f | j_mayer | cpu_abort(env, "Tried to call a TRAP\n");
|
1422 | e1833e1f | j_mayer | break;
|
1423 | 61190b14 | bellard | default:
|
1424 | 61190b14 | bellard | /* Should not happen ! */
|
1425 | e1833e1f | j_mayer | cpu_abort(env, "Unknown program exception (%02x)\n",
|
1426 | e1833e1f | j_mayer | env->error_code); |
1427 | e1833e1f | j_mayer | break;
|
1428 | 61190b14 | bellard | } |
1429 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1430 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1431 | 67867308 | bellard | break;
|
1432 | e1833e1f | j_mayer | case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
1433 | e1833e1f | j_mayer | EXCP_DUMP(env, "No floating point allowed\n");
|
1434 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
1435 | 67867308 | bellard | info.si_errno = 0;
|
1436 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
1437 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
1438 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1439 | 67867308 | bellard | break;
|
1440 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL: /* System call exception */ |
1441 | e1833e1f | j_mayer | cpu_abort(env, "Syscall exception while in user mode. "
|
1442 | e1833e1f | j_mayer | "Aborting\n");
|
1443 | 61190b14 | bellard | break;
|
1444 | e1833e1f | j_mayer | case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
1445 | e1833e1f | j_mayer | EXCP_DUMP(env, "No APU instruction allowed\n");
|
1446 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1447 | e1833e1f | j_mayer | info.si_errno = 0;
|
1448 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1449 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1450 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1451 | 61190b14 | bellard | break;
|
1452 | e1833e1f | j_mayer | case POWERPC_EXCP_DECR: /* Decrementer exception */ |
1453 | e1833e1f | j_mayer | cpu_abort(env, "Decrementer interrupt while in user mode. "
|
1454 | e1833e1f | j_mayer | "Aborting\n");
|
1455 | 61190b14 | bellard | break;
|
1456 | e1833e1f | j_mayer | case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
1457 | e1833e1f | j_mayer | cpu_abort(env, "Fix interval timer interrupt while in user mode. "
|
1458 | e1833e1f | j_mayer | "Aborting\n");
|
1459 | e1833e1f | j_mayer | break;
|
1460 | e1833e1f | j_mayer | case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ |
1461 | e1833e1f | j_mayer | cpu_abort(env, "Watchdog timer interrupt while in user mode. "
|
1462 | e1833e1f | j_mayer | "Aborting\n");
|
1463 | e1833e1f | j_mayer | break;
|
1464 | e1833e1f | j_mayer | case POWERPC_EXCP_DTLB: /* Data TLB error */ |
1465 | e1833e1f | j_mayer | cpu_abort(env, "Data TLB exception while in user mode. "
|
1466 | e1833e1f | j_mayer | "Aborting\n");
|
1467 | e1833e1f | j_mayer | break;
|
1468 | e1833e1f | j_mayer | case POWERPC_EXCP_ITLB: /* Instruction TLB error */ |
1469 | e1833e1f | j_mayer | cpu_abort(env, "Instruction TLB exception while in user mode. "
|
1470 | e1833e1f | j_mayer | "Aborting\n");
|
1471 | e1833e1f | j_mayer | break;
|
1472 | e1833e1f | j_mayer | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ |
1473 | e1833e1f | j_mayer | EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
|
1474 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1475 | e1833e1f | j_mayer | info.si_errno = 0;
|
1476 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1477 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1478 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1479 | e1833e1f | j_mayer | break;
|
1480 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ |
1481 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
|
1482 | e1833e1f | j_mayer | break;
|
1483 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ |
1484 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
|
1485 | e1833e1f | j_mayer | break;
|
1486 | e1833e1f | j_mayer | case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ |
1487 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
1488 | e1833e1f | j_mayer | break;
|
1489 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ |
1490 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell interrupt while in user mode. "
|
1491 | e1833e1f | j_mayer | "Aborting\n");
|
1492 | e1833e1f | j_mayer | break;
|
1493 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ |
1494 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell critical interrupt while in user mode. "
|
1495 | e1833e1f | j_mayer | "Aborting\n");
|
1496 | e1833e1f | j_mayer | break;
|
1497 | e1833e1f | j_mayer | case POWERPC_EXCP_RESET: /* System reset exception */ |
1498 | e1833e1f | j_mayer | cpu_abort(env, "Reset interrupt while in user mode. "
|
1499 | e1833e1f | j_mayer | "Aborting\n");
|
1500 | e1833e1f | j_mayer | break;
|
1501 | e1833e1f | j_mayer | case POWERPC_EXCP_DSEG: /* Data segment exception */ |
1502 | e1833e1f | j_mayer | cpu_abort(env, "Data segment exception while in user mode. "
|
1503 | e1833e1f | j_mayer | "Aborting\n");
|
1504 | e1833e1f | j_mayer | break;
|
1505 | e1833e1f | j_mayer | case POWERPC_EXCP_ISEG: /* Instruction segment exception */ |
1506 | e1833e1f | j_mayer | cpu_abort(env, "Instruction segment exception "
|
1507 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1508 | e1833e1f | j_mayer | break;
|
1509 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1510 | e1833e1f | j_mayer | case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
1511 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor decrementer interrupt "
|
1512 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1513 | e1833e1f | j_mayer | break;
|
1514 | e1833e1f | j_mayer | case POWERPC_EXCP_TRACE: /* Trace exception */ |
1515 | e1833e1f | j_mayer | /* Nothing to do:
|
1516 | e1833e1f | j_mayer | * we use this exception to emulate step-by-step execution mode.
|
1517 | e1833e1f | j_mayer | */
|
1518 | e1833e1f | j_mayer | break;
|
1519 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1520 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
1521 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data storage exception "
|
1522 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1523 | e1833e1f | j_mayer | break;
|
1524 | e1833e1f | j_mayer | case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ |
1525 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction storage exception "
|
1526 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1527 | e1833e1f | j_mayer | break;
|
1528 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ |
1529 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data segment exception "
|
1530 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1531 | e1833e1f | j_mayer | break;
|
1532 | e1833e1f | j_mayer | case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ |
1533 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction segment exception "
|
1534 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1535 | e1833e1f | j_mayer | break;
|
1536 | e1833e1f | j_mayer | case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
1537 | e1833e1f | j_mayer | EXCP_DUMP(env, "No Altivec instructions allowed\n");
|
1538 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1539 | e1833e1f | j_mayer | info.si_errno = 0;
|
1540 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1541 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1542 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
1543 | e1833e1f | j_mayer | break;
|
1544 | e1833e1f | j_mayer | case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ |
1545 | e1833e1f | j_mayer | cpu_abort(env, "Programable interval timer interrupt "
|
1546 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1547 | e1833e1f | j_mayer | break;
|
1548 | e1833e1f | j_mayer | case POWERPC_EXCP_IO: /* IO error exception */ |
1549 | e1833e1f | j_mayer | cpu_abort(env, "IO error exception while in user mode. "
|
1550 | e1833e1f | j_mayer | "Aborting\n");
|
1551 | e1833e1f | j_mayer | break;
|
1552 | e1833e1f | j_mayer | case POWERPC_EXCP_RUNM: /* Run mode exception */ |
1553 | e1833e1f | j_mayer | cpu_abort(env, "Run mode exception while in user mode. "
|
1554 | e1833e1f | j_mayer | "Aborting\n");
|
1555 | e1833e1f | j_mayer | break;
|
1556 | e1833e1f | j_mayer | case POWERPC_EXCP_EMUL: /* Emulation trap exception */ |
1557 | e1833e1f | j_mayer | cpu_abort(env, "Emulation trap exception not handled\n");
|
1558 | e1833e1f | j_mayer | break;
|
1559 | e1833e1f | j_mayer | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ |
1560 | e1833e1f | j_mayer | cpu_abort(env, "Instruction fetch TLB exception "
|
1561 | e1833e1f | j_mayer | "while in user-mode. Aborting");
|
1562 | e1833e1f | j_mayer | break;
|
1563 | e1833e1f | j_mayer | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ |
1564 | e1833e1f | j_mayer | cpu_abort(env, "Data load TLB exception while in user-mode. "
|
1565 | e1833e1f | j_mayer | "Aborting");
|
1566 | e1833e1f | j_mayer | break;
|
1567 | e1833e1f | j_mayer | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ |
1568 | e1833e1f | j_mayer | cpu_abort(env, "Data store TLB exception while in user-mode. "
|
1569 | e1833e1f | j_mayer | "Aborting");
|
1570 | e1833e1f | j_mayer | break;
|
1571 | e1833e1f | j_mayer | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ |
1572 | e1833e1f | j_mayer | cpu_abort(env, "Floating-point assist exception not handled\n");
|
1573 | e1833e1f | j_mayer | break;
|
1574 | e1833e1f | j_mayer | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ |
1575 | e1833e1f | j_mayer | cpu_abort(env, "Instruction address breakpoint exception "
|
1576 | e1833e1f | j_mayer | "not handled\n");
|
1577 | e1833e1f | j_mayer | break;
|
1578 | e1833e1f | j_mayer | case POWERPC_EXCP_SMI: /* System management interrupt */ |
1579 | e1833e1f | j_mayer | cpu_abort(env, "System management interrupt while in user mode. "
|
1580 | e1833e1f | j_mayer | "Aborting\n");
|
1581 | e1833e1f | j_mayer | break;
|
1582 | e1833e1f | j_mayer | case POWERPC_EXCP_THERM: /* Thermal interrupt */ |
1583 | e1833e1f | j_mayer | cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
|
1584 | e1833e1f | j_mayer | "Aborting\n");
|
1585 | e1833e1f | j_mayer | break;
|
1586 | e1833e1f | j_mayer | case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ |
1587 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
1588 | e1833e1f | j_mayer | break;
|
1589 | e1833e1f | j_mayer | case POWERPC_EXCP_VPUA: /* Vector assist exception */ |
1590 | e1833e1f | j_mayer | cpu_abort(env, "Vector assist exception not handled\n");
|
1591 | e1833e1f | j_mayer | break;
|
1592 | e1833e1f | j_mayer | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ |
1593 | e1833e1f | j_mayer | cpu_abort(env, "Soft patch exception not handled\n");
|
1594 | e1833e1f | j_mayer | break;
|
1595 | e1833e1f | j_mayer | case POWERPC_EXCP_MAINT: /* Maintenance exception */ |
1596 | e1833e1f | j_mayer | cpu_abort(env, "Maintenance exception while in user mode. "
|
1597 | e1833e1f | j_mayer | "Aborting\n");
|
1598 | e1833e1f | j_mayer | break;
|
1599 | e1833e1f | j_mayer | case POWERPC_EXCP_STOP: /* stop translation */ |
1600 | e1833e1f | j_mayer | /* We did invalidate the instruction cache. Go on */
|
1601 | e1833e1f | j_mayer | break;
|
1602 | e1833e1f | j_mayer | case POWERPC_EXCP_BRANCH: /* branch instruction: */ |
1603 | e1833e1f | j_mayer | /* We just stopped because of a branch. Go on */
|
1604 | e1833e1f | j_mayer | break;
|
1605 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL_USER:
|
1606 | e1833e1f | j_mayer | /* system call in user-mode emulation */
|
1607 | e1833e1f | j_mayer | /* WARNING:
|
1608 | e1833e1f | j_mayer | * PPC ABI uses overflow flag in cr0 to signal an error
|
1609 | e1833e1f | j_mayer | * in syscalls.
|
1610 | e1833e1f | j_mayer | */
|
1611 | e1833e1f | j_mayer | #if 0
|
1612 | e1833e1f | j_mayer | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
1613 | e1833e1f | j_mayer | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
1614 | e1833e1f | j_mayer | #endif
|
1615 | e1833e1f | j_mayer | env->crf[0] &= ~0x1; |
1616 | e1833e1f | j_mayer | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
1617 | e1833e1f | j_mayer | env->gpr[5], env->gpr[6], env->gpr[7], |
1618 | 5945cfcb | Peter Maydell | env->gpr[8], 0, 0); |
1619 | bcd4933a | Nathan Froyd | if (ret == (uint32_t)(-TARGET_QEMU_ESIGRETURN)) {
|
1620 | bcd4933a | Nathan Froyd | /* Returning from a successful sigreturn syscall.
|
1621 | bcd4933a | Nathan Froyd | Avoid corrupting register state. */
|
1622 | bcd4933a | Nathan Froyd | break;
|
1623 | bcd4933a | Nathan Froyd | } |
1624 | e1833e1f | j_mayer | if (ret > (uint32_t)(-515)) { |
1625 | e1833e1f | j_mayer | env->crf[0] |= 0x1; |
1626 | e1833e1f | j_mayer | ret = -ret; |
1627 | 61190b14 | bellard | } |
1628 | e1833e1f | j_mayer | env->gpr[3] = ret;
|
1629 | e1833e1f | j_mayer | #if 0
|
1630 | e1833e1f | j_mayer | printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
1631 | e1833e1f | j_mayer | #endif
|
1632 | e1833e1f | j_mayer | break;
|
1633 | 56f066bb | Nathan Froyd | case POWERPC_EXCP_STCX:
|
1634 | 56f066bb | Nathan Froyd | if (do_store_exclusive(env)) {
|
1635 | 56f066bb | Nathan Froyd | info.si_signo = TARGET_SIGSEGV; |
1636 | 56f066bb | Nathan Froyd | info.si_errno = 0;
|
1637 | 56f066bb | Nathan Froyd | info.si_code = TARGET_SEGV_MAPERR; |
1638 | 56f066bb | Nathan Froyd | info._sifields._sigfault._addr = env->nip; |
1639 | 56f066bb | Nathan Froyd | queue_signal(env, info.si_signo, &info); |
1640 | 56f066bb | Nathan Froyd | } |
1641 | 56f066bb | Nathan Froyd | break;
|
1642 | 71f75756 | aurel32 | case EXCP_DEBUG:
|
1643 | 71f75756 | aurel32 | { |
1644 | 71f75756 | aurel32 | int sig;
|
1645 | 71f75756 | aurel32 | |
1646 | 71f75756 | aurel32 | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
1647 | 71f75756 | aurel32 | if (sig) {
|
1648 | 71f75756 | aurel32 | info.si_signo = sig; |
1649 | 71f75756 | aurel32 | info.si_errno = 0;
|
1650 | 71f75756 | aurel32 | info.si_code = TARGET_TRAP_BRKPT; |
1651 | 71f75756 | aurel32 | queue_signal(env, info.si_signo, &info); |
1652 | 71f75756 | aurel32 | } |
1653 | 71f75756 | aurel32 | } |
1654 | 71f75756 | aurel32 | break;
|
1655 | 56ba31ff | j_mayer | case EXCP_INTERRUPT:
|
1656 | 56ba31ff | j_mayer | /* just indicate that signals should be handled asap */
|
1657 | 56ba31ff | j_mayer | break;
|
1658 | e1833e1f | j_mayer | default:
|
1659 | e1833e1f | j_mayer | cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
|
1660 | e1833e1f | j_mayer | break;
|
1661 | 67867308 | bellard | } |
1662 | 67867308 | bellard | process_pending_signals(env); |
1663 | 67867308 | bellard | } |
1664 | 67867308 | bellard | } |
1665 | 67867308 | bellard | #endif
|
1666 | 67867308 | bellard | |
1667 | 048f6b4d | bellard | #ifdef TARGET_MIPS
|
1668 | 048f6b4d | bellard | |
1669 | 048f6b4d | bellard | #define MIPS_SYS(name, args) args,
|
1670 | 048f6b4d | bellard | |
1671 | 048f6b4d | bellard | static const uint8_t mips_syscall_args[] = { |
1672 | 048f6b4d | bellard | MIPS_SYS(sys_syscall , 0) /* 4000 */ |
1673 | 048f6b4d | bellard | MIPS_SYS(sys_exit , 1)
|
1674 | 048f6b4d | bellard | MIPS_SYS(sys_fork , 0)
|
1675 | 048f6b4d | bellard | MIPS_SYS(sys_read , 3)
|
1676 | 048f6b4d | bellard | MIPS_SYS(sys_write , 3)
|
1677 | 048f6b4d | bellard | MIPS_SYS(sys_open , 3) /* 4005 */ |
1678 | 048f6b4d | bellard | MIPS_SYS(sys_close , 1)
|
1679 | 048f6b4d | bellard | MIPS_SYS(sys_waitpid , 3)
|
1680 | 048f6b4d | bellard | MIPS_SYS(sys_creat , 2)
|
1681 | 048f6b4d | bellard | MIPS_SYS(sys_link , 2)
|
1682 | 048f6b4d | bellard | MIPS_SYS(sys_unlink , 1) /* 4010 */ |
1683 | 048f6b4d | bellard | MIPS_SYS(sys_execve , 0)
|
1684 | 048f6b4d | bellard | MIPS_SYS(sys_chdir , 1)
|
1685 | 048f6b4d | bellard | MIPS_SYS(sys_time , 1)
|
1686 | 048f6b4d | bellard | MIPS_SYS(sys_mknod , 3)
|
1687 | 048f6b4d | bellard | MIPS_SYS(sys_chmod , 2) /* 4015 */ |
1688 | 048f6b4d | bellard | MIPS_SYS(sys_lchown , 3)
|
1689 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1690 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ |
1691 | 048f6b4d | bellard | MIPS_SYS(sys_lseek , 3)
|
1692 | 048f6b4d | bellard | MIPS_SYS(sys_getpid , 0) /* 4020 */ |
1693 | 048f6b4d | bellard | MIPS_SYS(sys_mount , 5)
|
1694 | 048f6b4d | bellard | MIPS_SYS(sys_oldumount , 1)
|
1695 | 048f6b4d | bellard | MIPS_SYS(sys_setuid , 1)
|
1696 | 048f6b4d | bellard | MIPS_SYS(sys_getuid , 0)
|
1697 | 048f6b4d | bellard | MIPS_SYS(sys_stime , 1) /* 4025 */ |
1698 | 048f6b4d | bellard | MIPS_SYS(sys_ptrace , 4)
|
1699 | 048f6b4d | bellard | MIPS_SYS(sys_alarm , 1)
|
1700 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ |
1701 | 048f6b4d | bellard | MIPS_SYS(sys_pause , 0)
|
1702 | 048f6b4d | bellard | MIPS_SYS(sys_utime , 2) /* 4030 */ |
1703 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1704 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1705 | 048f6b4d | bellard | MIPS_SYS(sys_access , 2)
|
1706 | 048f6b4d | bellard | MIPS_SYS(sys_nice , 1)
|
1707 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ |
1708 | 048f6b4d | bellard | MIPS_SYS(sys_sync , 0)
|
1709 | 048f6b4d | bellard | MIPS_SYS(sys_kill , 2)
|
1710 | 048f6b4d | bellard | MIPS_SYS(sys_rename , 2)
|
1711 | 048f6b4d | bellard | MIPS_SYS(sys_mkdir , 2)
|
1712 | 048f6b4d | bellard | MIPS_SYS(sys_rmdir , 1) /* 4040 */ |
1713 | 048f6b4d | bellard | MIPS_SYS(sys_dup , 1)
|
1714 | 048f6b4d | bellard | MIPS_SYS(sys_pipe , 0)
|
1715 | 048f6b4d | bellard | MIPS_SYS(sys_times , 1)
|
1716 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1717 | 048f6b4d | bellard | MIPS_SYS(sys_brk , 1) /* 4045 */ |
1718 | 048f6b4d | bellard | MIPS_SYS(sys_setgid , 1)
|
1719 | 048f6b4d | bellard | MIPS_SYS(sys_getgid , 0)
|
1720 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ |
1721 | 048f6b4d | bellard | MIPS_SYS(sys_geteuid , 0)
|
1722 | 048f6b4d | bellard | MIPS_SYS(sys_getegid , 0) /* 4050 */ |
1723 | 048f6b4d | bellard | MIPS_SYS(sys_acct , 0)
|
1724 | 048f6b4d | bellard | MIPS_SYS(sys_umount , 2)
|
1725 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1726 | 048f6b4d | bellard | MIPS_SYS(sys_ioctl , 3)
|
1727 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl , 3) /* 4055 */ |
1728 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 2)
|
1729 | 048f6b4d | bellard | MIPS_SYS(sys_setpgid , 2)
|
1730 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1731 | 048f6b4d | bellard | MIPS_SYS(sys_olduname , 1)
|
1732 | 048f6b4d | bellard | MIPS_SYS(sys_umask , 1) /* 4060 */ |
1733 | 048f6b4d | bellard | MIPS_SYS(sys_chroot , 1)
|
1734 | 048f6b4d | bellard | MIPS_SYS(sys_ustat , 2)
|
1735 | 048f6b4d | bellard | MIPS_SYS(sys_dup2 , 2)
|
1736 | 048f6b4d | bellard | MIPS_SYS(sys_getppid , 0)
|
1737 | 048f6b4d | bellard | MIPS_SYS(sys_getpgrp , 0) /* 4065 */ |
1738 | 048f6b4d | bellard | MIPS_SYS(sys_setsid , 0)
|
1739 | 048f6b4d | bellard | MIPS_SYS(sys_sigaction , 3)
|
1740 | 048f6b4d | bellard | MIPS_SYS(sys_sgetmask , 0)
|
1741 | 048f6b4d | bellard | MIPS_SYS(sys_ssetmask , 1)
|
1742 | 048f6b4d | bellard | MIPS_SYS(sys_setreuid , 2) /* 4070 */ |
1743 | 048f6b4d | bellard | MIPS_SYS(sys_setregid , 2)
|
1744 | 048f6b4d | bellard | MIPS_SYS(sys_sigsuspend , 0)
|
1745 | 048f6b4d | bellard | MIPS_SYS(sys_sigpending , 1)
|
1746 | 048f6b4d | bellard | MIPS_SYS(sys_sethostname , 2)
|
1747 | 048f6b4d | bellard | MIPS_SYS(sys_setrlimit , 2) /* 4075 */ |
1748 | 048f6b4d | bellard | MIPS_SYS(sys_getrlimit , 2)
|
1749 | 048f6b4d | bellard | MIPS_SYS(sys_getrusage , 2)
|
1750 | 048f6b4d | bellard | MIPS_SYS(sys_gettimeofday, 2)
|
1751 | 048f6b4d | bellard | MIPS_SYS(sys_settimeofday, 2)
|
1752 | 048f6b4d | bellard | MIPS_SYS(sys_getgroups , 2) /* 4080 */ |
1753 | 048f6b4d | bellard | MIPS_SYS(sys_setgroups , 2)
|
1754 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* old_select */ |
1755 | 048f6b4d | bellard | MIPS_SYS(sys_symlink , 2)
|
1756 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ |
1757 | 048f6b4d | bellard | MIPS_SYS(sys_readlink , 3) /* 4085 */ |
1758 | 048f6b4d | bellard | MIPS_SYS(sys_uselib , 1)
|
1759 | 048f6b4d | bellard | MIPS_SYS(sys_swapon , 2)
|
1760 | 048f6b4d | bellard | MIPS_SYS(sys_reboot , 3)
|
1761 | 048f6b4d | bellard | MIPS_SYS(old_readdir , 3)
|
1762 | 048f6b4d | bellard | MIPS_SYS(old_mmap , 6) /* 4090 */ |
1763 | 048f6b4d | bellard | MIPS_SYS(sys_munmap , 2)
|
1764 | 048f6b4d | bellard | MIPS_SYS(sys_truncate , 2)
|
1765 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate , 2)
|
1766 | 048f6b4d | bellard | MIPS_SYS(sys_fchmod , 2)
|
1767 | 048f6b4d | bellard | MIPS_SYS(sys_fchown , 3) /* 4095 */ |
1768 | 048f6b4d | bellard | MIPS_SYS(sys_getpriority , 2)
|
1769 | 048f6b4d | bellard | MIPS_SYS(sys_setpriority , 3)
|
1770 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1771 | 048f6b4d | bellard | MIPS_SYS(sys_statfs , 2)
|
1772 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs , 2) /* 4100 */ |
1773 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ |
1774 | 048f6b4d | bellard | MIPS_SYS(sys_socketcall , 2)
|
1775 | 048f6b4d | bellard | MIPS_SYS(sys_syslog , 3)
|
1776 | 048f6b4d | bellard | MIPS_SYS(sys_setitimer , 3)
|
1777 | 048f6b4d | bellard | MIPS_SYS(sys_getitimer , 2) /* 4105 */ |
1778 | 048f6b4d | bellard | MIPS_SYS(sys_newstat , 2)
|
1779 | 048f6b4d | bellard | MIPS_SYS(sys_newlstat , 2)
|
1780 | 048f6b4d | bellard | MIPS_SYS(sys_newfstat , 2)
|
1781 | 048f6b4d | bellard | MIPS_SYS(sys_uname , 1)
|
1782 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ |
1783 | 048f6b4d | bellard | MIPS_SYS(sys_vhangup , 0)
|
1784 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ |
1785 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ |
1786 | 048f6b4d | bellard | MIPS_SYS(sys_wait4 , 4)
|
1787 | 048f6b4d | bellard | MIPS_SYS(sys_swapoff , 1) /* 4115 */ |
1788 | 048f6b4d | bellard | MIPS_SYS(sys_sysinfo , 1)
|
1789 | 048f6b4d | bellard | MIPS_SYS(sys_ipc , 6)
|
1790 | 048f6b4d | bellard | MIPS_SYS(sys_fsync , 1)
|
1791 | 048f6b4d | bellard | MIPS_SYS(sys_sigreturn , 0)
|
1792 | 18113962 | Paul Brook | MIPS_SYS(sys_clone , 6) /* 4120 */ |
1793 | 048f6b4d | bellard | MIPS_SYS(sys_setdomainname, 2)
|
1794 | 048f6b4d | bellard | MIPS_SYS(sys_newuname , 1)
|
1795 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ |
1796 | 048f6b4d | bellard | MIPS_SYS(sys_adjtimex , 1)
|
1797 | 048f6b4d | bellard | MIPS_SYS(sys_mprotect , 3) /* 4125 */ |
1798 | 048f6b4d | bellard | MIPS_SYS(sys_sigprocmask , 3)
|
1799 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ |
1800 | 048f6b4d | bellard | MIPS_SYS(sys_init_module , 5)
|
1801 | 048f6b4d | bellard | MIPS_SYS(sys_delete_module, 1)
|
1802 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ |
1803 | 048f6b4d | bellard | MIPS_SYS(sys_quotactl , 0)
|
1804 | 048f6b4d | bellard | MIPS_SYS(sys_getpgid , 1)
|
1805 | 048f6b4d | bellard | MIPS_SYS(sys_fchdir , 1)
|
1806 | 048f6b4d | bellard | MIPS_SYS(sys_bdflush , 2)
|
1807 | 048f6b4d | bellard | MIPS_SYS(sys_sysfs , 3) /* 4135 */ |
1808 | 048f6b4d | bellard | MIPS_SYS(sys_personality , 1)
|
1809 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ |
1810 | 048f6b4d | bellard | MIPS_SYS(sys_setfsuid , 1)
|
1811 | 048f6b4d | bellard | MIPS_SYS(sys_setfsgid , 1)
|
1812 | 048f6b4d | bellard | MIPS_SYS(sys_llseek , 5) /* 4140 */ |
1813 | 048f6b4d | bellard | MIPS_SYS(sys_getdents , 3)
|
1814 | 048f6b4d | bellard | MIPS_SYS(sys_select , 5)
|
1815 | 048f6b4d | bellard | MIPS_SYS(sys_flock , 2)
|
1816 | 048f6b4d | bellard | MIPS_SYS(sys_msync , 3)
|
1817 | 048f6b4d | bellard | MIPS_SYS(sys_readv , 3) /* 4145 */ |
1818 | 048f6b4d | bellard | MIPS_SYS(sys_writev , 3)
|
1819 | 048f6b4d | bellard | MIPS_SYS(sys_cacheflush , 3)
|
1820 | 048f6b4d | bellard | MIPS_SYS(sys_cachectl , 3)
|
1821 | 048f6b4d | bellard | MIPS_SYS(sys_sysmips , 4)
|
1822 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ |
1823 | 048f6b4d | bellard | MIPS_SYS(sys_getsid , 1)
|
1824 | 048f6b4d | bellard | MIPS_SYS(sys_fdatasync , 0)
|
1825 | 048f6b4d | bellard | MIPS_SYS(sys_sysctl , 1)
|
1826 | 048f6b4d | bellard | MIPS_SYS(sys_mlock , 2)
|
1827 | 048f6b4d | bellard | MIPS_SYS(sys_munlock , 2) /* 4155 */ |
1828 | 048f6b4d | bellard | MIPS_SYS(sys_mlockall , 1)
|
1829 | 048f6b4d | bellard | MIPS_SYS(sys_munlockall , 0)
|
1830 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setparam, 2)
|
1831 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getparam, 2)
|
1832 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ |
1833 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getscheduler, 1)
|
1834 | 048f6b4d | bellard | MIPS_SYS(sys_sched_yield , 0)
|
1835 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_max, 1)
|
1836 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_min, 1)
|
1837 | 048f6b4d | bellard | MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ |
1838 | 048f6b4d | bellard | MIPS_SYS(sys_nanosleep, 2)
|
1839 | 048f6b4d | bellard | MIPS_SYS(sys_mremap , 4)
|
1840 | 048f6b4d | bellard | MIPS_SYS(sys_accept , 3)
|
1841 | 048f6b4d | bellard | MIPS_SYS(sys_bind , 3)
|
1842 | 048f6b4d | bellard | MIPS_SYS(sys_connect , 3) /* 4170 */ |
1843 | 048f6b4d | bellard | MIPS_SYS(sys_getpeername , 3)
|
1844 | 048f6b4d | bellard | MIPS_SYS(sys_getsockname , 3)
|
1845 | 048f6b4d | bellard | MIPS_SYS(sys_getsockopt , 5)
|
1846 | 048f6b4d | bellard | MIPS_SYS(sys_listen , 2)
|
1847 | 048f6b4d | bellard | MIPS_SYS(sys_recv , 4) /* 4175 */ |
1848 | 048f6b4d | bellard | MIPS_SYS(sys_recvfrom , 6)
|
1849 | 048f6b4d | bellard | MIPS_SYS(sys_recvmsg , 3)
|
1850 | 048f6b4d | bellard | MIPS_SYS(sys_send , 4)
|
1851 | 048f6b4d | bellard | MIPS_SYS(sys_sendmsg , 3)
|
1852 | 048f6b4d | bellard | MIPS_SYS(sys_sendto , 6) /* 4180 */ |
1853 | 048f6b4d | bellard | MIPS_SYS(sys_setsockopt , 5)
|
1854 | 048f6b4d | bellard | MIPS_SYS(sys_shutdown , 2)
|
1855 | 048f6b4d | bellard | MIPS_SYS(sys_socket , 3)
|
1856 | 048f6b4d | bellard | MIPS_SYS(sys_socketpair , 4)
|
1857 | 048f6b4d | bellard | MIPS_SYS(sys_setresuid , 3) /* 4185 */ |
1858 | 048f6b4d | bellard | MIPS_SYS(sys_getresuid , 3)
|
1859 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ |
1860 | 048f6b4d | bellard | MIPS_SYS(sys_poll , 3)
|
1861 | 048f6b4d | bellard | MIPS_SYS(sys_nfsservctl , 3)
|
1862 | 048f6b4d | bellard | MIPS_SYS(sys_setresgid , 3) /* 4190 */ |
1863 | 048f6b4d | bellard | MIPS_SYS(sys_getresgid , 3)
|
1864 | 048f6b4d | bellard | MIPS_SYS(sys_prctl , 5)
|
1865 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigreturn, 0)
|
1866 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigaction, 4)
|
1867 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ |
1868 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigpending, 2)
|
1869 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigtimedwait, 4)
|
1870 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigqueueinfo, 3)
|
1871 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigsuspend, 0)
|
1872 | 048f6b4d | bellard | MIPS_SYS(sys_pread64 , 6) /* 4200 */ |
1873 | 048f6b4d | bellard | MIPS_SYS(sys_pwrite64 , 6)
|
1874 | 048f6b4d | bellard | MIPS_SYS(sys_chown , 3)
|
1875 | 048f6b4d | bellard | MIPS_SYS(sys_getcwd , 2)
|
1876 | 048f6b4d | bellard | MIPS_SYS(sys_capget , 2)
|
1877 | 048f6b4d | bellard | MIPS_SYS(sys_capset , 2) /* 4205 */ |
1878 | 053ebb27 | Wesley W. Terpstra | MIPS_SYS(sys_sigaltstack , 2)
|
1879 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile , 4)
|
1880 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1881 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1882 | 048f6b4d | bellard | MIPS_SYS(sys_mmap2 , 6) /* 4210 */ |
1883 | 048f6b4d | bellard | MIPS_SYS(sys_truncate64 , 4)
|
1884 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate64 , 4)
|
1885 | 048f6b4d | bellard | MIPS_SYS(sys_stat64 , 2)
|
1886 | 048f6b4d | bellard | MIPS_SYS(sys_lstat64 , 2)
|
1887 | 048f6b4d | bellard | MIPS_SYS(sys_fstat64 , 2) /* 4215 */ |
1888 | 048f6b4d | bellard | MIPS_SYS(sys_pivot_root , 2)
|
1889 | 048f6b4d | bellard | MIPS_SYS(sys_mincore , 3)
|
1890 | 048f6b4d | bellard | MIPS_SYS(sys_madvise , 3)
|
1891 | 048f6b4d | bellard | MIPS_SYS(sys_getdents64 , 3)
|
1892 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ |
1893 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1894 | 048f6b4d | bellard | MIPS_SYS(sys_gettid , 0)
|
1895 | 048f6b4d | bellard | MIPS_SYS(sys_readahead , 5)
|
1896 | 048f6b4d | bellard | MIPS_SYS(sys_setxattr , 5)
|
1897 | 048f6b4d | bellard | MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ |
1898 | 048f6b4d | bellard | MIPS_SYS(sys_fsetxattr , 5)
|
1899 | 048f6b4d | bellard | MIPS_SYS(sys_getxattr , 4)
|
1900 | 048f6b4d | bellard | MIPS_SYS(sys_lgetxattr , 4)
|
1901 | 048f6b4d | bellard | MIPS_SYS(sys_fgetxattr , 4)
|
1902 | 048f6b4d | bellard | MIPS_SYS(sys_listxattr , 3) /* 4230 */ |
1903 | 048f6b4d | bellard | MIPS_SYS(sys_llistxattr , 3)
|
1904 | 048f6b4d | bellard | MIPS_SYS(sys_flistxattr , 3)
|
1905 | 048f6b4d | bellard | MIPS_SYS(sys_removexattr , 2)
|
1906 | 048f6b4d | bellard | MIPS_SYS(sys_lremovexattr, 2)
|
1907 | 048f6b4d | bellard | MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ |
1908 | 048f6b4d | bellard | MIPS_SYS(sys_tkill , 2)
|
1909 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile64 , 5)
|
1910 | 048f6b4d | bellard | MIPS_SYS(sys_futex , 2)
|
1911 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setaffinity, 3)
|
1912 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ |
1913 | 048f6b4d | bellard | MIPS_SYS(sys_io_setup , 2)
|
1914 | 048f6b4d | bellard | MIPS_SYS(sys_io_destroy , 1)
|
1915 | 048f6b4d | bellard | MIPS_SYS(sys_io_getevents, 5)
|
1916 | 048f6b4d | bellard | MIPS_SYS(sys_io_submit , 3)
|
1917 | 048f6b4d | bellard | MIPS_SYS(sys_io_cancel , 3) /* 4245 */ |
1918 | 048f6b4d | bellard | MIPS_SYS(sys_exit_group , 1)
|
1919 | 048f6b4d | bellard | MIPS_SYS(sys_lookup_dcookie, 3)
|
1920 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_create, 1)
|
1921 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_ctl , 4)
|
1922 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ |
1923 | 048f6b4d | bellard | MIPS_SYS(sys_remap_file_pages, 5)
|
1924 | 048f6b4d | bellard | MIPS_SYS(sys_set_tid_address, 1)
|
1925 | 048f6b4d | bellard | MIPS_SYS(sys_restart_syscall, 0)
|
1926 | 048f6b4d | bellard | MIPS_SYS(sys_fadvise64_64, 7)
|
1927 | 048f6b4d | bellard | MIPS_SYS(sys_statfs64 , 3) /* 4255 */ |
1928 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs64 , 2)
|
1929 | 048f6b4d | bellard | MIPS_SYS(sys_timer_create, 3)
|
1930 | 048f6b4d | bellard | MIPS_SYS(sys_timer_settime, 4)
|
1931 | 048f6b4d | bellard | MIPS_SYS(sys_timer_gettime, 2)
|
1932 | 048f6b4d | bellard | MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ |
1933 | 048f6b4d | bellard | MIPS_SYS(sys_timer_delete, 1)
|
1934 | 048f6b4d | bellard | MIPS_SYS(sys_clock_settime, 2)
|
1935 | 048f6b4d | bellard | MIPS_SYS(sys_clock_gettime, 2)
|
1936 | 048f6b4d | bellard | MIPS_SYS(sys_clock_getres, 2)
|
1937 | 048f6b4d | bellard | MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ |
1938 | 048f6b4d | bellard | MIPS_SYS(sys_tgkill , 3)
|
1939 | 048f6b4d | bellard | MIPS_SYS(sys_utimes , 2)
|
1940 | 048f6b4d | bellard | MIPS_SYS(sys_mbind , 4)
|
1941 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ |
1942 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ |
1943 | 048f6b4d | bellard | MIPS_SYS(sys_mq_open , 4)
|
1944 | 048f6b4d | bellard | MIPS_SYS(sys_mq_unlink , 1)
|
1945 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedsend, 5)
|
1946 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedreceive, 5)
|
1947 | 048f6b4d | bellard | MIPS_SYS(sys_mq_notify , 2) /* 4275 */ |
1948 | 048f6b4d | bellard | MIPS_SYS(sys_mq_getsetattr, 3)
|
1949 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ |
1950 | 048f6b4d | bellard | MIPS_SYS(sys_waitid , 4)
|
1951 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ |
1952 | 048f6b4d | bellard | MIPS_SYS(sys_add_key , 5)
|
1953 | 388bb21a | ths | MIPS_SYS(sys_request_key, 4)
|
1954 | 048f6b4d | bellard | MIPS_SYS(sys_keyctl , 5)
|
1955 | 6f5b89a0 | ths | MIPS_SYS(sys_set_thread_area, 1)
|
1956 | 388bb21a | ths | MIPS_SYS(sys_inotify_init, 0)
|
1957 | 388bb21a | ths | MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ |
1958 | 388bb21a | ths | MIPS_SYS(sys_inotify_rm_watch, 2)
|
1959 | 388bb21a | ths | MIPS_SYS(sys_migrate_pages, 4)
|
1960 | 388bb21a | ths | MIPS_SYS(sys_openat, 4)
|
1961 | 388bb21a | ths | MIPS_SYS(sys_mkdirat, 3)
|
1962 | 388bb21a | ths | MIPS_SYS(sys_mknodat, 4) /* 4290 */ |
1963 | 388bb21a | ths | MIPS_SYS(sys_fchownat, 5)
|
1964 | 388bb21a | ths | MIPS_SYS(sys_futimesat, 3)
|
1965 | 388bb21a | ths | MIPS_SYS(sys_fstatat64, 4)
|
1966 | 388bb21a | ths | MIPS_SYS(sys_unlinkat, 3)
|
1967 | 388bb21a | ths | MIPS_SYS(sys_renameat, 4) /* 4295 */ |
1968 | 388bb21a | ths | MIPS_SYS(sys_linkat, 5)
|
1969 | 388bb21a | ths | MIPS_SYS(sys_symlinkat, 3)
|
1970 | 388bb21a | ths | MIPS_SYS(sys_readlinkat, 4)
|
1971 | 388bb21a | ths | MIPS_SYS(sys_fchmodat, 3)
|
1972 | 388bb21a | ths | MIPS_SYS(sys_faccessat, 3) /* 4300 */ |
1973 | 388bb21a | ths | MIPS_SYS(sys_pselect6, 6)
|
1974 | 388bb21a | ths | MIPS_SYS(sys_ppoll, 5)
|
1975 | 388bb21a | ths | MIPS_SYS(sys_unshare, 1)
|
1976 | 388bb21a | ths | MIPS_SYS(sys_splice, 4)
|
1977 | 388bb21a | ths | MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ |
1978 | 388bb21a | ths | MIPS_SYS(sys_tee, 4)
|
1979 | 388bb21a | ths | MIPS_SYS(sys_vmsplice, 4)
|
1980 | 388bb21a | ths | MIPS_SYS(sys_move_pages, 6)
|
1981 | 388bb21a | ths | MIPS_SYS(sys_set_robust_list, 2)
|
1982 | 388bb21a | ths | MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ |
1983 | 388bb21a | ths | MIPS_SYS(sys_kexec_load, 4)
|
1984 | 388bb21a | ths | MIPS_SYS(sys_getcpu, 3)
|
1985 | 388bb21a | ths | MIPS_SYS(sys_epoll_pwait, 6)
|
1986 | 388bb21a | ths | MIPS_SYS(sys_ioprio_set, 3)
|
1987 | 388bb21a | ths | MIPS_SYS(sys_ioprio_get, 2)
|
1988 | d979e8eb | Peter Maydell | MIPS_SYS(sys_utimensat, 4)
|
1989 | d979e8eb | Peter Maydell | MIPS_SYS(sys_signalfd, 3)
|
1990 | d979e8eb | Peter Maydell | MIPS_SYS(sys_ni_syscall, 0) /* was timerfd */ |
1991 | d979e8eb | Peter Maydell | MIPS_SYS(sys_eventfd, 1)
|
1992 | d979e8eb | Peter Maydell | MIPS_SYS(sys_fallocate, 6) /* 4320 */ |
1993 | d979e8eb | Peter Maydell | MIPS_SYS(sys_timerfd_create, 2)
|
1994 | d979e8eb | Peter Maydell | MIPS_SYS(sys_timerfd_gettime, 2)
|
1995 | d979e8eb | Peter Maydell | MIPS_SYS(sys_timerfd_settime, 4)
|
1996 | d979e8eb | Peter Maydell | MIPS_SYS(sys_signalfd4, 4)
|
1997 | d979e8eb | Peter Maydell | MIPS_SYS(sys_eventfd2, 2) /* 4325 */ |
1998 | d979e8eb | Peter Maydell | MIPS_SYS(sys_epoll_create1, 1)
|
1999 | d979e8eb | Peter Maydell | MIPS_SYS(sys_dup3, 3)
|
2000 | d979e8eb | Peter Maydell | MIPS_SYS(sys_pipe2, 2)
|
2001 | d979e8eb | Peter Maydell | MIPS_SYS(sys_inotify_init1, 1)
|
2002 | d979e8eb | Peter Maydell | MIPS_SYS(sys_preadv, 6) /* 4330 */ |
2003 | d979e8eb | Peter Maydell | MIPS_SYS(sys_pwritev, 6)
|
2004 | d979e8eb | Peter Maydell | MIPS_SYS(sys_rt_tgsigqueueinfo, 4)
|
2005 | d979e8eb | Peter Maydell | MIPS_SYS(sys_perf_event_open, 5)
|
2006 | d979e8eb | Peter Maydell | MIPS_SYS(sys_accept4, 4)
|
2007 | d979e8eb | Peter Maydell | MIPS_SYS(sys_recvmmsg, 5) /* 4335 */ |
2008 | d979e8eb | Peter Maydell | MIPS_SYS(sys_fanotify_init, 2)
|
2009 | d979e8eb | Peter Maydell | MIPS_SYS(sys_fanotify_mark, 6)
|
2010 | d979e8eb | Peter Maydell | MIPS_SYS(sys_prlimit64, 4)
|
2011 | d979e8eb | Peter Maydell | MIPS_SYS(sys_name_to_handle_at, 5)
|
2012 | d979e8eb | Peter Maydell | MIPS_SYS(sys_open_by_handle_at, 3) /* 4340 */ |
2013 | d979e8eb | Peter Maydell | MIPS_SYS(sys_clock_adjtime, 2)
|
2014 | d979e8eb | Peter Maydell | MIPS_SYS(sys_syncfs, 1)
|
2015 | 048f6b4d | bellard | }; |
2016 | 048f6b4d | bellard | |
2017 | 048f6b4d | bellard | #undef MIPS_SYS
|
2018 | 048f6b4d | bellard | |
2019 | 590bc601 | Paul Brook | static int do_store_exclusive(CPUMIPSState *env) |
2020 | 590bc601 | Paul Brook | { |
2021 | 590bc601 | Paul Brook | target_ulong addr; |
2022 | 590bc601 | Paul Brook | target_ulong page_addr; |
2023 | 590bc601 | Paul Brook | target_ulong val; |
2024 | 590bc601 | Paul Brook | int flags;
|
2025 | 590bc601 | Paul Brook | int segv = 0; |
2026 | 590bc601 | Paul Brook | int reg;
|
2027 | 590bc601 | Paul Brook | int d;
|
2028 | 590bc601 | Paul Brook | |
2029 | 5499b6ff | Aurelien Jarno | addr = env->lladdr; |
2030 | 590bc601 | Paul Brook | page_addr = addr & TARGET_PAGE_MASK; |
2031 | 590bc601 | Paul Brook | start_exclusive(); |
2032 | 590bc601 | Paul Brook | mmap_lock(); |
2033 | 590bc601 | Paul Brook | flags = page_get_flags(page_addr); |
2034 | 590bc601 | Paul Brook | if ((flags & PAGE_READ) == 0) { |
2035 | 590bc601 | Paul Brook | segv = 1;
|
2036 | 590bc601 | Paul Brook | } else {
|
2037 | 590bc601 | Paul Brook | reg = env->llreg & 0x1f;
|
2038 | 590bc601 | Paul Brook | d = (env->llreg & 0x20) != 0; |
2039 | 590bc601 | Paul Brook | if (d) {
|
2040 | 590bc601 | Paul Brook | segv = get_user_s64(val, addr); |
2041 | 590bc601 | Paul Brook | } else {
|
2042 | 590bc601 | Paul Brook | segv = get_user_s32(val, addr); |
2043 | 590bc601 | Paul Brook | } |
2044 | 590bc601 | Paul Brook | if (!segv) {
|
2045 | 590bc601 | Paul Brook | if (val != env->llval) {
|
2046 | 590bc601 | Paul Brook | env->active_tc.gpr[reg] = 0;
|
2047 | 590bc601 | Paul Brook | } else {
|
2048 | 590bc601 | Paul Brook | if (d) {
|
2049 | 590bc601 | Paul Brook | segv = put_user_u64(env->llnewval, addr); |
2050 | 590bc601 | Paul Brook | } else {
|
2051 | 590bc601 | Paul Brook | segv = put_user_u32(env->llnewval, addr); |
2052 | 590bc601 | Paul Brook | } |
2053 | 590bc601 | Paul Brook | if (!segv) {
|
2054 | 590bc601 | Paul Brook | env->active_tc.gpr[reg] = 1;
|
2055 | 590bc601 | Paul Brook | } |
2056 | 590bc601 | Paul Brook | } |
2057 | 590bc601 | Paul Brook | } |
2058 | 590bc601 | Paul Brook | } |
2059 | 5499b6ff | Aurelien Jarno | env->lladdr = -1;
|
2060 | 590bc601 | Paul Brook | if (!segv) {
|
2061 | 590bc601 | Paul Brook | env->active_tc.PC += 4;
|
2062 | 590bc601 | Paul Brook | } |
2063 | 590bc601 | Paul Brook | mmap_unlock(); |
2064 | 590bc601 | Paul Brook | end_exclusive(); |
2065 | 590bc601 | Paul Brook | return segv;
|
2066 | 590bc601 | Paul Brook | } |
2067 | 590bc601 | Paul Brook | |
2068 | 048f6b4d | bellard | void cpu_loop(CPUMIPSState *env)
|
2069 | 048f6b4d | bellard | { |
2070 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2071 | 388bb21a | ths | int trapnr, ret;
|
2072 | 048f6b4d | bellard | unsigned int syscall_num; |
2073 | 048f6b4d | bellard | |
2074 | 048f6b4d | bellard | for(;;) {
|
2075 | 590bc601 | Paul Brook | cpu_exec_start(env); |
2076 | 048f6b4d | bellard | trapnr = cpu_mips_exec(env); |
2077 | 590bc601 | Paul Brook | cpu_exec_end(env); |
2078 | 048f6b4d | bellard | switch(trapnr) {
|
2079 | 048f6b4d | bellard | case EXCP_SYSCALL:
|
2080 | b5dc7732 | ths | syscall_num = env->active_tc.gpr[2] - 4000; |
2081 | b5dc7732 | ths | env->active_tc.PC += 4;
|
2082 | 388bb21a | ths | if (syscall_num >= sizeof(mips_syscall_args)) { |
2083 | 7c2f6157 | Wesley W. Terpstra | ret = -TARGET_ENOSYS; |
2084 | 388bb21a | ths | } else {
|
2085 | 388bb21a | ths | int nb_args;
|
2086 | 992f48a0 | blueswir1 | abi_ulong sp_reg; |
2087 | 992f48a0 | blueswir1 | abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; |
2088 | 388bb21a | ths | |
2089 | 388bb21a | ths | nb_args = mips_syscall_args[syscall_num]; |
2090 | b5dc7732 | ths | sp_reg = env->active_tc.gpr[29];
|
2091 | 388bb21a | ths | switch (nb_args) {
|
2092 | 388bb21a | ths | /* these arguments are taken from the stack */
|
2093 | 2f619698 | bellard | /* FIXME - what to do if get_user() fails? */
|
2094 | 2f619698 | bellard | case 8: get_user_ual(arg8, sp_reg + 28); |
2095 | 2f619698 | bellard | case 7: get_user_ual(arg7, sp_reg + 24); |
2096 | 2f619698 | bellard | case 6: get_user_ual(arg6, sp_reg + 20); |
2097 | 2f619698 | bellard | case 5: get_user_ual(arg5, sp_reg + 16); |
2098 | 388bb21a | ths | default:
|
2099 | 388bb21a | ths | break;
|
2100 | 048f6b4d | bellard | } |
2101 | b5dc7732 | ths | ret = do_syscall(env, env->active_tc.gpr[2],
|
2102 | b5dc7732 | ths | env->active_tc.gpr[4],
|
2103 | b5dc7732 | ths | env->active_tc.gpr[5],
|
2104 | b5dc7732 | ths | env->active_tc.gpr[6],
|
2105 | b5dc7732 | ths | env->active_tc.gpr[7],
|
2106 | 5945cfcb | Peter Maydell | arg5, arg6, arg7, arg8); |
2107 | 388bb21a | ths | } |
2108 | 0b1bcb00 | pbrook | if (ret == -TARGET_QEMU_ESIGRETURN) {
|
2109 | 0b1bcb00 | pbrook | /* Returning from a successful sigreturn syscall.
|
2110 | 0b1bcb00 | pbrook | Avoid clobbering register state. */
|
2111 | 0b1bcb00 | pbrook | break;
|
2112 | 0b1bcb00 | pbrook | } |
2113 | 388bb21a | ths | if ((unsigned int)ret >= (unsigned int)(-1133)) { |
2114 | b5dc7732 | ths | env->active_tc.gpr[7] = 1; /* error flag */ |
2115 | 388bb21a | ths | ret = -ret; |
2116 | 388bb21a | ths | } else {
|
2117 | b5dc7732 | ths | env->active_tc.gpr[7] = 0; /* error flag */ |
2118 | 048f6b4d | bellard | } |
2119 | b5dc7732 | ths | env->active_tc.gpr[2] = ret;
|
2120 | 048f6b4d | bellard | break;
|
2121 | ca7c2b1b | ths | case EXCP_TLBL:
|
2122 | ca7c2b1b | ths | case EXCP_TLBS:
|
2123 | e6e5bd2d | Wesley W. Terpstra | case EXCP_AdEL:
|
2124 | e6e5bd2d | Wesley W. Terpstra | case EXCP_AdES:
|
2125 | e4474235 | pbrook | info.si_signo = TARGET_SIGSEGV; |
2126 | e4474235 | pbrook | info.si_errno = 0;
|
2127 | e4474235 | pbrook | /* XXX: check env->error_code */
|
2128 | e4474235 | pbrook | info.si_code = TARGET_SEGV_MAPERR; |
2129 | e4474235 | pbrook | info._sifields._sigfault._addr = env->CP0_BadVAddr; |
2130 | e4474235 | pbrook | queue_signal(env, info.si_signo, &info); |
2131 | e4474235 | pbrook | break;
|
2132 | 6900e84b | bellard | case EXCP_CpU:
|
2133 | 048f6b4d | bellard | case EXCP_RI:
|
2134 | bc1ad2de | bellard | info.si_signo = TARGET_SIGILL; |
2135 | bc1ad2de | bellard | info.si_errno = 0;
|
2136 | bc1ad2de | bellard | info.si_code = 0;
|
2137 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2138 | 048f6b4d | bellard | break;
|
2139 | 106ec879 | bellard | case EXCP_INTERRUPT:
|
2140 | 106ec879 | bellard | /* just indicate that signals should be handled asap */
|
2141 | 106ec879 | bellard | break;
|
2142 | d08b2a28 | pbrook | case EXCP_DEBUG:
|
2143 | d08b2a28 | pbrook | { |
2144 | d08b2a28 | pbrook | int sig;
|
2145 | d08b2a28 | pbrook | |
2146 | d08b2a28 | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2147 | d08b2a28 | pbrook | if (sig)
|
2148 | d08b2a28 | pbrook | { |
2149 | d08b2a28 | pbrook | info.si_signo = sig; |
2150 | d08b2a28 | pbrook | info.si_errno = 0;
|
2151 | d08b2a28 | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2152 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2153 | d08b2a28 | pbrook | } |
2154 | d08b2a28 | pbrook | } |
2155 | d08b2a28 | pbrook | break;
|
2156 | 590bc601 | Paul Brook | case EXCP_SC:
|
2157 | 590bc601 | Paul Brook | if (do_store_exclusive(env)) {
|
2158 | 590bc601 | Paul Brook | info.si_signo = TARGET_SIGSEGV; |
2159 | 590bc601 | Paul Brook | info.si_errno = 0;
|
2160 | 590bc601 | Paul Brook | info.si_code = TARGET_SEGV_MAPERR; |
2161 | 590bc601 | Paul Brook | info._sifields._sigfault._addr = env->active_tc.PC; |
2162 | 590bc601 | Paul Brook | queue_signal(env, info.si_signo, &info); |
2163 | 590bc601 | Paul Brook | } |
2164 | 590bc601 | Paul Brook | break;
|
2165 | 048f6b4d | bellard | default:
|
2166 | 048f6b4d | bellard | // error:
|
2167 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
2168 | 048f6b4d | bellard | trapnr); |
2169 | 048f6b4d | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
2170 | 048f6b4d | bellard | abort(); |
2171 | 048f6b4d | bellard | } |
2172 | 048f6b4d | bellard | process_pending_signals(env); |
2173 | 048f6b4d | bellard | } |
2174 | 048f6b4d | bellard | } |
2175 | 048f6b4d | bellard | #endif
|
2176 | 048f6b4d | bellard | |
2177 | fdf9b3e8 | bellard | #ifdef TARGET_SH4
|
2178 | fdf9b3e8 | bellard | void cpu_loop (CPUState *env)
|
2179 | fdf9b3e8 | bellard | { |
2180 | fdf9b3e8 | bellard | int trapnr, ret;
|
2181 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2182 | 3b46e624 | ths | |
2183 | fdf9b3e8 | bellard | while (1) { |
2184 | fdf9b3e8 | bellard | trapnr = cpu_sh4_exec (env); |
2185 | 3b46e624 | ths | |
2186 | fdf9b3e8 | bellard | switch (trapnr) {
|
2187 | fdf9b3e8 | bellard | case 0x160: |
2188 | 0b6d3ae0 | aurel32 | env->pc += 2;
|
2189 | 5fafdf24 | ths | ret = do_syscall(env, |
2190 | 5fafdf24 | ths | env->gregs[3],
|
2191 | 5fafdf24 | ths | env->gregs[4],
|
2192 | 5fafdf24 | ths | env->gregs[5],
|
2193 | 5fafdf24 | ths | env->gregs[6],
|
2194 | 5fafdf24 | ths | env->gregs[7],
|
2195 | 5fafdf24 | ths | env->gregs[0],
|
2196 | 5945cfcb | Peter Maydell | env->gregs[1],
|
2197 | 5945cfcb | Peter Maydell | 0, 0); |
2198 | 9c2a9ea1 | pbrook | env->gregs[0] = ret;
|
2199 | fdf9b3e8 | bellard | break;
|
2200 | c3b5bc8a | ths | case EXCP_INTERRUPT:
|
2201 | c3b5bc8a | ths | /* just indicate that signals should be handled asap */
|
2202 | c3b5bc8a | ths | break;
|
2203 | 355fb23d | pbrook | case EXCP_DEBUG:
|
2204 | 355fb23d | pbrook | { |
2205 | 355fb23d | pbrook | int sig;
|
2206 | 355fb23d | pbrook | |
2207 | 355fb23d | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2208 | 355fb23d | pbrook | if (sig)
|
2209 | 355fb23d | pbrook | { |
2210 | 355fb23d | pbrook | info.si_signo = sig; |
2211 | 355fb23d | pbrook | info.si_errno = 0;
|
2212 | 355fb23d | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2213 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2214 | 355fb23d | pbrook | } |
2215 | 355fb23d | pbrook | } |
2216 | 355fb23d | pbrook | break;
|
2217 | c3b5bc8a | ths | case 0xa0: |
2218 | c3b5bc8a | ths | case 0xc0: |
2219 | c3b5bc8a | ths | info.si_signo = SIGSEGV; |
2220 | c3b5bc8a | ths | info.si_errno = 0;
|
2221 | c3b5bc8a | ths | info.si_code = TARGET_SEGV_MAPERR; |
2222 | c3b5bc8a | ths | info._sifields._sigfault._addr = env->tea; |
2223 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2224 | c3b5bc8a | ths | break;
|
2225 | c3b5bc8a | ths | |
2226 | fdf9b3e8 | bellard | default:
|
2227 | fdf9b3e8 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2228 | fdf9b3e8 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
2229 | fdf9b3e8 | bellard | exit (1);
|
2230 | fdf9b3e8 | bellard | } |
2231 | fdf9b3e8 | bellard | process_pending_signals (env); |
2232 | fdf9b3e8 | bellard | } |
2233 | fdf9b3e8 | bellard | } |
2234 | fdf9b3e8 | bellard | #endif
|
2235 | fdf9b3e8 | bellard | |
2236 | 48733d19 | ths | #ifdef TARGET_CRIS
|
2237 | 48733d19 | ths | void cpu_loop (CPUState *env)
|
2238 | 48733d19 | ths | { |
2239 | 48733d19 | ths | int trapnr, ret;
|
2240 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2241 | 48733d19 | ths | |
2242 | 48733d19 | ths | while (1) { |
2243 | 48733d19 | ths | trapnr = cpu_cris_exec (env); |
2244 | 48733d19 | ths | switch (trapnr) {
|
2245 | 48733d19 | ths | case 0xaa: |
2246 | 48733d19 | ths | { |
2247 | 48733d19 | ths | info.si_signo = SIGSEGV; |
2248 | 48733d19 | ths | info.si_errno = 0;
|
2249 | 48733d19 | ths | /* XXX: check env->error_code */
|
2250 | 48733d19 | ths | info.si_code = TARGET_SEGV_MAPERR; |
2251 | e00c1e71 | edgar_igl | info._sifields._sigfault._addr = env->pregs[PR_EDA]; |
2252 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2253 | 48733d19 | ths | } |
2254 | 48733d19 | ths | break;
|
2255 | b6d3abda | edgar_igl | case EXCP_INTERRUPT:
|
2256 | b6d3abda | edgar_igl | /* just indicate that signals should be handled asap */
|
2257 | b6d3abda | edgar_igl | break;
|
2258 | 48733d19 | ths | case EXCP_BREAK:
|
2259 | 48733d19 | ths | ret = do_syscall(env, |
2260 | 48733d19 | ths | env->regs[9],
|
2261 | 48733d19 | ths | env->regs[10],
|
2262 | 48733d19 | ths | env->regs[11],
|
2263 | 48733d19 | ths | env->regs[12],
|
2264 | 48733d19 | ths | env->regs[13],
|
2265 | 48733d19 | ths | env->pregs[7],
|
2266 | 5945cfcb | Peter Maydell | env->pregs[11],
|
2267 | 5945cfcb | Peter Maydell | 0, 0); |
2268 | 48733d19 | ths | env->regs[10] = ret;
|
2269 | 48733d19 | ths | break;
|
2270 | 48733d19 | ths | case EXCP_DEBUG:
|
2271 | 48733d19 | ths | { |
2272 | 48733d19 | ths | int sig;
|
2273 | 48733d19 | ths | |
2274 | 48733d19 | ths | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2275 | 48733d19 | ths | if (sig)
|
2276 | 48733d19 | ths | { |
2277 | 48733d19 | ths | info.si_signo = sig; |
2278 | 48733d19 | ths | info.si_errno = 0;
|
2279 | 48733d19 | ths | info.si_code = TARGET_TRAP_BRKPT; |
2280 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2281 | 48733d19 | ths | } |
2282 | 48733d19 | ths | } |
2283 | 48733d19 | ths | break;
|
2284 | 48733d19 | ths | default:
|
2285 | 48733d19 | ths | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2286 | 48733d19 | ths | cpu_dump_state(env, stderr, fprintf, 0);
|
2287 | 48733d19 | ths | exit (1);
|
2288 | 48733d19 | ths | } |
2289 | 48733d19 | ths | process_pending_signals (env); |
2290 | 48733d19 | ths | } |
2291 | 48733d19 | ths | } |
2292 | 48733d19 | ths | #endif
|
2293 | 48733d19 | ths | |
2294 | b779e29e | Edgar E. Iglesias | #ifdef TARGET_MICROBLAZE
|
2295 | b779e29e | Edgar E. Iglesias | void cpu_loop (CPUState *env)
|
2296 | b779e29e | Edgar E. Iglesias | { |
2297 | b779e29e | Edgar E. Iglesias | int trapnr, ret;
|
2298 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2299 | b779e29e | Edgar E. Iglesias | |
2300 | b779e29e | Edgar E. Iglesias | while (1) { |
2301 | b779e29e | Edgar E. Iglesias | trapnr = cpu_mb_exec (env); |
2302 | b779e29e | Edgar E. Iglesias | switch (trapnr) {
|
2303 | b779e29e | Edgar E. Iglesias | case 0xaa: |
2304 | b779e29e | Edgar E. Iglesias | { |
2305 | b779e29e | Edgar E. Iglesias | info.si_signo = SIGSEGV; |
2306 | b779e29e | Edgar E. Iglesias | info.si_errno = 0;
|
2307 | b779e29e | Edgar E. Iglesias | /* XXX: check env->error_code */
|
2308 | b779e29e | Edgar E. Iglesias | info.si_code = TARGET_SEGV_MAPERR; |
2309 | b779e29e | Edgar E. Iglesias | info._sifields._sigfault._addr = 0;
|
2310 | b779e29e | Edgar E. Iglesias | queue_signal(env, info.si_signo, &info); |
2311 | b779e29e | Edgar E. Iglesias | } |
2312 | b779e29e | Edgar E. Iglesias | break;
|
2313 | b779e29e | Edgar E. Iglesias | case EXCP_INTERRUPT:
|
2314 | b779e29e | Edgar E. Iglesias | /* just indicate that signals should be handled asap */
|
2315 | b779e29e | Edgar E. Iglesias | break;
|
2316 | b779e29e | Edgar E. Iglesias | case EXCP_BREAK:
|
2317 | b779e29e | Edgar E. Iglesias | /* Return address is 4 bytes after the call. */
|
2318 | b779e29e | Edgar E. Iglesias | env->regs[14] += 4; |
2319 | b779e29e | Edgar E. Iglesias | ret = do_syscall(env, |
2320 | b779e29e | Edgar E. Iglesias | env->regs[12],
|
2321 | b779e29e | Edgar E. Iglesias | env->regs[5],
|
2322 | b779e29e | Edgar E. Iglesias | env->regs[6],
|
2323 | b779e29e | Edgar E. Iglesias | env->regs[7],
|
2324 | b779e29e | Edgar E. Iglesias | env->regs[8],
|
2325 | b779e29e | Edgar E. Iglesias | env->regs[9],
|
2326 | 5945cfcb | Peter Maydell | env->regs[10],
|
2327 | 5945cfcb | Peter Maydell | 0, 0); |
2328 | b779e29e | Edgar E. Iglesias | env->regs[3] = ret;
|
2329 | b779e29e | Edgar E. Iglesias | env->sregs[SR_PC] = env->regs[14];
|
2330 | b779e29e | Edgar E. Iglesias | break;
|
2331 | b76da7e3 | Edgar E. Iglesias | case EXCP_HW_EXCP:
|
2332 | b76da7e3 | Edgar E. Iglesias | env->regs[17] = env->sregs[SR_PC] + 4; |
2333 | b76da7e3 | Edgar E. Iglesias | if (env->iflags & D_FLAG) {
|
2334 | b76da7e3 | Edgar E. Iglesias | env->sregs[SR_ESR] |= 1 << 12; |
2335 | b76da7e3 | Edgar E. Iglesias | env->sregs[SR_PC] -= 4;
|
2336 | b76da7e3 | Edgar E. Iglesias | /* FIXME: if branch was immed, replay the imm aswell. */
|
2337 | b76da7e3 | Edgar E. Iglesias | } |
2338 | b76da7e3 | Edgar E. Iglesias | |
2339 | b76da7e3 | Edgar E. Iglesias | env->iflags &= ~(IMM_FLAG | D_FLAG); |
2340 | b76da7e3 | Edgar E. Iglesias | |
2341 | b76da7e3 | Edgar E. Iglesias | switch (env->sregs[SR_ESR] & 31) { |
2342 | b76da7e3 | Edgar E. Iglesias | case ESR_EC_FPU:
|
2343 | b76da7e3 | Edgar E. Iglesias | info.si_signo = SIGFPE; |
2344 | b76da7e3 | Edgar E. Iglesias | info.si_errno = 0;
|
2345 | b76da7e3 | Edgar E. Iglesias | if (env->sregs[SR_FSR] & FSR_IO) {
|
2346 | b76da7e3 | Edgar E. Iglesias | info.si_code = TARGET_FPE_FLTINV; |
2347 | b76da7e3 | Edgar E. Iglesias | } |
2348 | b76da7e3 | Edgar E. Iglesias | if (env->sregs[SR_FSR] & FSR_DZ) {
|
2349 | b76da7e3 | Edgar E. Iglesias | info.si_code = TARGET_FPE_FLTDIV; |
2350 | b76da7e3 | Edgar E. Iglesias | } |
2351 | b76da7e3 | Edgar E. Iglesias | info._sifields._sigfault._addr = 0;
|
2352 | b76da7e3 | Edgar E. Iglesias | queue_signal(env, info.si_signo, &info); |
2353 | b76da7e3 | Edgar E. Iglesias | break;
|
2354 | b76da7e3 | Edgar E. Iglesias | default:
|
2355 | b76da7e3 | Edgar E. Iglesias | printf ("Unhandled hw-exception: 0x%x\n",
|
2356 | 2e42d52d | Edgar E. Iglesias | env->sregs[SR_ESR] & ESR_EC_MASK); |
2357 | b76da7e3 | Edgar E. Iglesias | cpu_dump_state(env, stderr, fprintf, 0);
|
2358 | b76da7e3 | Edgar E. Iglesias | exit (1);
|
2359 | b76da7e3 | Edgar E. Iglesias | break;
|
2360 | b76da7e3 | Edgar E. Iglesias | } |
2361 | b76da7e3 | Edgar E. Iglesias | break;
|
2362 | b779e29e | Edgar E. Iglesias | case EXCP_DEBUG:
|
2363 | b779e29e | Edgar E. Iglesias | { |
2364 | b779e29e | Edgar E. Iglesias | int sig;
|
2365 | b779e29e | Edgar E. Iglesias | |
2366 | b779e29e | Edgar E. Iglesias | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2367 | b779e29e | Edgar E. Iglesias | if (sig)
|
2368 | b779e29e | Edgar E. Iglesias | { |
2369 | b779e29e | Edgar E. Iglesias | info.si_signo = sig; |
2370 | b779e29e | Edgar E. Iglesias | info.si_errno = 0;
|
2371 | b779e29e | Edgar E. Iglesias | info.si_code = TARGET_TRAP_BRKPT; |
2372 | b779e29e | Edgar E. Iglesias | queue_signal(env, info.si_signo, &info); |
2373 | b779e29e | Edgar E. Iglesias | } |
2374 | b779e29e | Edgar E. Iglesias | } |
2375 | b779e29e | Edgar E. Iglesias | break;
|
2376 | b779e29e | Edgar E. Iglesias | default:
|
2377 | b779e29e | Edgar E. Iglesias | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2378 | b779e29e | Edgar E. Iglesias | cpu_dump_state(env, stderr, fprintf, 0);
|
2379 | b779e29e | Edgar E. Iglesias | exit (1);
|
2380 | b779e29e | Edgar E. Iglesias | } |
2381 | b779e29e | Edgar E. Iglesias | process_pending_signals (env); |
2382 | b779e29e | Edgar E. Iglesias | } |
2383 | b779e29e | Edgar E. Iglesias | } |
2384 | b779e29e | Edgar E. Iglesias | #endif
|
2385 | b779e29e | Edgar E. Iglesias | |
2386 | e6e5906b | pbrook | #ifdef TARGET_M68K
|
2387 | e6e5906b | pbrook | |
2388 | e6e5906b | pbrook | void cpu_loop(CPUM68KState *env)
|
2389 | e6e5906b | pbrook | { |
2390 | e6e5906b | pbrook | int trapnr;
|
2391 | e6e5906b | pbrook | unsigned int n; |
2392 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2393 | e6e5906b | pbrook | TaskState *ts = env->opaque; |
2394 | 3b46e624 | ths | |
2395 | e6e5906b | pbrook | for(;;) {
|
2396 | e6e5906b | pbrook | trapnr = cpu_m68k_exec(env); |
2397 | e6e5906b | pbrook | switch(trapnr) {
|
2398 | e6e5906b | pbrook | case EXCP_ILLEGAL:
|
2399 | e6e5906b | pbrook | { |
2400 | e6e5906b | pbrook | if (ts->sim_syscalls) {
|
2401 | e6e5906b | pbrook | uint16_t nr; |
2402 | e6e5906b | pbrook | nr = lduw(env->pc + 2);
|
2403 | e6e5906b | pbrook | env->pc += 4;
|
2404 | e6e5906b | pbrook | do_m68k_simcall(env, nr); |
2405 | e6e5906b | pbrook | } else {
|
2406 | e6e5906b | pbrook | goto do_sigill;
|
2407 | e6e5906b | pbrook | } |
2408 | e6e5906b | pbrook | } |
2409 | e6e5906b | pbrook | break;
|
2410 | a87295e8 | pbrook | case EXCP_HALT_INSN:
|
2411 | e6e5906b | pbrook | /* Semihosing syscall. */
|
2412 | a87295e8 | pbrook | env->pc += 4;
|
2413 | e6e5906b | pbrook | do_m68k_semihosting(env, env->dregs[0]);
|
2414 | e6e5906b | pbrook | break;
|
2415 | e6e5906b | pbrook | case EXCP_LINEA:
|
2416 | e6e5906b | pbrook | case EXCP_LINEF:
|
2417 | e6e5906b | pbrook | case EXCP_UNSUPPORTED:
|
2418 | e6e5906b | pbrook | do_sigill:
|
2419 | e6e5906b | pbrook | info.si_signo = SIGILL; |
2420 | e6e5906b | pbrook | info.si_errno = 0;
|
2421 | e6e5906b | pbrook | info.si_code = TARGET_ILL_ILLOPN; |
2422 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->pc; |
2423 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2424 | e6e5906b | pbrook | break;
|
2425 | e6e5906b | pbrook | case EXCP_TRAP0:
|
2426 | e6e5906b | pbrook | { |
2427 | e6e5906b | pbrook | ts->sim_syscalls = 0;
|
2428 | e6e5906b | pbrook | n = env->dregs[0];
|
2429 | e6e5906b | pbrook | env->pc += 2;
|
2430 | 5fafdf24 | ths | env->dregs[0] = do_syscall(env,
|
2431 | 5fafdf24 | ths | n, |
2432 | e6e5906b | pbrook | env->dregs[1],
|
2433 | e6e5906b | pbrook | env->dregs[2],
|
2434 | e6e5906b | pbrook | env->dregs[3],
|
2435 | e6e5906b | pbrook | env->dregs[4],
|
2436 | e6e5906b | pbrook | env->dregs[5],
|
2437 | 5945cfcb | Peter Maydell | env->aregs[0],
|
2438 | 5945cfcb | Peter Maydell | 0, 0); |
2439 | e6e5906b | pbrook | } |
2440 | e6e5906b | pbrook | break;
|
2441 | e6e5906b | pbrook | case EXCP_INTERRUPT:
|
2442 | e6e5906b | pbrook | /* just indicate that signals should be handled asap */
|
2443 | e6e5906b | pbrook | break;
|
2444 | e6e5906b | pbrook | case EXCP_ACCESS:
|
2445 | e6e5906b | pbrook | { |
2446 | e6e5906b | pbrook | info.si_signo = SIGSEGV; |
2447 | e6e5906b | pbrook | info.si_errno = 0;
|
2448 | e6e5906b | pbrook | /* XXX: check env->error_code */
|
2449 | e6e5906b | pbrook | info.si_code = TARGET_SEGV_MAPERR; |
2450 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->mmu.ar; |
2451 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2452 | e6e5906b | pbrook | } |
2453 | e6e5906b | pbrook | break;
|
2454 | e6e5906b | pbrook | case EXCP_DEBUG:
|
2455 | e6e5906b | pbrook | { |
2456 | e6e5906b | pbrook | int sig;
|
2457 | e6e5906b | pbrook | |
2458 | e6e5906b | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2459 | e6e5906b | pbrook | if (sig)
|
2460 | e6e5906b | pbrook | { |
2461 | e6e5906b | pbrook | info.si_signo = sig; |
2462 | e6e5906b | pbrook | info.si_errno = 0;
|
2463 | e6e5906b | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
2464 | 624f7979 | pbrook | queue_signal(env, info.si_signo, &info); |
2465 | e6e5906b | pbrook | } |
2466 | e6e5906b | pbrook | } |
2467 | e6e5906b | pbrook | break;
|
2468 | e6e5906b | pbrook | default:
|
2469 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
2470 | e6e5906b | pbrook | trapnr); |
2471 | e6e5906b | pbrook | cpu_dump_state(env, stderr, fprintf, 0);
|
2472 | e6e5906b | pbrook | abort(); |
2473 | e6e5906b | pbrook | } |
2474 | e6e5906b | pbrook | process_pending_signals(env); |
2475 | e6e5906b | pbrook | } |
2476 | e6e5906b | pbrook | } |
2477 | e6e5906b | pbrook | #endif /* TARGET_M68K */ |
2478 | e6e5906b | pbrook | |
2479 | 7a3148a9 | j_mayer | #ifdef TARGET_ALPHA
|
2480 | 6910b8f6 | Richard Henderson | static void do_store_exclusive(CPUAlphaState *env, int reg, int quad) |
2481 | 6910b8f6 | Richard Henderson | { |
2482 | 6910b8f6 | Richard Henderson | target_ulong addr, val, tmp; |
2483 | 6910b8f6 | Richard Henderson | target_siginfo_t info; |
2484 | 6910b8f6 | Richard Henderson | int ret = 0; |
2485 | 6910b8f6 | Richard Henderson | |
2486 | 6910b8f6 | Richard Henderson | addr = env->lock_addr; |
2487 | 6910b8f6 | Richard Henderson | tmp = env->lock_st_addr; |
2488 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2489 | 6910b8f6 | Richard Henderson | env->lock_st_addr = 0;
|
2490 | 6910b8f6 | Richard Henderson | |
2491 | 6910b8f6 | Richard Henderson | start_exclusive(); |
2492 | 6910b8f6 | Richard Henderson | mmap_lock(); |
2493 | 6910b8f6 | Richard Henderson | |
2494 | 6910b8f6 | Richard Henderson | if (addr == tmp) {
|
2495 | 6910b8f6 | Richard Henderson | if (quad ? get_user_s64(val, addr) : get_user_s32(val, addr)) {
|
2496 | 6910b8f6 | Richard Henderson | goto do_sigsegv;
|
2497 | 6910b8f6 | Richard Henderson | } |
2498 | 6910b8f6 | Richard Henderson | |
2499 | 6910b8f6 | Richard Henderson | if (val == env->lock_value) {
|
2500 | 6910b8f6 | Richard Henderson | tmp = env->ir[reg]; |
2501 | 6910b8f6 | Richard Henderson | if (quad ? put_user_u64(tmp, addr) : put_user_u32(tmp, addr)) {
|
2502 | 6910b8f6 | Richard Henderson | goto do_sigsegv;
|
2503 | 6910b8f6 | Richard Henderson | } |
2504 | 6910b8f6 | Richard Henderson | ret = 1;
|
2505 | 6910b8f6 | Richard Henderson | } |
2506 | 6910b8f6 | Richard Henderson | } |
2507 | 6910b8f6 | Richard Henderson | env->ir[reg] = ret; |
2508 | 6910b8f6 | Richard Henderson | env->pc += 4;
|
2509 | 6910b8f6 | Richard Henderson | |
2510 | 6910b8f6 | Richard Henderson | mmap_unlock(); |
2511 | 6910b8f6 | Richard Henderson | end_exclusive(); |
2512 | 6910b8f6 | Richard Henderson | return;
|
2513 | 6910b8f6 | Richard Henderson | |
2514 | 6910b8f6 | Richard Henderson | do_sigsegv:
|
2515 | 6910b8f6 | Richard Henderson | mmap_unlock(); |
2516 | 6910b8f6 | Richard Henderson | end_exclusive(); |
2517 | 6910b8f6 | Richard Henderson | |
2518 | 6910b8f6 | Richard Henderson | info.si_signo = TARGET_SIGSEGV; |
2519 | 6910b8f6 | Richard Henderson | info.si_errno = 0;
|
2520 | 6910b8f6 | Richard Henderson | info.si_code = TARGET_SEGV_MAPERR; |
2521 | 6910b8f6 | Richard Henderson | info._sifields._sigfault._addr = addr; |
2522 | 6910b8f6 | Richard Henderson | queue_signal(env, TARGET_SIGSEGV, &info); |
2523 | 6910b8f6 | Richard Henderson | } |
2524 | 6910b8f6 | Richard Henderson | |
2525 | 7a3148a9 | j_mayer | void cpu_loop (CPUState *env)
|
2526 | 7a3148a9 | j_mayer | { |
2527 | e96efcfc | j_mayer | int trapnr;
|
2528 | c227f099 | Anthony Liguori | target_siginfo_t info; |
2529 | 6049f4f8 | Richard Henderson | abi_long sysret; |
2530 | 3b46e624 | ths | |
2531 | 7a3148a9 | j_mayer | while (1) { |
2532 | 7a3148a9 | j_mayer | trapnr = cpu_alpha_exec (env); |
2533 | 3b46e624 | ths | |
2534 | ac316ca4 | Richard Henderson | /* All of the traps imply a transition through PALcode, which
|
2535 | ac316ca4 | Richard Henderson | implies an REI instruction has been executed. Which means
|
2536 | ac316ca4 | Richard Henderson | that the intr_flag should be cleared. */
|
2537 | ac316ca4 | Richard Henderson | env->intr_flag = 0;
|
2538 | ac316ca4 | Richard Henderson | |
2539 | 7a3148a9 | j_mayer | switch (trapnr) {
|
2540 | 7a3148a9 | j_mayer | case EXCP_RESET:
|
2541 | 7a3148a9 | j_mayer | fprintf(stderr, "Reset requested. Exit\n");
|
2542 | 7a3148a9 | j_mayer | exit(1);
|
2543 | 7a3148a9 | j_mayer | break;
|
2544 | 7a3148a9 | j_mayer | case EXCP_MCHK:
|
2545 | 7a3148a9 | j_mayer | fprintf(stderr, "Machine check exception. Exit\n");
|
2546 | 7a3148a9 | j_mayer | exit(1);
|
2547 | 7a3148a9 | j_mayer | break;
|
2548 | 07b6c13b | Richard Henderson | case EXCP_SMP_INTERRUPT:
|
2549 | 07b6c13b | Richard Henderson | case EXCP_CLK_INTERRUPT:
|
2550 | 07b6c13b | Richard Henderson | case EXCP_DEV_INTERRUPT:
|
2551 | 5fafdf24 | ths | fprintf(stderr, "External interrupt. Exit\n");
|
2552 | 7a3148a9 | j_mayer | exit(1);
|
2553 | 7a3148a9 | j_mayer | break;
|
2554 | 07b6c13b | Richard Henderson | case EXCP_MMFAULT:
|
2555 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2556 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGSEGV; |
2557 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2558 | 129d8aa5 | Richard Henderson | info.si_code = (page_get_flags(env->trap_arg0) & PAGE_VALID |
2559 | 0be1d07c | Richard Henderson | ? TARGET_SEGV_ACCERR : TARGET_SEGV_MAPERR); |
2560 | 129d8aa5 | Richard Henderson | info._sifields._sigfault._addr = env->trap_arg0; |
2561 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2562 | 7a3148a9 | j_mayer | break;
|
2563 | 7a3148a9 | j_mayer | case EXCP_UNALIGN:
|
2564 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2565 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGBUS; |
2566 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2567 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_BUS_ADRALN; |
2568 | 129d8aa5 | Richard Henderson | info._sifields._sigfault._addr = env->trap_arg0; |
2569 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2570 | 7a3148a9 | j_mayer | break;
|
2571 | 7a3148a9 | j_mayer | case EXCP_OPCDEC:
|
2572 | 6049f4f8 | Richard Henderson | do_sigill:
|
2573 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2574 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGILL; |
2575 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2576 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_ILL_ILLOPC; |
2577 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2578 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2579 | 7a3148a9 | j_mayer | break;
|
2580 | 07b6c13b | Richard Henderson | case EXCP_ARITH:
|
2581 | 07b6c13b | Richard Henderson | env->lock_addr = -1;
|
2582 | 07b6c13b | Richard Henderson | info.si_signo = TARGET_SIGFPE; |
2583 | 07b6c13b | Richard Henderson | info.si_errno = 0;
|
2584 | 07b6c13b | Richard Henderson | info.si_code = TARGET_FPE_FLTINV; |
2585 | 07b6c13b | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2586 | 07b6c13b | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2587 | 07b6c13b | Richard Henderson | break;
|
2588 | 7a3148a9 | j_mayer | case EXCP_FEN:
|
2589 | 6049f4f8 | Richard Henderson | /* No-op. Linux simply re-enables the FPU. */
|
2590 | 7a3148a9 | j_mayer | break;
|
2591 | 07b6c13b | Richard Henderson | case EXCP_CALL_PAL:
|
2592 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2593 | 07b6c13b | Richard Henderson | switch (env->error_code) {
|
2594 | 6049f4f8 | Richard Henderson | case 0x80: |
2595 | 6049f4f8 | Richard Henderson | /* BPT */
|
2596 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2597 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2598 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_TRAP_BRKPT; |
2599 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2600 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2601 | 6049f4f8 | Richard Henderson | break;
|
2602 | 6049f4f8 | Richard Henderson | case 0x81: |
2603 | 6049f4f8 | Richard Henderson | /* BUGCHK */
|
2604 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2605 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2606 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2607 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2608 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2609 | 6049f4f8 | Richard Henderson | break;
|
2610 | 6049f4f8 | Richard Henderson | case 0x83: |
2611 | 6049f4f8 | Richard Henderson | /* CALLSYS */
|
2612 | 6049f4f8 | Richard Henderson | trapnr = env->ir[IR_V0]; |
2613 | 6049f4f8 | Richard Henderson | sysret = do_syscall(env, trapnr, |
2614 | 6049f4f8 | Richard Henderson | env->ir[IR_A0], env->ir[IR_A1], |
2615 | 6049f4f8 | Richard Henderson | env->ir[IR_A2], env->ir[IR_A3], |
2616 | 5945cfcb | Peter Maydell | env->ir[IR_A4], env->ir[IR_A5], |
2617 | 5945cfcb | Peter Maydell | 0, 0); |
2618 | a5b3b13b | Richard Henderson | if (trapnr == TARGET_NR_sigreturn
|
2619 | a5b3b13b | Richard Henderson | || trapnr == TARGET_NR_rt_sigreturn) { |
2620 | a5b3b13b | Richard Henderson | break;
|
2621 | a5b3b13b | Richard Henderson | } |
2622 | a5b3b13b | Richard Henderson | /* Syscall writes 0 to V0 to bypass error check, similar
|
2623 | a5b3b13b | Richard Henderson | to how this is handled internal to Linux kernel. */
|
2624 | a5b3b13b | Richard Henderson | if (env->ir[IR_V0] == 0) { |
2625 | a5b3b13b | Richard Henderson | env->ir[IR_V0] = sysret; |
2626 | a5b3b13b | Richard Henderson | } else {
|
2627 | 6049f4f8 | Richard Henderson | env->ir[IR_V0] = (sysret < 0 ? -sysret : sysret);
|
2628 | 6049f4f8 | Richard Henderson | env->ir[IR_A3] = (sysret < 0);
|
2629 | 6049f4f8 | Richard Henderson | } |
2630 | 6049f4f8 | Richard Henderson | break;
|
2631 | 6049f4f8 | Richard Henderson | case 0x86: |
2632 | 6049f4f8 | Richard Henderson | /* IMB */
|
2633 | 6049f4f8 | Richard Henderson | /* ??? We can probably elide the code using page_unprotect
|
2634 | 6049f4f8 | Richard Henderson | that is checking for self-modifying code. Instead we
|
2635 | 6049f4f8 | Richard Henderson | could simply call tb_flush here. Until we work out the
|
2636 | 6049f4f8 | Richard Henderson | changes required to turn off the extra write protection,
|
2637 | 6049f4f8 | Richard Henderson | this can be a no-op. */
|
2638 | 6049f4f8 | Richard Henderson | break;
|
2639 | 6049f4f8 | Richard Henderson | case 0x9E: |
2640 | 6049f4f8 | Richard Henderson | /* RDUNIQUE */
|
2641 | 6049f4f8 | Richard Henderson | /* Handled in the translator for usermode. */
|
2642 | 6049f4f8 | Richard Henderson | abort(); |
2643 | 6049f4f8 | Richard Henderson | case 0x9F: |
2644 | 6049f4f8 | Richard Henderson | /* WRUNIQUE */
|
2645 | 6049f4f8 | Richard Henderson | /* Handled in the translator for usermode. */
|
2646 | 6049f4f8 | Richard Henderson | abort(); |
2647 | 6049f4f8 | Richard Henderson | case 0xAA: |
2648 | 6049f4f8 | Richard Henderson | /* GENTRAP */
|
2649 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGFPE; |
2650 | 6049f4f8 | Richard Henderson | switch (env->ir[IR_A0]) {
|
2651 | 6049f4f8 | Richard Henderson | case TARGET_GEN_INTOVF:
|
2652 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_INTOVF; |
2653 | 6049f4f8 | Richard Henderson | break;
|
2654 | 6049f4f8 | Richard Henderson | case TARGET_GEN_INTDIV:
|
2655 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_INTDIV; |
2656 | 6049f4f8 | Richard Henderson | break;
|
2657 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTOVF:
|
2658 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTOVF; |
2659 | 6049f4f8 | Richard Henderson | break;
|
2660 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTUND:
|
2661 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTUND; |
2662 | 6049f4f8 | Richard Henderson | break;
|
2663 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTINV:
|
2664 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTINV; |
2665 | 6049f4f8 | Richard Henderson | break;
|
2666 | 6049f4f8 | Richard Henderson | case TARGET_GEN_FLTINE:
|
2667 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_FPE_FLTRES; |
2668 | 6049f4f8 | Richard Henderson | break;
|
2669 | 6049f4f8 | Richard Henderson | case TARGET_GEN_ROPRAND:
|
2670 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2671 | 6049f4f8 | Richard Henderson | break;
|
2672 | 6049f4f8 | Richard Henderson | default:
|
2673 | 6049f4f8 | Richard Henderson | info.si_signo = TARGET_SIGTRAP; |
2674 | 6049f4f8 | Richard Henderson | info.si_code = 0;
|
2675 | 6049f4f8 | Richard Henderson | break;
|
2676 | 6049f4f8 | Richard Henderson | } |
2677 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2678 | 6049f4f8 | Richard Henderson | info._sifields._sigfault._addr = env->pc; |
2679 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2680 | 6049f4f8 | Richard Henderson | break;
|
2681 | 6049f4f8 | Richard Henderson | default:
|
2682 | 6049f4f8 | Richard Henderson | goto do_sigill;
|
2683 | 6049f4f8 | Richard Henderson | } |
2684 | 7a3148a9 | j_mayer | break;
|
2685 | 7a3148a9 | j_mayer | case EXCP_DEBUG:
|
2686 | 6049f4f8 | Richard Henderson | info.si_signo = gdb_handlesig (env, TARGET_SIGTRAP); |
2687 | 6049f4f8 | Richard Henderson | if (info.si_signo) {
|
2688 | 6910b8f6 | Richard Henderson | env->lock_addr = -1;
|
2689 | 6049f4f8 | Richard Henderson | info.si_errno = 0;
|
2690 | 6049f4f8 | Richard Henderson | info.si_code = TARGET_TRAP_BRKPT; |
2691 | 6049f4f8 | Richard Henderson | queue_signal(env, info.si_signo, &info); |
2692 | 7a3148a9 | j_mayer | } |
2693 | 7a3148a9 | j_mayer | break;
|
2694 | 6910b8f6 | Richard Henderson | case EXCP_STL_C:
|
2695 | 6910b8f6 | Richard Henderson | case EXCP_STQ_C:
|
2696 | 6910b8f6 | Richard Henderson | do_store_exclusive(env, env->error_code, trapnr - EXCP_STL_C); |
2697 | 6910b8f6 | Richard Henderson | break;
|
2698 | 7a3148a9 | j_mayer | default:
|
2699 | 7a3148a9 | j_mayer | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2700 | 7a3148a9 | j_mayer | cpu_dump_state(env, stderr, fprintf, 0);
|
2701 | 7a3148a9 | j_mayer | exit (1);
|
2702 | 7a3148a9 | j_mayer | } |
2703 | 7a3148a9 | j_mayer | process_pending_signals (env); |
2704 | 7a3148a9 | j_mayer | } |
2705 | 7a3148a9 | j_mayer | } |
2706 | 7a3148a9 | j_mayer | #endif /* TARGET_ALPHA */ |
2707 | 7a3148a9 | j_mayer | |
2708 | a4c075f1 | Ulrich Hecht | #ifdef TARGET_S390X
|
2709 | a4c075f1 | Ulrich Hecht | void cpu_loop(CPUS390XState *env)
|
2710 | a4c075f1 | Ulrich Hecht | { |
2711 | a4c075f1 | Ulrich Hecht | int trapnr;
|
2712 | a4c075f1 | Ulrich Hecht | target_siginfo_t info; |
2713 | a4c075f1 | Ulrich Hecht | |
2714 | a4c075f1 | Ulrich Hecht | while (1) { |
2715 | a4c075f1 | Ulrich Hecht | trapnr = cpu_s390x_exec (env); |
2716 | a4c075f1 | Ulrich Hecht | |
2717 | a4c075f1 | Ulrich Hecht | switch (trapnr) {
|
2718 | a4c075f1 | Ulrich Hecht | case EXCP_INTERRUPT:
|
2719 | a4c075f1 | Ulrich Hecht | /* just indicate that signals should be handled asap */
|
2720 | a4c075f1 | Ulrich Hecht | break;
|
2721 | a4c075f1 | Ulrich Hecht | case EXCP_DEBUG:
|
2722 | a4c075f1 | Ulrich Hecht | { |
2723 | a4c075f1 | Ulrich Hecht | int sig;
|
2724 | a4c075f1 | Ulrich Hecht | |
2725 | a4c075f1 | Ulrich Hecht | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
2726 | a4c075f1 | Ulrich Hecht | if (sig) {
|
2727 | a4c075f1 | Ulrich Hecht | info.si_signo = sig; |
2728 | a4c075f1 | Ulrich Hecht | info.si_errno = 0;
|
2729 | a4c075f1 | Ulrich Hecht | info.si_code = TARGET_TRAP_BRKPT; |
2730 | a4c075f1 | Ulrich Hecht | queue_signal(env, info.si_signo, &info); |
2731 | a4c075f1 | Ulrich Hecht | } |
2732 | a4c075f1 | Ulrich Hecht | } |
2733 | a4c075f1 | Ulrich Hecht | break;
|
2734 | a4c075f1 | Ulrich Hecht | case EXCP_SVC:
|
2735 | a4c075f1 | Ulrich Hecht | { |
2736 | a4c075f1 | Ulrich Hecht | int n = env->int_svc_code;
|
2737 | a4c075f1 | Ulrich Hecht | if (!n) {
|
2738 | a4c075f1 | Ulrich Hecht | /* syscalls > 255 */
|
2739 | a4c075f1 | Ulrich Hecht | n = env->regs[1];
|
2740 | a4c075f1 | Ulrich Hecht | } |
2741 | a4c075f1 | Ulrich Hecht | env->psw.addr += env->int_svc_ilc; |
2742 | a4c075f1 | Ulrich Hecht | env->regs[2] = do_syscall(env, n,
|
2743 | a4c075f1 | Ulrich Hecht | env->regs[2],
|
2744 | a4c075f1 | Ulrich Hecht | env->regs[3],
|
2745 | a4c075f1 | Ulrich Hecht | env->regs[4],
|
2746 | a4c075f1 | Ulrich Hecht | env->regs[5],
|
2747 | a4c075f1 | Ulrich Hecht | env->regs[6],
|
2748 | 5945cfcb | Peter Maydell | env->regs[7],
|
2749 | 5945cfcb | Peter Maydell | 0, 0); |
2750 | a4c075f1 | Ulrich Hecht | } |
2751 | a4c075f1 | Ulrich Hecht | break;
|
2752 | a4c075f1 | Ulrich Hecht | case EXCP_ADDR:
|
2753 | a4c075f1 | Ulrich Hecht | { |
2754 | a4c075f1 | Ulrich Hecht | info.si_signo = SIGSEGV; |
2755 | a4c075f1 | Ulrich Hecht | info.si_errno = 0;
|
2756 | a4c075f1 | Ulrich Hecht | /* XXX: check env->error_code */
|
2757 | a4c075f1 | Ulrich Hecht | info.si_code = TARGET_SEGV_MAPERR; |
2758 | a4c075f1 | Ulrich Hecht | info._sifields._sigfault._addr = env->__excp_addr; |
2759 | a4c075f1 | Ulrich Hecht | queue_signal(env, info.si_signo, &info); |
2760 | a4c075f1 | Ulrich Hecht | } |
2761 | a4c075f1 | Ulrich Hecht | break;
|
2762 | a4c075f1 | Ulrich Hecht | case EXCP_SPEC:
|
2763 | a4c075f1 | Ulrich Hecht | { |
2764 | a4c075f1 | Ulrich Hecht | fprintf(stderr,"specification exception insn 0x%08x%04x\n", ldl(env->psw.addr), lduw(env->psw.addr + 4)); |
2765 | a4c075f1 | Ulrich Hecht | info.si_signo = SIGILL; |
2766 | a4c075f1 | Ulrich Hecht | info.si_errno = 0;
|
2767 | a4c075f1 | Ulrich Hecht | info.si_code = TARGET_ILL_ILLOPC; |
2768 | a4c075f1 | Ulrich Hecht | info._sifields._sigfault._addr = env->__excp_addr; |
2769 | a4c075f1 | Ulrich Hecht | queue_signal(env, info.si_signo, &info); |
2770 | a4c075f1 | Ulrich Hecht | } |
2771 | a4c075f1 | Ulrich Hecht | break;
|
2772 | a4c075f1 | Ulrich Hecht | default:
|
2773 | a4c075f1 | Ulrich Hecht | printf ("Unhandled trap: 0x%x\n", trapnr);
|
2774 | a4c075f1 | Ulrich Hecht | cpu_dump_state(env, stderr, fprintf, 0);
|
2775 | a4c075f1 | Ulrich Hecht | exit (1);
|
2776 | a4c075f1 | Ulrich Hecht | } |
2777 | a4c075f1 | Ulrich Hecht | process_pending_signals (env); |
2778 | a4c075f1 | Ulrich Hecht | } |
2779 | a4c075f1 | Ulrich Hecht | } |
2780 | a4c075f1 | Ulrich Hecht | |
2781 | a4c075f1 | Ulrich Hecht | #endif /* TARGET_S390X */ |
2782 | a4c075f1 | Ulrich Hecht | |
2783 | 6672b0b2 | Peter Maydell | static void version(void) |
2784 | 6672b0b2 | Peter Maydell | { |
2785 | 6672b0b2 | Peter Maydell | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION QEMU_PKGVERSION |
2786 | 6672b0b2 | Peter Maydell | ", Copyright (c) 2003-2008 Fabrice Bellard\n");
|
2787 | 6672b0b2 | Peter Maydell | } |
2788 | 6672b0b2 | Peter Maydell | |
2789 | 8fcd3692 | blueswir1 | static void usage(void) |
2790 | 31e31b8a | bellard | { |
2791 | 6672b0b2 | Peter Maydell | version(); |
2792 | 6672b0b2 | Peter Maydell | printf("usage: qemu-" TARGET_ARCH " [options] program [arguments...]\n" |
2793 | b346ff46 | bellard | "Linux CPU emulator (compiled for %s emulation)\n"
|
2794 | d691f669 | bellard | "\n"
|
2795 | 68d0f70e | bellard | "Standard options:\n"
|
2796 | b12b6a18 | ths | "-h print this help\n"
|
2797 | 6672b0b2 | Peter Maydell | "-version display version information and exit\n"
|
2798 | b12b6a18 | ths | "-g port wait gdb connection to port\n"
|
2799 | b12b6a18 | ths | "-L path set the elf interpreter prefix (default=%s)\n"
|
2800 | b12b6a18 | ths | "-s size set the stack size in bytes (default=%ld)\n"
|
2801 | b12b6a18 | ths | "-cpu model select CPU (-cpu ? for list)\n"
|
2802 | b12b6a18 | ths | "-drop-ld-preload drop LD_PRELOAD for target process\n"
|
2803 | 04a6dfeb | aurel32 | "-E var=value sets/modifies targets environment variable(s)\n"
|
2804 | 04a6dfeb | aurel32 | "-U var unsets targets environment variable(s)\n"
|
2805 | 7d8cec95 | aurel32 | "-0 argv0 forces target process argv[0] to be argv0\n"
|
2806 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
2807 | 379f6698 | Paul Brook | "-B address set guest_base address to address\n"
|
2808 | 68a1c816 | Paul Brook | "-R size reserve size bytes for guest virtual address space\n"
|
2809 | 379f6698 | Paul Brook | #endif
|
2810 | 54936004 | bellard | "\n"
|
2811 | 68d0f70e | bellard | "Debug options:\n"
|
2812 | 6f1f31c0 | bellard | "-d options activate log (logfile=%s)\n"
|
2813 | b6741956 | bellard | "-p pagesize set the host page size to 'pagesize'\n"
|
2814 | 1b530a6d | aurel32 | "-singlestep always run in singlestep mode\n"
|
2815 | b01bcae6 | balrog | "-strace log system calls\n"
|
2816 | b01bcae6 | balrog | "\n"
|
2817 | 68d0f70e | bellard | "Environment variables:\n"
|
2818 | b01bcae6 | balrog | "QEMU_STRACE Print system calls and arguments similar to the\n"
|
2819 | b01bcae6 | balrog | " 'strace' program. Enable by setting to any value.\n"
|
2820 | 04a6dfeb | aurel32 | "You can use -E and -U options to set/unset environment variables\n"
|
2821 | 04a6dfeb | aurel32 | "for target process. It is possible to provide several variables\n"
|
2822 | 04a6dfeb | aurel32 | "by repeating the option. For example:\n"
|
2823 | 04a6dfeb | aurel32 | " -E var1=val2 -E var2=val2 -U LD_PRELOAD -U LD_DEBUG\n"
|
2824 | 04a6dfeb | aurel32 | "Note that if you provide several changes to single variable\n"
|
2825 | 04a6dfeb | aurel32 | "last change will stay in effect.\n"
|
2826 | b01bcae6 | balrog | , |
2827 | b346ff46 | bellard | TARGET_ARCH, |
2828 | 5fafdf24 | ths | interp_prefix, |
2829 | 703e0e89 | Richard Henderson | guest_stack_size, |
2830 | 54936004 | bellard | DEBUG_LOGFILE); |
2831 | 2d18e637 | blueswir1 | exit(1);
|
2832 | 31e31b8a | bellard | } |
2833 | 31e31b8a | bellard | |
2834 | d5975363 | pbrook | THREAD CPUState *thread_env; |
2835 | 59faf6d6 | bellard | |
2836 | edf8e2af | Mika Westerberg | void task_settid(TaskState *ts)
|
2837 | edf8e2af | Mika Westerberg | { |
2838 | edf8e2af | Mika Westerberg | if (ts->ts_tid == 0) { |
2839 | 2f7bb878 | Juan Quintela | #ifdef CONFIG_USE_NPTL
|
2840 | edf8e2af | Mika Westerberg | ts->ts_tid = (pid_t)syscall(SYS_gettid); |
2841 | edf8e2af | Mika Westerberg | #else
|
2842 | edf8e2af | Mika Westerberg | /* when no threads are used, tid becomes pid */
|
2843 | edf8e2af | Mika Westerberg | ts->ts_tid = getpid(); |
2844 | edf8e2af | Mika Westerberg | #endif
|
2845 | edf8e2af | Mika Westerberg | } |
2846 | edf8e2af | Mika Westerberg | } |
2847 | edf8e2af | Mika Westerberg | |
2848 | edf8e2af | Mika Westerberg | void stop_all_tasks(void) |
2849 | edf8e2af | Mika Westerberg | { |
2850 | edf8e2af | Mika Westerberg | /*
|
2851 | edf8e2af | Mika Westerberg | * We trust that when using NPTL, start_exclusive()
|
2852 | edf8e2af | Mika Westerberg | * handles thread stopping correctly.
|
2853 | edf8e2af | Mika Westerberg | */
|
2854 | edf8e2af | Mika Westerberg | start_exclusive(); |
2855 | edf8e2af | Mika Westerberg | } |
2856 | edf8e2af | Mika Westerberg | |
2857 | c3a92833 | pbrook | /* Assumes contents are already zeroed. */
|
2858 | 624f7979 | pbrook | void init_task_state(TaskState *ts)
|
2859 | 624f7979 | pbrook | { |
2860 | 624f7979 | pbrook | int i;
|
2861 | 624f7979 | pbrook | |
2862 | 624f7979 | pbrook | ts->used = 1;
|
2863 | 624f7979 | pbrook | ts->first_free = ts->sigqueue_table; |
2864 | 624f7979 | pbrook | for (i = 0; i < MAX_SIGQUEUE_SIZE - 1; i++) { |
2865 | 624f7979 | pbrook | ts->sigqueue_table[i].next = &ts->sigqueue_table[i + 1];
|
2866 | 624f7979 | pbrook | } |
2867 | 624f7979 | pbrook | ts->sigqueue_table[i].next = NULL;
|
2868 | 624f7979 | pbrook | } |
2869 | 624f7979 | pbrook | |
2870 | 902b3d5c | malc | int main(int argc, char **argv, char **envp) |
2871 | 31e31b8a | bellard | { |
2872 | 31e31b8a | bellard | const char *filename; |
2873 | b1f9be31 | j_mayer | const char *cpu_model; |
2874 | c235d738 | Matthew Fernandez | const char *log_file = DEBUG_LOGFILE; |
2875 | c235d738 | Matthew Fernandez | const char *log_mask = NULL; |
2876 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
|
2877 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
|
2878 | edf8e2af | Mika Westerberg | struct linux_binprm bprm;
|
2879 | 48e15fc2 | Nathan Froyd | TaskState *ts; |
2880 | b346ff46 | bellard | CPUState *env; |
2881 | 586314f2 | bellard | int optind;
|
2882 | d691f669 | bellard | const char *r; |
2883 | 74c33bed | bellard | int gdbstub_port = 0; |
2884 | 04a6dfeb | aurel32 | char **target_environ, **wrk;
|
2885 | 7d8cec95 | aurel32 | char **target_argv;
|
2886 | 7d8cec95 | aurel32 | int target_argc;
|
2887 | 04a6dfeb | aurel32 | envlist_t *envlist = NULL;
|
2888 | 7d8cec95 | aurel32 | const char *argv0 = NULL; |
2889 | 7d8cec95 | aurel32 | int i;
|
2890 | fd4d81dd | Arnaud Patard | int ret;
|
2891 | b12b6a18 | ths | |
2892 | 31e31b8a | bellard | if (argc <= 1) |
2893 | 44de1b33 | pbrook | usage(); |
2894 | f801f97e | bellard | |
2895 | 902b3d5c | malc | qemu_cache_utils_init(envp); |
2896 | 902b3d5c | malc | |
2897 | 04a6dfeb | aurel32 | if ((envlist = envlist_create()) == NULL) { |
2898 | 04a6dfeb | aurel32 | (void) fprintf(stderr, "Unable to allocate envlist\n"); |
2899 | 04a6dfeb | aurel32 | exit(1);
|
2900 | 04a6dfeb | aurel32 | } |
2901 | 04a6dfeb | aurel32 | |
2902 | 04a6dfeb | aurel32 | /* add current environment into the list */
|
2903 | 04a6dfeb | aurel32 | for (wrk = environ; *wrk != NULL; wrk++) { |
2904 | 04a6dfeb | aurel32 | (void) envlist_setenv(envlist, *wrk);
|
2905 | 04a6dfeb | aurel32 | } |
2906 | 04a6dfeb | aurel32 | |
2907 | 703e0e89 | Richard Henderson | /* Read the stack limit from the kernel. If it's "unlimited",
|
2908 | 703e0e89 | Richard Henderson | then we can do little else besides use the default. */
|
2909 | 703e0e89 | Richard Henderson | { |
2910 | 703e0e89 | Richard Henderson | struct rlimit lim;
|
2911 | 703e0e89 | Richard Henderson | if (getrlimit(RLIMIT_STACK, &lim) == 0 |
2912 | 81bbe906 | takasi-y@ops.dti.ne.jp | && lim.rlim_cur != RLIM_INFINITY |
2913 | 81bbe906 | takasi-y@ops.dti.ne.jp | && lim.rlim_cur == (target_long)lim.rlim_cur) { |
2914 | 703e0e89 | Richard Henderson | guest_stack_size = lim.rlim_cur; |
2915 | 703e0e89 | Richard Henderson | } |
2916 | 703e0e89 | Richard Henderson | } |
2917 | 703e0e89 | Richard Henderson | |
2918 | b1f9be31 | j_mayer | cpu_model = NULL;
|
2919 | b5ec5ce0 | john cooper | #if defined(cpudef_setup)
|
2920 | b5ec5ce0 | john cooper | cpudef_setup(); /* parse cpu definitions in target config file (TBD) */
|
2921 | b5ec5ce0 | john cooper | #endif
|
2922 | b5ec5ce0 | john cooper | |
2923 | 586314f2 | bellard | optind = 1;
|
2924 | d691f669 | bellard | for(;;) {
|
2925 | d691f669 | bellard | if (optind >= argc)
|
2926 | d691f669 | bellard | break;
|
2927 | d691f669 | bellard | r = argv[optind]; |
2928 | d691f669 | bellard | if (r[0] != '-') |
2929 | d691f669 | bellard | break;
|
2930 | 586314f2 | bellard | optind++; |
2931 | d691f669 | bellard | r++; |
2932 | d691f669 | bellard | if (!strcmp(r, "-")) { |
2933 | d691f669 | bellard | break;
|
2934 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
2935 | c235d738 | Matthew Fernandez | if (optind >= argc) {
|
2936 | 6f1f31c0 | bellard | break;
|
2937 | e19e89a5 | bellard | } |
2938 | c235d738 | Matthew Fernandez | log_mask = argv[optind++]; |
2939 | c235d738 | Matthew Fernandez | } else if (!strcmp(r, "D")) { |
2940 | c235d738 | Matthew Fernandez | if (optind >= argc) {
|
2941 | c235d738 | Matthew Fernandez | break;
|
2942 | c235d738 | Matthew Fernandez | } |
2943 | c235d738 | Matthew Fernandez | log_file = argv[optind++]; |
2944 | 04a6dfeb | aurel32 | } else if (!strcmp(r, "E")) { |
2945 | 04a6dfeb | aurel32 | r = argv[optind++]; |
2946 | 04a6dfeb | aurel32 | if (envlist_setenv(envlist, r) != 0) |
2947 | 04a6dfeb | aurel32 | usage(); |
2948 | f66724c9 | Stefan Weil | } else if (!strcmp(r, "ignore-environment")) { |
2949 | f66724c9 | Stefan Weil | envlist_free(envlist); |
2950 | f66724c9 | Stefan Weil | if ((envlist = envlist_create()) == NULL) { |
2951 | f66724c9 | Stefan Weil | (void) fprintf(stderr, "Unable to allocate envlist\n"); |
2952 | f66724c9 | Stefan Weil | exit(1);
|
2953 | f66724c9 | Stefan Weil | } |
2954 | 04a6dfeb | aurel32 | } else if (!strcmp(r, "U")) { |
2955 | 04a6dfeb | aurel32 | r = argv[optind++]; |
2956 | 04a6dfeb | aurel32 | if (envlist_unsetenv(envlist, r) != 0) |
2957 | 04a6dfeb | aurel32 | usage(); |
2958 | 7d8cec95 | aurel32 | } else if (!strcmp(r, "0")) { |
2959 | 7d8cec95 | aurel32 | r = argv[optind++]; |
2960 | 7d8cec95 | aurel32 | argv0 = r; |
2961 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
2962 | 491150db | aurel32 | if (optind >= argc)
|
2963 | 491150db | aurel32 | break;
|
2964 | d691f669 | bellard | r = argv[optind++]; |
2965 | 703e0e89 | Richard Henderson | guest_stack_size = strtoul(r, (char **)&r, 0); |
2966 | 703e0e89 | Richard Henderson | if (guest_stack_size == 0) |
2967 | 44de1b33 | pbrook | usage(); |
2968 | d691f669 | bellard | if (*r == 'M') |
2969 | 703e0e89 | Richard Henderson | guest_stack_size *= 1024 * 1024; |
2970 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
2971 | 703e0e89 | Richard Henderson | guest_stack_size *= 1024;
|
2972 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
2973 | d691f669 | bellard | interp_prefix = argv[optind++]; |
2974 | 54936004 | bellard | } else if (!strcmp(r, "p")) { |
2975 | 491150db | aurel32 | if (optind >= argc)
|
2976 | 491150db | aurel32 | break;
|
2977 | 83fb7adf | bellard | qemu_host_page_size = atoi(argv[optind++]); |
2978 | 83fb7adf | bellard | if (qemu_host_page_size == 0 || |
2979 | 83fb7adf | bellard | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
2980 | 54936004 | bellard | fprintf(stderr, "page size must be a power of two\n");
|
2981 | 54936004 | bellard | exit(1);
|
2982 | 54936004 | bellard | } |
2983 | 1fddef4b | bellard | } else if (!strcmp(r, "g")) { |
2984 | 491150db | aurel32 | if (optind >= argc)
|
2985 | 491150db | aurel32 | break;
|
2986 | 74c33bed | bellard | gdbstub_port = atoi(argv[optind++]); |
2987 | c5937220 | pbrook | } else if (!strcmp(r, "r")) { |
2988 | c5937220 | pbrook | qemu_uname_release = argv[optind++]; |
2989 | b1f9be31 | j_mayer | } else if (!strcmp(r, "cpu")) { |
2990 | b1f9be31 | j_mayer | cpu_model = argv[optind++]; |
2991 | 491150db | aurel32 | if (cpu_model == NULL || strcmp(cpu_model, "?") == 0) { |
2992 | c732abe2 | j_mayer | /* XXX: implement xxx_cpu_list for targets that still miss it */
|
2993 | b5ec5ce0 | john cooper | #if defined(cpu_list_id)
|
2994 | b5ec5ce0 | john cooper | cpu_list_id(stdout, &fprintf, "");
|
2995 | 6d1db8c3 | Laurent Vivier | #elif defined(cpu_list)
|
2996 | 6d1db8c3 | Laurent Vivier | cpu_list(stdout, &fprintf); /* deprecated */
|
2997 | b1f9be31 | j_mayer | #endif
|
2998 | 2d18e637 | blueswir1 | exit(1);
|
2999 | b1f9be31 | j_mayer | } |
3000 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
3001 | 379f6698 | Paul Brook | } else if (!strcmp(r, "B")) { |
3002 | 379f6698 | Paul Brook | guest_base = strtol(argv[optind++], NULL, 0); |
3003 | 379f6698 | Paul Brook | have_guest_base = 1;
|
3004 | 68a1c816 | Paul Brook | } else if (!strcmp(r, "R")) { |
3005 | 68a1c816 | Paul Brook | char *p;
|
3006 | 68a1c816 | Paul Brook | int shift = 0; |
3007 | 68a1c816 | Paul Brook | reserved_va = strtoul(argv[optind++], &p, 0);
|
3008 | 68a1c816 | Paul Brook | switch (*p) {
|
3009 | 68a1c816 | Paul Brook | case 'k': |
3010 | 68a1c816 | Paul Brook | case 'K': |
3011 | 68a1c816 | Paul Brook | shift = 10;
|
3012 | 68a1c816 | Paul Brook | break;
|
3013 | 68a1c816 | Paul Brook | case 'M': |
3014 | 68a1c816 | Paul Brook | shift = 20;
|
3015 | 68a1c816 | Paul Brook | break;
|
3016 | 68a1c816 | Paul Brook | case 'G': |
3017 | 68a1c816 | Paul Brook | shift = 30;
|
3018 | 68a1c816 | Paul Brook | break;
|
3019 | 68a1c816 | Paul Brook | } |
3020 | 68a1c816 | Paul Brook | if (shift) {
|
3021 | 68a1c816 | Paul Brook | unsigned long unshifted = reserved_va; |
3022 | 68a1c816 | Paul Brook | p++; |
3023 | 68a1c816 | Paul Brook | reserved_va <<= shift; |
3024 | 68a1c816 | Paul Brook | if (((reserved_va >> shift) != unshifted)
|
3025 | 68a1c816 | Paul Brook | #if HOST_LONG_BITS > TARGET_VIRT_ADDR_SPACE_BITS
|
3026 | 68a1c816 | Paul Brook | || (reserved_va > (1ul << TARGET_VIRT_ADDR_SPACE_BITS))
|
3027 | 68a1c816 | Paul Brook | #endif
|
3028 | 68a1c816 | Paul Brook | ) { |
3029 | 68a1c816 | Paul Brook | fprintf(stderr, "Reserved virtual address too big\n");
|
3030 | 68a1c816 | Paul Brook | exit(1);
|
3031 | 68a1c816 | Paul Brook | } |
3032 | 68a1c816 | Paul Brook | } |
3033 | 68a1c816 | Paul Brook | if (*p) {
|
3034 | 68a1c816 | Paul Brook | fprintf(stderr, "Unrecognised -R size suffix '%s'\n", p);
|
3035 | 68a1c816 | Paul Brook | exit(1);
|
3036 | 68a1c816 | Paul Brook | } |
3037 | 379f6698 | Paul Brook | #endif
|
3038 | b12b6a18 | ths | } else if (!strcmp(r, "drop-ld-preload")) { |
3039 | 04a6dfeb | aurel32 | (void) envlist_unsetenv(envlist, "LD_PRELOAD"); |
3040 | 1b530a6d | aurel32 | } else if (!strcmp(r, "singlestep")) { |
3041 | 1b530a6d | aurel32 | singlestep = 1;
|
3042 | b6741956 | bellard | } else if (!strcmp(r, "strace")) { |
3043 | b6741956 | bellard | do_strace = 1;
|
3044 | 6672b0b2 | Peter Maydell | } else if (!strcmp(r, "version")) { |
3045 | 6672b0b2 | Peter Maydell | version(); |
3046 | 6672b0b2 | Peter Maydell | exit(0);
|
3047 | 6672b0b2 | Peter Maydell | } else {
|
3048 | d691f669 | bellard | usage(); |
3049 | d691f669 | bellard | } |
3050 | 586314f2 | bellard | } |
3051 | d691f669 | bellard | if (optind >= argc)
|
3052 | d691f669 | bellard | usage(); |
3053 | 586314f2 | bellard | filename = argv[optind]; |
3054 | d088d664 | aurel32 | exec_path = argv[optind]; |
3055 | c235d738 | Matthew Fernandez | |
3056 | c235d738 | Matthew Fernandez | /* init debug */
|
3057 | c235d738 | Matthew Fernandez | cpu_set_log_filename(log_file); |
3058 | c235d738 | Matthew Fernandez | if (log_mask) {
|
3059 | c235d738 | Matthew Fernandez | int mask;
|
3060 | c235d738 | Matthew Fernandez | const CPULogItem *item;
|
3061 | c235d738 | Matthew Fernandez | |
3062 | 1dfdcaa8 | Edgar E. Iglesias | mask = cpu_str_to_log_mask(log_mask); |
3063 | c235d738 | Matthew Fernandez | if (!mask) {
|
3064 | c235d738 | Matthew Fernandez | printf("Log items (comma separated):\n");
|
3065 | c235d738 | Matthew Fernandez | for (item = cpu_log_items; item->mask != 0; item++) { |
3066 | c235d738 | Matthew Fernandez | printf("%-10s %s\n", item->name, item->help);
|
3067 | c235d738 | Matthew Fernandez | } |
3068 | c235d738 | Matthew Fernandez | exit(1);
|
3069 | c235d738 | Matthew Fernandez | } |
3070 | c235d738 | Matthew Fernandez | cpu_set_log(mask); |
3071 | c235d738 | Matthew Fernandez | } |
3072 | 586314f2 | bellard | |
3073 | 31e31b8a | bellard | /* Zero out regs */
|
3074 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
3075 | 31e31b8a | bellard | |
3076 | 31e31b8a | bellard | /* Zero out image_info */
|
3077 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
3078 | 31e31b8a | bellard | |
3079 | edf8e2af | Mika Westerberg | memset(&bprm, 0, sizeof (bprm)); |
3080 | edf8e2af | Mika Westerberg | |
3081 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
|
3082 | 74cd30b8 | bellard | init_paths(interp_prefix); |
3083 | 74cd30b8 | bellard | |
3084 | 46027c07 | bellard | if (cpu_model == NULL) { |
3085 | aaed909a | bellard | #if defined(TARGET_I386)
|
3086 | 46027c07 | bellard | #ifdef TARGET_X86_64
|
3087 | 46027c07 | bellard | cpu_model = "qemu64";
|
3088 | 46027c07 | bellard | #else
|
3089 | 46027c07 | bellard | cpu_model = "qemu32";
|
3090 | 46027c07 | bellard | #endif
|
3091 | aaed909a | bellard | #elif defined(TARGET_ARM)
|
3092 | 088ab16c | pbrook | cpu_model = "any";
|
3093 | d2fbca94 | Guan Xuetao | #elif defined(TARGET_UNICORE32)
|
3094 | d2fbca94 | Guan Xuetao | cpu_model = "any";
|
3095 | aaed909a | bellard | #elif defined(TARGET_M68K)
|
3096 | aaed909a | bellard | cpu_model = "any";
|
3097 | aaed909a | bellard | #elif defined(TARGET_SPARC)
|
3098 | aaed909a | bellard | #ifdef TARGET_SPARC64
|
3099 | aaed909a | bellard | cpu_model = "TI UltraSparc II";
|
3100 | aaed909a | bellard | #else
|
3101 | aaed909a | bellard | cpu_model = "Fujitsu MB86904";
|
3102 | 46027c07 | bellard | #endif
|
3103 | aaed909a | bellard | #elif defined(TARGET_MIPS)
|
3104 | aaed909a | bellard | #if defined(TARGET_ABI_MIPSN32) || defined(TARGET_ABI_MIPSN64)
|
3105 | aaed909a | bellard | cpu_model = "20Kc";
|
3106 | aaed909a | bellard | #else
|
3107 | aaed909a | bellard | cpu_model = "24Kf";
|
3108 | aaed909a | bellard | #endif
|
3109 | aaed909a | bellard | #elif defined(TARGET_PPC)
|
3110 | 7ded4f52 | bellard | #ifdef TARGET_PPC64
|
3111 | f7177937 | Aurelien Jarno | cpu_model = "970fx";
|
3112 | 7ded4f52 | bellard | #else
|
3113 | aaed909a | bellard | cpu_model = "750";
|
3114 | 7ded4f52 | bellard | #endif
|
3115 | aaed909a | bellard | #else
|
3116 | aaed909a | bellard | cpu_model = "any";
|
3117 | aaed909a | bellard | #endif
|
3118 | aaed909a | bellard | } |
3119 | 26a5f13b | bellard | cpu_exec_init_all(0);
|
3120 | 83fb7adf | bellard | /* NOTE: we need to init the CPU at this stage to get
|
3121 | 83fb7adf | bellard | qemu_host_page_size */
|
3122 | aaed909a | bellard | env = cpu_init(cpu_model); |
3123 | aaed909a | bellard | if (!env) {
|
3124 | aaed909a | bellard | fprintf(stderr, "Unable to find CPU definition\n");
|
3125 | aaed909a | bellard | exit(1);
|
3126 | aaed909a | bellard | } |
3127 | b55a37c9 | Blue Swirl | #if defined(TARGET_I386) || defined(TARGET_SPARC) || defined(TARGET_PPC)
|
3128 | b55a37c9 | Blue Swirl | cpu_reset(env); |
3129 | b55a37c9 | Blue Swirl | #endif
|
3130 | b55a37c9 | Blue Swirl | |
3131 | d5975363 | pbrook | thread_env = env; |
3132 | 3b46e624 | ths | |
3133 | b6741956 | bellard | if (getenv("QEMU_STRACE")) { |
3134 | b6741956 | bellard | do_strace = 1;
|
3135 | b92c47c1 | ths | } |
3136 | b92c47c1 | ths | |
3137 | 04a6dfeb | aurel32 | target_environ = envlist_to_environ(envlist, NULL);
|
3138 | 04a6dfeb | aurel32 | envlist_free(envlist); |
3139 | b12b6a18 | ths | |
3140 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
3141 | 379f6698 | Paul Brook | /*
|
3142 | 379f6698 | Paul Brook | * Now that page sizes are configured in cpu_init() we can do
|
3143 | 379f6698 | Paul Brook | * proper page alignment for guest_base.
|
3144 | 379f6698 | Paul Brook | */
|
3145 | 379f6698 | Paul Brook | guest_base = HOST_PAGE_ALIGN(guest_base); |
3146 | 68a1c816 | Paul Brook | |
3147 | 68a1c816 | Paul Brook | if (reserved_va) {
|
3148 | 68a1c816 | Paul Brook | void *p;
|
3149 | 68a1c816 | Paul Brook | int flags;
|
3150 | 68a1c816 | Paul Brook | |
3151 | 68a1c816 | Paul Brook | flags = MAP_ANONYMOUS | MAP_PRIVATE | MAP_NORESERVE; |
3152 | 68a1c816 | Paul Brook | if (have_guest_base) {
|
3153 | 68a1c816 | Paul Brook | flags |= MAP_FIXED; |
3154 | 68a1c816 | Paul Brook | } |
3155 | 68a1c816 | Paul Brook | p = mmap((void *)guest_base, reserved_va, PROT_NONE, flags, -1, 0); |
3156 | 68a1c816 | Paul Brook | if (p == MAP_FAILED) {
|
3157 | 68a1c816 | Paul Brook | fprintf(stderr, "Unable to reserve guest address space\n");
|
3158 | 68a1c816 | Paul Brook | exit(1);
|
3159 | 68a1c816 | Paul Brook | } |
3160 | 68a1c816 | Paul Brook | guest_base = (unsigned long)p; |
3161 | 68a1c816 | Paul Brook | /* Make sure the address is properly aligned. */
|
3162 | 68a1c816 | Paul Brook | if (guest_base & ~qemu_host_page_mask) {
|
3163 | 68a1c816 | Paul Brook | munmap(p, reserved_va); |
3164 | 68a1c816 | Paul Brook | p = mmap((void *)guest_base, reserved_va + qemu_host_page_size,
|
3165 | 68a1c816 | Paul Brook | PROT_NONE, flags, -1, 0); |
3166 | 68a1c816 | Paul Brook | if (p == MAP_FAILED) {
|
3167 | 68a1c816 | Paul Brook | fprintf(stderr, "Unable to reserve guest address space\n");
|
3168 | 68a1c816 | Paul Brook | exit(1);
|
3169 | 68a1c816 | Paul Brook | } |
3170 | 68a1c816 | Paul Brook | guest_base = HOST_PAGE_ALIGN((unsigned long)p); |
3171 | 68a1c816 | Paul Brook | } |
3172 | 68a1c816 | Paul Brook | qemu_log("Reserved 0x%lx bytes of guest address space\n", reserved_va);
|
3173 | 68a1c816 | Paul Brook | } |
3174 | 14f24e14 | Richard Henderson | #endif /* CONFIG_USE_GUEST_BASE */ |
3175 | 379f6698 | Paul Brook | |
3176 | 379f6698 | Paul Brook | /*
|
3177 | 379f6698 | Paul Brook | * Read in mmap_min_addr kernel parameter. This value is used
|
3178 | 379f6698 | Paul Brook | * When loading the ELF image to determine whether guest_base
|
3179 | 14f24e14 | Richard Henderson | * is needed. It is also used in mmap_find_vma.
|
3180 | 379f6698 | Paul Brook | */
|
3181 | 14f24e14 | Richard Henderson | { |
3182 | 379f6698 | Paul Brook | FILE *fp; |
3183 | 379f6698 | Paul Brook | |
3184 | 379f6698 | Paul Brook | if ((fp = fopen("/proc/sys/vm/mmap_min_addr", "r")) != NULL) { |
3185 | 379f6698 | Paul Brook | unsigned long tmp; |
3186 | 379f6698 | Paul Brook | if (fscanf(fp, "%lu", &tmp) == 1) { |
3187 | 379f6698 | Paul Brook | mmap_min_addr = tmp; |
3188 | 379f6698 | Paul Brook | qemu_log("host mmap_min_addr=0x%lx\n", mmap_min_addr);
|
3189 | 379f6698 | Paul Brook | } |
3190 | 379f6698 | Paul Brook | fclose(fp); |
3191 | 379f6698 | Paul Brook | } |
3192 | 379f6698 | Paul Brook | } |
3193 | 379f6698 | Paul Brook | |
3194 | 7d8cec95 | aurel32 | /*
|
3195 | 7d8cec95 | aurel32 | * Prepare copy of argv vector for target.
|
3196 | 7d8cec95 | aurel32 | */
|
3197 | 7d8cec95 | aurel32 | target_argc = argc - optind; |
3198 | 7d8cec95 | aurel32 | target_argv = calloc(target_argc + 1, sizeof (char *)); |
3199 | 7d8cec95 | aurel32 | if (target_argv == NULL) { |
3200 | 7d8cec95 | aurel32 | (void) fprintf(stderr, "Unable to allocate memory for target_argv\n"); |
3201 | 7d8cec95 | aurel32 | exit(1);
|
3202 | 7d8cec95 | aurel32 | } |
3203 | 7d8cec95 | aurel32 | |
3204 | 7d8cec95 | aurel32 | /*
|
3205 | 7d8cec95 | aurel32 | * If argv0 is specified (using '-0' switch) we replace
|
3206 | 7d8cec95 | aurel32 | * argv[0] pointer with the given one.
|
3207 | 7d8cec95 | aurel32 | */
|
3208 | 7d8cec95 | aurel32 | i = 0;
|
3209 | 7d8cec95 | aurel32 | if (argv0 != NULL) { |
3210 | 7d8cec95 | aurel32 | target_argv[i++] = strdup(argv0); |
3211 | 7d8cec95 | aurel32 | } |
3212 | 7d8cec95 | aurel32 | for (; i < target_argc; i++) {
|
3213 | 7d8cec95 | aurel32 | target_argv[i] = strdup(argv[optind + i]); |
3214 | 7d8cec95 | aurel32 | } |
3215 | 7d8cec95 | aurel32 | target_argv[target_argc] = NULL;
|
3216 | 7d8cec95 | aurel32 | |
3217 | 48e15fc2 | Nathan Froyd | ts = qemu_mallocz (sizeof(TaskState));
|
3218 | edf8e2af | Mika Westerberg | init_task_state(ts); |
3219 | edf8e2af | Mika Westerberg | /* build Task State */
|
3220 | edf8e2af | Mika Westerberg | ts->info = info; |
3221 | edf8e2af | Mika Westerberg | ts->bprm = &bprm; |
3222 | edf8e2af | Mika Westerberg | env->opaque = ts; |
3223 | edf8e2af | Mika Westerberg | task_settid(ts); |
3224 | edf8e2af | Mika Westerberg | |
3225 | fd4d81dd | Arnaud Patard | ret = loader_exec(filename, target_argv, target_environ, regs, |
3226 | fd4d81dd | Arnaud Patard | info, &bprm); |
3227 | fd4d81dd | Arnaud Patard | if (ret != 0) { |
3228 | fd4d81dd | Arnaud Patard | printf("Error %d while loading %s\n", ret, filename);
|
3229 | b12b6a18 | ths | _exit(1);
|
3230 | b12b6a18 | ths | } |
3231 | b12b6a18 | ths | |
3232 | 7d8cec95 | aurel32 | for (i = 0; i < target_argc; i++) { |
3233 | 7d8cec95 | aurel32 | free(target_argv[i]); |
3234 | 7d8cec95 | aurel32 | } |
3235 | 7d8cec95 | aurel32 | free(target_argv); |
3236 | 7d8cec95 | aurel32 | |
3237 | b12b6a18 | ths | for (wrk = target_environ; *wrk; wrk++) {
|
3238 | b12b6a18 | ths | free(*wrk); |
3239 | 31e31b8a | bellard | } |
3240 | 3b46e624 | ths | |
3241 | b12b6a18 | ths | free(target_environ); |
3242 | b12b6a18 | ths | |
3243 | 2e77eac6 | blueswir1 | if (qemu_log_enabled()) {
|
3244 | 379f6698 | Paul Brook | #if defined(CONFIG_USE_GUEST_BASE)
|
3245 | 379f6698 | Paul Brook | qemu_log("guest_base 0x%lx\n", guest_base);
|
3246 | 379f6698 | Paul Brook | #endif
|
3247 | 2e77eac6 | blueswir1 | log_page_dump(); |
3248 | 2e77eac6 | blueswir1 | |
3249 | 2e77eac6 | blueswir1 | qemu_log("start_brk 0x" TARGET_ABI_FMT_lx "\n", info->start_brk); |
3250 | 2e77eac6 | blueswir1 | qemu_log("end_code 0x" TARGET_ABI_FMT_lx "\n", info->end_code); |
3251 | 2e77eac6 | blueswir1 | qemu_log("start_code 0x" TARGET_ABI_FMT_lx "\n", |
3252 | 2e77eac6 | blueswir1 | info->start_code); |
3253 | 2e77eac6 | blueswir1 | qemu_log("start_data 0x" TARGET_ABI_FMT_lx "\n", |
3254 | 2e77eac6 | blueswir1 | info->start_data); |
3255 | 2e77eac6 | blueswir1 | qemu_log("end_data 0x" TARGET_ABI_FMT_lx "\n", info->end_data); |
3256 | 2e77eac6 | blueswir1 | qemu_log("start_stack 0x" TARGET_ABI_FMT_lx "\n", |
3257 | 2e77eac6 | blueswir1 | info->start_stack); |
3258 | 2e77eac6 | blueswir1 | qemu_log("brk 0x" TARGET_ABI_FMT_lx "\n", info->brk); |
3259 | 2e77eac6 | blueswir1 | qemu_log("entry 0x" TARGET_ABI_FMT_lx "\n", info->entry); |
3260 | 2e77eac6 | blueswir1 | } |
3261 | 31e31b8a | bellard | |
3262 | 53a5960a | pbrook | target_set_brk(info->brk); |
3263 | 31e31b8a | bellard | syscall_init(); |
3264 | 66fb9763 | bellard | signal_init(); |
3265 | 31e31b8a | bellard | |
3266 | 9002ec79 | Richard Henderson | #if defined(CONFIG_USE_GUEST_BASE)
|
3267 | 9002ec79 | Richard Henderson | /* Now that we've loaded the binary, GUEST_BASE is fixed. Delay
|
3268 | 9002ec79 | Richard Henderson | generating the prologue until now so that the prologue can take
|
3269 | 9002ec79 | Richard Henderson | the real value of GUEST_BASE into account. */
|
3270 | 9002ec79 | Richard Henderson | tcg_prologue_init(&tcg_ctx); |
3271 | 9002ec79 | Richard Henderson | #endif
|
3272 | 9002ec79 | Richard Henderson | |
3273 | b346ff46 | bellard | #if defined(TARGET_I386)
|
3274 | 2e255c6b | bellard | cpu_x86_set_cpl(env, 3);
|
3275 | 2e255c6b | bellard | |
3276 | 3802ce26 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
3277 | 1bde465e | bellard | env->hflags |= HF_PE_MASK; |
3278 | 1bde465e | bellard | if (env->cpuid_features & CPUID_SSE) {
|
3279 | 1bde465e | bellard | env->cr[4] |= CR4_OSFXSR_MASK;
|
3280 | 1bde465e | bellard | env->hflags |= HF_OSFXSR_MASK; |
3281 | 1bde465e | bellard | } |
3282 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
|
3283 | 4dbc422b | bellard | /* enable 64 bit mode if possible */
|
3284 | 4dbc422b | bellard | if (!(env->cpuid_ext2_features & CPUID_EXT2_LM)) {
|
3285 | 4dbc422b | bellard | fprintf(stderr, "The selected x86 CPU does not support 64 bit mode\n");
|
3286 | 4dbc422b | bellard | exit(1);
|
3287 | 4dbc422b | bellard | } |
3288 | d2fd1af7 | bellard | env->cr[4] |= CR4_PAE_MASK;
|
3289 | 4dbc422b | bellard | env->efer |= MSR_EFER_LMA | MSR_EFER_LME; |
3290 | d2fd1af7 | bellard | env->hflags |= HF_LMA_MASK; |
3291 | d2fd1af7 | bellard | #endif
|
3292 | 1bde465e | bellard | |
3293 | 415e561f | bellard | /* flags setup : we activate the IRQs by default as in user mode */
|
3294 | 415e561f | bellard | env->eflags |= IF_MASK; |
3295 | 3b46e624 | ths | |
3296 | 6dbad63e | bellard | /* linux register setup */
|
3297 | d2fd1af7 | bellard | #ifndef TARGET_ABI32
|
3298 | 84409ddb | j_mayer | env->regs[R_EAX] = regs->rax; |
3299 | 84409ddb | j_mayer | env->regs[R_EBX] = regs->rbx; |
3300 | 84409ddb | j_mayer | env->regs[R_ECX] = regs->rcx; |
3301 | 84409ddb | j_mayer | env->regs[R_EDX] = regs->rdx; |
3302 | 84409ddb | j_mayer | env->regs[R_ESI] = regs->rsi; |
3303 | 84409ddb | j_mayer | env->regs[R_EDI] = regs->rdi; |
3304 | 84409ddb | j_mayer | env->regs[R_EBP] = regs->rbp; |
3305 | 84409ddb | j_mayer | env->regs[R_ESP] = regs->rsp; |
3306 | 84409ddb | j_mayer | env->eip = regs->rip; |
3307 | 84409ddb | j_mayer | #else
|
3308 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
3309 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
3310 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
3311 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
3312 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
3313 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
3314 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
3315 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
3316 | dab2ed99 | bellard | env->eip = regs->eip; |
3317 | 84409ddb | j_mayer | #endif
|
3318 | 31e31b8a | bellard | |
3319 | f4beb510 | bellard | /* linux interrupt setup */
|
3320 | e441570f | balrog | #ifndef TARGET_ABI32
|
3321 | e441570f | balrog | env->idt.limit = 511;
|
3322 | e441570f | balrog | #else
|
3323 | e441570f | balrog | env->idt.limit = 255;
|
3324 | e441570f | balrog | #endif
|
3325 | e441570f | balrog | env->idt.base = target_mmap(0, sizeof(uint64_t) * (env->idt.limit + 1), |
3326 | e441570f | balrog | PROT_READ|PROT_WRITE, |
3327 | e441570f | balrog | MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); |
3328 | e441570f | balrog | idt_table = g2h(env->idt.base); |
3329 | f4beb510 | bellard | set_idt(0, 0); |
3330 | f4beb510 | bellard | set_idt(1, 0); |
3331 | f4beb510 | bellard | set_idt(2, 0); |
3332 | f4beb510 | bellard | set_idt(3, 3); |
3333 | f4beb510 | bellard | set_idt(4, 3); |
3334 | ec95da6c | bellard | set_idt(5, 0); |
3335 | f4beb510 | bellard | set_idt(6, 0); |
3336 | f4beb510 | bellard | set_idt(7, 0); |
3337 | f4beb510 | bellard | set_idt(8, 0); |
3338 | f4beb510 | bellard | set_idt(9, 0); |
3339 | f4beb510 | bellard | set_idt(10, 0); |
3340 | f4beb510 | bellard | set_idt(11, 0); |
3341 | f4beb510 | bellard | set_idt(12, 0); |
3342 | f4beb510 | bellard | set_idt(13, 0); |
3343 | f4beb510 | bellard | set_idt(14, 0); |
3344 | f4beb510 | bellard | set_idt(15, 0); |
3345 | f4beb510 | bellard | set_idt(16, 0); |
3346 | f4beb510 | bellard | set_idt(17, 0); |
3347 | f4beb510 | bellard | set_idt(18, 0); |
3348 | f4beb510 | bellard | set_idt(19, 0); |
3349 | f4beb510 | bellard | set_idt(0x80, 3); |
3350 | f4beb510 | bellard | |
3351 | 6dbad63e | bellard | /* linux segment setup */
|
3352 | 8d18e893 | bellard | { |
3353 | 8d18e893 | bellard | uint64_t *gdt_table; |
3354 | e441570f | balrog | env->gdt.base = target_mmap(0, sizeof(uint64_t) * TARGET_GDT_ENTRIES, |
3355 | e441570f | balrog | PROT_READ|PROT_WRITE, |
3356 | e441570f | balrog | MAP_ANONYMOUS|MAP_PRIVATE, -1, 0); |
3357 | 8d18e893 | bellard | env->gdt.limit = sizeof(uint64_t) * TARGET_GDT_ENTRIES - 1; |
3358 | e441570f | balrog | gdt_table = g2h(env->gdt.base); |
3359 | d2fd1af7 | bellard | #ifdef TARGET_ABI32
|
3360 | 8d18e893 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
3361 | 8d18e893 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
3362 | 8d18e893 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
3363 | d2fd1af7 | bellard | #else
|
3364 | d2fd1af7 | bellard | /* 64 bit code segment */
|
3365 | d2fd1af7 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
3366 | d2fd1af7 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
3367 | d2fd1af7 | bellard | DESC_L_MASK | |
3368 | d2fd1af7 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
3369 | d2fd1af7 | bellard | #endif
|
3370 | 8d18e893 | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
3371 | 8d18e893 | bellard | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
3372 | 8d18e893 | bellard | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
3373 | 8d18e893 | bellard | } |
3374 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
3375 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
3376 | d2fd1af7 | bellard | #ifdef TARGET_ABI32
|
3377 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
3378 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
3379 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
3380 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
3381 | d6eb40f6 | ths | /* This hack makes Wine work... */
|
3382 | d6eb40f6 | ths | env->segs[R_FS].selector = 0;
|
3383 | d2fd1af7 | bellard | #else
|
3384 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_DS, 0);
|
3385 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_ES, 0);
|
3386 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_FS, 0);
|
3387 | d2fd1af7 | bellard | cpu_x86_load_seg(env, R_GS, 0);
|
3388 | d2fd1af7 | bellard | #endif
|
3389 | b346ff46 | bellard | #elif defined(TARGET_ARM)
|
3390 | b346ff46 | bellard | { |
3391 | b346ff46 | bellard | int i;
|
3392 | b5ff1b31 | bellard | cpsr_write(env, regs->uregs[16], 0xffffffff); |
3393 | b346ff46 | bellard | for(i = 0; i < 16; i++) { |
3394 | b346ff46 | bellard | env->regs[i] = regs->uregs[i]; |
3395 | b346ff46 | bellard | } |
3396 | b346ff46 | bellard | } |
3397 | d2fbca94 | Guan Xuetao | #elif defined(TARGET_UNICORE32)
|
3398 | d2fbca94 | Guan Xuetao | { |
3399 | d2fbca94 | Guan Xuetao | int i;
|
3400 | d2fbca94 | Guan Xuetao | cpu_asr_write(env, regs->uregs[32], 0xffffffff); |
3401 | d2fbca94 | Guan Xuetao | for (i = 0; i < 32; i++) { |
3402 | d2fbca94 | Guan Xuetao | env->regs[i] = regs->uregs[i]; |
3403 | d2fbca94 | Guan Xuetao | } |
3404 | d2fbca94 | Guan Xuetao | } |
3405 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
|
3406 | 060366c5 | bellard | { |
3407 | 060366c5 | bellard | int i;
|
3408 | 060366c5 | bellard | env->pc = regs->pc; |
3409 | 060366c5 | bellard | env->npc = regs->npc; |
3410 | 060366c5 | bellard | env->y = regs->y; |
3411 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
3412 | 060366c5 | bellard | env->gregs[i] = regs->u_regs[i]; |
3413 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
3414 | 060366c5 | bellard | env->regwptr[i] = regs->u_regs[i + 8];
|
3415 | 060366c5 | bellard | } |
3416 | 67867308 | bellard | #elif defined(TARGET_PPC)
|
3417 | 67867308 | bellard | { |
3418 | 67867308 | bellard | int i;
|
3419 | 3fc6c082 | bellard | |
3420 | 0411a972 | j_mayer | #if defined(TARGET_PPC64)
|
3421 | 0411a972 | j_mayer | #if defined(TARGET_ABI32)
|
3422 | 0411a972 | j_mayer | env->msr &= ~((target_ulong)1 << MSR_SF);
|
3423 | e85e7c6e | j_mayer | #else
|
3424 | 0411a972 | j_mayer | env->msr |= (target_ulong)1 << MSR_SF;
|
3425 | 0411a972 | j_mayer | #endif
|
3426 | 84409ddb | j_mayer | #endif
|
3427 | 67867308 | bellard | env->nip = regs->nip; |
3428 | 67867308 | bellard | for(i = 0; i < 32; i++) { |
3429 | 67867308 | bellard | env->gpr[i] = regs->gpr[i]; |
3430 | 67867308 | bellard | } |
3431 | 67867308 | bellard | } |
3432 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
3433 | e6e5906b | pbrook | { |
3434 | e6e5906b | pbrook | env->pc = regs->pc; |
3435 | e6e5906b | pbrook | env->dregs[0] = regs->d0;
|
3436 | e6e5906b | pbrook | env->dregs[1] = regs->d1;
|
3437 | e6e5906b | pbrook | env->dregs[2] = regs->d2;
|
3438 | e6e5906b | pbrook | env->dregs[3] = regs->d3;
|
3439 | e6e5906b | pbrook | env->dregs[4] = regs->d4;
|
3440 | e6e5906b | pbrook | env->dregs[5] = regs->d5;
|
3441 | e6e5906b | pbrook | env->dregs[6] = regs->d6;
|
3442 | e6e5906b | pbrook | env->dregs[7] = regs->d7;
|
3443 | e6e5906b | pbrook | env->aregs[0] = regs->a0;
|
3444 | e6e5906b | pbrook | env->aregs[1] = regs->a1;
|
3445 | e6e5906b | pbrook | env->aregs[2] = regs->a2;
|
3446 | e6e5906b | pbrook | env->aregs[3] = regs->a3;
|
3447 | e6e5906b | pbrook | env->aregs[4] = regs->a4;
|
3448 | e6e5906b | pbrook | env->aregs[5] = regs->a5;
|
3449 | e6e5906b | pbrook | env->aregs[6] = regs->a6;
|
3450 | e6e5906b | pbrook | env->aregs[7] = regs->usp;
|
3451 | e6e5906b | pbrook | env->sr = regs->sr; |
3452 | e6e5906b | pbrook | ts->sim_syscalls = 1;
|
3453 | e6e5906b | pbrook | } |
3454 | b779e29e | Edgar E. Iglesias | #elif defined(TARGET_MICROBLAZE)
|
3455 | b779e29e | Edgar E. Iglesias | { |
3456 | b779e29e | Edgar E. Iglesias | env->regs[0] = regs->r0;
|
3457 | b779e29e | Edgar E. Iglesias | env->regs[1] = regs->r1;
|
3458 | b779e29e | Edgar E. Iglesias | env->regs[2] = regs->r2;
|
3459 | b779e29e | Edgar E. Iglesias | env->regs[3] = regs->r3;
|
3460 | b779e29e | Edgar E. Iglesias | env->regs[4] = regs->r4;
|
3461 | b779e29e | Edgar E. Iglesias | env->regs[5] = regs->r5;
|
3462 | b779e29e | Edgar E. Iglesias | env->regs[6] = regs->r6;
|
3463 | b779e29e | Edgar E. Iglesias | env->regs[7] = regs->r7;
|
3464 | b779e29e | Edgar E. Iglesias | env->regs[8] = regs->r8;
|
3465 | b779e29e | Edgar E. Iglesias | env->regs[9] = regs->r9;
|
3466 | b779e29e | Edgar E. Iglesias | env->regs[10] = regs->r10;
|
3467 | b779e29e | Edgar E. Iglesias | env->regs[11] = regs->r11;
|
3468 | b779e29e | Edgar E. Iglesias | env->regs[12] = regs->r12;
|
3469 | b779e29e | Edgar E. Iglesias | env->regs[13] = regs->r13;
|
3470 | b779e29e | Edgar E. Iglesias | env->regs[14] = regs->r14;
|
3471 | b779e29e | Edgar E. Iglesias | env->regs[15] = regs->r15;
|
3472 | b779e29e | Edgar E. Iglesias | env->regs[16] = regs->r16;
|
3473 | b779e29e | Edgar E. Iglesias | env->regs[17] = regs->r17;
|
3474 | b779e29e | Edgar E. Iglesias | env->regs[18] = regs->r18;
|
3475 | b779e29e | Edgar E. Iglesias | env->regs[19] = regs->r19;
|
3476 | b779e29e | Edgar E. Iglesias | env->regs[20] = regs->r20;
|
3477 | b779e29e | Edgar E. Iglesias | env->regs[21] = regs->r21;
|
3478 | b779e29e | Edgar E. Iglesias | env->regs[22] = regs->r22;
|
3479 | b779e29e | Edgar E. Iglesias | env->regs[23] = regs->r23;
|
3480 | b779e29e | Edgar E. Iglesias | env->regs[24] = regs->r24;
|
3481 | b779e29e | Edgar E. Iglesias | env->regs[25] = regs->r25;
|
3482 | b779e29e | Edgar E. Iglesias | env->regs[26] = regs->r26;
|
3483 | b779e29e | Edgar E. Iglesias | env->regs[27] = regs->r27;
|
3484 | b779e29e | Edgar E. Iglesias | env->regs[28] = regs->r28;
|
3485 | b779e29e | Edgar E. Iglesias | env->regs[29] = regs->r29;
|
3486 | b779e29e | Edgar E. Iglesias | env->regs[30] = regs->r30;
|
3487 | b779e29e | Edgar E. Iglesias | env->regs[31] = regs->r31;
|
3488 | b779e29e | Edgar E. Iglesias | env->sregs[SR_PC] = regs->pc; |
3489 | b779e29e | Edgar E. Iglesias | } |
3490 | 048f6b4d | bellard | #elif defined(TARGET_MIPS)
|
3491 | 048f6b4d | bellard | { |
3492 | 048f6b4d | bellard | int i;
|
3493 | 048f6b4d | bellard | |
3494 | 048f6b4d | bellard | for(i = 0; i < 32; i++) { |
3495 | b5dc7732 | ths | env->active_tc.gpr[i] = regs->regs[i]; |
3496 | 048f6b4d | bellard | } |
3497 | 0fddbbf2 | Nathan Froyd | env->active_tc.PC = regs->cp0_epc & ~(target_ulong)1;
|
3498 | 0fddbbf2 | Nathan Froyd | if (regs->cp0_epc & 1) { |
3499 | 0fddbbf2 | Nathan Froyd | env->hflags |= MIPS_HFLAG_M16; |
3500 | 0fddbbf2 | Nathan Froyd | } |
3501 | 048f6b4d | bellard | } |
3502 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
|
3503 | fdf9b3e8 | bellard | { |
3504 | fdf9b3e8 | bellard | int i;
|
3505 | fdf9b3e8 | bellard | |
3506 | fdf9b3e8 | bellard | for(i = 0; i < 16; i++) { |
3507 | fdf9b3e8 | bellard | env->gregs[i] = regs->regs[i]; |
3508 | fdf9b3e8 | bellard | } |
3509 | fdf9b3e8 | bellard | env->pc = regs->pc; |
3510 | fdf9b3e8 | bellard | } |
3511 | 7a3148a9 | j_mayer | #elif defined(TARGET_ALPHA)
|
3512 | 7a3148a9 | j_mayer | { |
3513 | 7a3148a9 | j_mayer | int i;
|
3514 | 7a3148a9 | j_mayer | |
3515 | 7a3148a9 | j_mayer | for(i = 0; i < 28; i++) { |
3516 | 992f48a0 | blueswir1 | env->ir[i] = ((abi_ulong *)regs)[i]; |
3517 | 7a3148a9 | j_mayer | } |
3518 | dad081ee | Richard Henderson | env->ir[IR_SP] = regs->usp; |
3519 | 7a3148a9 | j_mayer | env->pc = regs->pc; |
3520 | 7a3148a9 | j_mayer | } |
3521 | 48733d19 | ths | #elif defined(TARGET_CRIS)
|
3522 | 48733d19 | ths | { |
3523 | 48733d19 | ths | env->regs[0] = regs->r0;
|
3524 | 48733d19 | ths | env->regs[1] = regs->r1;
|
3525 | 48733d19 | ths | env->regs[2] = regs->r2;
|
3526 | 48733d19 | ths | env->regs[3] = regs->r3;
|
3527 | 48733d19 | ths | env->regs[4] = regs->r4;
|
3528 | 48733d19 | ths | env->regs[5] = regs->r5;
|
3529 | 48733d19 | ths | env->regs[6] = regs->r6;
|
3530 | 48733d19 | ths | env->regs[7] = regs->r7;
|
3531 | 48733d19 | ths | env->regs[8] = regs->r8;
|
3532 | 48733d19 | ths | env->regs[9] = regs->r9;
|
3533 | 48733d19 | ths | env->regs[10] = regs->r10;
|
3534 | 48733d19 | ths | env->regs[11] = regs->r11;
|
3535 | 48733d19 | ths | env->regs[12] = regs->r12;
|
3536 | 48733d19 | ths | env->regs[13] = regs->r13;
|
3537 | 48733d19 | ths | env->regs[14] = info->start_stack;
|
3538 | 48733d19 | ths | env->regs[15] = regs->acr;
|
3539 | 48733d19 | ths | env->pc = regs->erp; |
3540 | 48733d19 | ths | } |
3541 | a4c075f1 | Ulrich Hecht | #elif defined(TARGET_S390X)
|
3542 | a4c075f1 | Ulrich Hecht | { |
3543 | a4c075f1 | Ulrich Hecht | int i;
|
3544 | a4c075f1 | Ulrich Hecht | for (i = 0; i < 16; i++) { |
3545 | a4c075f1 | Ulrich Hecht | env->regs[i] = regs->gprs[i]; |
3546 | a4c075f1 | Ulrich Hecht | } |
3547 | a4c075f1 | Ulrich Hecht | env->psw.mask = regs->psw.mask; |
3548 | a4c075f1 | Ulrich Hecht | env->psw.addr = regs->psw.addr; |
3549 | a4c075f1 | Ulrich Hecht | } |
3550 | b346ff46 | bellard | #else
|
3551 | b346ff46 | bellard | #error unsupported target CPU
|
3552 | b346ff46 | bellard | #endif
|
3553 | 31e31b8a | bellard | |
3554 | d2fbca94 | Guan Xuetao | #if defined(TARGET_ARM) || defined(TARGET_M68K) || defined(TARGET_UNICORE32)
|
3555 | a87295e8 | pbrook | ts->stack_base = info->start_stack; |
3556 | a87295e8 | pbrook | ts->heap_base = info->brk; |
3557 | a87295e8 | pbrook | /* This will be filled in on the first SYS_HEAPINFO call. */
|
3558 | a87295e8 | pbrook | ts->heap_limit = 0;
|
3559 | a87295e8 | pbrook | #endif
|
3560 | a87295e8 | pbrook | |
3561 | 74c33bed | bellard | if (gdbstub_port) {
|
3562 | 74c33bed | bellard | gdbserver_start (gdbstub_port); |
3563 | 1fddef4b | bellard | gdb_handlesig(env, 0);
|
3564 | 1fddef4b | bellard | } |
3565 | 1b6b029e | bellard | cpu_loop(env); |
3566 | 1b6b029e | bellard | /* never exits */
|
3567 | 31e31b8a | bellard | return 0; |
3568 | 31e31b8a | bellard | } |