root / target-s390x / helper.c @ 9c17d615
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1 | 10ec5117 | Alexander Graf | /*
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2 | 10ec5117 | Alexander Graf | * S/390 helpers
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3 | 10ec5117 | Alexander Graf | *
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4 | 10ec5117 | Alexander Graf | * Copyright (c) 2009 Ulrich Hecht
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5 | d5a43964 | Alexander Graf | * Copyright (c) 2011 Alexander Graf
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6 | 10ec5117 | Alexander Graf | *
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7 | 10ec5117 | Alexander Graf | * This library is free software; you can redistribute it and/or
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8 | 10ec5117 | Alexander Graf | * modify it under the terms of the GNU Lesser General Public
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9 | 10ec5117 | Alexander Graf | * License as published by the Free Software Foundation; either
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10 | 10ec5117 | Alexander Graf | * version 2 of the License, or (at your option) any later version.
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11 | 10ec5117 | Alexander Graf | *
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12 | 10ec5117 | Alexander Graf | * This library is distributed in the hope that it will be useful,
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13 | 10ec5117 | Alexander Graf | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 10ec5117 | Alexander Graf | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 10ec5117 | Alexander Graf | * Lesser General Public License for more details.
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16 | 10ec5117 | Alexander Graf | *
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17 | 10ec5117 | Alexander Graf | * You should have received a copy of the GNU Lesser General Public
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18 | 70539e18 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 10ec5117 | Alexander Graf | */
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20 | 10ec5117 | Alexander Graf | |
21 | 10ec5117 | Alexander Graf | #include "cpu.h" |
22 | 022c62cb | Paolo Bonzini | #include "exec/gdbstub.h" |
23 | 1de7afc9 | Paolo Bonzini | #include "qemu/timer.h" |
24 | ef81522b | Alexander Graf | #ifndef CONFIG_USER_ONLY
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25 | 9c17d615 | Paolo Bonzini | #include "sysemu/sysemu.h" |
26 | ef81522b | Alexander Graf | #endif
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27 | 10ec5117 | Alexander Graf | |
28 | d5a43964 | Alexander Graf | //#define DEBUG_S390
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29 | d5a43964 | Alexander Graf | //#define DEBUG_S390_PTE
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30 | d5a43964 | Alexander Graf | //#define DEBUG_S390_STDOUT
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31 | d5a43964 | Alexander Graf | |
32 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390
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33 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390_STDOUT
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34 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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35 | d5a43964 | Alexander Graf | do { fprintf(stderr, fmt, ## __VA_ARGS__); \ |
36 | d5a43964 | Alexander Graf | qemu_log(fmt, ##__VA_ARGS__); } while (0) |
37 | d5a43964 | Alexander Graf | #else
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38 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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39 | d5a43964 | Alexander Graf | do { qemu_log(fmt, ## __VA_ARGS__); } while (0) |
40 | d5a43964 | Alexander Graf | #endif
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41 | d5a43964 | Alexander Graf | #else
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42 | d5a43964 | Alexander Graf | #define DPRINTF(fmt, ...) \
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43 | d5a43964 | Alexander Graf | do { } while (0) |
44 | d5a43964 | Alexander Graf | #endif
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45 | d5a43964 | Alexander Graf | |
46 | d5a43964 | Alexander Graf | #ifdef DEBUG_S390_PTE
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47 | d5a43964 | Alexander Graf | #define PTE_DPRINTF DPRINTF
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48 | d5a43964 | Alexander Graf | #else
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49 | d5a43964 | Alexander Graf | #define PTE_DPRINTF(fmt, ...) \
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50 | d5a43964 | Alexander Graf | do { } while (0) |
51 | d5a43964 | Alexander Graf | #endif
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52 | d5a43964 | Alexander Graf | |
53 | d5a43964 | Alexander Graf | #ifndef CONFIG_USER_ONLY
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54 | 8f22e0df | Andreas Färber | void s390x_tod_timer(void *opaque) |
55 | d5a43964 | Alexander Graf | { |
56 | b8ba6799 | Andreas Färber | S390CPU *cpu = opaque; |
57 | b8ba6799 | Andreas Färber | CPUS390XState *env = &cpu->env; |
58 | d5a43964 | Alexander Graf | |
59 | d5a43964 | Alexander Graf | env->pending_int |= INTERRUPT_TOD; |
60 | d5a43964 | Alexander Graf | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
61 | d5a43964 | Alexander Graf | } |
62 | d5a43964 | Alexander Graf | |
63 | 8f22e0df | Andreas Färber | void s390x_cpu_timer(void *opaque) |
64 | d5a43964 | Alexander Graf | { |
65 | b8ba6799 | Andreas Färber | S390CPU *cpu = opaque; |
66 | b8ba6799 | Andreas Färber | CPUS390XState *env = &cpu->env; |
67 | d5a43964 | Alexander Graf | |
68 | d5a43964 | Alexander Graf | env->pending_int |= INTERRUPT_CPUTIMER; |
69 | d5a43964 | Alexander Graf | cpu_interrupt(env, CPU_INTERRUPT_HARD); |
70 | d5a43964 | Alexander Graf | } |
71 | d5a43964 | Alexander Graf | #endif
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72 | 10c339a0 | Alexander Graf | |
73 | 564b863d | Andreas Färber | S390CPU *cpu_s390x_init(const char *cpu_model) |
74 | 10ec5117 | Alexander Graf | { |
75 | 29e4bcb2 | Andreas Färber | S390CPU *cpu; |
76 | 10ec5117 | Alexander Graf | CPUS390XState *env; |
77 | 71e47088 | Blue Swirl | static int inited; |
78 | 10ec5117 | Alexander Graf | |
79 | 29e4bcb2 | Andreas Färber | cpu = S390_CPU(object_new(TYPE_S390_CPU)); |
80 | 29e4bcb2 | Andreas Färber | env = &cpu->env; |
81 | 8f22e0df | Andreas Färber | |
82 | d5ab9713 | Jan Kiszka | if (tcg_enabled() && !inited) {
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83 | 10ec5117 | Alexander Graf | inited = 1;
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84 | d5a43964 | Alexander Graf | s390x_translate_init(); |
85 | 10ec5117 | Alexander Graf | } |
86 | 10ec5117 | Alexander Graf | |
87 | 10ec5117 | Alexander Graf | env->cpu_model_str = cpu_model; |
88 | 10ec5117 | Alexander Graf | qemu_init_vcpu(env); |
89 | 564b863d | Andreas Färber | return cpu;
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90 | 10ec5117 | Alexander Graf | } |
91 | 10ec5117 | Alexander Graf | |
92 | d5a43964 | Alexander Graf | #if defined(CONFIG_USER_ONLY)
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93 | d5a43964 | Alexander Graf | |
94 | 71e47088 | Blue Swirl | void do_interrupt(CPUS390XState *env)
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95 | d5a43964 | Alexander Graf | { |
96 | d5a43964 | Alexander Graf | env->exception_index = -1;
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97 | d5a43964 | Alexander Graf | } |
98 | d5a43964 | Alexander Graf | |
99 | 71e47088 | Blue Swirl | int cpu_s390x_handle_mmu_fault(CPUS390XState *env, target_ulong address,
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100 | 71e47088 | Blue Swirl | int rw, int mmu_idx) |
101 | d5a43964 | Alexander Graf | { |
102 | 71e47088 | Blue Swirl | /* fprintf(stderr, "%s: address 0x%lx rw %d mmu_idx %d\n",
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103 | 71e47088 | Blue Swirl | __func__, address, rw, mmu_idx); */
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104 | d5a43964 | Alexander Graf | env->exception_index = EXCP_ADDR; |
105 | 71e47088 | Blue Swirl | /* FIXME: find out how this works on a real machine */
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106 | 71e47088 | Blue Swirl | env->__excp_addr = address; |
107 | d5a43964 | Alexander Graf | return 1; |
108 | d5a43964 | Alexander Graf | } |
109 | d5a43964 | Alexander Graf | |
110 | b7e516ce | Andreas Färber | #else /* !CONFIG_USER_ONLY */ |
111 | d5a43964 | Alexander Graf | |
112 | d5a43964 | Alexander Graf | /* Ensure to exit the TB after this call! */
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113 | 71e47088 | Blue Swirl | static void trigger_pgm_exception(CPUS390XState *env, uint32_t code, |
114 | 71e47088 | Blue Swirl | uint32_t ilc) |
115 | d5a43964 | Alexander Graf | { |
116 | d5a43964 | Alexander Graf | env->exception_index = EXCP_PGM; |
117 | d5a43964 | Alexander Graf | env->int_pgm_code = code; |
118 | d5a43964 | Alexander Graf | env->int_pgm_ilc = ilc; |
119 | d5a43964 | Alexander Graf | } |
120 | d5a43964 | Alexander Graf | |
121 | a4e3ad19 | Andreas Färber | static int trans_bits(CPUS390XState *env, uint64_t mode) |
122 | d5a43964 | Alexander Graf | { |
123 | d5a43964 | Alexander Graf | int bits = 0; |
124 | d5a43964 | Alexander Graf | |
125 | d5a43964 | Alexander Graf | switch (mode) {
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126 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
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127 | d5a43964 | Alexander Graf | bits = 1;
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128 | d5a43964 | Alexander Graf | break;
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129 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
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130 | d5a43964 | Alexander Graf | bits = 2;
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131 | d5a43964 | Alexander Graf | break;
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132 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
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133 | d5a43964 | Alexander Graf | bits = 3;
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134 | d5a43964 | Alexander Graf | break;
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135 | d5a43964 | Alexander Graf | default:
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136 | d5a43964 | Alexander Graf | cpu_abort(env, "unknown asc mode\n");
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137 | d5a43964 | Alexander Graf | break;
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138 | d5a43964 | Alexander Graf | } |
139 | d5a43964 | Alexander Graf | |
140 | d5a43964 | Alexander Graf | return bits;
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141 | d5a43964 | Alexander Graf | } |
142 | d5a43964 | Alexander Graf | |
143 | 71e47088 | Blue Swirl | static void trigger_prot_fault(CPUS390XState *env, target_ulong vaddr, |
144 | 71e47088 | Blue Swirl | uint64_t mode) |
145 | d5a43964 | Alexander Graf | { |
146 | d5a43964 | Alexander Graf | int ilc = ILC_LATER_INC_2;
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147 | d5a43964 | Alexander Graf | int bits = trans_bits(env, mode) | 4; |
148 | d5a43964 | Alexander Graf | |
149 | 71e47088 | Blue Swirl | DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __func__, vaddr, bits); |
150 | d5a43964 | Alexander Graf | |
151 | d5a43964 | Alexander Graf | stq_phys(env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits); |
152 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, PGM_PROTECTION, ilc); |
153 | d5a43964 | Alexander Graf | } |
154 | d5a43964 | Alexander Graf | |
155 | 71e47088 | Blue Swirl | static void trigger_page_fault(CPUS390XState *env, target_ulong vaddr, |
156 | 71e47088 | Blue Swirl | uint32_t type, uint64_t asc, int rw)
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157 | d5a43964 | Alexander Graf | { |
158 | d5a43964 | Alexander Graf | int ilc = ILC_LATER;
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159 | d5a43964 | Alexander Graf | int bits = trans_bits(env, asc);
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160 | d5a43964 | Alexander Graf | |
161 | d5a43964 | Alexander Graf | if (rw == 2) { |
162 | d5a43964 | Alexander Graf | /* code has is undefined ilc */
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163 | d5a43964 | Alexander Graf | ilc = 2;
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164 | d5a43964 | Alexander Graf | } |
165 | d5a43964 | Alexander Graf | |
166 | 71e47088 | Blue Swirl | DPRINTF("%s: vaddr=%016" PRIx64 " bits=%d\n", __func__, vaddr, bits); |
167 | d5a43964 | Alexander Graf | |
168 | d5a43964 | Alexander Graf | stq_phys(env->psa + offsetof(LowCore, trans_exc_code), vaddr | bits); |
169 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, type, ilc); |
170 | d5a43964 | Alexander Graf | } |
171 | d5a43964 | Alexander Graf | |
172 | 71e47088 | Blue Swirl | static int mmu_translate_asce(CPUS390XState *env, target_ulong vaddr, |
173 | 71e47088 | Blue Swirl | uint64_t asc, uint64_t asce, int level,
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174 | 71e47088 | Blue Swirl | target_ulong *raddr, int *flags, int rw) |
175 | c92114b1 | Alexander Graf | { |
176 | d5a43964 | Alexander Graf | uint64_t offs = 0;
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177 | d5a43964 | Alexander Graf | uint64_t origin; |
178 | d5a43964 | Alexander Graf | uint64_t new_asce; |
179 | d5a43964 | Alexander Graf | |
180 | 71e47088 | Blue Swirl | PTE_DPRINTF("%s: 0x%" PRIx64 "\n", __func__, asce); |
181 | d5a43964 | Alexander Graf | |
182 | d5a43964 | Alexander Graf | if (((level != _ASCE_TYPE_SEGMENT) && (asce & _REGION_ENTRY_INV)) ||
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183 | d5a43964 | Alexander Graf | ((level == _ASCE_TYPE_SEGMENT) && (asce & _SEGMENT_ENTRY_INV))) { |
184 | d5a43964 | Alexander Graf | /* XXX different regions have different faults */
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185 | 71e47088 | Blue Swirl | DPRINTF("%s: invalid region\n", __func__);
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186 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_SEGMENT_TRANS, asc, rw); |
187 | d5a43964 | Alexander Graf | return -1; |
188 | d5a43964 | Alexander Graf | } |
189 | d5a43964 | Alexander Graf | |
190 | d5a43964 | Alexander Graf | if ((level <= _ASCE_TYPE_MASK) && ((asce & _ASCE_TYPE_MASK) != level)) {
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191 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
192 | d5a43964 | Alexander Graf | return -1; |
193 | d5a43964 | Alexander Graf | } |
194 | d5a43964 | Alexander Graf | |
195 | d5a43964 | Alexander Graf | if (asce & _ASCE_REAL_SPACE) {
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196 | d5a43964 | Alexander Graf | /* direct mapping */
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197 | d5a43964 | Alexander Graf | |
198 | d5a43964 | Alexander Graf | *raddr = vaddr; |
199 | d5a43964 | Alexander Graf | return 0; |
200 | d5a43964 | Alexander Graf | } |
201 | d5a43964 | Alexander Graf | |
202 | d5a43964 | Alexander Graf | origin = asce & _ASCE_ORIGIN; |
203 | d5a43964 | Alexander Graf | |
204 | d5a43964 | Alexander Graf | switch (level) {
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205 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1 + 4: |
206 | d5a43964 | Alexander Graf | offs = (vaddr >> 50) & 0x3ff8; |
207 | d5a43964 | Alexander Graf | break;
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208 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1:
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209 | d5a43964 | Alexander Graf | offs = (vaddr >> 39) & 0x3ff8; |
210 | d5a43964 | Alexander Graf | break;
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211 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION2:
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212 | d5a43964 | Alexander Graf | offs = (vaddr >> 28) & 0x3ff8; |
213 | d5a43964 | Alexander Graf | break;
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214 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION3:
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215 | d5a43964 | Alexander Graf | offs = (vaddr >> 17) & 0x3ff8; |
216 | d5a43964 | Alexander Graf | break;
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217 | d5a43964 | Alexander Graf | case _ASCE_TYPE_SEGMENT:
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218 | d5a43964 | Alexander Graf | offs = (vaddr >> 9) & 0x07f8; |
219 | d5a43964 | Alexander Graf | origin = asce & _SEGMENT_ENTRY_ORIGIN; |
220 | d5a43964 | Alexander Graf | break;
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221 | d5a43964 | Alexander Graf | } |
222 | d5a43964 | Alexander Graf | |
223 | d5a43964 | Alexander Graf | /* XXX region protection flags */
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224 | d5a43964 | Alexander Graf | /* *flags &= ~PAGE_WRITE */
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225 | d5a43964 | Alexander Graf | |
226 | d5a43964 | Alexander Graf | new_asce = ldq_phys(origin + offs); |
227 | d5a43964 | Alexander Graf | PTE_DPRINTF("%s: 0x%" PRIx64 " + 0x%" PRIx64 " => 0x%016" PRIx64 "\n", |
228 | 71e47088 | Blue Swirl | __func__, origin, offs, new_asce); |
229 | d5a43964 | Alexander Graf | |
230 | d5a43964 | Alexander Graf | if (level != _ASCE_TYPE_SEGMENT) {
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231 | d5a43964 | Alexander Graf | /* yet another region */
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232 | d5a43964 | Alexander Graf | return mmu_translate_asce(env, vaddr, asc, new_asce, level - 4, raddr, |
233 | d5a43964 | Alexander Graf | flags, rw); |
234 | d5a43964 | Alexander Graf | } |
235 | d5a43964 | Alexander Graf | |
236 | d5a43964 | Alexander Graf | /* PTE */
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237 | d5a43964 | Alexander Graf | if (new_asce & _PAGE_INVALID) {
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238 | 71e47088 | Blue Swirl | DPRINTF("%s: PTE=0x%" PRIx64 " invalid\n", __func__, new_asce); |
239 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_PAGE_TRANS, asc, rw); |
240 | d5a43964 | Alexander Graf | return -1; |
241 | d5a43964 | Alexander Graf | } |
242 | d5a43964 | Alexander Graf | |
243 | d5a43964 | Alexander Graf | if (new_asce & _PAGE_RO) {
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244 | d5a43964 | Alexander Graf | *flags &= ~PAGE_WRITE; |
245 | d5a43964 | Alexander Graf | } |
246 | d5a43964 | Alexander Graf | |
247 | d5a43964 | Alexander Graf | *raddr = new_asce & _ASCE_ORIGIN; |
248 | d5a43964 | Alexander Graf | |
249 | 71e47088 | Blue Swirl | PTE_DPRINTF("%s: PTE=0x%" PRIx64 "\n", __func__, new_asce); |
250 | d5a43964 | Alexander Graf | |
251 | c92114b1 | Alexander Graf | return 0; |
252 | c92114b1 | Alexander Graf | } |
253 | c92114b1 | Alexander Graf | |
254 | 71e47088 | Blue Swirl | static int mmu_translate_asc(CPUS390XState *env, target_ulong vaddr, |
255 | 71e47088 | Blue Swirl | uint64_t asc, target_ulong *raddr, int *flags,
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256 | 71e47088 | Blue Swirl | int rw)
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257 | d5a43964 | Alexander Graf | { |
258 | d5a43964 | Alexander Graf | uint64_t asce = 0;
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259 | d5a43964 | Alexander Graf | int level, new_level;
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260 | d5a43964 | Alexander Graf | int r;
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261 | 10c339a0 | Alexander Graf | |
262 | d5a43964 | Alexander Graf | switch (asc) {
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263 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
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264 | 71e47088 | Blue Swirl | PTE_DPRINTF("%s: asc=primary\n", __func__);
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265 | d5a43964 | Alexander Graf | asce = env->cregs[1];
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266 | d5a43964 | Alexander Graf | break;
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267 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
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268 | 71e47088 | Blue Swirl | PTE_DPRINTF("%s: asc=secondary\n", __func__);
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269 | d5a43964 | Alexander Graf | asce = env->cregs[7];
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270 | d5a43964 | Alexander Graf | break;
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271 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
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272 | 71e47088 | Blue Swirl | PTE_DPRINTF("%s: asc=home\n", __func__);
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273 | d5a43964 | Alexander Graf | asce = env->cregs[13];
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274 | d5a43964 | Alexander Graf | break;
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275 | d5a43964 | Alexander Graf | } |
276 | d5a43964 | Alexander Graf | |
277 | d5a43964 | Alexander Graf | switch (asce & _ASCE_TYPE_MASK) {
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278 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION1:
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279 | d5a43964 | Alexander Graf | break;
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280 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION2:
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281 | d5a43964 | Alexander Graf | if (vaddr & 0xffe0000000000000ULL) { |
282 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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283 | 71e47088 | Blue Swirl | " 0xffe0000000000000ULL\n", __func__, vaddr);
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284 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
285 | d5a43964 | Alexander Graf | return -1; |
286 | d5a43964 | Alexander Graf | } |
287 | d5a43964 | Alexander Graf | break;
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288 | d5a43964 | Alexander Graf | case _ASCE_TYPE_REGION3:
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289 | d5a43964 | Alexander Graf | if (vaddr & 0xfffffc0000000000ULL) { |
290 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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291 | 71e47088 | Blue Swirl | " 0xfffffc0000000000ULL\n", __func__, vaddr);
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292 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
293 | d5a43964 | Alexander Graf | return -1; |
294 | d5a43964 | Alexander Graf | } |
295 | d5a43964 | Alexander Graf | break;
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296 | d5a43964 | Alexander Graf | case _ASCE_TYPE_SEGMENT:
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297 | d5a43964 | Alexander Graf | if (vaddr & 0xffffffff80000000ULL) { |
298 | d5a43964 | Alexander Graf | DPRINTF("%s: vaddr doesn't fit 0x%16" PRIx64
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299 | 71e47088 | Blue Swirl | " 0xffffffff80000000ULL\n", __func__, vaddr);
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300 | d5a43964 | Alexander Graf | trigger_page_fault(env, vaddr, PGM_TRANS_SPEC, asc, rw); |
301 | d5a43964 | Alexander Graf | return -1; |
302 | d5a43964 | Alexander Graf | } |
303 | d5a43964 | Alexander Graf | break;
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304 | d5a43964 | Alexander Graf | } |
305 | d5a43964 | Alexander Graf | |
306 | d5a43964 | Alexander Graf | /* fake level above current */
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307 | d5a43964 | Alexander Graf | level = asce & _ASCE_TYPE_MASK; |
308 | d5a43964 | Alexander Graf | new_level = level + 4;
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309 | d5a43964 | Alexander Graf | asce = (asce & ~_ASCE_TYPE_MASK) | (new_level & _ASCE_TYPE_MASK); |
310 | d5a43964 | Alexander Graf | |
311 | d5a43964 | Alexander Graf | r = mmu_translate_asce(env, vaddr, asc, asce, new_level, raddr, flags, rw); |
312 | d5a43964 | Alexander Graf | |
313 | d5a43964 | Alexander Graf | if ((rw == 1) && !(*flags & PAGE_WRITE)) { |
314 | d5a43964 | Alexander Graf | trigger_prot_fault(env, vaddr, asc); |
315 | d5a43964 | Alexander Graf | return -1; |
316 | d5a43964 | Alexander Graf | } |
317 | d5a43964 | Alexander Graf | |
318 | d5a43964 | Alexander Graf | return r;
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319 | d5a43964 | Alexander Graf | } |
320 | d5a43964 | Alexander Graf | |
321 | a4e3ad19 | Andreas Färber | int mmu_translate(CPUS390XState *env, target_ulong vaddr, int rw, uint64_t asc, |
322 | d5a43964 | Alexander Graf | target_ulong *raddr, int *flags)
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323 | d5a43964 | Alexander Graf | { |
324 | d5a43964 | Alexander Graf | int r = -1; |
325 | b9959138 | Alexander Graf | uint8_t *sk; |
326 | d5a43964 | Alexander Graf | |
327 | d5a43964 | Alexander Graf | *flags = PAGE_READ | PAGE_WRITE | PAGE_EXEC; |
328 | d5a43964 | Alexander Graf | vaddr &= TARGET_PAGE_MASK; |
329 | d5a43964 | Alexander Graf | |
330 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_DAT)) {
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331 | d5a43964 | Alexander Graf | *raddr = vaddr; |
332 | d5a43964 | Alexander Graf | r = 0;
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333 | d5a43964 | Alexander Graf | goto out;
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334 | d5a43964 | Alexander Graf | } |
335 | d5a43964 | Alexander Graf | |
336 | d5a43964 | Alexander Graf | switch (asc) {
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337 | d5a43964 | Alexander Graf | case PSW_ASC_PRIMARY:
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338 | d5a43964 | Alexander Graf | case PSW_ASC_HOME:
|
339 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, asc, raddr, flags, rw); |
340 | d5a43964 | Alexander Graf | break;
|
341 | d5a43964 | Alexander Graf | case PSW_ASC_SECONDARY:
|
342 | d5a43964 | Alexander Graf | /*
|
343 | d5a43964 | Alexander Graf | * Instruction: Primary
|
344 | d5a43964 | Alexander Graf | * Data: Secondary
|
345 | d5a43964 | Alexander Graf | */
|
346 | d5a43964 | Alexander Graf | if (rw == 2) { |
347 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, PSW_ASC_PRIMARY, raddr, flags, |
348 | d5a43964 | Alexander Graf | rw); |
349 | d5a43964 | Alexander Graf | *flags &= ~(PAGE_READ | PAGE_WRITE); |
350 | d5a43964 | Alexander Graf | } else {
|
351 | d5a43964 | Alexander Graf | r = mmu_translate_asc(env, vaddr, PSW_ASC_SECONDARY, raddr, flags, |
352 | d5a43964 | Alexander Graf | rw); |
353 | d5a43964 | Alexander Graf | *flags &= ~(PAGE_EXEC); |
354 | d5a43964 | Alexander Graf | } |
355 | d5a43964 | Alexander Graf | break;
|
356 | d5a43964 | Alexander Graf | case PSW_ASC_ACCREG:
|
357 | d5a43964 | Alexander Graf | default:
|
358 | d5a43964 | Alexander Graf | hw_error("guest switched to unknown asc mode\n");
|
359 | d5a43964 | Alexander Graf | break;
|
360 | d5a43964 | Alexander Graf | } |
361 | d5a43964 | Alexander Graf | |
362 | 71e47088 | Blue Swirl | out:
|
363 | d5a43964 | Alexander Graf | /* Convert real address -> absolute address */
|
364 | d5a43964 | Alexander Graf | if (*raddr < 0x2000) { |
365 | d5a43964 | Alexander Graf | *raddr = *raddr + env->psa; |
366 | d5a43964 | Alexander Graf | } |
367 | d5a43964 | Alexander Graf | |
368 | b9959138 | Alexander Graf | if (*raddr <= ram_size) {
|
369 | b9959138 | Alexander Graf | sk = &env->storage_keys[*raddr / TARGET_PAGE_SIZE]; |
370 | b9959138 | Alexander Graf | if (*flags & PAGE_READ) {
|
371 | b9959138 | Alexander Graf | *sk |= SK_R; |
372 | b9959138 | Alexander Graf | } |
373 | b9959138 | Alexander Graf | |
374 | b9959138 | Alexander Graf | if (*flags & PAGE_WRITE) {
|
375 | b9959138 | Alexander Graf | *sk |= SK_C; |
376 | b9959138 | Alexander Graf | } |
377 | b9959138 | Alexander Graf | } |
378 | b9959138 | Alexander Graf | |
379 | d5a43964 | Alexander Graf | return r;
|
380 | d5a43964 | Alexander Graf | } |
381 | d5a43964 | Alexander Graf | |
382 | 71e47088 | Blue Swirl | int cpu_s390x_handle_mmu_fault(CPUS390XState *env, target_ulong orig_vaddr,
|
383 | 71e47088 | Blue Swirl | int rw, int mmu_idx) |
384 | 10c339a0 | Alexander Graf | { |
385 | d5a43964 | Alexander Graf | uint64_t asc = env->psw.mask & PSW_MASK_ASC; |
386 | d5a43964 | Alexander Graf | target_ulong vaddr, raddr; |
387 | 10c339a0 | Alexander Graf | int prot;
|
388 | 10c339a0 | Alexander Graf | |
389 | 97b348e7 | Blue Swirl | DPRINTF("%s: address 0x%" PRIx64 " rw %d mmu_idx %d\n", |
390 | 71e47088 | Blue Swirl | __func__, _vaddr, rw, mmu_idx); |
391 | d5a43964 | Alexander Graf | |
392 | 71e47088 | Blue Swirl | orig_vaddr &= TARGET_PAGE_MASK; |
393 | 71e47088 | Blue Swirl | vaddr = orig_vaddr; |
394 | d5a43964 | Alexander Graf | |
395 | d5a43964 | Alexander Graf | /* 31-Bit mode */
|
396 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_64)) {
|
397 | d5a43964 | Alexander Graf | vaddr &= 0x7fffffff;
|
398 | d5a43964 | Alexander Graf | } |
399 | d5a43964 | Alexander Graf | |
400 | d5a43964 | Alexander Graf | if (mmu_translate(env, vaddr, rw, asc, &raddr, &prot)) {
|
401 | d5a43964 | Alexander Graf | /* Translation ended in exception */
|
402 | d5a43964 | Alexander Graf | return 1; |
403 | d5a43964 | Alexander Graf | } |
404 | 10c339a0 | Alexander Graf | |
405 | d5a43964 | Alexander Graf | /* check out of RAM access */
|
406 | d5a43964 | Alexander Graf | if (raddr > (ram_size + virtio_size)) {
|
407 | 71e47088 | Blue Swirl | DPRINTF("%s: aaddr %" PRIx64 " > ram_size %" PRIx64 "\n", __func__, |
408 | d5a43964 | Alexander Graf | (uint64_t)aaddr, (uint64_t)ram_size); |
409 | d5a43964 | Alexander Graf | trigger_pgm_exception(env, PGM_ADDRESSING, ILC_LATER); |
410 | d5a43964 | Alexander Graf | return 1; |
411 | d5a43964 | Alexander Graf | } |
412 | 10c339a0 | Alexander Graf | |
413 | 71e47088 | Blue Swirl | DPRINTF("%s: set tlb %" PRIx64 " -> %" PRIx64 " (%x)\n", __func__, |
414 | d5a43964 | Alexander Graf | (uint64_t)vaddr, (uint64_t)raddr, prot); |
415 | d5a43964 | Alexander Graf | |
416 | 71e47088 | Blue Swirl | tlb_set_page(env, orig_vaddr, raddr, prot, |
417 | d4c430a8 | Paul Brook | mmu_idx, TARGET_PAGE_SIZE); |
418 | d5a43964 | Alexander Graf | |
419 | d4c430a8 | Paul Brook | return 0; |
420 | 10c339a0 | Alexander Graf | } |
421 | d5a43964 | Alexander Graf | |
422 | a8170e5e | Avi Kivity | hwaddr cpu_get_phys_page_debug(CPUS390XState *env, |
423 | 71e47088 | Blue Swirl | target_ulong vaddr) |
424 | d5a43964 | Alexander Graf | { |
425 | d5a43964 | Alexander Graf | target_ulong raddr; |
426 | d5a43964 | Alexander Graf | int prot = PAGE_READ | PAGE_WRITE | PAGE_EXEC;
|
427 | d5a43964 | Alexander Graf | int old_exc = env->exception_index;
|
428 | d5a43964 | Alexander Graf | uint64_t asc = env->psw.mask & PSW_MASK_ASC; |
429 | d5a43964 | Alexander Graf | |
430 | d5a43964 | Alexander Graf | /* 31-Bit mode */
|
431 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_64)) {
|
432 | d5a43964 | Alexander Graf | vaddr &= 0x7fffffff;
|
433 | d5a43964 | Alexander Graf | } |
434 | d5a43964 | Alexander Graf | |
435 | d5a43964 | Alexander Graf | mmu_translate(env, vaddr, 2, asc, &raddr, &prot);
|
436 | d5a43964 | Alexander Graf | env->exception_index = old_exc; |
437 | d5a43964 | Alexander Graf | |
438 | d5a43964 | Alexander Graf | return raddr;
|
439 | d5a43964 | Alexander Graf | } |
440 | d5a43964 | Alexander Graf | |
441 | a4e3ad19 | Andreas Färber | void load_psw(CPUS390XState *env, uint64_t mask, uint64_t addr)
|
442 | d5a43964 | Alexander Graf | { |
443 | d5a43964 | Alexander Graf | if (mask & PSW_MASK_WAIT) {
|
444 | d5a43964 | Alexander Graf | if (!(mask & (PSW_MASK_IO | PSW_MASK_EXT | PSW_MASK_MCHECK))) {
|
445 | ef81522b | Alexander Graf | if (s390_del_running_cpu(env) == 0) { |
446 | ef81522b | Alexander Graf | #ifndef CONFIG_USER_ONLY
|
447 | ef81522b | Alexander Graf | qemu_system_shutdown_request(); |
448 | ef81522b | Alexander Graf | #endif
|
449 | ef81522b | Alexander Graf | } |
450 | d5a43964 | Alexander Graf | } |
451 | ef81522b | Alexander Graf | env->halted = 1;
|
452 | ef81522b | Alexander Graf | env->exception_index = EXCP_HLT; |
453 | d5a43964 | Alexander Graf | } |
454 | d5a43964 | Alexander Graf | |
455 | d5a43964 | Alexander Graf | env->psw.addr = addr; |
456 | d5a43964 | Alexander Graf | env->psw.mask = mask; |
457 | d5a43964 | Alexander Graf | env->cc_op = (mask >> 13) & 3; |
458 | d5a43964 | Alexander Graf | } |
459 | d5a43964 | Alexander Graf | |
460 | a4e3ad19 | Andreas Färber | static uint64_t get_psw_mask(CPUS390XState *env)
|
461 | d5a43964 | Alexander Graf | { |
462 | d5a43964 | Alexander Graf | uint64_t r = env->psw.mask; |
463 | d5a43964 | Alexander Graf | |
464 | d5a43964 | Alexander Graf | env->cc_op = calc_cc(env, env->cc_op, env->cc_src, env->cc_dst, env->cc_vr); |
465 | d5a43964 | Alexander Graf | |
466 | d5a43964 | Alexander Graf | r &= ~(3ULL << 13); |
467 | d5a43964 | Alexander Graf | assert(!(env->cc_op & ~3));
|
468 | d5a43964 | Alexander Graf | r |= env->cc_op << 13;
|
469 | d5a43964 | Alexander Graf | |
470 | d5a43964 | Alexander Graf | return r;
|
471 | d5a43964 | Alexander Graf | } |
472 | d5a43964 | Alexander Graf | |
473 | a4e3ad19 | Andreas Färber | static void do_svc_interrupt(CPUS390XState *env) |
474 | d5a43964 | Alexander Graf | { |
475 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
476 | d5a43964 | Alexander Graf | LowCore *lowcore; |
477 | a8170e5e | Avi Kivity | hwaddr len = TARGET_PAGE_SIZE; |
478 | d5a43964 | Alexander Graf | |
479 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
480 | d5a43964 | Alexander Graf | |
481 | d5a43964 | Alexander Graf | lowcore->svc_code = cpu_to_be16(env->int_svc_code); |
482 | d5a43964 | Alexander Graf | lowcore->svc_ilc = cpu_to_be16(env->int_svc_ilc); |
483 | d5a43964 | Alexander Graf | lowcore->svc_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
484 | d5a43964 | Alexander Graf | lowcore->svc_old_psw.addr = cpu_to_be64(env->psw.addr + (env->int_svc_ilc)); |
485 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->svc_new_psw.mask); |
486 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->svc_new_psw.addr); |
487 | d5a43964 | Alexander Graf | |
488 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
489 | d5a43964 | Alexander Graf | |
490 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
491 | d5a43964 | Alexander Graf | } |
492 | d5a43964 | Alexander Graf | |
493 | a4e3ad19 | Andreas Färber | static void do_program_interrupt(CPUS390XState *env) |
494 | d5a43964 | Alexander Graf | { |
495 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
496 | d5a43964 | Alexander Graf | LowCore *lowcore; |
497 | a8170e5e | Avi Kivity | hwaddr len = TARGET_PAGE_SIZE; |
498 | d5a43964 | Alexander Graf | int ilc = env->int_pgm_ilc;
|
499 | d5a43964 | Alexander Graf | |
500 | d5a43964 | Alexander Graf | switch (ilc) {
|
501 | d5a43964 | Alexander Graf | case ILC_LATER:
|
502 | 19b0516f | Blue Swirl | ilc = get_ilc(cpu_ldub_code(env, env->psw.addr)); |
503 | d5a43964 | Alexander Graf | break;
|
504 | d5a43964 | Alexander Graf | case ILC_LATER_INC:
|
505 | 19b0516f | Blue Swirl | ilc = get_ilc(cpu_ldub_code(env, env->psw.addr)); |
506 | d5a43964 | Alexander Graf | env->psw.addr += ilc * 2;
|
507 | d5a43964 | Alexander Graf | break;
|
508 | d5a43964 | Alexander Graf | case ILC_LATER_INC_2:
|
509 | 19b0516f | Blue Swirl | ilc = get_ilc(cpu_ldub_code(env, env->psw.addr)) * 2;
|
510 | d5a43964 | Alexander Graf | env->psw.addr += ilc; |
511 | d5a43964 | Alexander Graf | break;
|
512 | d5a43964 | Alexander Graf | } |
513 | d5a43964 | Alexander Graf | |
514 | 0d404541 | Richard Henderson | qemu_log_mask(CPU_LOG_INT, "%s: code=0x%x ilc=%d\n",
|
515 | 0d404541 | Richard Henderson | __func__, env->int_pgm_code, ilc); |
516 | d5a43964 | Alexander Graf | |
517 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
518 | d5a43964 | Alexander Graf | |
519 | d5a43964 | Alexander Graf | lowcore->pgm_ilc = cpu_to_be16(ilc); |
520 | d5a43964 | Alexander Graf | lowcore->pgm_code = cpu_to_be16(env->int_pgm_code); |
521 | d5a43964 | Alexander Graf | lowcore->program_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
522 | d5a43964 | Alexander Graf | lowcore->program_old_psw.addr = cpu_to_be64(env->psw.addr); |
523 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->program_new_psw.mask); |
524 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->program_new_psw.addr); |
525 | d5a43964 | Alexander Graf | |
526 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
527 | d5a43964 | Alexander Graf | |
528 | 71e47088 | Blue Swirl | DPRINTF("%s: %x %x %" PRIx64 " %" PRIx64 "\n", __func__, |
529 | d5a43964 | Alexander Graf | env->int_pgm_code, ilc, env->psw.mask, |
530 | d5a43964 | Alexander Graf | env->psw.addr); |
531 | d5a43964 | Alexander Graf | |
532 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
533 | d5a43964 | Alexander Graf | } |
534 | d5a43964 | Alexander Graf | |
535 | d5a43964 | Alexander Graf | #define VIRTIO_SUBCODE_64 0x0D00 |
536 | d5a43964 | Alexander Graf | |
537 | a4e3ad19 | Andreas Färber | static void do_ext_interrupt(CPUS390XState *env) |
538 | d5a43964 | Alexander Graf | { |
539 | d5a43964 | Alexander Graf | uint64_t mask, addr; |
540 | d5a43964 | Alexander Graf | LowCore *lowcore; |
541 | a8170e5e | Avi Kivity | hwaddr len = TARGET_PAGE_SIZE; |
542 | d5a43964 | Alexander Graf | ExtQueue *q; |
543 | d5a43964 | Alexander Graf | |
544 | d5a43964 | Alexander Graf | if (!(env->psw.mask & PSW_MASK_EXT)) {
|
545 | d5a43964 | Alexander Graf | cpu_abort(env, "Ext int w/o ext mask\n");
|
546 | d5a43964 | Alexander Graf | } |
547 | d5a43964 | Alexander Graf | |
548 | d5a43964 | Alexander Graf | if (env->ext_index < 0 || env->ext_index > MAX_EXT_QUEUE) { |
549 | d5a43964 | Alexander Graf | cpu_abort(env, "Ext queue overrun: %d\n", env->ext_index);
|
550 | d5a43964 | Alexander Graf | } |
551 | d5a43964 | Alexander Graf | |
552 | d5a43964 | Alexander Graf | q = &env->ext_queue[env->ext_index]; |
553 | d5a43964 | Alexander Graf | lowcore = cpu_physical_memory_map(env->psa, &len, 1);
|
554 | d5a43964 | Alexander Graf | |
555 | d5a43964 | Alexander Graf | lowcore->ext_int_code = cpu_to_be16(q->code); |
556 | d5a43964 | Alexander Graf | lowcore->ext_params = cpu_to_be32(q->param); |
557 | d5a43964 | Alexander Graf | lowcore->ext_params2 = cpu_to_be64(q->param64); |
558 | d5a43964 | Alexander Graf | lowcore->external_old_psw.mask = cpu_to_be64(get_psw_mask(env)); |
559 | d5a43964 | Alexander Graf | lowcore->external_old_psw.addr = cpu_to_be64(env->psw.addr); |
560 | d5a43964 | Alexander Graf | lowcore->cpu_addr = cpu_to_be16(env->cpu_num | VIRTIO_SUBCODE_64); |
561 | d5a43964 | Alexander Graf | mask = be64_to_cpu(lowcore->external_new_psw.mask); |
562 | d5a43964 | Alexander Graf | addr = be64_to_cpu(lowcore->external_new_psw.addr); |
563 | d5a43964 | Alexander Graf | |
564 | d5a43964 | Alexander Graf | cpu_physical_memory_unmap(lowcore, len, 1, len);
|
565 | d5a43964 | Alexander Graf | |
566 | d5a43964 | Alexander Graf | env->ext_index--; |
567 | d5a43964 | Alexander Graf | if (env->ext_index == -1) { |
568 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
569 | d5a43964 | Alexander Graf | } |
570 | d5a43964 | Alexander Graf | |
571 | 71e47088 | Blue Swirl | DPRINTF("%s: %" PRIx64 " %" PRIx64 "\n", __func__, |
572 | d5a43964 | Alexander Graf | env->psw.mask, env->psw.addr); |
573 | d5a43964 | Alexander Graf | |
574 | d5a43964 | Alexander Graf | load_psw(env, mask, addr); |
575 | d5a43964 | Alexander Graf | } |
576 | 3110e292 | Alexander Graf | |
577 | 71e47088 | Blue Swirl | void do_interrupt(CPUS390XState *env)
|
578 | 3110e292 | Alexander Graf | { |
579 | 0d404541 | Richard Henderson | qemu_log_mask(CPU_LOG_INT, "%s: %d at pc=%" PRIx64 "\n", |
580 | 0d404541 | Richard Henderson | __func__, env->exception_index, env->psw.addr); |
581 | d5a43964 | Alexander Graf | |
582 | ef81522b | Alexander Graf | s390_add_running_cpu(env); |
583 | d5a43964 | Alexander Graf | /* handle external interrupts */
|
584 | d5a43964 | Alexander Graf | if ((env->psw.mask & PSW_MASK_EXT) &&
|
585 | d5a43964 | Alexander Graf | env->exception_index == -1) {
|
586 | d5a43964 | Alexander Graf | if (env->pending_int & INTERRUPT_EXT) {
|
587 | d5a43964 | Alexander Graf | /* code is already in env */
|
588 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
589 | d5a43964 | Alexander Graf | } else if (env->pending_int & INTERRUPT_TOD) { |
590 | d5a43964 | Alexander Graf | cpu_inject_ext(env, 0x1004, 0, 0); |
591 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
592 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
593 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_TOD; |
594 | d5a43964 | Alexander Graf | } else if (env->pending_int & INTERRUPT_CPUTIMER) { |
595 | d5a43964 | Alexander Graf | cpu_inject_ext(env, 0x1005, 0, 0); |
596 | d5a43964 | Alexander Graf | env->exception_index = EXCP_EXT; |
597 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_EXT; |
598 | d5a43964 | Alexander Graf | env->pending_int &= ~INTERRUPT_TOD; |
599 | d5a43964 | Alexander Graf | } |
600 | d5a43964 | Alexander Graf | } |
601 | d5a43964 | Alexander Graf | |
602 | d5a43964 | Alexander Graf | switch (env->exception_index) {
|
603 | d5a43964 | Alexander Graf | case EXCP_PGM:
|
604 | d5a43964 | Alexander Graf | do_program_interrupt(env); |
605 | d5a43964 | Alexander Graf | break;
|
606 | d5a43964 | Alexander Graf | case EXCP_SVC:
|
607 | d5a43964 | Alexander Graf | do_svc_interrupt(env); |
608 | d5a43964 | Alexander Graf | break;
|
609 | d5a43964 | Alexander Graf | case EXCP_EXT:
|
610 | d5a43964 | Alexander Graf | do_ext_interrupt(env); |
611 | d5a43964 | Alexander Graf | break;
|
612 | d5a43964 | Alexander Graf | } |
613 | d5a43964 | Alexander Graf | env->exception_index = -1;
|
614 | d5a43964 | Alexander Graf | |
615 | d5a43964 | Alexander Graf | if (!env->pending_int) {
|
616 | d5a43964 | Alexander Graf | env->interrupt_request &= ~CPU_INTERRUPT_HARD; |
617 | d5a43964 | Alexander Graf | } |
618 | 3110e292 | Alexander Graf | } |
619 | d5a43964 | Alexander Graf | |
620 | d5a43964 | Alexander Graf | #endif /* CONFIG_USER_ONLY */ |