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root / target-arm @ 9c486ad6

Name Size
cpu.h 14.5 kB
exec.h 1.6 kB
helper.c 73.5 kB
helpers.h 15.9 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 34.6 kB
op_addsub.h 1.8 kB
op_helper.c 10.5 kB
translate.c 314 kB

Latest revisions

# Date Author Comment
9c486ad6 12/27/2010 10:21 pm Mattias Holm

target-arm: correct cp15 c1_sys reset value for cortex-a8

Signed-off-by: Juha Riihimäki <>
Signed-off-by: Aurelien Jarno <>
c0034328 12/27/2010 10:21 pm Juha Riihimäki

target-arm: fix vmsav6 access control

Override access control checks (including execute) for mmu translation
table descriptors assigned to manager domains.

Signed-off-by: Juha Riihimäki <>
Signed-off-by: Aurelien Jarno <>
a5d88f3e 12/27/2010 10:07 pm Peter Maydell

target-arm: Correct result in saturating cases for VQSHL of s8/16/32

Where VQSHL of a signed 8/16/32 bit value saturated, the result
value was not being calculated correctly (it should be either
the minimum or maximum value for the size of the signed type)....
620d791e 12/27/2010 10:07 pm Juha Riihimäki

target-arm: remove pointless else clause in VQSHL of u64

Remove a pointless else clause in the neon_qshl_u64 helper.

Signed-off-by: Juha Riihimäki <>
Reviewed-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
eb7a3d79 12/27/2010 10:07 pm Peter Maydell

target-arm: Fix VQSHL of signed 64 bit values by shift counts >= 64

VQSHL of a signed 64 bit non-zero value by a shift count >= 64 should
saturate; return the correct value in this case.

Signed-off-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
4c9b70ae 12/27/2010 10:07 pm Juha Riihimäki

target-arm: Fix VQSHL of signed 64 bit values

Add a missing '-' which meant that we were misinterpreting the shift
argument for VQSHL of 64 bit signed values and treating almost every
shift value as if it were an extremely large right shift.

Signed-off-by: Juha Riihimäki <>...
def126ce 12/27/2010 10:06 pm Juha Riihimäki

target-arm: Fix arguments passed to VQSHL helpers

Correct the arguments passed when generating neon qshl_{u,s}64()
helpers so that we use the correct registers.

Signed-off-by: Juha Riihimäki <>
Reviewed-by: Peter Maydell <>...
1a855029 12/27/2010 08:56 pm Aurelien Jarno

target-arm: fix bug in translation of REVSH

The translation of REVSH shifted the low byte 8 steps left before performing
an 8-bit sign extend, causing this part of the expression to alwas be 0.

Reported-by: Johan Bengtsson <>
Signed-off-by: Aurelien Jarno <>
26a5e69a 12/07/2010 05:37 pm Peter Maydell

ARM: Ignore top 16 bits when doing VCVT from 16 bit fixed point

VCVT of 16 bit fixed point to float should ignore the top 16 bits
of the source register. Cast to int16_t and friends rather than
int16 -- the former is guaranteed exactly 16 bits wide where the...
72f24d15 12/07/2010 05:37 pm Peter Maydell

ARM: Implement VCVT to 16 bit integer using new softfloat routines

Use the softfloat conversion routines for conversion to 16 bit
integers, because just casting to a 16 bit type truncates the
value rather than saturating it at 16-bit MAXINT/MININT.

Signed-off-by: Peter Maydell <>...

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