mips: Default to using one VPE and one TC.
Boards can override the setup if needed.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
mips: Initialize MT state at reset
Only TC0 on VPE0 is active after reset. All other VPEs andTCs start in sleep.
mips: Handle TC indexing of other VPEs
Introduce mips_cpu_map_tc() to map a global TC index into a VPE nrand local tc index.
mips: Synchronize CP0 TCSTatus, Status and EntryHi
These registers share some of their fields. Writes to these fieldsshould be visible through the corresponding mirror fields.
mips: Hook in more reg accesses via mttr/mftr
mips: Correct IntCtl write mask for VInt
mips: Correct VInt vector generation
1. The pending need to pass the Status IM gating.2. The priority is from seven (highest prio) down to zero. QEMU was doing the opposite.
mips: Enable VInt interrupt mode for the 34Kf
apb_pci: convert PCI space to memory API
Add a new memory space for PCI instead of using system memory.
This also fixes a bug where VGA region vga.chain4 isaccidentally mapped to 0xa0000 instead of 0x1ff000a0000.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
fw_cfg: fix crash if FW_CFG_WRITE_CHANNEL is used incorrectly
Avoid a crash if the guest combines FW_CFG_WRITE_CHANNEL witha wrong value.
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