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Name Size
cpu.h 16.6 kB
exec.h 1.6 kB
helper.c 74.6 kB
helpers.h 16.1 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 35.8 kB
op_addsub.h 1.8 kB
op_helper.c 10.5 kB
translate.c 314.8 kB

Latest revisions

# Date Author Comment
9ea62f57 01/14/2011 09:39 pm Peter Maydell

target-arm: Fix implementation of VRSQRTS

The implementation of the ARM VRSQRTS instruction (which calculates
(3 - op1 * op2) / 2) was missing the division operation. It also
did not handle the special cases of (0,inf) and (inf,0).

Signed-off-by: Peter Maydell <>...
3a492f3a 01/14/2011 09:39 pm Peter Maydell

target-arm: Add support for 'Standard FPSCR Value' as used by Neon

Add support to the ARM helper routines for a second fp_status value
which should be used for operations which the ARM ARM indicates use
"ARM standard floating-point arithmetic" rather than being controlled...
71826966 01/14/2011 09:39 pm Peter Maydell

target-arm: Use the standard FPSCR value for VRSQRTS

VSQRTS always uses the standard FPSCR value as it is a Neon instruction.

Signed-off-by: Peter Maydell <>
Reviewed-by: Aurelien Jarno <>
Signed-off-by: Aurelien Jarno <>
39ea3d4e 01/14/2011 09:39 pm Peter Maydell

target-arm: Don't generate code specific to current CPU mode for SRS

When translating the SRS instruction, handle the "store registers
to stack of current mode" case in the helper function rather than
inline. This means the generated code does not make assumptions...
a1705768 01/14/2011 09:39 pm Peter Maydell

target-arm: Add symbolic constants for bitfields in TB flags

Add symbolic constants for the bitfields we use in the TB flags.

Signed-off-by: Peter Maydell <>
Reviewed-by: Aurelien Jarno <>
Signed-off-by: Aurelien Jarno <>
4ca4502c 01/12/2011 01:06 am Juha Riihimäki

ARM: add neon helpers for VQSHLU

Add neon helper functions to implement VQSHLU, which is a
signed-to-unsigned version of VQSHL available only as an
immediate form.

Signed-off-by: Juha Riihimäki <>
Reviewed-by: Aurelien Jarno <>...
0322b26e 01/12/2011 01:06 am Peter Maydell

ARM: Fix decoding of VQSHL/VQSHLU immediate forms

Fix errors in the decoding of ARM VQSHL/VQSHLU immediate forms,
including using the new VQSHLU helper functions where appropriate.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Peter Maydell <>...
b12c390b 01/06/2011 11:16 pm Peter Maydell

target-arm: Set softfloat cumulative exc flags from correct FPSCR bits

When handling a write to the ARM FPSCR, set the softfloat cumulative
exception flags from the cumulative flags in the FPSCR, not the
exception-enable bits. Also don't apply a mask: vfp_exceptbits_to_host...
cecd8504 01/06/2011 11:16 pm Peter Maydell

target-arm: wire up the softfloat flush_input_to_zero flag

Wire up the new softfloat support for flushing input denormals
to zero on ARM. The FPSCR FZ bit enables flush-to-zero for
both inputs and outputs, but the reporting of when inputs are
flushed to zero is via a separate IDC bit rather than the UFC...
838fa72d 01/06/2011 11:16 pm Aurelien Jarno

target-arm: fix SMMLA/SMMLS instructions

SMMLA and SMMLS are broken on both in normal and thumb mode, that is
both (different) implementations are wrong. They try to avoid a 64-bit
add for the rounding, which is not trivial if you want to support both
SMMLA and SMMLS with the same code....

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