root / hw / lsi53c895a.c @ a1bc20df
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1 | 5fafdf24 | ths | /*
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2 | 7d8406be | pbrook | * QEMU LSI53C895A SCSI Host Bus Adapter emulation
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3 | 7d8406be | pbrook | *
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4 | 7d8406be | pbrook | * Copyright (c) 2006 CodeSourcery.
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5 | 7d8406be | pbrook | * Written by Paul Brook
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6 | 7d8406be | pbrook | *
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7 | 8e31bf38 | Matthew Fernandez | * This code is licensed under the LGPL.
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8 | 7d8406be | pbrook | */
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9 | 7d8406be | pbrook | |
10 | 7d8406be | pbrook | /* ??? Need to check if the {read,write}[wl] routines work properly on
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11 | 7d8406be | pbrook | big-endian targets. */
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12 | 7d8406be | pbrook | |
13 | a15fdf86 | Laszlo Ast | #include <assert.h> |
14 | 777aec7a | Nolan | |
15 | 87ecb68b | pbrook | #include "hw.h" |
16 | 87ecb68b | pbrook | #include "pci.h" |
17 | 43b443b6 | Gerd Hoffmann | #include "scsi.h" |
18 | 9ba4524c | Eduard - Gabriel Munteanu | #include "dma.h" |
19 | 7d8406be | pbrook | |
20 | 7d8406be | pbrook | //#define DEBUG_LSI
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21 | 7d8406be | pbrook | //#define DEBUG_LSI_REG
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22 | 7d8406be | pbrook | |
23 | 7d8406be | pbrook | #ifdef DEBUG_LSI
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24 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) \
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25 | 001faf32 | Blue Swirl | do { printf("lsi_scsi: " fmt , ## __VA_ARGS__); } while (0) |
26 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
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27 | 001faf32 | Blue Swirl | do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__); exit(1);} while (0) |
28 | 7d8406be | pbrook | #else
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29 | 001faf32 | Blue Swirl | #define DPRINTF(fmt, ...) do {} while(0) |
30 | 001faf32 | Blue Swirl | #define BADF(fmt, ...) \
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31 | 001faf32 | Blue Swirl | do { fprintf(stderr, "lsi_scsi: error: " fmt , ## __VA_ARGS__);} while (0) |
32 | 7d8406be | pbrook | #endif
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33 | 7d8406be | pbrook | |
34 | 18e08a55 | Michael S. Tsirkin | #define LSI_MAX_DEVS 7 |
35 | 18e08a55 | Michael S. Tsirkin | |
36 | 7d8406be | pbrook | #define LSI_SCNTL0_TRG 0x01 |
37 | 7d8406be | pbrook | #define LSI_SCNTL0_AAP 0x02 |
38 | 7d8406be | pbrook | #define LSI_SCNTL0_EPC 0x08 |
39 | 7d8406be | pbrook | #define LSI_SCNTL0_WATN 0x10 |
40 | 7d8406be | pbrook | #define LSI_SCNTL0_START 0x20 |
41 | 7d8406be | pbrook | |
42 | 7d8406be | pbrook | #define LSI_SCNTL1_SST 0x01 |
43 | 7d8406be | pbrook | #define LSI_SCNTL1_IARB 0x02 |
44 | 7d8406be | pbrook | #define LSI_SCNTL1_AESP 0x04 |
45 | 7d8406be | pbrook | #define LSI_SCNTL1_RST 0x08 |
46 | 7d8406be | pbrook | #define LSI_SCNTL1_CON 0x10 |
47 | 7d8406be | pbrook | #define LSI_SCNTL1_DHP 0x20 |
48 | 7d8406be | pbrook | #define LSI_SCNTL1_ADB 0x40 |
49 | 7d8406be | pbrook | #define LSI_SCNTL1_EXC 0x80 |
50 | 7d8406be | pbrook | |
51 | 7d8406be | pbrook | #define LSI_SCNTL2_WSR 0x01 |
52 | 7d8406be | pbrook | #define LSI_SCNTL2_VUE0 0x02 |
53 | 7d8406be | pbrook | #define LSI_SCNTL2_VUE1 0x04 |
54 | 7d8406be | pbrook | #define LSI_SCNTL2_WSS 0x08 |
55 | 7d8406be | pbrook | #define LSI_SCNTL2_SLPHBEN 0x10 |
56 | 7d8406be | pbrook | #define LSI_SCNTL2_SLPMD 0x20 |
57 | 7d8406be | pbrook | #define LSI_SCNTL2_CHM 0x40 |
58 | 7d8406be | pbrook | #define LSI_SCNTL2_SDU 0x80 |
59 | 7d8406be | pbrook | |
60 | 7d8406be | pbrook | #define LSI_ISTAT0_DIP 0x01 |
61 | 7d8406be | pbrook | #define LSI_ISTAT0_SIP 0x02 |
62 | 7d8406be | pbrook | #define LSI_ISTAT0_INTF 0x04 |
63 | 7d8406be | pbrook | #define LSI_ISTAT0_CON 0x08 |
64 | 7d8406be | pbrook | #define LSI_ISTAT0_SEM 0x10 |
65 | 7d8406be | pbrook | #define LSI_ISTAT0_SIGP 0x20 |
66 | 7d8406be | pbrook | #define LSI_ISTAT0_SRST 0x40 |
67 | 7d8406be | pbrook | #define LSI_ISTAT0_ABRT 0x80 |
68 | 7d8406be | pbrook | |
69 | 7d8406be | pbrook | #define LSI_ISTAT1_SI 0x01 |
70 | 7d8406be | pbrook | #define LSI_ISTAT1_SRUN 0x02 |
71 | 7d8406be | pbrook | #define LSI_ISTAT1_FLSH 0x04 |
72 | 7d8406be | pbrook | |
73 | 7d8406be | pbrook | #define LSI_SSTAT0_SDP0 0x01 |
74 | 7d8406be | pbrook | #define LSI_SSTAT0_RST 0x02 |
75 | 7d8406be | pbrook | #define LSI_SSTAT0_WOA 0x04 |
76 | 7d8406be | pbrook | #define LSI_SSTAT0_LOA 0x08 |
77 | 7d8406be | pbrook | #define LSI_SSTAT0_AIP 0x10 |
78 | 7d8406be | pbrook | #define LSI_SSTAT0_OLF 0x20 |
79 | 7d8406be | pbrook | #define LSI_SSTAT0_ORF 0x40 |
80 | 7d8406be | pbrook | #define LSI_SSTAT0_ILF 0x80 |
81 | 7d8406be | pbrook | |
82 | 7d8406be | pbrook | #define LSI_SIST0_PAR 0x01 |
83 | 7d8406be | pbrook | #define LSI_SIST0_RST 0x02 |
84 | 7d8406be | pbrook | #define LSI_SIST0_UDC 0x04 |
85 | 7d8406be | pbrook | #define LSI_SIST0_SGE 0x08 |
86 | 7d8406be | pbrook | #define LSI_SIST0_RSL 0x10 |
87 | 7d8406be | pbrook | #define LSI_SIST0_SEL 0x20 |
88 | 7d8406be | pbrook | #define LSI_SIST0_CMP 0x40 |
89 | 7d8406be | pbrook | #define LSI_SIST0_MA 0x80 |
90 | 7d8406be | pbrook | |
91 | 7d8406be | pbrook | #define LSI_SIST1_HTH 0x01 |
92 | 7d8406be | pbrook | #define LSI_SIST1_GEN 0x02 |
93 | 7d8406be | pbrook | #define LSI_SIST1_STO 0x04 |
94 | 7d8406be | pbrook | #define LSI_SIST1_SBMC 0x10 |
95 | 7d8406be | pbrook | |
96 | 7d8406be | pbrook | #define LSI_SOCL_IO 0x01 |
97 | 7d8406be | pbrook | #define LSI_SOCL_CD 0x02 |
98 | 7d8406be | pbrook | #define LSI_SOCL_MSG 0x04 |
99 | 7d8406be | pbrook | #define LSI_SOCL_ATN 0x08 |
100 | 7d8406be | pbrook | #define LSI_SOCL_SEL 0x10 |
101 | 7d8406be | pbrook | #define LSI_SOCL_BSY 0x20 |
102 | 7d8406be | pbrook | #define LSI_SOCL_ACK 0x40 |
103 | 7d8406be | pbrook | #define LSI_SOCL_REQ 0x80 |
104 | 7d8406be | pbrook | |
105 | 7d8406be | pbrook | #define LSI_DSTAT_IID 0x01 |
106 | 7d8406be | pbrook | #define LSI_DSTAT_SIR 0x04 |
107 | 7d8406be | pbrook | #define LSI_DSTAT_SSI 0x08 |
108 | 7d8406be | pbrook | #define LSI_DSTAT_ABRT 0x10 |
109 | 7d8406be | pbrook | #define LSI_DSTAT_BF 0x20 |
110 | 7d8406be | pbrook | #define LSI_DSTAT_MDPE 0x40 |
111 | 7d8406be | pbrook | #define LSI_DSTAT_DFE 0x80 |
112 | 7d8406be | pbrook | |
113 | 7d8406be | pbrook | #define LSI_DCNTL_COM 0x01 |
114 | 7d8406be | pbrook | #define LSI_DCNTL_IRQD 0x02 |
115 | 7d8406be | pbrook | #define LSI_DCNTL_STD 0x04 |
116 | 7d8406be | pbrook | #define LSI_DCNTL_IRQM 0x08 |
117 | 7d8406be | pbrook | #define LSI_DCNTL_SSM 0x10 |
118 | 7d8406be | pbrook | #define LSI_DCNTL_PFEN 0x20 |
119 | 7d8406be | pbrook | #define LSI_DCNTL_PFF 0x40 |
120 | 7d8406be | pbrook | #define LSI_DCNTL_CLSE 0x80 |
121 | 7d8406be | pbrook | |
122 | 7d8406be | pbrook | #define LSI_DMODE_MAN 0x01 |
123 | 7d8406be | pbrook | #define LSI_DMODE_BOF 0x02 |
124 | 7d8406be | pbrook | #define LSI_DMODE_ERMP 0x04 |
125 | 7d8406be | pbrook | #define LSI_DMODE_ERL 0x08 |
126 | 7d8406be | pbrook | #define LSI_DMODE_DIOM 0x10 |
127 | 7d8406be | pbrook | #define LSI_DMODE_SIOM 0x20 |
128 | 7d8406be | pbrook | |
129 | 7d8406be | pbrook | #define LSI_CTEST2_DACK 0x01 |
130 | 7d8406be | pbrook | #define LSI_CTEST2_DREQ 0x02 |
131 | 7d8406be | pbrook | #define LSI_CTEST2_TEOP 0x04 |
132 | 7d8406be | pbrook | #define LSI_CTEST2_PCICIE 0x08 |
133 | 7d8406be | pbrook | #define LSI_CTEST2_CM 0x10 |
134 | 7d8406be | pbrook | #define LSI_CTEST2_CIO 0x20 |
135 | 7d8406be | pbrook | #define LSI_CTEST2_SIGP 0x40 |
136 | 7d8406be | pbrook | #define LSI_CTEST2_DDIR 0x80 |
137 | 7d8406be | pbrook | |
138 | 7d8406be | pbrook | #define LSI_CTEST5_BL2 0x04 |
139 | 7d8406be | pbrook | #define LSI_CTEST5_DDIR 0x08 |
140 | 7d8406be | pbrook | #define LSI_CTEST5_MASR 0x10 |
141 | 7d8406be | pbrook | #define LSI_CTEST5_DFSN 0x20 |
142 | 7d8406be | pbrook | #define LSI_CTEST5_BBCK 0x40 |
143 | 7d8406be | pbrook | #define LSI_CTEST5_ADCK 0x80 |
144 | 7d8406be | pbrook | |
145 | 7d8406be | pbrook | #define LSI_CCNTL0_DILS 0x01 |
146 | 7d8406be | pbrook | #define LSI_CCNTL0_DISFC 0x10 |
147 | 7d8406be | pbrook | #define LSI_CCNTL0_ENNDJ 0x20 |
148 | 7d8406be | pbrook | #define LSI_CCNTL0_PMJCTL 0x40 |
149 | 7d8406be | pbrook | #define LSI_CCNTL0_ENPMJ 0x80 |
150 | 7d8406be | pbrook | |
151 | b25cf589 | aliguori | #define LSI_CCNTL1_EN64DBMV 0x01 |
152 | b25cf589 | aliguori | #define LSI_CCNTL1_EN64TIBMV 0x02 |
153 | b25cf589 | aliguori | #define LSI_CCNTL1_64TIMOD 0x04 |
154 | b25cf589 | aliguori | #define LSI_CCNTL1_DDAC 0x08 |
155 | b25cf589 | aliguori | #define LSI_CCNTL1_ZMOD 0x80 |
156 | b25cf589 | aliguori | |
157 | e560125e | Laszlo Ast | /* Enable Response to Reselection */
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158 | e560125e | Laszlo Ast | #define LSI_SCID_RRE 0x60 |
159 | e560125e | Laszlo Ast | |
160 | b25cf589 | aliguori | #define LSI_CCNTL1_40BIT (LSI_CCNTL1_EN64TIBMV|LSI_CCNTL1_64TIMOD)
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161 | b25cf589 | aliguori | |
162 | 7d8406be | pbrook | #define PHASE_DO 0 |
163 | 7d8406be | pbrook | #define PHASE_DI 1 |
164 | 7d8406be | pbrook | #define PHASE_CMD 2 |
165 | 7d8406be | pbrook | #define PHASE_ST 3 |
166 | 7d8406be | pbrook | #define PHASE_MO 6 |
167 | 7d8406be | pbrook | #define PHASE_MI 7 |
168 | 7d8406be | pbrook | #define PHASE_MASK 7 |
169 | 7d8406be | pbrook | |
170 | a917d384 | pbrook | /* Maximum length of MSG IN data. */
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171 | a917d384 | pbrook | #define LSI_MAX_MSGIN_LEN 8 |
172 | a917d384 | pbrook | |
173 | a917d384 | pbrook | /* Flag set if this is a tagged command. */
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174 | a917d384 | pbrook | #define LSI_TAG_VALID (1 << 16) |
175 | a917d384 | pbrook | |
176 | 042ec49d | Gerd Hoffmann | typedef struct lsi_request { |
177 | 5c6c0e51 | Hannes Reinecke | SCSIRequest *req; |
178 | a917d384 | pbrook | uint32_t tag; |
179 | b96a0da0 | Gerd Hoffmann | uint32_t dma_len; |
180 | b96a0da0 | Gerd Hoffmann | uint8_t *dma_buf; |
181 | a917d384 | pbrook | uint32_t pending; |
182 | a917d384 | pbrook | int out;
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183 | 042ec49d | Gerd Hoffmann | QTAILQ_ENTRY(lsi_request) next; |
184 | 042ec49d | Gerd Hoffmann | } lsi_request; |
185 | 4d611c9a | pbrook | |
186 | 7d8406be | pbrook | typedef struct { |
187 | f305261f | Juan Quintela | PCIDevice dev; |
188 | b0ce84e5 | Avi Kivity | MemoryRegion mmio_io; |
189 | b0ce84e5 | Avi Kivity | MemoryRegion ram_io; |
190 | b0ce84e5 | Avi Kivity | MemoryRegion io_io; |
191 | 7d8406be | pbrook | |
192 | 7d8406be | pbrook | int carry; /* ??? Should this be an a visible register somewhere? */ |
193 | 2f172849 | Hannes Reinecke | int status;
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194 | a917d384 | pbrook | /* Action to take at the end of a MSG IN phase.
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195 | a15fdf86 | Laszlo Ast | 0 = COMMAND, 1 = disconnect, 2 = DATA OUT, 3 = DATA IN. */
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196 | a917d384 | pbrook | int msg_action;
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197 | a917d384 | pbrook | int msg_len;
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198 | a917d384 | pbrook | uint8_t msg[LSI_MAX_MSGIN_LEN]; |
199 | 4d611c9a | pbrook | /* 0 if SCRIPTS are running or stopped.
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200 | 4d611c9a | pbrook | * 1 if a Wait Reselect instruction has been issued.
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201 | a917d384 | pbrook | * 2 if processing DMA from lsi_execute_script.
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202 | a917d384 | pbrook | * 3 if a DMA operation is in progress. */
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203 | 7d8406be | pbrook | int waiting;
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204 | ca9c39fa | Gerd Hoffmann | SCSIBus bus; |
205 | 7d8406be | pbrook | int current_lun;
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206 | a917d384 | pbrook | /* The tag is a combination of the device ID and the SCSI tag. */
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207 | af12ac98 | Gerd Hoffmann | uint32_t select_tag; |
208 | 8ccc2ace | ths | int command_complete;
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209 | 042ec49d | Gerd Hoffmann | QTAILQ_HEAD(, lsi_request) queue; |
210 | af12ac98 | Gerd Hoffmann | lsi_request *current; |
211 | 7d8406be | pbrook | |
212 | 7d8406be | pbrook | uint32_t dsa; |
213 | 7d8406be | pbrook | uint32_t temp; |
214 | 7d8406be | pbrook | uint32_t dnad; |
215 | 7d8406be | pbrook | uint32_t dbc; |
216 | 7d8406be | pbrook | uint8_t istat0; |
217 | 7d8406be | pbrook | uint8_t istat1; |
218 | 7d8406be | pbrook | uint8_t dcmd; |
219 | 7d8406be | pbrook | uint8_t dstat; |
220 | 7d8406be | pbrook | uint8_t dien; |
221 | 7d8406be | pbrook | uint8_t sist0; |
222 | 7d8406be | pbrook | uint8_t sist1; |
223 | 7d8406be | pbrook | uint8_t sien0; |
224 | 7d8406be | pbrook | uint8_t sien1; |
225 | 7d8406be | pbrook | uint8_t mbox0; |
226 | 7d8406be | pbrook | uint8_t mbox1; |
227 | 7d8406be | pbrook | uint8_t dfifo; |
228 | 9167a69a | balrog | uint8_t ctest2; |
229 | 7d8406be | pbrook | uint8_t ctest3; |
230 | 7d8406be | pbrook | uint8_t ctest4; |
231 | 7d8406be | pbrook | uint8_t ctest5; |
232 | 7d8406be | pbrook | uint8_t ccntl0; |
233 | 7d8406be | pbrook | uint8_t ccntl1; |
234 | 7d8406be | pbrook | uint32_t dsp; |
235 | 7d8406be | pbrook | uint32_t dsps; |
236 | 7d8406be | pbrook | uint8_t dmode; |
237 | 7d8406be | pbrook | uint8_t dcntl; |
238 | 7d8406be | pbrook | uint8_t scntl0; |
239 | 7d8406be | pbrook | uint8_t scntl1; |
240 | 7d8406be | pbrook | uint8_t scntl2; |
241 | 7d8406be | pbrook | uint8_t scntl3; |
242 | 7d8406be | pbrook | uint8_t sstat0; |
243 | 7d8406be | pbrook | uint8_t sstat1; |
244 | 7d8406be | pbrook | uint8_t scid; |
245 | 7d8406be | pbrook | uint8_t sxfer; |
246 | 7d8406be | pbrook | uint8_t socl; |
247 | 7d8406be | pbrook | uint8_t sdid; |
248 | a917d384 | pbrook | uint8_t ssid; |
249 | 7d8406be | pbrook | uint8_t sfbr; |
250 | 7d8406be | pbrook | uint8_t stest1; |
251 | 7d8406be | pbrook | uint8_t stest2; |
252 | 7d8406be | pbrook | uint8_t stest3; |
253 | a917d384 | pbrook | uint8_t sidl; |
254 | 7d8406be | pbrook | uint8_t stime0; |
255 | 7d8406be | pbrook | uint8_t respid0; |
256 | 7d8406be | pbrook | uint8_t respid1; |
257 | 7d8406be | pbrook | uint32_t mmrs; |
258 | 7d8406be | pbrook | uint32_t mmws; |
259 | 7d8406be | pbrook | uint32_t sfs; |
260 | 7d8406be | pbrook | uint32_t drs; |
261 | 7d8406be | pbrook | uint32_t sbms; |
262 | ab57d967 | aliguori | uint32_t dbms; |
263 | 7d8406be | pbrook | uint32_t dnad64; |
264 | 7d8406be | pbrook | uint32_t pmjad1; |
265 | 7d8406be | pbrook | uint32_t pmjad2; |
266 | 7d8406be | pbrook | uint32_t rbc; |
267 | 7d8406be | pbrook | uint32_t ua; |
268 | 7d8406be | pbrook | uint32_t ia; |
269 | 7d8406be | pbrook | uint32_t sbc; |
270 | 7d8406be | pbrook | uint32_t csbc; |
271 | dcfb9014 | ths | uint32_t scratch[18]; /* SCRATCHA-SCRATCHR */ |
272 | bd8ee11a | Sebastian Herbszt | uint8_t sbr; |
273 | 7d8406be | pbrook | |
274 | 7d8406be | pbrook | /* Script ram is stored as 32-bit words in host byteorder. */
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275 | 7d8406be | pbrook | uint32_t script_ram[2048];
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276 | 7d8406be | pbrook | } LSIState; |
277 | 7d8406be | pbrook | |
278 | e560125e | Laszlo Ast | static inline int lsi_irq_on_rsl(LSIState *s) |
279 | e560125e | Laszlo Ast | { |
280 | e560125e | Laszlo Ast | return (s->sien0 & LSI_SIST0_RSL) && (s->scid & LSI_SCID_RRE);
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281 | e560125e | Laszlo Ast | } |
282 | e560125e | Laszlo Ast | |
283 | 7d8406be | pbrook | static void lsi_soft_reset(LSIState *s) |
284 | 7d8406be | pbrook | { |
285 | 7d8406be | pbrook | DPRINTF("Reset\n");
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286 | 7d8406be | pbrook | s->carry = 0;
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287 | 7d8406be | pbrook | |
288 | d43ba0af | Jan Kiszka | s->msg_action = 0;
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289 | d43ba0af | Jan Kiszka | s->msg_len = 0;
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290 | 7d8406be | pbrook | s->waiting = 0;
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291 | 7d8406be | pbrook | s->dsa = 0;
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292 | 7d8406be | pbrook | s->dnad = 0;
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293 | 7d8406be | pbrook | s->dbc = 0;
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294 | 7d8406be | pbrook | s->temp = 0;
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295 | 7d8406be | pbrook | memset(s->scratch, 0, sizeof(s->scratch)); |
296 | 7d8406be | pbrook | s->istat0 = 0;
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297 | 7d8406be | pbrook | s->istat1 = 0;
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298 | 12aa6dd6 | Jan Kiszka | s->dcmd = 0x40;
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299 | 12aa6dd6 | Jan Kiszka | s->dstat = LSI_DSTAT_DFE; |
300 | 7d8406be | pbrook | s->dien = 0;
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301 | 7d8406be | pbrook | s->sist0 = 0;
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302 | 7d8406be | pbrook | s->sist1 = 0;
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303 | 7d8406be | pbrook | s->sien0 = 0;
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304 | 7d8406be | pbrook | s->sien1 = 0;
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305 | 7d8406be | pbrook | s->mbox0 = 0;
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306 | 7d8406be | pbrook | s->mbox1 = 0;
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307 | 7d8406be | pbrook | s->dfifo = 0;
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308 | 12aa6dd6 | Jan Kiszka | s->ctest2 = LSI_CTEST2_DACK; |
309 | 7d8406be | pbrook | s->ctest3 = 0;
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310 | 7d8406be | pbrook | s->ctest4 = 0;
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311 | 7d8406be | pbrook | s->ctest5 = 0;
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312 | 7d8406be | pbrook | s->ccntl0 = 0;
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313 | 7d8406be | pbrook | s->ccntl1 = 0;
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314 | 7d8406be | pbrook | s->dsp = 0;
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315 | 7d8406be | pbrook | s->dsps = 0;
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316 | 7d8406be | pbrook | s->dmode = 0;
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317 | 7d8406be | pbrook | s->dcntl = 0;
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318 | 7d8406be | pbrook | s->scntl0 = 0xc0;
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319 | 7d8406be | pbrook | s->scntl1 = 0;
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320 | 7d8406be | pbrook | s->scntl2 = 0;
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321 | 7d8406be | pbrook | s->scntl3 = 0;
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322 | 7d8406be | pbrook | s->sstat0 = 0;
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323 | 7d8406be | pbrook | s->sstat1 = 0;
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324 | 7d8406be | pbrook | s->scid = 7;
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325 | 7d8406be | pbrook | s->sxfer = 0;
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326 | 7d8406be | pbrook | s->socl = 0;
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327 | 12aa6dd6 | Jan Kiszka | s->sdid = 0;
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328 | 12aa6dd6 | Jan Kiszka | s->ssid = 0;
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329 | 7d8406be | pbrook | s->stest1 = 0;
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330 | 7d8406be | pbrook | s->stest2 = 0;
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331 | 7d8406be | pbrook | s->stest3 = 0;
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332 | a917d384 | pbrook | s->sidl = 0;
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333 | 7d8406be | pbrook | s->stime0 = 0;
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334 | 7d8406be | pbrook | s->respid0 = 0x80;
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335 | 7d8406be | pbrook | s->respid1 = 0;
|
336 | 7d8406be | pbrook | s->mmrs = 0;
|
337 | 7d8406be | pbrook | s->mmws = 0;
|
338 | 7d8406be | pbrook | s->sfs = 0;
|
339 | 7d8406be | pbrook | s->drs = 0;
|
340 | 7d8406be | pbrook | s->sbms = 0;
|
341 | ab57d967 | aliguori | s->dbms = 0;
|
342 | 7d8406be | pbrook | s->dnad64 = 0;
|
343 | 7d8406be | pbrook | s->pmjad1 = 0;
|
344 | 7d8406be | pbrook | s->pmjad2 = 0;
|
345 | 7d8406be | pbrook | s->rbc = 0;
|
346 | 7d8406be | pbrook | s->ua = 0;
|
347 | 7d8406be | pbrook | s->ia = 0;
|
348 | 7d8406be | pbrook | s->sbc = 0;
|
349 | 7d8406be | pbrook | s->csbc = 0;
|
350 | bd8ee11a | Sebastian Herbszt | s->sbr = 0;
|
351 | 2f0772c5 | Paolo Bonzini | assert(QTAILQ_EMPTY(&s->queue)); |
352 | 2f0772c5 | Paolo Bonzini | assert(!s->current); |
353 | 7d8406be | pbrook | } |
354 | 7d8406be | pbrook | |
355 | b25cf589 | aliguori | static int lsi_dma_40bit(LSIState *s) |
356 | b25cf589 | aliguori | { |
357 | b25cf589 | aliguori | if ((s->ccntl1 & LSI_CCNTL1_40BIT) == LSI_CCNTL1_40BIT)
|
358 | b25cf589 | aliguori | return 1; |
359 | b25cf589 | aliguori | return 0; |
360 | b25cf589 | aliguori | } |
361 | b25cf589 | aliguori | |
362 | dd8edf01 | aliguori | static int lsi_dma_ti64bit(LSIState *s) |
363 | dd8edf01 | aliguori | { |
364 | dd8edf01 | aliguori | if ((s->ccntl1 & LSI_CCNTL1_EN64TIBMV) == LSI_CCNTL1_EN64TIBMV)
|
365 | dd8edf01 | aliguori | return 1; |
366 | dd8edf01 | aliguori | return 0; |
367 | dd8edf01 | aliguori | } |
368 | dd8edf01 | aliguori | |
369 | dd8edf01 | aliguori | static int lsi_dma_64bit(LSIState *s) |
370 | dd8edf01 | aliguori | { |
371 | dd8edf01 | aliguori | if ((s->ccntl1 & LSI_CCNTL1_EN64DBMV) == LSI_CCNTL1_EN64DBMV)
|
372 | dd8edf01 | aliguori | return 1; |
373 | dd8edf01 | aliguori | return 0; |
374 | dd8edf01 | aliguori | } |
375 | dd8edf01 | aliguori | |
376 | 7d8406be | pbrook | static uint8_t lsi_reg_readb(LSIState *s, int offset); |
377 | 7d8406be | pbrook | static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val); |
378 | 4d611c9a | pbrook | static void lsi_execute_script(LSIState *s); |
379 | aa4d32c4 | Gerd Hoffmann | static void lsi_reselect(LSIState *s, lsi_request *p); |
380 | 7d8406be | pbrook | |
381 | 7d8406be | pbrook | static inline uint32_t read_dword(LSIState *s, uint32_t addr) |
382 | 7d8406be | pbrook | { |
383 | 7d8406be | pbrook | uint32_t buf; |
384 | 7d8406be | pbrook | |
385 | 9e486d67 | David Gibson | pci_dma_read(&s->dev, addr, &buf, 4);
|
386 | 7d8406be | pbrook | return cpu_to_le32(buf);
|
387 | 7d8406be | pbrook | } |
388 | 7d8406be | pbrook | |
389 | 7d8406be | pbrook | static void lsi_stop_script(LSIState *s) |
390 | 7d8406be | pbrook | { |
391 | 7d8406be | pbrook | s->istat1 &= ~LSI_ISTAT1_SRUN; |
392 | 7d8406be | pbrook | } |
393 | 7d8406be | pbrook | |
394 | 7d8406be | pbrook | static void lsi_update_irq(LSIState *s) |
395 | 7d8406be | pbrook | { |
396 | 7d8406be | pbrook | int level;
|
397 | 7d8406be | pbrook | static int last_level; |
398 | 042ec49d | Gerd Hoffmann | lsi_request *p; |
399 | 7d8406be | pbrook | |
400 | 7d8406be | pbrook | /* It's unclear whether the DIP/SIP bits should be cleared when the
|
401 | 7d8406be | pbrook | Interrupt Status Registers are cleared or when istat0 is read.
|
402 | 7d8406be | pbrook | We currently do the formwer, which seems to work. */
|
403 | 7d8406be | pbrook | level = 0;
|
404 | 7d8406be | pbrook | if (s->dstat) {
|
405 | 7d8406be | pbrook | if (s->dstat & s->dien)
|
406 | 7d8406be | pbrook | level = 1;
|
407 | 7d8406be | pbrook | s->istat0 |= LSI_ISTAT0_DIP; |
408 | 7d8406be | pbrook | } else {
|
409 | 7d8406be | pbrook | s->istat0 &= ~LSI_ISTAT0_DIP; |
410 | 7d8406be | pbrook | } |
411 | 7d8406be | pbrook | |
412 | 7d8406be | pbrook | if (s->sist0 || s->sist1) {
|
413 | 7d8406be | pbrook | if ((s->sist0 & s->sien0) || (s->sist1 & s->sien1))
|
414 | 7d8406be | pbrook | level = 1;
|
415 | 7d8406be | pbrook | s->istat0 |= LSI_ISTAT0_SIP; |
416 | 7d8406be | pbrook | } else {
|
417 | 7d8406be | pbrook | s->istat0 &= ~LSI_ISTAT0_SIP; |
418 | 7d8406be | pbrook | } |
419 | 7d8406be | pbrook | if (s->istat0 & LSI_ISTAT0_INTF)
|
420 | 7d8406be | pbrook | level = 1;
|
421 | 7d8406be | pbrook | |
422 | 7d8406be | pbrook | if (level != last_level) {
|
423 | 7d8406be | pbrook | DPRINTF("Update IRQ level %d dstat %02x sist %02x%02x\n",
|
424 | 7d8406be | pbrook | level, s->dstat, s->sist1, s->sist0); |
425 | 7d8406be | pbrook | last_level = level; |
426 | 7d8406be | pbrook | } |
427 | f305261f | Juan Quintela | qemu_set_irq(s->dev.irq[0], level);
|
428 | e560125e | Laszlo Ast | |
429 | e560125e | Laszlo Ast | if (!level && lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON)) {
|
430 | e560125e | Laszlo Ast | DPRINTF("Handled IRQs & disconnected, looking for pending "
|
431 | e560125e | Laszlo Ast | "processes\n");
|
432 | 042ec49d | Gerd Hoffmann | QTAILQ_FOREACH(p, &s->queue, next) { |
433 | 042ec49d | Gerd Hoffmann | if (p->pending) {
|
434 | aa4d32c4 | Gerd Hoffmann | lsi_reselect(s, p); |
435 | e560125e | Laszlo Ast | break;
|
436 | e560125e | Laszlo Ast | } |
437 | e560125e | Laszlo Ast | } |
438 | e560125e | Laszlo Ast | } |
439 | 7d8406be | pbrook | } |
440 | 7d8406be | pbrook | |
441 | 7d8406be | pbrook | /* Stop SCRIPTS execution and raise a SCSI interrupt. */
|
442 | 7d8406be | pbrook | static void lsi_script_scsi_interrupt(LSIState *s, int stat0, int stat1) |
443 | 7d8406be | pbrook | { |
444 | 7d8406be | pbrook | uint32_t mask0; |
445 | 7d8406be | pbrook | uint32_t mask1; |
446 | 7d8406be | pbrook | |
447 | 7d8406be | pbrook | DPRINTF("SCSI Interrupt 0x%02x%02x prev 0x%02x%02x\n",
|
448 | 7d8406be | pbrook | stat1, stat0, s->sist1, s->sist0); |
449 | 7d8406be | pbrook | s->sist0 |= stat0; |
450 | 7d8406be | pbrook | s->sist1 |= stat1; |
451 | 7d8406be | pbrook | /* Stop processor on fatal or unmasked interrupt. As a special hack
|
452 | 7d8406be | pbrook | we don't stop processing when raising STO. Instead continue
|
453 | 7d8406be | pbrook | execution and stop at the next insn that accesses the SCSI bus. */
|
454 | 7d8406be | pbrook | mask0 = s->sien0 | ~(LSI_SIST0_CMP | LSI_SIST0_SEL | LSI_SIST0_RSL); |
455 | 7d8406be | pbrook | mask1 = s->sien1 | ~(LSI_SIST1_GEN | LSI_SIST1_HTH); |
456 | 7d8406be | pbrook | mask1 &= ~LSI_SIST1_STO; |
457 | 7d8406be | pbrook | if (s->sist0 & mask0 || s->sist1 & mask1) {
|
458 | 7d8406be | pbrook | lsi_stop_script(s); |
459 | 7d8406be | pbrook | } |
460 | 7d8406be | pbrook | lsi_update_irq(s); |
461 | 7d8406be | pbrook | } |
462 | 7d8406be | pbrook | |
463 | 7d8406be | pbrook | /* Stop SCRIPTS execution and raise a DMA interrupt. */
|
464 | 7d8406be | pbrook | static void lsi_script_dma_interrupt(LSIState *s, int stat) |
465 | 7d8406be | pbrook | { |
466 | 7d8406be | pbrook | DPRINTF("DMA Interrupt 0x%x prev 0x%x\n", stat, s->dstat);
|
467 | 7d8406be | pbrook | s->dstat |= stat; |
468 | 7d8406be | pbrook | lsi_update_irq(s); |
469 | 7d8406be | pbrook | lsi_stop_script(s); |
470 | 7d8406be | pbrook | } |
471 | 7d8406be | pbrook | |
472 | 7d8406be | pbrook | static inline void lsi_set_phase(LSIState *s, int phase) |
473 | 7d8406be | pbrook | { |
474 | 7d8406be | pbrook | s->sstat1 = (s->sstat1 & ~PHASE_MASK) | phase; |
475 | 7d8406be | pbrook | } |
476 | 7d8406be | pbrook | |
477 | 7d8406be | pbrook | static void lsi_bad_phase(LSIState *s, int out, int new_phase) |
478 | 7d8406be | pbrook | { |
479 | 7d8406be | pbrook | /* Trigger a phase mismatch. */
|
480 | 7d8406be | pbrook | if (s->ccntl0 & LSI_CCNTL0_ENPMJ) {
|
481 | d1d74664 | Paolo Bonzini | if ((s->ccntl0 & LSI_CCNTL0_PMJCTL)) {
|
482 | d1d74664 | Paolo Bonzini | s->dsp = out ? s->pmjad1 : s->pmjad2; |
483 | 7d8406be | pbrook | } else {
|
484 | d1d74664 | Paolo Bonzini | s->dsp = (s->scntl2 & LSI_SCNTL2_WSR ? s->pmjad2 : s->pmjad1); |
485 | 7d8406be | pbrook | } |
486 | 7d8406be | pbrook | DPRINTF("Data phase mismatch jump to %08x\n", s->dsp);
|
487 | 7d8406be | pbrook | } else {
|
488 | 7d8406be | pbrook | DPRINTF("Phase mismatch interrupt\n");
|
489 | 7d8406be | pbrook | lsi_script_scsi_interrupt(s, LSI_SIST0_MA, 0);
|
490 | 7d8406be | pbrook | lsi_stop_script(s); |
491 | 7d8406be | pbrook | } |
492 | 7d8406be | pbrook | lsi_set_phase(s, new_phase); |
493 | 7d8406be | pbrook | } |
494 | 7d8406be | pbrook | |
495 | a917d384 | pbrook | |
496 | a917d384 | pbrook | /* Resume SCRIPTS execution after a DMA operation. */
|
497 | a917d384 | pbrook | static void lsi_resume_script(LSIState *s) |
498 | a917d384 | pbrook | { |
499 | a917d384 | pbrook | if (s->waiting != 2) { |
500 | a917d384 | pbrook | s->waiting = 0;
|
501 | a917d384 | pbrook | lsi_execute_script(s); |
502 | a917d384 | pbrook | } else {
|
503 | a917d384 | pbrook | s->waiting = 0;
|
504 | a917d384 | pbrook | } |
505 | a917d384 | pbrook | } |
506 | a917d384 | pbrook | |
507 | 64d56409 | Jan Kiszka | static void lsi_disconnect(LSIState *s) |
508 | 64d56409 | Jan Kiszka | { |
509 | 64d56409 | Jan Kiszka | s->scntl1 &= ~LSI_SCNTL1_CON; |
510 | 64d56409 | Jan Kiszka | s->sstat1 &= ~PHASE_MASK; |
511 | 64d56409 | Jan Kiszka | } |
512 | 64d56409 | Jan Kiszka | |
513 | 64d56409 | Jan Kiszka | static void lsi_bad_selection(LSIState *s, uint32_t id) |
514 | 64d56409 | Jan Kiszka | { |
515 | 64d56409 | Jan Kiszka | DPRINTF("Selected absent target %d\n", id);
|
516 | 64d56409 | Jan Kiszka | lsi_script_scsi_interrupt(s, 0, LSI_SIST1_STO);
|
517 | 64d56409 | Jan Kiszka | lsi_disconnect(s); |
518 | 64d56409 | Jan Kiszka | } |
519 | 64d56409 | Jan Kiszka | |
520 | 4d611c9a | pbrook | /* Initiate a SCSI layer data transfer. */
|
521 | 7d8406be | pbrook | static void lsi_do_dma(LSIState *s, int out) |
522 | 7d8406be | pbrook | { |
523 | f48a7a6e | Paolo Bonzini | uint32_t count; |
524 | 9ba4524c | Eduard - Gabriel Munteanu | dma_addr_t addr; |
525 | 64d56409 | Jan Kiszka | SCSIDevice *dev; |
526 | 7d8406be | pbrook | |
527 | b96a0da0 | Gerd Hoffmann | assert(s->current); |
528 | b96a0da0 | Gerd Hoffmann | if (!s->current->dma_len) {
|
529 | a917d384 | pbrook | /* Wait until data is available. */
|
530 | a917d384 | pbrook | DPRINTF("DMA no data available\n");
|
531 | a917d384 | pbrook | return;
|
532 | 7d8406be | pbrook | } |
533 | 7d8406be | pbrook | |
534 | f48a7a6e | Paolo Bonzini | dev = s->current->req->dev; |
535 | f48a7a6e | Paolo Bonzini | assert(dev); |
536 | 64d56409 | Jan Kiszka | |
537 | a917d384 | pbrook | count = s->dbc; |
538 | b96a0da0 | Gerd Hoffmann | if (count > s->current->dma_len)
|
539 | b96a0da0 | Gerd Hoffmann | count = s->current->dma_len; |
540 | a917d384 | pbrook | |
541 | a917d384 | pbrook | addr = s->dnad; |
542 | dd8edf01 | aliguori | /* both 40 and Table Indirect 64-bit DMAs store upper bits in dnad64 */
|
543 | dd8edf01 | aliguori | if (lsi_dma_40bit(s) || lsi_dma_ti64bit(s))
|
544 | b25cf589 | aliguori | addr |= ((uint64_t)s->dnad64 << 32);
|
545 | dd8edf01 | aliguori | else if (s->dbms) |
546 | dd8edf01 | aliguori | addr |= ((uint64_t)s->dbms << 32);
|
547 | b25cf589 | aliguori | else if (s->sbms) |
548 | b25cf589 | aliguori | addr |= ((uint64_t)s->sbms << 32);
|
549 | b25cf589 | aliguori | |
550 | 9ba4524c | Eduard - Gabriel Munteanu | DPRINTF("DMA addr=0x" DMA_ADDR_FMT " len=%d\n", addr, count); |
551 | 7d8406be | pbrook | s->csbc += count; |
552 | a917d384 | pbrook | s->dnad += count; |
553 | a917d384 | pbrook | s->dbc -= count; |
554 | 5c6c0e51 | Hannes Reinecke | if (s->current->dma_buf == NULL) { |
555 | 0c34459b | Paolo Bonzini | s->current->dma_buf = scsi_req_get_buf(s->current->req); |
556 | a917d384 | pbrook | } |
557 | 7d8406be | pbrook | /* ??? Set SFBR to first data byte. */
|
558 | a917d384 | pbrook | if (out) {
|
559 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_read(&s->dev, addr, s->current->dma_buf, count); |
560 | a917d384 | pbrook | } else {
|
561 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_write(&s->dev, addr, s->current->dma_buf, count); |
562 | a917d384 | pbrook | } |
563 | b96a0da0 | Gerd Hoffmann | s->current->dma_len -= count; |
564 | b96a0da0 | Gerd Hoffmann | if (s->current->dma_len == 0) { |
565 | b96a0da0 | Gerd Hoffmann | s->current->dma_buf = NULL;
|
566 | ad3376cc | Paolo Bonzini | scsi_req_continue(s->current->req); |
567 | a917d384 | pbrook | } else {
|
568 | b96a0da0 | Gerd Hoffmann | s->current->dma_buf += count; |
569 | a917d384 | pbrook | lsi_resume_script(s); |
570 | a917d384 | pbrook | } |
571 | a917d384 | pbrook | } |
572 | a917d384 | pbrook | |
573 | a917d384 | pbrook | |
574 | a917d384 | pbrook | /* Add a command to the queue. */
|
575 | a917d384 | pbrook | static void lsi_queue_command(LSIState *s) |
576 | a917d384 | pbrook | { |
577 | af12ac98 | Gerd Hoffmann | lsi_request *p = s->current; |
578 | a917d384 | pbrook | |
579 | aa2b1e89 | Bernhard Kohl | DPRINTF("Queueing tag=0x%x\n", p->tag);
|
580 | af12ac98 | Gerd Hoffmann | assert(s->current != NULL);
|
581 | b96a0da0 | Gerd Hoffmann | assert(s->current->dma_len == 0);
|
582 | af12ac98 | Gerd Hoffmann | QTAILQ_INSERT_TAIL(&s->queue, s->current, next); |
583 | af12ac98 | Gerd Hoffmann | s->current = NULL;
|
584 | af12ac98 | Gerd Hoffmann | |
585 | a917d384 | pbrook | p->pending = 0;
|
586 | a917d384 | pbrook | p->out = (s->sstat1 & PHASE_MASK) == PHASE_DO; |
587 | a917d384 | pbrook | } |
588 | a917d384 | pbrook | |
589 | a917d384 | pbrook | /* Queue a byte for a MSG IN phase. */
|
590 | a917d384 | pbrook | static void lsi_add_msg_byte(LSIState *s, uint8_t data) |
591 | a917d384 | pbrook | { |
592 | a917d384 | pbrook | if (s->msg_len >= LSI_MAX_MSGIN_LEN) {
|
593 | a917d384 | pbrook | BADF("MSG IN data too long\n");
|
594 | 4d611c9a | pbrook | } else {
|
595 | a917d384 | pbrook | DPRINTF("MSG IN 0x%02x\n", data);
|
596 | a917d384 | pbrook | s->msg[s->msg_len++] = data; |
597 | 7d8406be | pbrook | } |
598 | a917d384 | pbrook | } |
599 | a917d384 | pbrook | |
600 | a917d384 | pbrook | /* Perform reselection to continue a command. */
|
601 | aa4d32c4 | Gerd Hoffmann | static void lsi_reselect(LSIState *s, lsi_request *p) |
602 | a917d384 | pbrook | { |
603 | a917d384 | pbrook | int id;
|
604 | a917d384 | pbrook | |
605 | af12ac98 | Gerd Hoffmann | assert(s->current == NULL);
|
606 | af12ac98 | Gerd Hoffmann | QTAILQ_REMOVE(&s->queue, p, next); |
607 | af12ac98 | Gerd Hoffmann | s->current = p; |
608 | af12ac98 | Gerd Hoffmann | |
609 | aa4d32c4 | Gerd Hoffmann | id = (p->tag >> 8) & 0xf; |
610 | a917d384 | pbrook | s->ssid = id | 0x80;
|
611 | cc9f28bc | Laszlo Ast | /* LSI53C700 Family Compatibility, see LSI53C895A 4-73 */
|
612 | f6dc18df | Blue Swirl | if (!(s->dcntl & LSI_DCNTL_COM)) {
|
613 | cc9f28bc | Laszlo Ast | s->sfbr = 1 << (id & 0x7); |
614 | cc9f28bc | Laszlo Ast | } |
615 | a917d384 | pbrook | DPRINTF("Reselected target %d\n", id);
|
616 | a917d384 | pbrook | s->scntl1 |= LSI_SCNTL1_CON; |
617 | a917d384 | pbrook | lsi_set_phase(s, PHASE_MI); |
618 | a917d384 | pbrook | s->msg_action = p->out ? 2 : 3; |
619 | b96a0da0 | Gerd Hoffmann | s->current->dma_len = p->pending; |
620 | a917d384 | pbrook | lsi_add_msg_byte(s, 0x80);
|
621 | af12ac98 | Gerd Hoffmann | if (s->current->tag & LSI_TAG_VALID) {
|
622 | a917d384 | pbrook | lsi_add_msg_byte(s, 0x20);
|
623 | aa4d32c4 | Gerd Hoffmann | lsi_add_msg_byte(s, p->tag & 0xff);
|
624 | a917d384 | pbrook | } |
625 | a917d384 | pbrook | |
626 | e560125e | Laszlo Ast | if (lsi_irq_on_rsl(s)) {
|
627 | e560125e | Laszlo Ast | lsi_script_scsi_interrupt(s, LSI_SIST0_RSL, 0);
|
628 | e560125e | Laszlo Ast | } |
629 | a917d384 | pbrook | } |
630 | a917d384 | pbrook | |
631 | 11257187 | Paolo Bonzini | static lsi_request *lsi_find_by_tag(LSIState *s, uint32_t tag)
|
632 | a917d384 | pbrook | { |
633 | 042ec49d | Gerd Hoffmann | lsi_request *p; |
634 | 042ec49d | Gerd Hoffmann | |
635 | 042ec49d | Gerd Hoffmann | QTAILQ_FOREACH(p, &s->queue, next) { |
636 | a917d384 | pbrook | if (p->tag == tag) {
|
637 | 11257187 | Paolo Bonzini | return p;
|
638 | a917d384 | pbrook | } |
639 | a917d384 | pbrook | } |
640 | 11257187 | Paolo Bonzini | |
641 | 11257187 | Paolo Bonzini | return NULL; |
642 | 11257187 | Paolo Bonzini | } |
643 | 11257187 | Paolo Bonzini | |
644 | d2a9998f | Paolo Bonzini | static void lsi_request_free(LSIState *s, lsi_request *p) |
645 | d2a9998f | Paolo Bonzini | { |
646 | d2a9998f | Paolo Bonzini | if (p == s->current) {
|
647 | d2a9998f | Paolo Bonzini | s->current = NULL;
|
648 | d2a9998f | Paolo Bonzini | } else {
|
649 | d2a9998f | Paolo Bonzini | QTAILQ_REMOVE(&s->queue, p, next); |
650 | d2a9998f | Paolo Bonzini | } |
651 | d2a9998f | Paolo Bonzini | g_free(p); |
652 | d2a9998f | Paolo Bonzini | } |
653 | d2a9998f | Paolo Bonzini | |
654 | 94d3f98a | Paolo Bonzini | static void lsi_request_cancelled(SCSIRequest *req) |
655 | 94d3f98a | Paolo Bonzini | { |
656 | 94d3f98a | Paolo Bonzini | LSIState *s = DO_UPCAST(LSIState, dev.qdev, req->bus->qbus.parent); |
657 | c5bf71a9 | Hannes Reinecke | lsi_request *p = req->hba_private; |
658 | 94d3f98a | Paolo Bonzini | |
659 | d2a9998f | Paolo Bonzini | req->hba_private = NULL;
|
660 | d2a9998f | Paolo Bonzini | lsi_request_free(s, p); |
661 | d2a9998f | Paolo Bonzini | scsi_req_unref(req); |
662 | 94d3f98a | Paolo Bonzini | } |
663 | 94d3f98a | Paolo Bonzini | |
664 | 11257187 | Paolo Bonzini | /* Record that data is available for a queued command. Returns zero if
|
665 | 11257187 | Paolo Bonzini | the device was reselected, nonzero if the IO is deferred. */
|
666 | c5bf71a9 | Hannes Reinecke | static int lsi_queue_req(LSIState *s, SCSIRequest *req, uint32_t len) |
667 | 11257187 | Paolo Bonzini | { |
668 | c5bf71a9 | Hannes Reinecke | lsi_request *p = req->hba_private; |
669 | 11257187 | Paolo Bonzini | |
670 | 11257187 | Paolo Bonzini | if (p->pending) {
|
671 | c5bf71a9 | Hannes Reinecke | BADF("Multiple IO pending for request %p\n", p);
|
672 | 11257187 | Paolo Bonzini | } |
673 | aba1f023 | Paolo Bonzini | p->pending = len; |
674 | 11257187 | Paolo Bonzini | /* Reselect if waiting for it, or if reselection triggers an IRQ
|
675 | 11257187 | Paolo Bonzini | and the bus is free.
|
676 | 11257187 | Paolo Bonzini | Since no interrupt stacking is implemented in the emulation, it
|
677 | 11257187 | Paolo Bonzini | is also required that there are no pending interrupts waiting
|
678 | 11257187 | Paolo Bonzini | for service from the device driver. */
|
679 | 11257187 | Paolo Bonzini | if (s->waiting == 1 || |
680 | 11257187 | Paolo Bonzini | (lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON) && |
681 | 11257187 | Paolo Bonzini | !(s->istat0 & (LSI_ISTAT0_SIP | LSI_ISTAT0_DIP)))) { |
682 | 11257187 | Paolo Bonzini | /* Reselect device. */
|
683 | 11257187 | Paolo Bonzini | lsi_reselect(s, p); |
684 | 11257187 | Paolo Bonzini | return 0; |
685 | 11257187 | Paolo Bonzini | } else {
|
686 | 4789bc39 | Jan Kiszka | DPRINTF("Queueing IO tag=0x%x\n", p->tag);
|
687 | aba1f023 | Paolo Bonzini | p->pending = len; |
688 | 11257187 | Paolo Bonzini | return 1; |
689 | 11257187 | Paolo Bonzini | } |
690 | 7d8406be | pbrook | } |
691 | c6df7102 | Paolo Bonzini | |
692 | c6df7102 | Paolo Bonzini | /* Callback to indicate that the SCSI layer has completed a command. */
|
693 | 01e95455 | Paolo Bonzini | static void lsi_command_complete(SCSIRequest *req, uint32_t status, size_t resid) |
694 | 4d611c9a | pbrook | { |
695 | 5c6c0e51 | Hannes Reinecke | LSIState *s = DO_UPCAST(LSIState, dev.qdev, req->bus->qbus.parent); |
696 | 4d611c9a | pbrook | int out;
|
697 | 4d611c9a | pbrook | |
698 | a917d384 | pbrook | out = (s->sstat1 & PHASE_MASK) == PHASE_DO; |
699 | aba1f023 | Paolo Bonzini | DPRINTF("Command complete status=%d\n", (int)status); |
700 | aba1f023 | Paolo Bonzini | s->status = status; |
701 | c6df7102 | Paolo Bonzini | s->command_complete = 2;
|
702 | c6df7102 | Paolo Bonzini | if (s->waiting && s->dbc != 0) { |
703 | c6df7102 | Paolo Bonzini | /* Raise phase mismatch for short transfers. */
|
704 | c6df7102 | Paolo Bonzini | lsi_bad_phase(s, out, PHASE_ST); |
705 | c6df7102 | Paolo Bonzini | } else {
|
706 | c6df7102 | Paolo Bonzini | lsi_set_phase(s, PHASE_ST); |
707 | c6df7102 | Paolo Bonzini | } |
708 | af12ac98 | Gerd Hoffmann | |
709 | 8f6e699d | Paolo Bonzini | if (req->hba_private == s->current) {
|
710 | d2a9998f | Paolo Bonzini | req->hba_private = NULL;
|
711 | d2a9998f | Paolo Bonzini | lsi_request_free(s, s->current); |
712 | d2a9998f | Paolo Bonzini | scsi_req_unref(req); |
713 | 4d611c9a | pbrook | } |
714 | c6df7102 | Paolo Bonzini | lsi_resume_script(s); |
715 | c6df7102 | Paolo Bonzini | } |
716 | c6df7102 | Paolo Bonzini | |
717 | c6df7102 | Paolo Bonzini | /* Callback to indicate that the SCSI layer has completed a transfer. */
|
718 | aba1f023 | Paolo Bonzini | static void lsi_transfer_data(SCSIRequest *req, uint32_t len) |
719 | c6df7102 | Paolo Bonzini | { |
720 | c6df7102 | Paolo Bonzini | LSIState *s = DO_UPCAST(LSIState, dev.qdev, req->bus->qbus.parent); |
721 | c6df7102 | Paolo Bonzini | int out;
|
722 | 4d611c9a | pbrook | |
723 | 8f6e699d | Paolo Bonzini | assert(req->hba_private); |
724 | 8f6e699d | Paolo Bonzini | if (s->waiting == 1 || req->hba_private != s->current || |
725 | e560125e | Laszlo Ast | (lsi_irq_on_rsl(s) && !(s->scntl1 & LSI_SCNTL1_CON))) { |
726 | c5bf71a9 | Hannes Reinecke | if (lsi_queue_req(s, req, len)) {
|
727 | a917d384 | pbrook | return;
|
728 | 5c6c0e51 | Hannes Reinecke | } |
729 | a917d384 | pbrook | } |
730 | e560125e | Laszlo Ast | |
731 | c6df7102 | Paolo Bonzini | out = (s->sstat1 & PHASE_MASK) == PHASE_DO; |
732 | c6df7102 | Paolo Bonzini | |
733 | e560125e | Laszlo Ast | /* host adapter (re)connected */
|
734 | aba1f023 | Paolo Bonzini | DPRINTF("Data ready tag=0x%x len=%d\n", req->tag, len);
|
735 | aba1f023 | Paolo Bonzini | s->current->dma_len = len; |
736 | 8ccc2ace | ths | s->command_complete = 1;
|
737 | c6df7102 | Paolo Bonzini | if (s->waiting) {
|
738 | c6df7102 | Paolo Bonzini | if (s->waiting == 1 || s->dbc == 0) { |
739 | c6df7102 | Paolo Bonzini | lsi_resume_script(s); |
740 | c6df7102 | Paolo Bonzini | } else {
|
741 | c6df7102 | Paolo Bonzini | lsi_do_dma(s, out); |
742 | c6df7102 | Paolo Bonzini | } |
743 | 4d611c9a | pbrook | } |
744 | 4d611c9a | pbrook | } |
745 | 7d8406be | pbrook | |
746 | 7d8406be | pbrook | static void lsi_do_command(LSIState *s) |
747 | 7d8406be | pbrook | { |
748 | 64d56409 | Jan Kiszka | SCSIDevice *dev; |
749 | 7d8406be | pbrook | uint8_t buf[16];
|
750 | 64d56409 | Jan Kiszka | uint32_t id; |
751 | 7d8406be | pbrook | int n;
|
752 | 7d8406be | pbrook | |
753 | 7d8406be | pbrook | DPRINTF("Send command len=%d\n", s->dbc);
|
754 | 7d8406be | pbrook | if (s->dbc > 16) |
755 | 7d8406be | pbrook | s->dbc = 16;
|
756 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_read(&s->dev, s->dnad, buf, s->dbc); |
757 | 7d8406be | pbrook | s->sfbr = buf[0];
|
758 | 8ccc2ace | ths | s->command_complete = 0;
|
759 | af12ac98 | Gerd Hoffmann | |
760 | 259d5577 | Jan Kiszka | id = (s->select_tag >> 8) & 0xf; |
761 | 0d3545e7 | Paolo Bonzini | dev = scsi_device_find(&s->bus, 0, id, s->current_lun);
|
762 | 64d56409 | Jan Kiszka | if (!dev) {
|
763 | 64d56409 | Jan Kiszka | lsi_bad_selection(s, id); |
764 | 64d56409 | Jan Kiszka | return;
|
765 | 64d56409 | Jan Kiszka | } |
766 | 64d56409 | Jan Kiszka | |
767 | af12ac98 | Gerd Hoffmann | assert(s->current == NULL);
|
768 | 7267c094 | Anthony Liguori | s->current = g_malloc0(sizeof(lsi_request));
|
769 | af12ac98 | Gerd Hoffmann | s->current->tag = s->select_tag; |
770 | c39ce112 | Paolo Bonzini | s->current->req = scsi_req_new(dev, s->current->tag, s->current_lun, buf, |
771 | c5bf71a9 | Hannes Reinecke | s->current); |
772 | af12ac98 | Gerd Hoffmann | |
773 | c39ce112 | Paolo Bonzini | n = scsi_req_enqueue(s->current->req); |
774 | ad3376cc | Paolo Bonzini | if (n) {
|
775 | ad3376cc | Paolo Bonzini | if (n > 0) { |
776 | ad3376cc | Paolo Bonzini | lsi_set_phase(s, PHASE_DI); |
777 | ad3376cc | Paolo Bonzini | } else if (n < 0) { |
778 | ad3376cc | Paolo Bonzini | lsi_set_phase(s, PHASE_DO); |
779 | ad3376cc | Paolo Bonzini | } |
780 | ad3376cc | Paolo Bonzini | scsi_req_continue(s->current->req); |
781 | a917d384 | pbrook | } |
782 | 8ccc2ace | ths | if (!s->command_complete) {
|
783 | 8ccc2ace | ths | if (n) {
|
784 | 8ccc2ace | ths | /* Command did not complete immediately so disconnect. */
|
785 | 8ccc2ace | ths | lsi_add_msg_byte(s, 2); /* SAVE DATA POINTER */ |
786 | 8ccc2ace | ths | lsi_add_msg_byte(s, 4); /* DISCONNECT */ |
787 | 8ccc2ace | ths | /* wait data */
|
788 | 8ccc2ace | ths | lsi_set_phase(s, PHASE_MI); |
789 | 8ccc2ace | ths | s->msg_action = 1;
|
790 | 8ccc2ace | ths | lsi_queue_command(s); |
791 | 8ccc2ace | ths | } else {
|
792 | 8ccc2ace | ths | /* wait command complete */
|
793 | 8ccc2ace | ths | lsi_set_phase(s, PHASE_DI); |
794 | 8ccc2ace | ths | } |
795 | 7d8406be | pbrook | } |
796 | 7d8406be | pbrook | } |
797 | 7d8406be | pbrook | |
798 | 7d8406be | pbrook | static void lsi_do_status(LSIState *s) |
799 | 7d8406be | pbrook | { |
800 | 2f172849 | Hannes Reinecke | uint8_t status; |
801 | 2f172849 | Hannes Reinecke | DPRINTF("Get status len=%d status=%d\n", s->dbc, s->status);
|
802 | 7d8406be | pbrook | if (s->dbc != 1) |
803 | 7d8406be | pbrook | BADF("Bad Status move\n");
|
804 | 7d8406be | pbrook | s->dbc = 1;
|
805 | 2f172849 | Hannes Reinecke | status = s->status; |
806 | 2f172849 | Hannes Reinecke | s->sfbr = status; |
807 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_write(&s->dev, s->dnad, &status, 1);
|
808 | 7d8406be | pbrook | lsi_set_phase(s, PHASE_MI); |
809 | a917d384 | pbrook | s->msg_action = 1;
|
810 | a917d384 | pbrook | lsi_add_msg_byte(s, 0); /* COMMAND COMPLETE */ |
811 | 7d8406be | pbrook | } |
812 | 7d8406be | pbrook | |
813 | 7d8406be | pbrook | static void lsi_do_msgin(LSIState *s) |
814 | 7d8406be | pbrook | { |
815 | a917d384 | pbrook | int len;
|
816 | a917d384 | pbrook | DPRINTF("Message in len=%d/%d\n", s->dbc, s->msg_len);
|
817 | a917d384 | pbrook | s->sfbr = s->msg[0];
|
818 | a917d384 | pbrook | len = s->msg_len; |
819 | a917d384 | pbrook | if (len > s->dbc)
|
820 | a917d384 | pbrook | len = s->dbc; |
821 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_write(&s->dev, s->dnad, s->msg, len); |
822 | a917d384 | pbrook | /* Linux drivers rely on the last byte being in the SIDL. */
|
823 | a917d384 | pbrook | s->sidl = s->msg[len - 1];
|
824 | a917d384 | pbrook | s->msg_len -= len; |
825 | a917d384 | pbrook | if (s->msg_len) {
|
826 | a917d384 | pbrook | memmove(s->msg, s->msg + len, s->msg_len); |
827 | 7d8406be | pbrook | } else {
|
828 | 7d8406be | pbrook | /* ??? Check if ATN (not yet implemented) is asserted and maybe
|
829 | 7d8406be | pbrook | switch to PHASE_MO. */
|
830 | a917d384 | pbrook | switch (s->msg_action) {
|
831 | a917d384 | pbrook | case 0: |
832 | a917d384 | pbrook | lsi_set_phase(s, PHASE_CMD); |
833 | a917d384 | pbrook | break;
|
834 | a917d384 | pbrook | case 1: |
835 | a917d384 | pbrook | lsi_disconnect(s); |
836 | a917d384 | pbrook | break;
|
837 | a917d384 | pbrook | case 2: |
838 | a917d384 | pbrook | lsi_set_phase(s, PHASE_DO); |
839 | a917d384 | pbrook | break;
|
840 | a917d384 | pbrook | case 3: |
841 | a917d384 | pbrook | lsi_set_phase(s, PHASE_DI); |
842 | a917d384 | pbrook | break;
|
843 | a917d384 | pbrook | default:
|
844 | a917d384 | pbrook | abort(); |
845 | a917d384 | pbrook | } |
846 | 7d8406be | pbrook | } |
847 | 7d8406be | pbrook | } |
848 | 7d8406be | pbrook | |
849 | a917d384 | pbrook | /* Read the next byte during a MSGOUT phase. */
|
850 | a917d384 | pbrook | static uint8_t lsi_get_msgbyte(LSIState *s)
|
851 | a917d384 | pbrook | { |
852 | a917d384 | pbrook | uint8_t data; |
853 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_read(&s->dev, s->dnad, &data, 1);
|
854 | a917d384 | pbrook | s->dnad++; |
855 | a917d384 | pbrook | s->dbc--; |
856 | a917d384 | pbrook | return data;
|
857 | a917d384 | pbrook | } |
858 | a917d384 | pbrook | |
859 | 444dd39b | Stefan Hajnoczi | /* Skip the next n bytes during a MSGOUT phase. */
|
860 | 444dd39b | Stefan Hajnoczi | static void lsi_skip_msgbytes(LSIState *s, unsigned int n) |
861 | 444dd39b | Stefan Hajnoczi | { |
862 | 444dd39b | Stefan Hajnoczi | s->dnad += n; |
863 | 444dd39b | Stefan Hajnoczi | s->dbc -= n; |
864 | 444dd39b | Stefan Hajnoczi | } |
865 | 444dd39b | Stefan Hajnoczi | |
866 | 7d8406be | pbrook | static void lsi_do_msgout(LSIState *s) |
867 | 7d8406be | pbrook | { |
868 | 7d8406be | pbrook | uint8_t msg; |
869 | a917d384 | pbrook | int len;
|
870 | 508240c0 | Bernhard Kohl | uint32_t current_tag; |
871 | 5c6c0e51 | Hannes Reinecke | lsi_request *current_req, *p, *p_next; |
872 | 508240c0 | Bernhard Kohl | |
873 | 508240c0 | Bernhard Kohl | if (s->current) {
|
874 | 508240c0 | Bernhard Kohl | current_tag = s->current->tag; |
875 | 5c6c0e51 | Hannes Reinecke | current_req = s->current; |
876 | 508240c0 | Bernhard Kohl | } else {
|
877 | 508240c0 | Bernhard Kohl | current_tag = s->select_tag; |
878 | 5c6c0e51 | Hannes Reinecke | current_req = lsi_find_by_tag(s, current_tag); |
879 | 508240c0 | Bernhard Kohl | } |
880 | 7d8406be | pbrook | |
881 | 7d8406be | pbrook | DPRINTF("MSG out len=%d\n", s->dbc);
|
882 | a917d384 | pbrook | while (s->dbc) {
|
883 | a917d384 | pbrook | msg = lsi_get_msgbyte(s); |
884 | a917d384 | pbrook | s->sfbr = msg; |
885 | a917d384 | pbrook | |
886 | a917d384 | pbrook | switch (msg) {
|
887 | 77203ea0 | Laszlo Ast | case 0x04: |
888 | a917d384 | pbrook | DPRINTF("MSG: Disconnect\n");
|
889 | a917d384 | pbrook | lsi_disconnect(s); |
890 | a917d384 | pbrook | break;
|
891 | a917d384 | pbrook | case 0x08: |
892 | a917d384 | pbrook | DPRINTF("MSG: No Operation\n");
|
893 | a917d384 | pbrook | lsi_set_phase(s, PHASE_CMD); |
894 | a917d384 | pbrook | break;
|
895 | a917d384 | pbrook | case 0x01: |
896 | a917d384 | pbrook | len = lsi_get_msgbyte(s); |
897 | a917d384 | pbrook | msg = lsi_get_msgbyte(s); |
898 | f3f5b867 | Blue Swirl | (void)len; /* avoid a warning about unused variable*/ |
899 | a917d384 | pbrook | DPRINTF("Extended message 0x%x (len %d)\n", msg, len);
|
900 | a917d384 | pbrook | switch (msg) {
|
901 | a917d384 | pbrook | case 1: |
902 | a917d384 | pbrook | DPRINTF("SDTR (ignored)\n");
|
903 | 444dd39b | Stefan Hajnoczi | lsi_skip_msgbytes(s, 2);
|
904 | a917d384 | pbrook | break;
|
905 | a917d384 | pbrook | case 3: |
906 | a917d384 | pbrook | DPRINTF("WDTR (ignored)\n");
|
907 | 444dd39b | Stefan Hajnoczi | lsi_skip_msgbytes(s, 1);
|
908 | a917d384 | pbrook | break;
|
909 | a917d384 | pbrook | default:
|
910 | a917d384 | pbrook | goto bad;
|
911 | a917d384 | pbrook | } |
912 | a917d384 | pbrook | break;
|
913 | a917d384 | pbrook | case 0x20: /* SIMPLE queue */ |
914 | af12ac98 | Gerd Hoffmann | s->select_tag |= lsi_get_msgbyte(s) | LSI_TAG_VALID; |
915 | aa2b1e89 | Bernhard Kohl | DPRINTF("SIMPLE queue tag=0x%x\n", s->select_tag & 0xff); |
916 | a917d384 | pbrook | break;
|
917 | a917d384 | pbrook | case 0x21: /* HEAD of queue */ |
918 | a917d384 | pbrook | BADF("HEAD queue not implemented\n");
|
919 | af12ac98 | Gerd Hoffmann | s->select_tag |= lsi_get_msgbyte(s) | LSI_TAG_VALID; |
920 | a917d384 | pbrook | break;
|
921 | a917d384 | pbrook | case 0x22: /* ORDERED queue */ |
922 | a917d384 | pbrook | BADF("ORDERED queue not implemented\n");
|
923 | af12ac98 | Gerd Hoffmann | s->select_tag |= lsi_get_msgbyte(s) | LSI_TAG_VALID; |
924 | a917d384 | pbrook | break;
|
925 | 508240c0 | Bernhard Kohl | case 0x0d: |
926 | 508240c0 | Bernhard Kohl | /* The ABORT TAG message clears the current I/O process only. */
|
927 | 508240c0 | Bernhard Kohl | DPRINTF("MSG: ABORT TAG tag=0x%x\n", current_tag);
|
928 | 5c6c0e51 | Hannes Reinecke | if (current_req) {
|
929 | 94d3f98a | Paolo Bonzini | scsi_req_cancel(current_req->req); |
930 | 5c6c0e51 | Hannes Reinecke | } |
931 | 508240c0 | Bernhard Kohl | lsi_disconnect(s); |
932 | 508240c0 | Bernhard Kohl | break;
|
933 | 508240c0 | Bernhard Kohl | case 0x06: |
934 | 508240c0 | Bernhard Kohl | case 0x0e: |
935 | 508240c0 | Bernhard Kohl | case 0x0c: |
936 | 508240c0 | Bernhard Kohl | /* The ABORT message clears all I/O processes for the selecting
|
937 | 508240c0 | Bernhard Kohl | initiator on the specified logical unit of the target. */
|
938 | 508240c0 | Bernhard Kohl | if (msg == 0x06) { |
939 | 508240c0 | Bernhard Kohl | DPRINTF("MSG: ABORT tag=0x%x\n", current_tag);
|
940 | 508240c0 | Bernhard Kohl | } |
941 | 508240c0 | Bernhard Kohl | /* The CLEAR QUEUE message clears all I/O processes for all
|
942 | 508240c0 | Bernhard Kohl | initiators on the specified logical unit of the target. */
|
943 | 508240c0 | Bernhard Kohl | if (msg == 0x0e) { |
944 | 508240c0 | Bernhard Kohl | DPRINTF("MSG: CLEAR QUEUE tag=0x%x\n", current_tag);
|
945 | 508240c0 | Bernhard Kohl | } |
946 | 508240c0 | Bernhard Kohl | /* The BUS DEVICE RESET message clears all I/O processes for all
|
947 | 508240c0 | Bernhard Kohl | initiators on all logical units of the target. */
|
948 | 508240c0 | Bernhard Kohl | if (msg == 0x0c) { |
949 | 508240c0 | Bernhard Kohl | DPRINTF("MSG: BUS DEVICE RESET tag=0x%x\n", current_tag);
|
950 | 508240c0 | Bernhard Kohl | } |
951 | 508240c0 | Bernhard Kohl | |
952 | 508240c0 | Bernhard Kohl | /* clear the current I/O process */
|
953 | 5c6c0e51 | Hannes Reinecke | if (s->current) {
|
954 | 94d3f98a | Paolo Bonzini | scsi_req_cancel(s->current->req); |
955 | 5c6c0e51 | Hannes Reinecke | } |
956 | 508240c0 | Bernhard Kohl | |
957 | 508240c0 | Bernhard Kohl | /* As the current implemented devices scsi_disk and scsi_generic
|
958 | 508240c0 | Bernhard Kohl | only support one LUN, we don't need to keep track of LUNs.
|
959 | 508240c0 | Bernhard Kohl | Clearing I/O processes for other initiators could be possible
|
960 | 508240c0 | Bernhard Kohl | for scsi_generic by sending a SG_SCSI_RESET to the /dev/sgX
|
961 | 508240c0 | Bernhard Kohl | device, but this is currently not implemented (and seems not
|
962 | 508240c0 | Bernhard Kohl | to be really necessary). So let's simply clear all queued
|
963 | 508240c0 | Bernhard Kohl | commands for the current device: */
|
964 | 508240c0 | Bernhard Kohl | QTAILQ_FOREACH_SAFE(p, &s->queue, next, p_next) { |
965 | a6c6f44a | Blue Swirl | if ((p->tag & 0x0000ff00) == (current_tag & 0x0000ff00)) { |
966 | 94d3f98a | Paolo Bonzini | scsi_req_cancel(p->req); |
967 | 508240c0 | Bernhard Kohl | } |
968 | 508240c0 | Bernhard Kohl | } |
969 | 508240c0 | Bernhard Kohl | |
970 | 508240c0 | Bernhard Kohl | lsi_disconnect(s); |
971 | 508240c0 | Bernhard Kohl | break;
|
972 | a917d384 | pbrook | default:
|
973 | a917d384 | pbrook | if ((msg & 0x80) == 0) { |
974 | a917d384 | pbrook | goto bad;
|
975 | a917d384 | pbrook | } |
976 | a917d384 | pbrook | s->current_lun = msg & 7;
|
977 | a917d384 | pbrook | DPRINTF("Select LUN %d\n", s->current_lun);
|
978 | a917d384 | pbrook | lsi_set_phase(s, PHASE_CMD); |
979 | a917d384 | pbrook | break;
|
980 | a917d384 | pbrook | } |
981 | 7d8406be | pbrook | } |
982 | a917d384 | pbrook | return;
|
983 | a917d384 | pbrook | bad:
|
984 | a917d384 | pbrook | BADF("Unimplemented message 0x%02x\n", msg);
|
985 | a917d384 | pbrook | lsi_set_phase(s, PHASE_MI); |
986 | a917d384 | pbrook | lsi_add_msg_byte(s, 7); /* MESSAGE REJECT */ |
987 | a917d384 | pbrook | s->msg_action = 0;
|
988 | 7d8406be | pbrook | } |
989 | 7d8406be | pbrook | |
990 | 7d8406be | pbrook | /* Sign extend a 24-bit value. */
|
991 | 7d8406be | pbrook | static inline int32_t sxt24(int32_t n) |
992 | 7d8406be | pbrook | { |
993 | 7d8406be | pbrook | return (n << 8) >> 8; |
994 | 7d8406be | pbrook | } |
995 | 7d8406be | pbrook | |
996 | e20a8dff | Blue Swirl | #define LSI_BUF_SIZE 4096 |
997 | 7d8406be | pbrook | static void lsi_memcpy(LSIState *s, uint32_t dest, uint32_t src, int count) |
998 | 7d8406be | pbrook | { |
999 | 7d8406be | pbrook | int n;
|
1000 | e20a8dff | Blue Swirl | uint8_t buf[LSI_BUF_SIZE]; |
1001 | 7d8406be | pbrook | |
1002 | 7d8406be | pbrook | DPRINTF("memcpy dest 0x%08x src 0x%08x count %d\n", dest, src, count);
|
1003 | 7d8406be | pbrook | while (count) {
|
1004 | e20a8dff | Blue Swirl | n = (count > LSI_BUF_SIZE) ? LSI_BUF_SIZE : count; |
1005 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_read(&s->dev, src, buf, n); |
1006 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_write(&s->dev, dest, buf, n); |
1007 | 7d8406be | pbrook | src += n; |
1008 | 7d8406be | pbrook | dest += n; |
1009 | 7d8406be | pbrook | count -= n; |
1010 | 7d8406be | pbrook | } |
1011 | 7d8406be | pbrook | } |
1012 | 7d8406be | pbrook | |
1013 | a917d384 | pbrook | static void lsi_wait_reselect(LSIState *s) |
1014 | a917d384 | pbrook | { |
1015 | 042ec49d | Gerd Hoffmann | lsi_request *p; |
1016 | 042ec49d | Gerd Hoffmann | |
1017 | a917d384 | pbrook | DPRINTF("Wait Reselect\n");
|
1018 | 042ec49d | Gerd Hoffmann | |
1019 | 042ec49d | Gerd Hoffmann | QTAILQ_FOREACH(p, &s->queue, next) { |
1020 | 042ec49d | Gerd Hoffmann | if (p->pending) {
|
1021 | aa4d32c4 | Gerd Hoffmann | lsi_reselect(s, p); |
1022 | a917d384 | pbrook | break;
|
1023 | a917d384 | pbrook | } |
1024 | a917d384 | pbrook | } |
1025 | b96a0da0 | Gerd Hoffmann | if (s->current == NULL) { |
1026 | a917d384 | pbrook | s->waiting = 1;
|
1027 | a917d384 | pbrook | } |
1028 | a917d384 | pbrook | } |
1029 | a917d384 | pbrook | |
1030 | 7d8406be | pbrook | static void lsi_execute_script(LSIState *s) |
1031 | 7d8406be | pbrook | { |
1032 | 7d8406be | pbrook | uint32_t insn; |
1033 | b25cf589 | aliguori | uint32_t addr, addr_high; |
1034 | 7d8406be | pbrook | int opcode;
|
1035 | ee4d919f | aliguori | int insn_processed = 0; |
1036 | 7d8406be | pbrook | |
1037 | 7d8406be | pbrook | s->istat1 |= LSI_ISTAT1_SRUN; |
1038 | 7d8406be | pbrook | again:
|
1039 | ee4d919f | aliguori | insn_processed++; |
1040 | 7d8406be | pbrook | insn = read_dword(s, s->dsp); |
1041 | 02b373ad | balrog | if (!insn) {
|
1042 | 02b373ad | balrog | /* If we receive an empty opcode increment the DSP by 4 bytes
|
1043 | 02b373ad | balrog | instead of 8 and execute the next opcode at that location */
|
1044 | 02b373ad | balrog | s->dsp += 4;
|
1045 | 02b373ad | balrog | goto again;
|
1046 | 02b373ad | balrog | } |
1047 | 7d8406be | pbrook | addr = read_dword(s, s->dsp + 4);
|
1048 | b25cf589 | aliguori | addr_high = 0;
|
1049 | 7d8406be | pbrook | DPRINTF("SCRIPTS dsp=%08x opcode %08x arg %08x\n", s->dsp, insn, addr);
|
1050 | 7d8406be | pbrook | s->dsps = addr; |
1051 | 7d8406be | pbrook | s->dcmd = insn >> 24;
|
1052 | 7d8406be | pbrook | s->dsp += 8;
|
1053 | 7d8406be | pbrook | switch (insn >> 30) { |
1054 | 7d8406be | pbrook | case 0: /* Block move. */ |
1055 | 7d8406be | pbrook | if (s->sist1 & LSI_SIST1_STO) {
|
1056 | 7d8406be | pbrook | DPRINTF("Delayed select timeout\n");
|
1057 | 7d8406be | pbrook | lsi_stop_script(s); |
1058 | 7d8406be | pbrook | break;
|
1059 | 7d8406be | pbrook | } |
1060 | 7d8406be | pbrook | s->dbc = insn & 0xffffff;
|
1061 | 7d8406be | pbrook | s->rbc = s->dbc; |
1062 | dd8edf01 | aliguori | /* ??? Set ESA. */
|
1063 | dd8edf01 | aliguori | s->ia = s->dsp - 8;
|
1064 | 7d8406be | pbrook | if (insn & (1 << 29)) { |
1065 | 7d8406be | pbrook | /* Indirect addressing. */
|
1066 | 7d8406be | pbrook | addr = read_dword(s, addr); |
1067 | 7d8406be | pbrook | } else if (insn & (1 << 28)) { |
1068 | 7d8406be | pbrook | uint32_t buf[2];
|
1069 | 7d8406be | pbrook | int32_t offset; |
1070 | 7d8406be | pbrook | /* Table indirect addressing. */
|
1071 | dd8edf01 | aliguori | |
1072 | dd8edf01 | aliguori | /* 32-bit Table indirect */
|
1073 | 7d8406be | pbrook | offset = sxt24(addr); |
1074 | 9e486d67 | David Gibson | pci_dma_read(&s->dev, s->dsa + offset, buf, 8);
|
1075 | b25cf589 | aliguori | /* byte count is stored in bits 0:23 only */
|
1076 | b25cf589 | aliguori | s->dbc = cpu_to_le32(buf[0]) & 0xffffff; |
1077 | 7faa239c | ths | s->rbc = s->dbc; |
1078 | 7d8406be | pbrook | addr = cpu_to_le32(buf[1]);
|
1079 | b25cf589 | aliguori | |
1080 | b25cf589 | aliguori | /* 40-bit DMA, upper addr bits [39:32] stored in first DWORD of
|
1081 | b25cf589 | aliguori | * table, bits [31:24] */
|
1082 | b25cf589 | aliguori | if (lsi_dma_40bit(s))
|
1083 | b25cf589 | aliguori | addr_high = cpu_to_le32(buf[0]) >> 24; |
1084 | dd8edf01 | aliguori | else if (lsi_dma_ti64bit(s)) { |
1085 | dd8edf01 | aliguori | int selector = (cpu_to_le32(buf[0]) >> 24) & 0x1f; |
1086 | dd8edf01 | aliguori | switch (selector) {
|
1087 | dd8edf01 | aliguori | case 0 ... 0x0f: |
1088 | dd8edf01 | aliguori | /* offset index into scratch registers since
|
1089 | dd8edf01 | aliguori | * TI64 mode can use registers C to R */
|
1090 | dd8edf01 | aliguori | addr_high = s->scratch[2 + selector];
|
1091 | dd8edf01 | aliguori | break;
|
1092 | dd8edf01 | aliguori | case 0x10: |
1093 | dd8edf01 | aliguori | addr_high = s->mmrs; |
1094 | dd8edf01 | aliguori | break;
|
1095 | dd8edf01 | aliguori | case 0x11: |
1096 | dd8edf01 | aliguori | addr_high = s->mmws; |
1097 | dd8edf01 | aliguori | break;
|
1098 | dd8edf01 | aliguori | case 0x12: |
1099 | dd8edf01 | aliguori | addr_high = s->sfs; |
1100 | dd8edf01 | aliguori | break;
|
1101 | dd8edf01 | aliguori | case 0x13: |
1102 | dd8edf01 | aliguori | addr_high = s->drs; |
1103 | dd8edf01 | aliguori | break;
|
1104 | dd8edf01 | aliguori | case 0x14: |
1105 | dd8edf01 | aliguori | addr_high = s->sbms; |
1106 | dd8edf01 | aliguori | break;
|
1107 | dd8edf01 | aliguori | case 0x15: |
1108 | dd8edf01 | aliguori | addr_high = s->dbms; |
1109 | dd8edf01 | aliguori | break;
|
1110 | dd8edf01 | aliguori | default:
|
1111 | dd8edf01 | aliguori | BADF("Illegal selector specified (0x%x > 0x15)"
|
1112 | dd8edf01 | aliguori | " for 64-bit DMA block move", selector);
|
1113 | dd8edf01 | aliguori | break;
|
1114 | dd8edf01 | aliguori | } |
1115 | dd8edf01 | aliguori | } |
1116 | dd8edf01 | aliguori | } else if (lsi_dma_64bit(s)) { |
1117 | dd8edf01 | aliguori | /* fetch a 3rd dword if 64-bit direct move is enabled and
|
1118 | dd8edf01 | aliguori | only if we're not doing table indirect or indirect addressing */
|
1119 | dd8edf01 | aliguori | s->dbms = read_dword(s, s->dsp); |
1120 | dd8edf01 | aliguori | s->dsp += 4;
|
1121 | dd8edf01 | aliguori | s->ia = s->dsp - 12;
|
1122 | 7d8406be | pbrook | } |
1123 | 7d8406be | pbrook | if ((s->sstat1 & PHASE_MASK) != ((insn >> 24) & 7)) { |
1124 | 7d8406be | pbrook | DPRINTF("Wrong phase got %d expected %d\n",
|
1125 | 7d8406be | pbrook | s->sstat1 & PHASE_MASK, (insn >> 24) & 7); |
1126 | 7d8406be | pbrook | lsi_script_scsi_interrupt(s, LSI_SIST0_MA, 0);
|
1127 | 7d8406be | pbrook | break;
|
1128 | 7d8406be | pbrook | } |
1129 | 7d8406be | pbrook | s->dnad = addr; |
1130 | b25cf589 | aliguori | s->dnad64 = addr_high; |
1131 | 7d8406be | pbrook | switch (s->sstat1 & 0x7) { |
1132 | 7d8406be | pbrook | case PHASE_DO:
|
1133 | a917d384 | pbrook | s->waiting = 2;
|
1134 | 7d8406be | pbrook | lsi_do_dma(s, 1);
|
1135 | a917d384 | pbrook | if (s->waiting)
|
1136 | a917d384 | pbrook | s->waiting = 3;
|
1137 | 7d8406be | pbrook | break;
|
1138 | 7d8406be | pbrook | case PHASE_DI:
|
1139 | a917d384 | pbrook | s->waiting = 2;
|
1140 | 7d8406be | pbrook | lsi_do_dma(s, 0);
|
1141 | a917d384 | pbrook | if (s->waiting)
|
1142 | a917d384 | pbrook | s->waiting = 3;
|
1143 | 7d8406be | pbrook | break;
|
1144 | 7d8406be | pbrook | case PHASE_CMD:
|
1145 | 7d8406be | pbrook | lsi_do_command(s); |
1146 | 7d8406be | pbrook | break;
|
1147 | 7d8406be | pbrook | case PHASE_ST:
|
1148 | 7d8406be | pbrook | lsi_do_status(s); |
1149 | 7d8406be | pbrook | break;
|
1150 | 7d8406be | pbrook | case PHASE_MO:
|
1151 | 7d8406be | pbrook | lsi_do_msgout(s); |
1152 | 7d8406be | pbrook | break;
|
1153 | 7d8406be | pbrook | case PHASE_MI:
|
1154 | 7d8406be | pbrook | lsi_do_msgin(s); |
1155 | 7d8406be | pbrook | break;
|
1156 | 7d8406be | pbrook | default:
|
1157 | 7d8406be | pbrook | BADF("Unimplemented phase %d\n", s->sstat1 & PHASE_MASK);
|
1158 | 7d8406be | pbrook | exit(1);
|
1159 | 7d8406be | pbrook | } |
1160 | 7d8406be | pbrook | s->dfifo = s->dbc & 0xff;
|
1161 | 7d8406be | pbrook | s->ctest5 = (s->ctest5 & 0xfc) | ((s->dbc >> 8) & 3); |
1162 | 7d8406be | pbrook | s->sbc = s->dbc; |
1163 | 7d8406be | pbrook | s->rbc -= s->dbc; |
1164 | 7d8406be | pbrook | s->ua = addr + s->dbc; |
1165 | 7d8406be | pbrook | break;
|
1166 | 7d8406be | pbrook | |
1167 | 7d8406be | pbrook | case 1: /* IO or Read/Write instruction. */ |
1168 | 7d8406be | pbrook | opcode = (insn >> 27) & 7; |
1169 | 7d8406be | pbrook | if (opcode < 5) { |
1170 | 7d8406be | pbrook | uint32_t id; |
1171 | 7d8406be | pbrook | |
1172 | 7d8406be | pbrook | if (insn & (1 << 25)) { |
1173 | 7d8406be | pbrook | id = read_dword(s, s->dsa + sxt24(insn)); |
1174 | 7d8406be | pbrook | } else {
|
1175 | 07a1bea8 | Laszlo Ast | id = insn; |
1176 | 7d8406be | pbrook | } |
1177 | 7d8406be | pbrook | id = (id >> 16) & 0xf; |
1178 | 7d8406be | pbrook | if (insn & (1 << 26)) { |
1179 | 7d8406be | pbrook | addr = s->dsp + sxt24(addr); |
1180 | 7d8406be | pbrook | } |
1181 | 7d8406be | pbrook | s->dnad = addr; |
1182 | 7d8406be | pbrook | switch (opcode) {
|
1183 | 7d8406be | pbrook | case 0: /* Select */ |
1184 | a917d384 | pbrook | s->sdid = id; |
1185 | 38f5b2b8 | Laszlo Ast | if (s->scntl1 & LSI_SCNTL1_CON) {
|
1186 | 38f5b2b8 | Laszlo Ast | DPRINTF("Already reselected, jumping to alternative address\n");
|
1187 | 38f5b2b8 | Laszlo Ast | s->dsp = s->dnad; |
1188 | a917d384 | pbrook | break;
|
1189 | a917d384 | pbrook | } |
1190 | 7d8406be | pbrook | s->sstat0 |= LSI_SSTAT0_WOA; |
1191 | 7d8406be | pbrook | s->scntl1 &= ~LSI_SCNTL1_IARB; |
1192 | 0d3545e7 | Paolo Bonzini | if (!scsi_device_find(&s->bus, 0, id, 0)) { |
1193 | 64d56409 | Jan Kiszka | lsi_bad_selection(s, id); |
1194 | 7d8406be | pbrook | break;
|
1195 | 7d8406be | pbrook | } |
1196 | 7d8406be | pbrook | DPRINTF("Selected target %d%s\n",
|
1197 | 7d8406be | pbrook | id, insn & (1 << 3) ? " ATN" : ""); |
1198 | 7d8406be | pbrook | /* ??? Linux drivers compain when this is set. Maybe
|
1199 | 7d8406be | pbrook | it only applies in low-level mode (unimplemented).
|
1200 | 7d8406be | pbrook | lsi_script_scsi_interrupt(s, LSI_SIST0_CMP, 0); */
|
1201 | af12ac98 | Gerd Hoffmann | s->select_tag = id << 8;
|
1202 | 7d8406be | pbrook | s->scntl1 |= LSI_SCNTL1_CON; |
1203 | 7d8406be | pbrook | if (insn & (1 << 3)) { |
1204 | 7d8406be | pbrook | s->socl |= LSI_SOCL_ATN; |
1205 | 7d8406be | pbrook | } |
1206 | 7d8406be | pbrook | lsi_set_phase(s, PHASE_MO); |
1207 | 7d8406be | pbrook | break;
|
1208 | 7d8406be | pbrook | case 1: /* Disconnect */ |
1209 | a15fdf86 | Laszlo Ast | DPRINTF("Wait Disconnect\n");
|
1210 | 7d8406be | pbrook | s->scntl1 &= ~LSI_SCNTL1_CON; |
1211 | 7d8406be | pbrook | break;
|
1212 | 7d8406be | pbrook | case 2: /* Wait Reselect */ |
1213 | e560125e | Laszlo Ast | if (!lsi_irq_on_rsl(s)) {
|
1214 | e560125e | Laszlo Ast | lsi_wait_reselect(s); |
1215 | e560125e | Laszlo Ast | } |
1216 | 7d8406be | pbrook | break;
|
1217 | 7d8406be | pbrook | case 3: /* Set */ |
1218 | 7d8406be | pbrook | DPRINTF("Set%s%s%s%s\n",
|
1219 | 7d8406be | pbrook | insn & (1 << 3) ? " ATN" : "", |
1220 | 7d8406be | pbrook | insn & (1 << 6) ? " ACK" : "", |
1221 | 7d8406be | pbrook | insn & (1 << 9) ? " TM" : "", |
1222 | 7d8406be | pbrook | insn & (1 << 10) ? " CC" : ""); |
1223 | 7d8406be | pbrook | if (insn & (1 << 3)) { |
1224 | 7d8406be | pbrook | s->socl |= LSI_SOCL_ATN; |
1225 | 7d8406be | pbrook | lsi_set_phase(s, PHASE_MO); |
1226 | 7d8406be | pbrook | } |
1227 | 7d8406be | pbrook | if (insn & (1 << 9)) { |
1228 | 7d8406be | pbrook | BADF("Target mode not implemented\n");
|
1229 | 7d8406be | pbrook | exit(1);
|
1230 | 7d8406be | pbrook | } |
1231 | 7d8406be | pbrook | if (insn & (1 << 10)) |
1232 | 7d8406be | pbrook | s->carry = 1;
|
1233 | 7d8406be | pbrook | break;
|
1234 | 7d8406be | pbrook | case 4: /* Clear */ |
1235 | 7d8406be | pbrook | DPRINTF("Clear%s%s%s%s\n",
|
1236 | 7d8406be | pbrook | insn & (1 << 3) ? " ATN" : "", |
1237 | 7d8406be | pbrook | insn & (1 << 6) ? " ACK" : "", |
1238 | 7d8406be | pbrook | insn & (1 << 9) ? " TM" : "", |
1239 | 7d8406be | pbrook | insn & (1 << 10) ? " CC" : ""); |
1240 | 7d8406be | pbrook | if (insn & (1 << 3)) { |
1241 | 7d8406be | pbrook | s->socl &= ~LSI_SOCL_ATN; |
1242 | 7d8406be | pbrook | } |
1243 | 7d8406be | pbrook | if (insn & (1 << 10)) |
1244 | 7d8406be | pbrook | s->carry = 0;
|
1245 | 7d8406be | pbrook | break;
|
1246 | 7d8406be | pbrook | } |
1247 | 7d8406be | pbrook | } else {
|
1248 | 7d8406be | pbrook | uint8_t op0; |
1249 | 7d8406be | pbrook | uint8_t op1; |
1250 | 7d8406be | pbrook | uint8_t data8; |
1251 | 7d8406be | pbrook | int reg;
|
1252 | 7d8406be | pbrook | int operator;
|
1253 | 7d8406be | pbrook | #ifdef DEBUG_LSI
|
1254 | 7d8406be | pbrook | static const char *opcode_names[3] = |
1255 | 7d8406be | pbrook | {"Write", "Read", "Read-Modify-Write"}; |
1256 | 7d8406be | pbrook | static const char *operator_names[8] = |
1257 | 7d8406be | pbrook | {"MOV", "SHL", "OR", "XOR", "AND", "SHR", "ADD", "ADC"}; |
1258 | 7d8406be | pbrook | #endif
|
1259 | 7d8406be | pbrook | |
1260 | 7d8406be | pbrook | reg = ((insn >> 16) & 0x7f) | (insn & 0x80); |
1261 | 7d8406be | pbrook | data8 = (insn >> 8) & 0xff; |
1262 | 7d8406be | pbrook | opcode = (insn >> 27) & 7; |
1263 | 7d8406be | pbrook | operator = (insn >> 24) & 7; |
1264 | a917d384 | pbrook | DPRINTF("%s reg 0x%x %s data8=0x%02x sfbr=0x%02x%s\n",
|
1265 | 7d8406be | pbrook | opcode_names[opcode - 5], reg,
|
1266 | a917d384 | pbrook | operator_names[operator], data8, s->sfbr, |
1267 | 7d8406be | pbrook | (insn & (1 << 23)) ? " SFBR" : ""); |
1268 | 7d8406be | pbrook | op0 = op1 = 0;
|
1269 | 7d8406be | pbrook | switch (opcode) {
|
1270 | 7d8406be | pbrook | case 5: /* From SFBR */ |
1271 | 7d8406be | pbrook | op0 = s->sfbr; |
1272 | 7d8406be | pbrook | op1 = data8; |
1273 | 7d8406be | pbrook | break;
|
1274 | 7d8406be | pbrook | case 6: /* To SFBR */ |
1275 | 7d8406be | pbrook | if (operator)
|
1276 | 7d8406be | pbrook | op0 = lsi_reg_readb(s, reg); |
1277 | 7d8406be | pbrook | op1 = data8; |
1278 | 7d8406be | pbrook | break;
|
1279 | 7d8406be | pbrook | case 7: /* Read-modify-write */ |
1280 | 7d8406be | pbrook | if (operator)
|
1281 | 7d8406be | pbrook | op0 = lsi_reg_readb(s, reg); |
1282 | 7d8406be | pbrook | if (insn & (1 << 23)) { |
1283 | 7d8406be | pbrook | op1 = s->sfbr; |
1284 | 7d8406be | pbrook | } else {
|
1285 | 7d8406be | pbrook | op1 = data8; |
1286 | 7d8406be | pbrook | } |
1287 | 7d8406be | pbrook | break;
|
1288 | 7d8406be | pbrook | } |
1289 | 7d8406be | pbrook | |
1290 | 7d8406be | pbrook | switch (operator) {
|
1291 | 7d8406be | pbrook | case 0: /* move */ |
1292 | 7d8406be | pbrook | op0 = op1; |
1293 | 7d8406be | pbrook | break;
|
1294 | 7d8406be | pbrook | case 1: /* Shift left */ |
1295 | 7d8406be | pbrook | op1 = op0 >> 7;
|
1296 | 7d8406be | pbrook | op0 = (op0 << 1) | s->carry;
|
1297 | 7d8406be | pbrook | s->carry = op1; |
1298 | 7d8406be | pbrook | break;
|
1299 | 7d8406be | pbrook | case 2: /* OR */ |
1300 | 7d8406be | pbrook | op0 |= op1; |
1301 | 7d8406be | pbrook | break;
|
1302 | 7d8406be | pbrook | case 3: /* XOR */ |
1303 | dcfb9014 | ths | op0 ^= op1; |
1304 | 7d8406be | pbrook | break;
|
1305 | 7d8406be | pbrook | case 4: /* AND */ |
1306 | 7d8406be | pbrook | op0 &= op1; |
1307 | 7d8406be | pbrook | break;
|
1308 | 7d8406be | pbrook | case 5: /* SHR */ |
1309 | 7d8406be | pbrook | op1 = op0 & 1;
|
1310 | 7d8406be | pbrook | op0 = (op0 >> 1) | (s->carry << 7); |
1311 | 687fa640 | ths | s->carry = op1; |
1312 | 7d8406be | pbrook | break;
|
1313 | 7d8406be | pbrook | case 6: /* ADD */ |
1314 | 7d8406be | pbrook | op0 += op1; |
1315 | 7d8406be | pbrook | s->carry = op0 < op1; |
1316 | 7d8406be | pbrook | break;
|
1317 | 7d8406be | pbrook | case 7: /* ADC */ |
1318 | 7d8406be | pbrook | op0 += op1 + s->carry; |
1319 | 7d8406be | pbrook | if (s->carry)
|
1320 | 7d8406be | pbrook | s->carry = op0 <= op1; |
1321 | 7d8406be | pbrook | else
|
1322 | 7d8406be | pbrook | s->carry = op0 < op1; |
1323 | 7d8406be | pbrook | break;
|
1324 | 7d8406be | pbrook | } |
1325 | 7d8406be | pbrook | |
1326 | 7d8406be | pbrook | switch (opcode) {
|
1327 | 7d8406be | pbrook | case 5: /* From SFBR */ |
1328 | 7d8406be | pbrook | case 7: /* Read-modify-write */ |
1329 | 7d8406be | pbrook | lsi_reg_writeb(s, reg, op0); |
1330 | 7d8406be | pbrook | break;
|
1331 | 7d8406be | pbrook | case 6: /* To SFBR */ |
1332 | 7d8406be | pbrook | s->sfbr = op0; |
1333 | 7d8406be | pbrook | break;
|
1334 | 7d8406be | pbrook | } |
1335 | 7d8406be | pbrook | } |
1336 | 7d8406be | pbrook | break;
|
1337 | 7d8406be | pbrook | |
1338 | 7d8406be | pbrook | case 2: /* Transfer Control. */ |
1339 | 7d8406be | pbrook | { |
1340 | 7d8406be | pbrook | int cond;
|
1341 | 7d8406be | pbrook | int jmp;
|
1342 | 7d8406be | pbrook | |
1343 | 7d8406be | pbrook | if ((insn & 0x002e0000) == 0) { |
1344 | 7d8406be | pbrook | DPRINTF("NOP\n");
|
1345 | 7d8406be | pbrook | break;
|
1346 | 7d8406be | pbrook | } |
1347 | 7d8406be | pbrook | if (s->sist1 & LSI_SIST1_STO) {
|
1348 | 7d8406be | pbrook | DPRINTF("Delayed select timeout\n");
|
1349 | 7d8406be | pbrook | lsi_stop_script(s); |
1350 | 7d8406be | pbrook | break;
|
1351 | 7d8406be | pbrook | } |
1352 | 7d8406be | pbrook | cond = jmp = (insn & (1 << 19)) != 0; |
1353 | 7d8406be | pbrook | if (cond == jmp && (insn & (1 << 21))) { |
1354 | 7d8406be | pbrook | DPRINTF("Compare carry %d\n", s->carry == jmp);
|
1355 | 7d8406be | pbrook | cond = s->carry != 0;
|
1356 | 7d8406be | pbrook | } |
1357 | 7d8406be | pbrook | if (cond == jmp && (insn & (1 << 17))) { |
1358 | 7d8406be | pbrook | DPRINTF("Compare phase %d %c= %d\n",
|
1359 | 7d8406be | pbrook | (s->sstat1 & PHASE_MASK), |
1360 | 7d8406be | pbrook | jmp ? '=' : '!', |
1361 | 7d8406be | pbrook | ((insn >> 24) & 7)); |
1362 | 7d8406be | pbrook | cond = (s->sstat1 & PHASE_MASK) == ((insn >> 24) & 7); |
1363 | 7d8406be | pbrook | } |
1364 | 7d8406be | pbrook | if (cond == jmp && (insn & (1 << 18))) { |
1365 | 7d8406be | pbrook | uint8_t mask; |
1366 | 7d8406be | pbrook | |
1367 | 7d8406be | pbrook | mask = (~insn >> 8) & 0xff; |
1368 | 7d8406be | pbrook | DPRINTF("Compare data 0x%x & 0x%x %c= 0x%x\n",
|
1369 | 7d8406be | pbrook | s->sfbr, mask, jmp ? '=' : '!', insn & mask); |
1370 | 7d8406be | pbrook | cond = (s->sfbr & mask) == (insn & mask); |
1371 | 7d8406be | pbrook | } |
1372 | 7d8406be | pbrook | if (cond == jmp) {
|
1373 | 7d8406be | pbrook | if (insn & (1 << 23)) { |
1374 | 7d8406be | pbrook | /* Relative address. */
|
1375 | 7d8406be | pbrook | addr = s->dsp + sxt24(addr); |
1376 | 7d8406be | pbrook | } |
1377 | 7d8406be | pbrook | switch ((insn >> 27) & 7) { |
1378 | 7d8406be | pbrook | case 0: /* Jump */ |
1379 | 7d8406be | pbrook | DPRINTF("Jump to 0x%08x\n", addr);
|
1380 | 7d8406be | pbrook | s->dsp = addr; |
1381 | 7d8406be | pbrook | break;
|
1382 | 7d8406be | pbrook | case 1: /* Call */ |
1383 | 7d8406be | pbrook | DPRINTF("Call 0x%08x\n", addr);
|
1384 | 7d8406be | pbrook | s->temp = s->dsp; |
1385 | 7d8406be | pbrook | s->dsp = addr; |
1386 | 7d8406be | pbrook | break;
|
1387 | 7d8406be | pbrook | case 2: /* Return */ |
1388 | 7d8406be | pbrook | DPRINTF("Return to 0x%08x\n", s->temp);
|
1389 | 7d8406be | pbrook | s->dsp = s->temp; |
1390 | 7d8406be | pbrook | break;
|
1391 | 7d8406be | pbrook | case 3: /* Interrupt */ |
1392 | 7d8406be | pbrook | DPRINTF("Interrupt 0x%08x\n", s->dsps);
|
1393 | 7d8406be | pbrook | if ((insn & (1 << 20)) != 0) { |
1394 | 7d8406be | pbrook | s->istat0 |= LSI_ISTAT0_INTF; |
1395 | 7d8406be | pbrook | lsi_update_irq(s); |
1396 | 7d8406be | pbrook | } else {
|
1397 | 7d8406be | pbrook | lsi_script_dma_interrupt(s, LSI_DSTAT_SIR); |
1398 | 7d8406be | pbrook | } |
1399 | 7d8406be | pbrook | break;
|
1400 | 7d8406be | pbrook | default:
|
1401 | 7d8406be | pbrook | DPRINTF("Illegal transfer control\n");
|
1402 | 7d8406be | pbrook | lsi_script_dma_interrupt(s, LSI_DSTAT_IID); |
1403 | 7d8406be | pbrook | break;
|
1404 | 7d8406be | pbrook | } |
1405 | 7d8406be | pbrook | } else {
|
1406 | 7d8406be | pbrook | DPRINTF("Control condition failed\n");
|
1407 | 7d8406be | pbrook | } |
1408 | 7d8406be | pbrook | } |
1409 | 7d8406be | pbrook | break;
|
1410 | 7d8406be | pbrook | |
1411 | 7d8406be | pbrook | case 3: |
1412 | 7d8406be | pbrook | if ((insn & (1 << 29)) == 0) { |
1413 | 7d8406be | pbrook | /* Memory move. */
|
1414 | 7d8406be | pbrook | uint32_t dest; |
1415 | 7d8406be | pbrook | /* ??? The docs imply the destination address is loaded into
|
1416 | 7d8406be | pbrook | the TEMP register. However the Linux drivers rely on
|
1417 | 7d8406be | pbrook | the value being presrved. */
|
1418 | 7d8406be | pbrook | dest = read_dword(s, s->dsp); |
1419 | 7d8406be | pbrook | s->dsp += 4;
|
1420 | 7d8406be | pbrook | lsi_memcpy(s, dest, addr, insn & 0xffffff);
|
1421 | 7d8406be | pbrook | } else {
|
1422 | 7d8406be | pbrook | uint8_t data[7];
|
1423 | 7d8406be | pbrook | int reg;
|
1424 | 7d8406be | pbrook | int n;
|
1425 | 7d8406be | pbrook | int i;
|
1426 | 7d8406be | pbrook | |
1427 | 7d8406be | pbrook | if (insn & (1 << 28)) { |
1428 | 7d8406be | pbrook | addr = s->dsa + sxt24(addr); |
1429 | 7d8406be | pbrook | } |
1430 | 7d8406be | pbrook | n = (insn & 7);
|
1431 | 7d8406be | pbrook | reg = (insn >> 16) & 0xff; |
1432 | 7d8406be | pbrook | if (insn & (1 << 24)) { |
1433 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_read(&s->dev, addr, data, n); |
1434 | a917d384 | pbrook | DPRINTF("Load reg 0x%x size %d addr 0x%08x = %08x\n", reg, n,
|
1435 | a917d384 | pbrook | addr, *(int *)data);
|
1436 | 7d8406be | pbrook | for (i = 0; i < n; i++) { |
1437 | 7d8406be | pbrook | lsi_reg_writeb(s, reg + i, data[i]); |
1438 | 7d8406be | pbrook | } |
1439 | 7d8406be | pbrook | } else {
|
1440 | 7d8406be | pbrook | DPRINTF("Store reg 0x%x size %d addr 0x%08x\n", reg, n, addr);
|
1441 | 7d8406be | pbrook | for (i = 0; i < n; i++) { |
1442 | 7d8406be | pbrook | data[i] = lsi_reg_readb(s, reg + i); |
1443 | 7d8406be | pbrook | } |
1444 | 9ba4524c | Eduard - Gabriel Munteanu | pci_dma_write(&s->dev, addr, data, n); |
1445 | 7d8406be | pbrook | } |
1446 | 7d8406be | pbrook | } |
1447 | 7d8406be | pbrook | } |
1448 | ee4d919f | aliguori | if (insn_processed > 10000 && !s->waiting) { |
1449 | 64c68080 | pbrook | /* Some windows drivers make the device spin waiting for a memory
|
1450 | 64c68080 | pbrook | location to change. If we have been executed a lot of code then
|
1451 | 64c68080 | pbrook | assume this is the case and force an unexpected device disconnect.
|
1452 | 64c68080 | pbrook | This is apparently sufficient to beat the drivers into submission.
|
1453 | 64c68080 | pbrook | */
|
1454 | ee4d919f | aliguori | if (!(s->sien0 & LSI_SIST0_UDC))
|
1455 | ee4d919f | aliguori | fprintf(stderr, "inf. loop with UDC masked\n");
|
1456 | ee4d919f | aliguori | lsi_script_scsi_interrupt(s, LSI_SIST0_UDC, 0);
|
1457 | ee4d919f | aliguori | lsi_disconnect(s); |
1458 | ee4d919f | aliguori | } else if (s->istat1 & LSI_ISTAT1_SRUN && !s->waiting) { |
1459 | 7d8406be | pbrook | if (s->dcntl & LSI_DCNTL_SSM) {
|
1460 | 7d8406be | pbrook | lsi_script_dma_interrupt(s, LSI_DSTAT_SSI); |
1461 | 7d8406be | pbrook | } else {
|
1462 | 7d8406be | pbrook | goto again;
|
1463 | 7d8406be | pbrook | } |
1464 | 7d8406be | pbrook | } |
1465 | 7d8406be | pbrook | DPRINTF("SCRIPTS execution stopped\n");
|
1466 | 7d8406be | pbrook | } |
1467 | 7d8406be | pbrook | |
1468 | 7d8406be | pbrook | static uint8_t lsi_reg_readb(LSIState *s, int offset) |
1469 | 7d8406be | pbrook | { |
1470 | 7d8406be | pbrook | uint8_t tmp; |
1471 | 75f76531 | aurel32 | #define CASE_GET_REG24(name, addr) \
|
1472 | 75f76531 | aurel32 | case addr: return s->name & 0xff; \ |
1473 | 75f76531 | aurel32 | case addr + 1: return (s->name >> 8) & 0xff; \ |
1474 | 75f76531 | aurel32 | case addr + 2: return (s->name >> 16) & 0xff; |
1475 | 75f76531 | aurel32 | |
1476 | 7d8406be | pbrook | #define CASE_GET_REG32(name, addr) \
|
1477 | 7d8406be | pbrook | case addr: return s->name & 0xff; \ |
1478 | 7d8406be | pbrook | case addr + 1: return (s->name >> 8) & 0xff; \ |
1479 | 7d8406be | pbrook | case addr + 2: return (s->name >> 16) & 0xff; \ |
1480 | 7d8406be | pbrook | case addr + 3: return (s->name >> 24) & 0xff; |
1481 | 7d8406be | pbrook | |
1482 | 7d8406be | pbrook | #ifdef DEBUG_LSI_REG
|
1483 | 7d8406be | pbrook | DPRINTF("Read reg %x\n", offset);
|
1484 | 7d8406be | pbrook | #endif
|
1485 | 7d8406be | pbrook | switch (offset) {
|
1486 | 7d8406be | pbrook | case 0x00: /* SCNTL0 */ |
1487 | 7d8406be | pbrook | return s->scntl0;
|
1488 | 7d8406be | pbrook | case 0x01: /* SCNTL1 */ |
1489 | 7d8406be | pbrook | return s->scntl1;
|
1490 | 7d8406be | pbrook | case 0x02: /* SCNTL2 */ |
1491 | 7d8406be | pbrook | return s->scntl2;
|
1492 | 7d8406be | pbrook | case 0x03: /* SCNTL3 */ |
1493 | 7d8406be | pbrook | return s->scntl3;
|
1494 | 7d8406be | pbrook | case 0x04: /* SCID */ |
1495 | 7d8406be | pbrook | return s->scid;
|
1496 | 7d8406be | pbrook | case 0x05: /* SXFER */ |
1497 | 7d8406be | pbrook | return s->sxfer;
|
1498 | 7d8406be | pbrook | case 0x06: /* SDID */ |
1499 | 7d8406be | pbrook | return s->sdid;
|
1500 | 7d8406be | pbrook | case 0x07: /* GPREG0 */ |
1501 | 7d8406be | pbrook | return 0x7f; |
1502 | 985a03b0 | ths | case 0x08: /* Revision ID */ |
1503 | 985a03b0 | ths | return 0x00; |
1504 | a917d384 | pbrook | case 0xa: /* SSID */ |
1505 | a917d384 | pbrook | return s->ssid;
|
1506 | 7d8406be | pbrook | case 0xb: /* SBCL */ |
1507 | 7d8406be | pbrook | /* ??? This is not correct. However it's (hopefully) only
|
1508 | 7d8406be | pbrook | used for diagnostics, so should be ok. */
|
1509 | 7d8406be | pbrook | return 0; |
1510 | 7d8406be | pbrook | case 0xc: /* DSTAT */ |
1511 | 7d8406be | pbrook | tmp = s->dstat | 0x80;
|
1512 | 7d8406be | pbrook | if ((s->istat0 & LSI_ISTAT0_INTF) == 0) |
1513 | 7d8406be | pbrook | s->dstat = 0;
|
1514 | 7d8406be | pbrook | lsi_update_irq(s); |
1515 | 7d8406be | pbrook | return tmp;
|
1516 | 7d8406be | pbrook | case 0x0d: /* SSTAT0 */ |
1517 | 7d8406be | pbrook | return s->sstat0;
|
1518 | 7d8406be | pbrook | case 0x0e: /* SSTAT1 */ |
1519 | 7d8406be | pbrook | return s->sstat1;
|
1520 | 7d8406be | pbrook | case 0x0f: /* SSTAT2 */ |
1521 | 7d8406be | pbrook | return s->scntl1 & LSI_SCNTL1_CON ? 0 : 2; |
1522 | 7d8406be | pbrook | CASE_GET_REG32(dsa, 0x10)
|
1523 | 7d8406be | pbrook | case 0x14: /* ISTAT0 */ |
1524 | 7d8406be | pbrook | return s->istat0;
|
1525 | ecabe8cc | aliguori | case 0x15: /* ISTAT1 */ |
1526 | ecabe8cc | aliguori | return s->istat1;
|
1527 | 7d8406be | pbrook | case 0x16: /* MBOX0 */ |
1528 | 7d8406be | pbrook | return s->mbox0;
|
1529 | 7d8406be | pbrook | case 0x17: /* MBOX1 */ |
1530 | 7d8406be | pbrook | return s->mbox1;
|
1531 | 7d8406be | pbrook | case 0x18: /* CTEST0 */ |
1532 | 7d8406be | pbrook | return 0xff; |
1533 | 7d8406be | pbrook | case 0x19: /* CTEST1 */ |
1534 | 7d8406be | pbrook | return 0; |
1535 | 7d8406be | pbrook | case 0x1a: /* CTEST2 */ |
1536 | 9167a69a | balrog | tmp = s->ctest2 | LSI_CTEST2_DACK | LSI_CTEST2_CM; |
1537 | 7d8406be | pbrook | if (s->istat0 & LSI_ISTAT0_SIGP) {
|
1538 | 7d8406be | pbrook | s->istat0 &= ~LSI_ISTAT0_SIGP; |
1539 | 7d8406be | pbrook | tmp |= LSI_CTEST2_SIGP; |
1540 | 7d8406be | pbrook | } |
1541 | 7d8406be | pbrook | return tmp;
|
1542 | 7d8406be | pbrook | case 0x1b: /* CTEST3 */ |
1543 | 7d8406be | pbrook | return s->ctest3;
|
1544 | 7d8406be | pbrook | CASE_GET_REG32(temp, 0x1c)
|
1545 | 7d8406be | pbrook | case 0x20: /* DFIFO */ |
1546 | 7d8406be | pbrook | return 0; |
1547 | 7d8406be | pbrook | case 0x21: /* CTEST4 */ |
1548 | 7d8406be | pbrook | return s->ctest4;
|
1549 | 7d8406be | pbrook | case 0x22: /* CTEST5 */ |
1550 | 7d8406be | pbrook | return s->ctest5;
|
1551 | 985a03b0 | ths | case 0x23: /* CTEST6 */ |
1552 | 985a03b0 | ths | return 0; |
1553 | 75f76531 | aurel32 | CASE_GET_REG24(dbc, 0x24)
|
1554 | 7d8406be | pbrook | case 0x27: /* DCMD */ |
1555 | 7d8406be | pbrook | return s->dcmd;
|
1556 | 4b9a2d6d | Sebastian Herbszt | CASE_GET_REG32(dnad, 0x28)
|
1557 | 7d8406be | pbrook | CASE_GET_REG32(dsp, 0x2c)
|
1558 | 7d8406be | pbrook | CASE_GET_REG32(dsps, 0x30)
|
1559 | 7d8406be | pbrook | CASE_GET_REG32(scratch[0], 0x34) |
1560 | 7d8406be | pbrook | case 0x38: /* DMODE */ |
1561 | 7d8406be | pbrook | return s->dmode;
|
1562 | 7d8406be | pbrook | case 0x39: /* DIEN */ |
1563 | 7d8406be | pbrook | return s->dien;
|
1564 | bd8ee11a | Sebastian Herbszt | case 0x3a: /* SBR */ |
1565 | bd8ee11a | Sebastian Herbszt | return s->sbr;
|
1566 | 7d8406be | pbrook | case 0x3b: /* DCNTL */ |
1567 | 7d8406be | pbrook | return s->dcntl;
|
1568 | 7d8406be | pbrook | case 0x40: /* SIEN0 */ |
1569 | 7d8406be | pbrook | return s->sien0;
|
1570 | 7d8406be | pbrook | case 0x41: /* SIEN1 */ |
1571 | 7d8406be | pbrook | return s->sien1;
|
1572 | 7d8406be | pbrook | case 0x42: /* SIST0 */ |
1573 | 7d8406be | pbrook | tmp = s->sist0; |
1574 | 7d8406be | pbrook | s->sist0 = 0;
|
1575 | 7d8406be | pbrook | lsi_update_irq(s); |
1576 | 7d8406be | pbrook | return tmp;
|
1577 | 7d8406be | pbrook | case 0x43: /* SIST1 */ |
1578 | 7d8406be | pbrook | tmp = s->sist1; |
1579 | 7d8406be | pbrook | s->sist1 = 0;
|
1580 | 7d8406be | pbrook | lsi_update_irq(s); |
1581 | 7d8406be | pbrook | return tmp;
|
1582 | 9167a69a | balrog | case 0x46: /* MACNTL */ |
1583 | 9167a69a | balrog | return 0x0f; |
1584 | 7d8406be | pbrook | case 0x47: /* GPCNTL0 */ |
1585 | 7d8406be | pbrook | return 0x0f; |
1586 | 7d8406be | pbrook | case 0x48: /* STIME0 */ |
1587 | 7d8406be | pbrook | return s->stime0;
|
1588 | 7d8406be | pbrook | case 0x4a: /* RESPID0 */ |
1589 | 7d8406be | pbrook | return s->respid0;
|
1590 | 7d8406be | pbrook | case 0x4b: /* RESPID1 */ |
1591 | 7d8406be | pbrook | return s->respid1;
|
1592 | 7d8406be | pbrook | case 0x4d: /* STEST1 */ |
1593 | 7d8406be | pbrook | return s->stest1;
|
1594 | 7d8406be | pbrook | case 0x4e: /* STEST2 */ |
1595 | 7d8406be | pbrook | return s->stest2;
|
1596 | 7d8406be | pbrook | case 0x4f: /* STEST3 */ |
1597 | 7d8406be | pbrook | return s->stest3;
|
1598 | a917d384 | pbrook | case 0x50: /* SIDL */ |
1599 | a917d384 | pbrook | /* This is needed by the linux drivers. We currently only update it
|
1600 | a917d384 | pbrook | during the MSG IN phase. */
|
1601 | a917d384 | pbrook | return s->sidl;
|
1602 | 7d8406be | pbrook | case 0x52: /* STEST4 */ |
1603 | 7d8406be | pbrook | return 0xe0; |
1604 | 7d8406be | pbrook | case 0x56: /* CCNTL0 */ |
1605 | 7d8406be | pbrook | return s->ccntl0;
|
1606 | 7d8406be | pbrook | case 0x57: /* CCNTL1 */ |
1607 | 7d8406be | pbrook | return s->ccntl1;
|
1608 | a917d384 | pbrook | case 0x58: /* SBDL */ |
1609 | a917d384 | pbrook | /* Some drivers peek at the data bus during the MSG IN phase. */
|
1610 | a917d384 | pbrook | if ((s->sstat1 & PHASE_MASK) == PHASE_MI)
|
1611 | a917d384 | pbrook | return s->msg[0]; |
1612 | a917d384 | pbrook | return 0; |
1613 | a917d384 | pbrook | case 0x59: /* SBDL high */ |
1614 | 7d8406be | pbrook | return 0; |
1615 | 7d8406be | pbrook | CASE_GET_REG32(mmrs, 0xa0)
|
1616 | 7d8406be | pbrook | CASE_GET_REG32(mmws, 0xa4)
|
1617 | 7d8406be | pbrook | CASE_GET_REG32(sfs, 0xa8)
|
1618 | 7d8406be | pbrook | CASE_GET_REG32(drs, 0xac)
|
1619 | 7d8406be | pbrook | CASE_GET_REG32(sbms, 0xb0)
|
1620 | ab57d967 | aliguori | CASE_GET_REG32(dbms, 0xb4)
|
1621 | 7d8406be | pbrook | CASE_GET_REG32(dnad64, 0xb8)
|
1622 | 7d8406be | pbrook | CASE_GET_REG32(pmjad1, 0xc0)
|
1623 | 7d8406be | pbrook | CASE_GET_REG32(pmjad2, 0xc4)
|
1624 | 7d8406be | pbrook | CASE_GET_REG32(rbc, 0xc8)
|
1625 | 7d8406be | pbrook | CASE_GET_REG32(ua, 0xcc)
|
1626 | 7d8406be | pbrook | CASE_GET_REG32(ia, 0xd4)
|
1627 | 7d8406be | pbrook | CASE_GET_REG32(sbc, 0xd8)
|
1628 | 7d8406be | pbrook | CASE_GET_REG32(csbc, 0xdc)
|
1629 | 7d8406be | pbrook | } |
1630 | 7d8406be | pbrook | if (offset >= 0x5c && offset < 0xa0) { |
1631 | 7d8406be | pbrook | int n;
|
1632 | 7d8406be | pbrook | int shift;
|
1633 | 7d8406be | pbrook | n = (offset - 0x58) >> 2; |
1634 | 7d8406be | pbrook | shift = (offset & 3) * 8; |
1635 | 7d8406be | pbrook | return (s->scratch[n] >> shift) & 0xff; |
1636 | 7d8406be | pbrook | } |
1637 | 7d8406be | pbrook | BADF("readb 0x%x\n", offset);
|
1638 | 7d8406be | pbrook | exit(1);
|
1639 | 75f76531 | aurel32 | #undef CASE_GET_REG24
|
1640 | 7d8406be | pbrook | #undef CASE_GET_REG32
|
1641 | 7d8406be | pbrook | } |
1642 | 7d8406be | pbrook | |
1643 | 7d8406be | pbrook | static void lsi_reg_writeb(LSIState *s, int offset, uint8_t val) |
1644 | 7d8406be | pbrook | { |
1645 | 49c47daa | Sebastian Herbszt | #define CASE_SET_REG24(name, addr) \
|
1646 | 49c47daa | Sebastian Herbszt | case addr : s->name &= 0xffffff00; s->name |= val; break; \ |
1647 | 49c47daa | Sebastian Herbszt | case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ |
1648 | 49c47daa | Sebastian Herbszt | case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break; |
1649 | 49c47daa | Sebastian Herbszt | |
1650 | 7d8406be | pbrook | #define CASE_SET_REG32(name, addr) \
|
1651 | 7d8406be | pbrook | case addr : s->name &= 0xffffff00; s->name |= val; break; \ |
1652 | 7d8406be | pbrook | case addr + 1: s->name &= 0xffff00ff; s->name |= val << 8; break; \ |
1653 | 7d8406be | pbrook | case addr + 2: s->name &= 0xff00ffff; s->name |= val << 16; break; \ |
1654 | 7d8406be | pbrook | case addr + 3: s->name &= 0x00ffffff; s->name |= val << 24; break; |
1655 | 7d8406be | pbrook | |
1656 | 7d8406be | pbrook | #ifdef DEBUG_LSI_REG
|
1657 | 7d8406be | pbrook | DPRINTF("Write reg %x = %02x\n", offset, val);
|
1658 | 7d8406be | pbrook | #endif
|
1659 | 7d8406be | pbrook | switch (offset) {
|
1660 | 7d8406be | pbrook | case 0x00: /* SCNTL0 */ |
1661 | 7d8406be | pbrook | s->scntl0 = val; |
1662 | 7d8406be | pbrook | if (val & LSI_SCNTL0_START) {
|
1663 | 7d8406be | pbrook | BADF("Start sequence not implemented\n");
|
1664 | 7d8406be | pbrook | } |
1665 | 7d8406be | pbrook | break;
|
1666 | 7d8406be | pbrook | case 0x01: /* SCNTL1 */ |
1667 | 7d8406be | pbrook | s->scntl1 = val & ~LSI_SCNTL1_SST; |
1668 | 7d8406be | pbrook | if (val & LSI_SCNTL1_IARB) {
|
1669 | 7d8406be | pbrook | BADF("Immediate Arbritration not implemented\n");
|
1670 | 7d8406be | pbrook | } |
1671 | 7d8406be | pbrook | if (val & LSI_SCNTL1_RST) {
|
1672 | 680a34ee | Jan Kiszka | if (!(s->sstat0 & LSI_SSTAT0_RST)) {
|
1673 | 0866aca1 | Anthony Liguori | BusChild *kid; |
1674 | 680a34ee | Jan Kiszka | |
1675 | 0866aca1 | Anthony Liguori | QTAILQ_FOREACH(kid, &s->bus.qbus.children, sibling) { |
1676 | 0866aca1 | Anthony Liguori | DeviceState *dev = kid->child; |
1677 | 94afdadc | Anthony Liguori | device_reset(dev); |
1678 | 680a34ee | Jan Kiszka | } |
1679 | 680a34ee | Jan Kiszka | s->sstat0 |= LSI_SSTAT0_RST; |
1680 | 680a34ee | Jan Kiszka | lsi_script_scsi_interrupt(s, LSI_SIST0_RST, 0);
|
1681 | 680a34ee | Jan Kiszka | } |
1682 | 7d8406be | pbrook | } else {
|
1683 | 7d8406be | pbrook | s->sstat0 &= ~LSI_SSTAT0_RST; |
1684 | 7d8406be | pbrook | } |
1685 | 7d8406be | pbrook | break;
|
1686 | 7d8406be | pbrook | case 0x02: /* SCNTL2 */ |
1687 | 7d8406be | pbrook | val &= ~(LSI_SCNTL2_WSR | LSI_SCNTL2_WSS); |
1688 | 3d834c78 | ths | s->scntl2 = val; |
1689 | 7d8406be | pbrook | break;
|
1690 | 7d8406be | pbrook | case 0x03: /* SCNTL3 */ |
1691 | 7d8406be | pbrook | s->scntl3 = val; |
1692 | 7d8406be | pbrook | break;
|
1693 | 7d8406be | pbrook | case 0x04: /* SCID */ |
1694 | 7d8406be | pbrook | s->scid = val; |
1695 | 7d8406be | pbrook | break;
|
1696 | 7d8406be | pbrook | case 0x05: /* SXFER */ |
1697 | 7d8406be | pbrook | s->sxfer = val; |
1698 | 7d8406be | pbrook | break;
|
1699 | a917d384 | pbrook | case 0x06: /* SDID */ |
1700 | a917d384 | pbrook | if ((val & 0xf) != (s->ssid & 0xf)) |
1701 | a917d384 | pbrook | BADF("Destination ID does not match SSID\n");
|
1702 | a917d384 | pbrook | s->sdid = val & 0xf;
|
1703 | a917d384 | pbrook | break;
|
1704 | 7d8406be | pbrook | case 0x07: /* GPREG0 */ |
1705 | 7d8406be | pbrook | break;
|
1706 | a917d384 | pbrook | case 0x08: /* SFBR */ |
1707 | a917d384 | pbrook | /* The CPU is not allowed to write to this register. However the
|
1708 | a917d384 | pbrook | SCRIPTS register move instructions are. */
|
1709 | a917d384 | pbrook | s->sfbr = val; |
1710 | a917d384 | pbrook | break;
|
1711 | a15fdf86 | Laszlo Ast | case 0x0a: case 0x0b: |
1712 | 9167a69a | balrog | /* Openserver writes to these readonly registers on startup */
|
1713 | a15fdf86 | Laszlo Ast | return;
|
1714 | 7d8406be | pbrook | case 0x0c: case 0x0d: case 0x0e: case 0x0f: |
1715 | 7d8406be | pbrook | /* Linux writes to these readonly registers on startup. */
|
1716 | 7d8406be | pbrook | return;
|
1717 | 7d8406be | pbrook | CASE_SET_REG32(dsa, 0x10)
|
1718 | 7d8406be | pbrook | case 0x14: /* ISTAT0 */ |
1719 | 7d8406be | pbrook | s->istat0 = (s->istat0 & 0x0f) | (val & 0xf0); |
1720 | 7d8406be | pbrook | if (val & LSI_ISTAT0_ABRT) {
|
1721 | 7d8406be | pbrook | lsi_script_dma_interrupt(s, LSI_DSTAT_ABRT); |
1722 | 7d8406be | pbrook | } |
1723 | 7d8406be | pbrook | if (val & LSI_ISTAT0_INTF) {
|
1724 | 7d8406be | pbrook | s->istat0 &= ~LSI_ISTAT0_INTF; |
1725 | 7d8406be | pbrook | lsi_update_irq(s); |
1726 | 7d8406be | pbrook | } |
1727 | 4d611c9a | pbrook | if (s->waiting == 1 && val & LSI_ISTAT0_SIGP) { |
1728 | 7d8406be | pbrook | DPRINTF("Woken by SIGP\n");
|
1729 | 7d8406be | pbrook | s->waiting = 0;
|
1730 | 7d8406be | pbrook | s->dsp = s->dnad; |
1731 | 7d8406be | pbrook | lsi_execute_script(s); |
1732 | 7d8406be | pbrook | } |
1733 | 7d8406be | pbrook | if (val & LSI_ISTAT0_SRST) {
|
1734 | 2f0772c5 | Paolo Bonzini | qdev_reset_all(&s->dev.qdev); |
1735 | 7d8406be | pbrook | } |
1736 | 92d88ecb | ths | break;
|
1737 | 7d8406be | pbrook | case 0x16: /* MBOX0 */ |
1738 | 7d8406be | pbrook | s->mbox0 = val; |
1739 | 92d88ecb | ths | break;
|
1740 | 7d8406be | pbrook | case 0x17: /* MBOX1 */ |
1741 | 7d8406be | pbrook | s->mbox1 = val; |
1742 | 92d88ecb | ths | break;
|
1743 | 9167a69a | balrog | case 0x1a: /* CTEST2 */ |
1744 | 9167a69a | balrog | s->ctest2 = val & LSI_CTEST2_PCICIE; |
1745 | 9167a69a | balrog | break;
|
1746 | 7d8406be | pbrook | case 0x1b: /* CTEST3 */ |
1747 | 7d8406be | pbrook | s->ctest3 = val & 0x0f;
|
1748 | 7d8406be | pbrook | break;
|
1749 | 7d8406be | pbrook | CASE_SET_REG32(temp, 0x1c)
|
1750 | 7d8406be | pbrook | case 0x21: /* CTEST4 */ |
1751 | 7d8406be | pbrook | if (val & 7) { |
1752 | 7d8406be | pbrook | BADF("Unimplemented CTEST4-FBL 0x%x\n", val);
|
1753 | 7d8406be | pbrook | } |
1754 | 7d8406be | pbrook | s->ctest4 = val; |
1755 | 7d8406be | pbrook | break;
|
1756 | 7d8406be | pbrook | case 0x22: /* CTEST5 */ |
1757 | 7d8406be | pbrook | if (val & (LSI_CTEST5_ADCK | LSI_CTEST5_BBCK)) {
|
1758 | 7d8406be | pbrook | BADF("CTEST5 DMA increment not implemented\n");
|
1759 | 7d8406be | pbrook | } |
1760 | 7d8406be | pbrook | s->ctest5 = val; |
1761 | 7d8406be | pbrook | break;
|
1762 | 49c47daa | Sebastian Herbszt | CASE_SET_REG24(dbc, 0x24)
|
1763 | 4b9a2d6d | Sebastian Herbszt | CASE_SET_REG32(dnad, 0x28)
|
1764 | 3d834c78 | ths | case 0x2c: /* DSP[0:7] */ |
1765 | 7d8406be | pbrook | s->dsp &= 0xffffff00;
|
1766 | 7d8406be | pbrook | s->dsp |= val; |
1767 | 7d8406be | pbrook | break;
|
1768 | 3d834c78 | ths | case 0x2d: /* DSP[8:15] */ |
1769 | 7d8406be | pbrook | s->dsp &= 0xffff00ff;
|
1770 | 7d8406be | pbrook | s->dsp |= val << 8;
|
1771 | 7d8406be | pbrook | break;
|
1772 | 3d834c78 | ths | case 0x2e: /* DSP[16:23] */ |
1773 | 7d8406be | pbrook | s->dsp &= 0xff00ffff;
|
1774 | 7d8406be | pbrook | s->dsp |= val << 16;
|
1775 | 7d8406be | pbrook | break;
|
1776 | 3d834c78 | ths | case 0x2f: /* DSP[24:31] */ |
1777 | 7d8406be | pbrook | s->dsp &= 0x00ffffff;
|
1778 | 7d8406be | pbrook | s->dsp |= val << 24;
|
1779 | 7d8406be | pbrook | if ((s->dmode & LSI_DMODE_MAN) == 0 |
1780 | 7d8406be | pbrook | && (s->istat1 & LSI_ISTAT1_SRUN) == 0)
|
1781 | 7d8406be | pbrook | lsi_execute_script(s); |
1782 | 7d8406be | pbrook | break;
|
1783 | 7d8406be | pbrook | CASE_SET_REG32(dsps, 0x30)
|
1784 | 7d8406be | pbrook | CASE_SET_REG32(scratch[0], 0x34) |
1785 | 7d8406be | pbrook | case 0x38: /* DMODE */ |
1786 | 7d8406be | pbrook | if (val & (LSI_DMODE_SIOM | LSI_DMODE_DIOM)) {
|
1787 | 7d8406be | pbrook | BADF("IO mappings not implemented\n");
|
1788 | 7d8406be | pbrook | } |
1789 | 7d8406be | pbrook | s->dmode = val; |
1790 | 7d8406be | pbrook | break;
|
1791 | 7d8406be | pbrook | case 0x39: /* DIEN */ |
1792 | 7d8406be | pbrook | s->dien = val; |
1793 | 7d8406be | pbrook | lsi_update_irq(s); |
1794 | 7d8406be | pbrook | break;
|
1795 | bd8ee11a | Sebastian Herbszt | case 0x3a: /* SBR */ |
1796 | bd8ee11a | Sebastian Herbszt | s->sbr = val; |
1797 | bd8ee11a | Sebastian Herbszt | break;
|
1798 | 7d8406be | pbrook | case 0x3b: /* DCNTL */ |
1799 | 7d8406be | pbrook | s->dcntl = val & ~(LSI_DCNTL_PFF | LSI_DCNTL_STD); |
1800 | 7d8406be | pbrook | if ((val & LSI_DCNTL_STD) && (s->istat1 & LSI_ISTAT1_SRUN) == 0) |
1801 | 7d8406be | pbrook | lsi_execute_script(s); |
1802 | 7d8406be | pbrook | break;
|
1803 | 7d8406be | pbrook | case 0x40: /* SIEN0 */ |
1804 | 7d8406be | pbrook | s->sien0 = val; |
1805 | 7d8406be | pbrook | lsi_update_irq(s); |
1806 | 7d8406be | pbrook | break;
|
1807 | 7d8406be | pbrook | case 0x41: /* SIEN1 */ |
1808 | 7d8406be | pbrook | s->sien1 = val; |
1809 | 7d8406be | pbrook | lsi_update_irq(s); |
1810 | 7d8406be | pbrook | break;
|
1811 | 7d8406be | pbrook | case 0x47: /* GPCNTL0 */ |
1812 | 7d8406be | pbrook | break;
|
1813 | 7d8406be | pbrook | case 0x48: /* STIME0 */ |
1814 | 7d8406be | pbrook | s->stime0 = val; |
1815 | 7d8406be | pbrook | break;
|
1816 | 7d8406be | pbrook | case 0x49: /* STIME1 */ |
1817 | 7d8406be | pbrook | if (val & 0xf) { |
1818 | 7d8406be | pbrook | DPRINTF("General purpose timer not implemented\n");
|
1819 | 7d8406be | pbrook | /* ??? Raising the interrupt immediately seems to be sufficient
|
1820 | 7d8406be | pbrook | to keep the FreeBSD driver happy. */
|
1821 | 7d8406be | pbrook | lsi_script_scsi_interrupt(s, 0, LSI_SIST1_GEN);
|
1822 | 7d8406be | pbrook | } |
1823 | 7d8406be | pbrook | break;
|
1824 | 7d8406be | pbrook | case 0x4a: /* RESPID0 */ |
1825 | 7d8406be | pbrook | s->respid0 = val; |
1826 | 7d8406be | pbrook | break;
|
1827 | 7d8406be | pbrook | case 0x4b: /* RESPID1 */ |
1828 | 7d8406be | pbrook | s->respid1 = val; |
1829 | 7d8406be | pbrook | break;
|
1830 | 7d8406be | pbrook | case 0x4d: /* STEST1 */ |
1831 | 7d8406be | pbrook | s->stest1 = val; |
1832 | 7d8406be | pbrook | break;
|
1833 | 7d8406be | pbrook | case 0x4e: /* STEST2 */ |
1834 | 7d8406be | pbrook | if (val & 1) { |
1835 | 7d8406be | pbrook | BADF("Low level mode not implemented\n");
|
1836 | 7d8406be | pbrook | } |
1837 | 7d8406be | pbrook | s->stest2 = val; |
1838 | 7d8406be | pbrook | break;
|
1839 | 7d8406be | pbrook | case 0x4f: /* STEST3 */ |
1840 | 7d8406be | pbrook | if (val & 0x41) { |
1841 | 7d8406be | pbrook | BADF("SCSI FIFO test mode not implemented\n");
|
1842 | 7d8406be | pbrook | } |
1843 | 7d8406be | pbrook | s->stest3 = val; |
1844 | 7d8406be | pbrook | break;
|
1845 | 7d8406be | pbrook | case 0x56: /* CCNTL0 */ |
1846 | 7d8406be | pbrook | s->ccntl0 = val; |
1847 | 7d8406be | pbrook | break;
|
1848 | 7d8406be | pbrook | case 0x57: /* CCNTL1 */ |
1849 | 7d8406be | pbrook | s->ccntl1 = val; |
1850 | 7d8406be | pbrook | break;
|
1851 | 7d8406be | pbrook | CASE_SET_REG32(mmrs, 0xa0)
|
1852 | 7d8406be | pbrook | CASE_SET_REG32(mmws, 0xa4)
|
1853 | 7d8406be | pbrook | CASE_SET_REG32(sfs, 0xa8)
|
1854 | 7d8406be | pbrook | CASE_SET_REG32(drs, 0xac)
|
1855 | 7d8406be | pbrook | CASE_SET_REG32(sbms, 0xb0)
|
1856 | ab57d967 | aliguori | CASE_SET_REG32(dbms, 0xb4)
|
1857 | 7d8406be | pbrook | CASE_SET_REG32(dnad64, 0xb8)
|
1858 | 7d8406be | pbrook | CASE_SET_REG32(pmjad1, 0xc0)
|
1859 | 7d8406be | pbrook | CASE_SET_REG32(pmjad2, 0xc4)
|
1860 | 7d8406be | pbrook | CASE_SET_REG32(rbc, 0xc8)
|
1861 | 7d8406be | pbrook | CASE_SET_REG32(ua, 0xcc)
|
1862 | 7d8406be | pbrook | CASE_SET_REG32(ia, 0xd4)
|
1863 | 7d8406be | pbrook | CASE_SET_REG32(sbc, 0xd8)
|
1864 | 7d8406be | pbrook | CASE_SET_REG32(csbc, 0xdc)
|
1865 | 7d8406be | pbrook | default:
|
1866 | 7d8406be | pbrook | if (offset >= 0x5c && offset < 0xa0) { |
1867 | 7d8406be | pbrook | int n;
|
1868 | 7d8406be | pbrook | int shift;
|
1869 | 7d8406be | pbrook | n = (offset - 0x58) >> 2; |
1870 | 7d8406be | pbrook | shift = (offset & 3) * 8; |
1871 | 7d8406be | pbrook | s->scratch[n] &= ~(0xff << shift);
|
1872 | 7d8406be | pbrook | s->scratch[n] |= (val & 0xff) << shift;
|
1873 | 7d8406be | pbrook | } else {
|
1874 | 7d8406be | pbrook | BADF("Unhandled writeb 0x%x = 0x%x\n", offset, val);
|
1875 | 7d8406be | pbrook | } |
1876 | 7d8406be | pbrook | } |
1877 | 49c47daa | Sebastian Herbszt | #undef CASE_SET_REG24
|
1878 | 7d8406be | pbrook | #undef CASE_SET_REG32
|
1879 | 7d8406be | pbrook | } |
1880 | 7d8406be | pbrook | |
1881 | a8170e5e | Avi Kivity | static void lsi_mmio_write(void *opaque, hwaddr addr, |
1882 | b0ce84e5 | Avi Kivity | uint64_t val, unsigned size)
|
1883 | 7d8406be | pbrook | { |
1884 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1885 | 7d8406be | pbrook | |
1886 | 7d8406be | pbrook | lsi_reg_writeb(s, addr & 0xff, val);
|
1887 | 7d8406be | pbrook | } |
1888 | 7d8406be | pbrook | |
1889 | a8170e5e | Avi Kivity | static uint64_t lsi_mmio_read(void *opaque, hwaddr addr, |
1890 | b0ce84e5 | Avi Kivity | unsigned size)
|
1891 | 7d8406be | pbrook | { |
1892 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1893 | 7d8406be | pbrook | |
1894 | 7d8406be | pbrook | return lsi_reg_readb(s, addr & 0xff); |
1895 | 7d8406be | pbrook | } |
1896 | 7d8406be | pbrook | |
1897 | b0ce84e5 | Avi Kivity | static const MemoryRegionOps lsi_mmio_ops = { |
1898 | b0ce84e5 | Avi Kivity | .read = lsi_mmio_read, |
1899 | b0ce84e5 | Avi Kivity | .write = lsi_mmio_write, |
1900 | b0ce84e5 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
1901 | b0ce84e5 | Avi Kivity | .impl = { |
1902 | b0ce84e5 | Avi Kivity | .min_access_size = 1,
|
1903 | b0ce84e5 | Avi Kivity | .max_access_size = 1,
|
1904 | b0ce84e5 | Avi Kivity | }, |
1905 | 7d8406be | pbrook | }; |
1906 | 7d8406be | pbrook | |
1907 | a8170e5e | Avi Kivity | static void lsi_ram_write(void *opaque, hwaddr addr, |
1908 | b0ce84e5 | Avi Kivity | uint64_t val, unsigned size)
|
1909 | 7d8406be | pbrook | { |
1910 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1911 | 7d8406be | pbrook | uint32_t newval; |
1912 | b0ce84e5 | Avi Kivity | uint32_t mask; |
1913 | 7d8406be | pbrook | int shift;
|
1914 | 7d8406be | pbrook | |
1915 | 7d8406be | pbrook | newval = s->script_ram[addr >> 2];
|
1916 | 7d8406be | pbrook | shift = (addr & 3) * 8; |
1917 | b0ce84e5 | Avi Kivity | mask = ((uint64_t)1 << (size * 8)) - 1; |
1918 | b0ce84e5 | Avi Kivity | newval &= ~(mask << shift); |
1919 | 7d8406be | pbrook | newval |= val << shift; |
1920 | 7d8406be | pbrook | s->script_ram[addr >> 2] = newval;
|
1921 | 7d8406be | pbrook | } |
1922 | 7d8406be | pbrook | |
1923 | a8170e5e | Avi Kivity | static uint64_t lsi_ram_read(void *opaque, hwaddr addr, |
1924 | b0ce84e5 | Avi Kivity | unsigned size)
|
1925 | 7d8406be | pbrook | { |
1926 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1927 | 7d8406be | pbrook | uint32_t val; |
1928 | b0ce84e5 | Avi Kivity | uint32_t mask; |
1929 | 7d8406be | pbrook | |
1930 | 7d8406be | pbrook | val = s->script_ram[addr >> 2];
|
1931 | b0ce84e5 | Avi Kivity | mask = ((uint64_t)1 << (size * 8)) - 1; |
1932 | 7d8406be | pbrook | val >>= (addr & 3) * 8; |
1933 | b0ce84e5 | Avi Kivity | return val & mask;
|
1934 | 7d8406be | pbrook | } |
1935 | 7d8406be | pbrook | |
1936 | b0ce84e5 | Avi Kivity | static const MemoryRegionOps lsi_ram_ops = { |
1937 | b0ce84e5 | Avi Kivity | .read = lsi_ram_read, |
1938 | b0ce84e5 | Avi Kivity | .write = lsi_ram_write, |
1939 | b0ce84e5 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
1940 | 7d8406be | pbrook | }; |
1941 | 7d8406be | pbrook | |
1942 | a8170e5e | Avi Kivity | static uint64_t lsi_io_read(void *opaque, hwaddr addr, |
1943 | b0ce84e5 | Avi Kivity | unsigned size)
|
1944 | 7d8406be | pbrook | { |
1945 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1946 | 7d8406be | pbrook | return lsi_reg_readb(s, addr & 0xff); |
1947 | 7d8406be | pbrook | } |
1948 | 7d8406be | pbrook | |
1949 | a8170e5e | Avi Kivity | static void lsi_io_write(void *opaque, hwaddr addr, |
1950 | b0ce84e5 | Avi Kivity | uint64_t val, unsigned size)
|
1951 | 7d8406be | pbrook | { |
1952 | eb40f984 | Juan Quintela | LSIState *s = opaque; |
1953 | 7d8406be | pbrook | lsi_reg_writeb(s, addr & 0xff, val);
|
1954 | 7d8406be | pbrook | } |
1955 | 7d8406be | pbrook | |
1956 | b0ce84e5 | Avi Kivity | static const MemoryRegionOps lsi_io_ops = { |
1957 | b0ce84e5 | Avi Kivity | .read = lsi_io_read, |
1958 | b0ce84e5 | Avi Kivity | .write = lsi_io_write, |
1959 | b0ce84e5 | Avi Kivity | .endianness = DEVICE_NATIVE_ENDIAN, |
1960 | b0ce84e5 | Avi Kivity | .impl = { |
1961 | b0ce84e5 | Avi Kivity | .min_access_size = 1,
|
1962 | b0ce84e5 | Avi Kivity | .max_access_size = 1,
|
1963 | b0ce84e5 | Avi Kivity | }, |
1964 | b0ce84e5 | Avi Kivity | }; |
1965 | 7d8406be | pbrook | |
1966 | 54eefd72 | Jan Kiszka | static void lsi_scsi_reset(DeviceState *dev) |
1967 | 54eefd72 | Jan Kiszka | { |
1968 | 54eefd72 | Jan Kiszka | LSIState *s = DO_UPCAST(LSIState, dev.qdev, dev); |
1969 | 54eefd72 | Jan Kiszka | |
1970 | 54eefd72 | Jan Kiszka | lsi_soft_reset(s); |
1971 | 54eefd72 | Jan Kiszka | } |
1972 | 54eefd72 | Jan Kiszka | |
1973 | 4a1b0f1c | Juan Quintela | static void lsi_pre_save(void *opaque) |
1974 | 777aec7a | Nolan | { |
1975 | 777aec7a | Nolan | LSIState *s = opaque; |
1976 | 777aec7a | Nolan | |
1977 | b96a0da0 | Gerd Hoffmann | if (s->current) {
|
1978 | b96a0da0 | Gerd Hoffmann | assert(s->current->dma_buf == NULL);
|
1979 | b96a0da0 | Gerd Hoffmann | assert(s->current->dma_len == 0);
|
1980 | b96a0da0 | Gerd Hoffmann | } |
1981 | 042ec49d | Gerd Hoffmann | assert(QTAILQ_EMPTY(&s->queue)); |
1982 | 777aec7a | Nolan | } |
1983 | 777aec7a | Nolan | |
1984 | 4a1b0f1c | Juan Quintela | static const VMStateDescription vmstate_lsi_scsi = { |
1985 | 4a1b0f1c | Juan Quintela | .name = "lsiscsi",
|
1986 | 4a1b0f1c | Juan Quintela | .version_id = 0,
|
1987 | 4a1b0f1c | Juan Quintela | .minimum_version_id = 0,
|
1988 | 4a1b0f1c | Juan Quintela | .minimum_version_id_old = 0,
|
1989 | 4a1b0f1c | Juan Quintela | .pre_save = lsi_pre_save, |
1990 | 4a1b0f1c | Juan Quintela | .fields = (VMStateField []) { |
1991 | 4a1b0f1c | Juan Quintela | VMSTATE_PCI_DEVICE(dev, LSIState), |
1992 | 4a1b0f1c | Juan Quintela | |
1993 | 4a1b0f1c | Juan Quintela | VMSTATE_INT32(carry, LSIState), |
1994 | 2f172849 | Hannes Reinecke | VMSTATE_INT32(status, LSIState), |
1995 | 4a1b0f1c | Juan Quintela | VMSTATE_INT32(msg_action, LSIState), |
1996 | 4a1b0f1c | Juan Quintela | VMSTATE_INT32(msg_len, LSIState), |
1997 | 4a1b0f1c | Juan Quintela | VMSTATE_BUFFER(msg, LSIState), |
1998 | 4a1b0f1c | Juan Quintela | VMSTATE_INT32(waiting, LSIState), |
1999 | 4a1b0f1c | Juan Quintela | |
2000 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dsa, LSIState), |
2001 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(temp, LSIState), |
2002 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dnad, LSIState), |
2003 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dbc, LSIState), |
2004 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(istat0, LSIState), |
2005 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(istat1, LSIState), |
2006 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dcmd, LSIState), |
2007 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dstat, LSIState), |
2008 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dien, LSIState), |
2009 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sist0, LSIState), |
2010 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sist1, LSIState), |
2011 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sien0, LSIState), |
2012 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sien1, LSIState), |
2013 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(mbox0, LSIState), |
2014 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(mbox1, LSIState), |
2015 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dfifo, LSIState), |
2016 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ctest2, LSIState), |
2017 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ctest3, LSIState), |
2018 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ctest4, LSIState), |
2019 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ctest5, LSIState), |
2020 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ccntl0, LSIState), |
2021 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ccntl1, LSIState), |
2022 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dsp, LSIState), |
2023 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dsps, LSIState), |
2024 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dmode, LSIState), |
2025 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(dcntl, LSIState), |
2026 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(scntl0, LSIState), |
2027 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(scntl1, LSIState), |
2028 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(scntl2, LSIState), |
2029 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(scntl3, LSIState), |
2030 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sstat0, LSIState), |
2031 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sstat1, LSIState), |
2032 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(scid, LSIState), |
2033 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sxfer, LSIState), |
2034 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(socl, LSIState), |
2035 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sdid, LSIState), |
2036 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(ssid, LSIState), |
2037 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sfbr, LSIState), |
2038 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(stest1, LSIState), |
2039 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(stest2, LSIState), |
2040 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(stest3, LSIState), |
2041 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sidl, LSIState), |
2042 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(stime0, LSIState), |
2043 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(respid0, LSIState), |
2044 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(respid1, LSIState), |
2045 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(mmrs, LSIState), |
2046 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(mmws, LSIState), |
2047 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(sfs, LSIState), |
2048 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(drs, LSIState), |
2049 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(sbms, LSIState), |
2050 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dbms, LSIState), |
2051 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(dnad64, LSIState), |
2052 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(pmjad1, LSIState), |
2053 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(pmjad2, LSIState), |
2054 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(rbc, LSIState), |
2055 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(ua, LSIState), |
2056 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(ia, LSIState), |
2057 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(sbc, LSIState), |
2058 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT32(csbc, LSIState), |
2059 | 4a1b0f1c | Juan Quintela | VMSTATE_BUFFER_UNSAFE(scratch, LSIState, 0, 18 * sizeof(uint32_t)), |
2060 | 4a1b0f1c | Juan Quintela | VMSTATE_UINT8(sbr, LSIState), |
2061 | 4a1b0f1c | Juan Quintela | |
2062 | 4a1b0f1c | Juan Quintela | VMSTATE_BUFFER_UNSAFE(script_ram, LSIState, 0, 2048 * sizeof(uint32_t)), |
2063 | 4a1b0f1c | Juan Quintela | VMSTATE_END_OF_LIST() |
2064 | 777aec7a | Nolan | } |
2065 | 4a1b0f1c | Juan Quintela | }; |
2066 | 777aec7a | Nolan | |
2067 | f90c2bcd | Alex Williamson | static void lsi_scsi_uninit(PCIDevice *d) |
2068 | 4b09be85 | aliguori | { |
2069 | f305261f | Juan Quintela | LSIState *s = DO_UPCAST(LSIState, dev, d); |
2070 | 4b09be85 | aliguori | |
2071 | b0ce84e5 | Avi Kivity | memory_region_destroy(&s->mmio_io); |
2072 | b0ce84e5 | Avi Kivity | memory_region_destroy(&s->ram_io); |
2073 | b0ce84e5 | Avi Kivity | memory_region_destroy(&s->io_io); |
2074 | 4b09be85 | aliguori | } |
2075 | 4b09be85 | aliguori | |
2076 | afd4030c | Paolo Bonzini | static const struct SCSIBusInfo lsi_scsi_info = { |
2077 | afd4030c | Paolo Bonzini | .tcq = true,
|
2078 | 7e0380b9 | Paolo Bonzini | .max_target = LSI_MAX_DEVS, |
2079 | 7e0380b9 | Paolo Bonzini | .max_lun = 0, /* LUN support is buggy */ |
2080 | afd4030c | Paolo Bonzini | |
2081 | c6df7102 | Paolo Bonzini | .transfer_data = lsi_transfer_data, |
2082 | 94d3f98a | Paolo Bonzini | .complete = lsi_command_complete, |
2083 | 94d3f98a | Paolo Bonzini | .cancel = lsi_request_cancelled |
2084 | cfdc1bb0 | Paolo Bonzini | }; |
2085 | cfdc1bb0 | Paolo Bonzini | |
2086 | 81a322d4 | Gerd Hoffmann | static int lsi_scsi_init(PCIDevice *dev) |
2087 | 7d8406be | pbrook | { |
2088 | f305261f | Juan Quintela | LSIState *s = DO_UPCAST(LSIState, dev, dev); |
2089 | deb54399 | aliguori | uint8_t *pci_conf; |
2090 | 7d8406be | pbrook | |
2091 | f305261f | Juan Quintela | pci_conf = s->dev.config; |
2092 | deb54399 | aliguori | |
2093 | 9167a69a | balrog | /* PCI latency timer = 255 */
|
2094 | 5845f0e5 | Michael S. Tsirkin | pci_conf[PCI_LATENCY_TIMER] = 0xff;
|
2095 | 817e0b6f | Michael S. Tsirkin | /* Interrupt pin A */
|
2096 | 5845f0e5 | Michael S. Tsirkin | pci_conf[PCI_INTERRUPT_PIN] = 0x01;
|
2097 | 7d8406be | pbrook | |
2098 | b0ce84e5 | Avi Kivity | memory_region_init_io(&s->mmio_io, &lsi_mmio_ops, s, "lsi-mmio", 0x400); |
2099 | b0ce84e5 | Avi Kivity | memory_region_init_io(&s->ram_io, &lsi_ram_ops, s, "lsi-ram", 0x2000); |
2100 | b0ce84e5 | Avi Kivity | memory_region_init_io(&s->io_io, &lsi_io_ops, s, "lsi-io", 256); |
2101 | b0ce84e5 | Avi Kivity | |
2102 | e824b2cc | Avi Kivity | pci_register_bar(&s->dev, 0, PCI_BASE_ADDRESS_SPACE_IO, &s->io_io);
|
2103 | e824b2cc | Avi Kivity | pci_register_bar(&s->dev, 1, 0, &s->mmio_io); |
2104 | e824b2cc | Avi Kivity | pci_register_bar(&s->dev, 2, PCI_BASE_ADDRESS_SPACE_MEMORY, &s->ram_io);
|
2105 | 042ec49d | Gerd Hoffmann | QTAILQ_INIT(&s->queue); |
2106 | 7d8406be | pbrook | |
2107 | afd4030c | Paolo Bonzini | scsi_bus_new(&s->bus, &dev->qdev, &lsi_scsi_info); |
2108 | 5b684b5a | Gerd Hoffmann | if (!dev->qdev.hotplugged) {
|
2109 | fa66b909 | Markus Armbruster | return scsi_bus_legacy_handle_cmdline(&s->bus);
|
2110 | 5b684b5a | Gerd Hoffmann | } |
2111 | 81a322d4 | Gerd Hoffmann | return 0; |
2112 | 7d8406be | pbrook | } |
2113 | 9be5dafe | Paul Brook | |
2114 | 40021f08 | Anthony Liguori | static void lsi_class_init(ObjectClass *klass, void *data) |
2115 | 40021f08 | Anthony Liguori | { |
2116 | 39bffca2 | Anthony Liguori | DeviceClass *dc = DEVICE_CLASS(klass); |
2117 | 40021f08 | Anthony Liguori | PCIDeviceClass *k = PCI_DEVICE_CLASS(klass); |
2118 | 40021f08 | Anthony Liguori | |
2119 | 40021f08 | Anthony Liguori | k->init = lsi_scsi_init; |
2120 | 40021f08 | Anthony Liguori | k->exit = lsi_scsi_uninit; |
2121 | 40021f08 | Anthony Liguori | k->vendor_id = PCI_VENDOR_ID_LSI_LOGIC; |
2122 | 40021f08 | Anthony Liguori | k->device_id = PCI_DEVICE_ID_LSI_53C895A; |
2123 | 40021f08 | Anthony Liguori | k->class_id = PCI_CLASS_STORAGE_SCSI; |
2124 | 40021f08 | Anthony Liguori | k->subsystem_id = 0x1000;
|
2125 | 39bffca2 | Anthony Liguori | dc->reset = lsi_scsi_reset; |
2126 | 39bffca2 | Anthony Liguori | dc->vmsd = &vmstate_lsi_scsi; |
2127 | 40021f08 | Anthony Liguori | } |
2128 | 40021f08 | Anthony Liguori | |
2129 | 39bffca2 | Anthony Liguori | static TypeInfo lsi_info = {
|
2130 | 39bffca2 | Anthony Liguori | .name = "lsi53c895a",
|
2131 | 39bffca2 | Anthony Liguori | .parent = TYPE_PCI_DEVICE, |
2132 | 39bffca2 | Anthony Liguori | .instance_size = sizeof(LSIState),
|
2133 | 39bffca2 | Anthony Liguori | .class_init = lsi_class_init, |
2134 | 0aab0d3a | Gerd Hoffmann | }; |
2135 | 0aab0d3a | Gerd Hoffmann | |
2136 | 83f7d43a | Andreas Färber | static void lsi53c895a_register_types(void) |
2137 | 9be5dafe | Paul Brook | { |
2138 | 39bffca2 | Anthony Liguori | type_register_static(&lsi_info); |
2139 | 9be5dafe | Paul Brook | } |
2140 | 9be5dafe | Paul Brook | |
2141 | 83f7d43a | Andreas Färber | type_init(lsi53c895a_register_types) |