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Name Size
cpu.h 17.8 kB
exec.h 946 Bytes
helper.c 90.8 kB
helper.h 17 kB
iwmmxt_helper.c 24.7 kB
machine.c 7.2 kB
neon_helper.c 52.8 kB
op_addsub.h 1.8 kB
op_helper.c 9.5 kB
translate.c 342.6 kB

Latest revisions

# Date Author Comment
7807eed9 07/26/2011 05:30 pm Jamie Iles

target-arm: support for ARM1176JZF-s cores

Add support for v6K ARM1176JZF-S. This core includes the VA<->PA
translation capability and security extensions.

Signed-off-by: Jamie Iles <>
Signed-off-by: Peter Maydell <>
906879a9 07/26/2011 05:30 pm Peter Maydell

target-arm: Mark 1136r1 as a v6K core

The 1136r1 is actually a v6K core (unlike the 1136r0); mark it as such,
thus enabling the TLS registers, NOP hints, CLREX, half and byte wide
exclusive load/stores, etc.

The VA-to-PA translation registers are not present on 1136r1, so...
87f19eb2 07/26/2011 05:30 pm Peter Maydell

target-arm: Support v6 barriers in linux-user mode

ARMv6 implemented various operations as special cases of cp15 accesses
which are true instructions in v7; this includes barriers (DMB, DSB, ISB).
Catch this special case at translate time, so that it works in linux-user...
934814f1 07/26/2011 05:30 pm Peter Maydell

target-arm: Handle UNDEF and UNPREDICTABLE cases for VLDM, VSTM

Handle the UNDEF and UNPREDICTABLE cases for VLDM and VSTM. In
particular, we now generate an undef exception for overlarge imm8
values rather than generating 1000+ TCG ops and hitting an assertion....
6e0c0ed1 07/26/2011 05:30 pm Peter Maydell

target-arm: UNDEF on a VCVTT/VCVTB UNPREDICTABLE to avoid TCG assert

VCVTT/VCVTB with bit 8 set is UNPREDICTABLE; we choose to UNDEF.
This avoids a TCG assert later when the VCVTT/VCVTB code tries to
use a source register that wasn't ever set up.

We pull the check for the presence of the half-precision extension...
a492892c 07/26/2011 05:30 pm Peter Maydell

target-arm: Don't print debug messages for various UNDEF cases

Remove some stray printfs for cases which don't generally happen
(some VFP UNDEF cases, reads and writes to unknown cp14 registers);
we should simply generate an UNDEF when the instruction is executed....
0ab06d83 07/26/2011 05:22 pm Jamie Iles

target-arm: make VMSAv7 remapping and AP dependent on V6K

The VMSAv7 remapping and access permissions were introduced in ARMv6K
and not ARMv7.

Signed-off-by: Jamie Iles <>
Signed-off-by: Peter Maydell <>
8e31bf38 07/23/2011 07:26 pm Matthew Fernandez

Correct spelling of licensed

Correct typos of "licenced" to "licensed".

Reviewed-by: Stefan Weil <>
Reviewed-by: Andreas F=E4rber <>
Signed-off-by: Matthew Fernandez <>
Signed-off-by: Anthony Liguori <>
a3ce3668 07/20/2011 11:23 pm Blue Swirl

Merge branch 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm

  • 'for-upstream' of git://git.linaro.org/people/pmaydell/qemu-arm:
    target-arm: Fix BASEPRI, BASEPRI_MAX, and FAULTMASK access
    target-arm: Minimal implementation of performance counters...
462a8bc6 07/04/2011 10:58 pm Stefan Weil

arm: Add const attribute to some arm_boot_info pointers

Parameter 'info' is const, so add the missing attribute.

v2:
Add 'const' to the local variable info in do_cpu_reset() and to
the boot_info field in CPUARMState (suggested by Peter Maydell).

Cc: Andrzej Zaborowski <>...

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