root / hw / pci.h @ a8b7063b
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1 | 87ecb68b | pbrook | #ifndef QEMU_PCI_H
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2 | 87ecb68b | pbrook | #define QEMU_PCI_H
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3 | 87ecb68b | pbrook | |
4 | 376253ec | aliguori | #include "qemu-common.h" |
5 | 376253ec | aliguori | |
6 | 6b1b92d3 | Paul Brook | #include "qdev.h" |
7 | 6b1b92d3 | Paul Brook | |
8 | 87ecb68b | pbrook | /* PCI includes legacy ISA access. */
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9 | 87ecb68b | pbrook | #include "isa.h" |
10 | 87ecb68b | pbrook | |
11 | 87ecb68b | pbrook | /* PCI bus */
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12 | 87ecb68b | pbrook | |
13 | 87ecb68b | pbrook | extern target_phys_addr_t pci_mem_base;
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14 | 87ecb68b | pbrook | |
15 | 3ae80618 | aliguori | #define PCI_DEVFN(slot, func) ((((slot) & 0x1f) << 3) | ((func) & 0x07)) |
16 | 3ae80618 | aliguori | #define PCI_SLOT(devfn) (((devfn) >> 3) & 0x1f) |
17 | 3ae80618 | aliguori | #define PCI_FUNC(devfn) ((devfn) & 0x07) |
18 | 3ae80618 | aliguori | |
19 | a770dc7e | aliguori | /* Class, Vendor and Device IDs from Linux's pci_ids.h */
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20 | a770dc7e | aliguori | #include "pci_ids.h" |
21 | 173a543b | blueswir1 | |
22 | a770dc7e | aliguori | /* QEMU-specific Vendor and Device ID definitions */
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23 | 6f338c34 | aliguori | |
24 | a770dc7e | aliguori | /* IBM (0x1014) */
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25 | a770dc7e | aliguori | #define PCI_DEVICE_ID_IBM_440GX 0x027f |
26 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_IBM_OPENPIC2 0xffff |
27 | deb54399 | aliguori | |
28 | a770dc7e | aliguori | /* Hitachi (0x1054) */
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29 | deb54399 | aliguori | #define PCI_VENDOR_ID_HITACHI 0x1054 |
30 | a770dc7e | aliguori | #define PCI_DEVICE_ID_HITACHI_SH7751R 0x350e |
31 | deb54399 | aliguori | |
32 | a770dc7e | aliguori | /* Apple (0x106b) */
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33 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_343S1201 0x0010 |
34 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_I_PCI 0x001e |
35 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_PCI 0x001f |
36 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_APPLE_UNI_N_KEYL 0x0022 |
37 | a770dc7e | aliguori | #define PCI_DEVICE_ID_APPLE_IPID_USB 0x003f |
38 | deb54399 | aliguori | |
39 | a770dc7e | aliguori | /* Realtek (0x10ec) */
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40 | a770dc7e | aliguori | #define PCI_DEVICE_ID_REALTEK_8029 0x8029 |
41 | deb54399 | aliguori | |
42 | a770dc7e | aliguori | /* Xilinx (0x10ee) */
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43 | a770dc7e | aliguori | #define PCI_DEVICE_ID_XILINX_XC2VP30 0x0300 |
44 | deb54399 | aliguori | |
45 | a770dc7e | aliguori | /* Marvell (0x11ab) */
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46 | a770dc7e | aliguori | #define PCI_DEVICE_ID_MARVELL_GT6412X 0x4620 |
47 | deb54399 | aliguori | |
48 | a770dc7e | aliguori | /* QEMU/Bochs VGA (0x1234) */
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49 | 4ebcf884 | blueswir1 | #define PCI_VENDOR_ID_QEMU 0x1234 |
50 | 4ebcf884 | blueswir1 | #define PCI_DEVICE_ID_QEMU_VGA 0x1111 |
51 | 4ebcf884 | blueswir1 | |
52 | a770dc7e | aliguori | /* VMWare (0x15ad) */
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53 | deb54399 | aliguori | #define PCI_VENDOR_ID_VMWARE 0x15ad |
54 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA2 0x0405 |
55 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SVGA 0x0710 |
56 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_NET 0x0720 |
57 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_SCSI 0x0730 |
58 | deb54399 | aliguori | #define PCI_DEVICE_ID_VMWARE_IDE 0x1729 |
59 | deb54399 | aliguori | |
60 | cef3017c | aliguori | /* Intel (0x8086) */
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61 | a770dc7e | aliguori | #define PCI_DEVICE_ID_INTEL_82551IT 0x1209 |
62 | 74c62ba8 | aurel32 | |
63 | deb54399 | aliguori | /* Red Hat / Qumranet (for QEMU) -- see pci-ids.txt */
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64 | d350d97d | aliguori | #define PCI_VENDOR_ID_REDHAT_QUMRANET 0x1af4 |
65 | d350d97d | aliguori | #define PCI_SUBVENDOR_ID_REDHAT_QUMRANET 0x1af4 |
66 | d350d97d | aliguori | #define PCI_SUBDEVICE_ID_QEMU 0x1100 |
67 | d350d97d | aliguori | |
68 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_NET 0x1000 |
69 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BLOCK 0x1001 |
70 | d350d97d | aliguori | #define PCI_DEVICE_ID_VIRTIO_BALLOON 0x1002 |
71 | 14d50bef | aliguori | #define PCI_DEVICE_ID_VIRTIO_CONSOLE 0x1003 |
72 | d350d97d | aliguori | |
73 | 87ecb68b | pbrook | typedef void PCIConfigWriteFunc(PCIDevice *pci_dev, |
74 | 87ecb68b | pbrook | uint32_t address, uint32_t data, int len);
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75 | 87ecb68b | pbrook | typedef uint32_t PCIConfigReadFunc(PCIDevice *pci_dev,
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76 | 87ecb68b | pbrook | uint32_t address, int len);
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77 | 87ecb68b | pbrook | typedef void PCIMapIORegionFunc(PCIDevice *pci_dev, int region_num, |
78 | 87ecb68b | pbrook | uint32_t addr, uint32_t size, int type);
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79 | 5851e08c | aliguori | typedef int PCIUnregisterFunc(PCIDevice *pci_dev); |
80 | 87ecb68b | pbrook | |
81 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_MEM 0x00 |
82 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_IO 0x01 |
83 | 87ecb68b | pbrook | #define PCI_ADDRESS_SPACE_MEM_PREFETCH 0x08 |
84 | 87ecb68b | pbrook | |
85 | 87ecb68b | pbrook | typedef struct PCIIORegion { |
86 | 87ecb68b | pbrook | uint32_t addr; /* current PCI mapping address. -1 means not mapped */
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87 | 87ecb68b | pbrook | uint32_t size; |
88 | 87ecb68b | pbrook | uint8_t type; |
89 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func; |
90 | 87ecb68b | pbrook | } PCIIORegion; |
91 | 87ecb68b | pbrook | |
92 | 87ecb68b | pbrook | #define PCI_ROM_SLOT 6 |
93 | 87ecb68b | pbrook | #define PCI_NUM_REGIONS 7 |
94 | 87ecb68b | pbrook | |
95 | cef3017c | aliguori | /* Declarations from linux/pci_regs.h */
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96 | 87ecb68b | pbrook | #define PCI_VENDOR_ID 0x00 /* 16 bits */ |
97 | 87ecb68b | pbrook | #define PCI_DEVICE_ID 0x02 /* 16 bits */ |
98 | 87ecb68b | pbrook | #define PCI_COMMAND 0x04 /* 16 bits */ |
99 | 87ecb68b | pbrook | #define PCI_COMMAND_IO 0x1 /* Enable response in I/O space */ |
100 | 87ecb68b | pbrook | #define PCI_COMMAND_MEMORY 0x2 /* Enable response in Memory space */ |
101 | cef3017c | aliguori | #define PCI_STATUS 0x06 /* 16 bits */ |
102 | cef3017c | aliguori | #define PCI_REVISION_ID 0x08 /* 8 bits */ |
103 | 87ecb68b | pbrook | #define PCI_CLASS_DEVICE 0x0a /* Device class */ |
104 | cef3017c | aliguori | #define PCI_HEADER_TYPE 0x0e /* 8 bits */ |
105 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_NORMAL 0 |
106 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_BRIDGE 1 |
107 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_CARDBUS 2 |
108 | 6407f373 | Isaku Yamahata | #define PCI_HEADER_TYPE_MULTI_FUNCTION 0x80 |
109 | cef3017c | aliguori | #define PCI_SUBSYSTEM_VENDOR_ID 0x2c /* 16 bits */ |
110 | cef3017c | aliguori | #define PCI_SUBSYSTEM_ID 0x2e /* 16 bits */ |
111 | 87ecb68b | pbrook | #define PCI_INTERRUPT_LINE 0x3c /* 8 bits */ |
112 | 87ecb68b | pbrook | #define PCI_INTERRUPT_PIN 0x3d /* 8 bits */ |
113 | 87ecb68b | pbrook | #define PCI_MIN_GNT 0x3e /* 8 bits */ |
114 | 87ecb68b | pbrook | #define PCI_MAX_LAT 0x3f /* 8 bits */ |
115 | 87ecb68b | pbrook | |
116 | cef3017c | aliguori | #define PCI_REVISION 0x08 /* obsolete, use PCI_REVISION_ID */ |
117 | cef3017c | aliguori | #define PCI_SUBVENDOR_ID 0x2c /* obsolete, use PCI_SUBSYSTEM_VENDOR_ID */ |
118 | cef3017c | aliguori | #define PCI_SUBDEVICE_ID 0x2e /* obsolete, use PCI_SUBSYSTEM_ID */ |
119 | cef3017c | aliguori | |
120 | 8098ed41 | aurel32 | /* Bits in the PCI Status Register (PCI 2.3 spec) */
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121 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED1 0x007 |
122 | 8098ed41 | aurel32 | #define PCI_STATUS_INT_STATUS 0x008 |
123 | 8098ed41 | aurel32 | #define PCI_STATUS_CAPABILITIES 0x010 |
124 | 8098ed41 | aurel32 | #define PCI_STATUS_66MHZ 0x020 |
125 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED2 0x040 |
126 | 8098ed41 | aurel32 | #define PCI_STATUS_FAST_BACK 0x080 |
127 | 8098ed41 | aurel32 | #define PCI_STATUS_DEVSEL 0x600 |
128 | 8098ed41 | aurel32 | |
129 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED_MASK_LO (PCI_STATUS_RESERVED1 | \
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130 | 8098ed41 | aurel32 | PCI_STATUS_INT_STATUS | PCI_STATUS_CAPABILITIES | \ |
131 | 8098ed41 | aurel32 | PCI_STATUS_66MHZ | PCI_STATUS_RESERVED2 | PCI_STATUS_FAST_BACK) |
132 | 8098ed41 | aurel32 | |
133 | 8098ed41 | aurel32 | #define PCI_STATUS_RESERVED_MASK_HI (PCI_STATUS_DEVSEL >> 8) |
134 | 8098ed41 | aurel32 | |
135 | 475dc65f | aurel32 | /* Bits in the PCI Command Register (PCI 2.3 spec) */
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136 | 475dc65f | aurel32 | #define PCI_COMMAND_RESERVED 0xf800 |
137 | 475dc65f | aurel32 | |
138 | 475dc65f | aurel32 | #define PCI_COMMAND_RESERVED_MASK_HI (PCI_COMMAND_RESERVED >> 8) |
139 | 475dc65f | aurel32 | |
140 | 87ecb68b | pbrook | struct PCIDevice {
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141 | 6b1b92d3 | Paul Brook | DeviceState qdev; |
142 | 87ecb68b | pbrook | /* PCI config space */
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143 | 87ecb68b | pbrook | uint8_t config[256];
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144 | 87ecb68b | pbrook | |
145 | 87ecb68b | pbrook | /* the following fields are read only */
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146 | 87ecb68b | pbrook | PCIBus *bus; |
147 | 87ecb68b | pbrook | int devfn;
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148 | 87ecb68b | pbrook | char name[64]; |
149 | 87ecb68b | pbrook | PCIIORegion io_regions[PCI_NUM_REGIONS]; |
150 | 87ecb68b | pbrook | |
151 | 87ecb68b | pbrook | /* do not access the following fields */
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152 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read; |
153 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write; |
154 | 5851e08c | aliguori | PCIUnregisterFunc *unregister; |
155 | 87ecb68b | pbrook | |
156 | 87ecb68b | pbrook | /* IRQ objects for the INTA-INTD pins. */
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157 | 87ecb68b | pbrook | qemu_irq *irq; |
158 | 87ecb68b | pbrook | |
159 | 87ecb68b | pbrook | /* Current IRQ levels. Used internally by the generic PCI code. */
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160 | 87ecb68b | pbrook | int irq_state[4]; |
161 | 87ecb68b | pbrook | }; |
162 | 87ecb68b | pbrook | |
163 | 87ecb68b | pbrook | PCIDevice *pci_register_device(PCIBus *bus, const char *name, |
164 | 87ecb68b | pbrook | int instance_size, int devfn, |
165 | 87ecb68b | pbrook | PCIConfigReadFunc *config_read, |
166 | 87ecb68b | pbrook | PCIConfigWriteFunc *config_write); |
167 | 5851e08c | aliguori | int pci_unregister_device(PCIDevice *pci_dev);
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168 | 87ecb68b | pbrook | |
169 | 87ecb68b | pbrook | void pci_register_io_region(PCIDevice *pci_dev, int region_num, |
170 | 87ecb68b | pbrook | uint32_t size, int type,
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171 | 87ecb68b | pbrook | PCIMapIORegionFunc *map_func); |
172 | 87ecb68b | pbrook | |
173 | 87ecb68b | pbrook | uint32_t pci_default_read_config(PCIDevice *d, |
174 | 87ecb68b | pbrook | uint32_t address, int len);
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175 | 87ecb68b | pbrook | void pci_default_write_config(PCIDevice *d,
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176 | 87ecb68b | pbrook | uint32_t address, uint32_t val, int len);
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177 | 87ecb68b | pbrook | void pci_device_save(PCIDevice *s, QEMUFile *f);
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178 | 87ecb68b | pbrook | int pci_device_load(PCIDevice *s, QEMUFile *f);
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179 | 87ecb68b | pbrook | |
180 | 87ecb68b | pbrook | typedef void (*pci_set_irq_fn)(qemu_irq *pic, int irq_num, int level); |
181 | 87ecb68b | pbrook | typedef int (*pci_map_irq_fn)(PCIDevice *pci_dev, int irq_num); |
182 | 02e2da45 | Paul Brook | PCIBus *pci_register_bus(DeviceState *parent, const char *name, |
183 | 02e2da45 | Paul Brook | pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
184 | 87ecb68b | pbrook | qemu_irq *pic, int devfn_min, int nirq); |
185 | 87ecb68b | pbrook | |
186 | 72da4208 | aliguori | PCIDevice *pci_nic_init(PCIBus *bus, NICInfo *nd, int devfn,
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187 | cb457d76 | aliguori | const char *default_model); |
188 | 87ecb68b | pbrook | void pci_data_write(void *opaque, uint32_t addr, uint32_t val, int len); |
189 | 87ecb68b | pbrook | uint32_t pci_data_read(void *opaque, uint32_t addr, int len); |
190 | 87ecb68b | pbrook | int pci_bus_num(PCIBus *s);
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191 | 87ecb68b | pbrook | void pci_for_each_device(int bus_num, void (*fn)(PCIDevice *d)); |
192 | 3ae80618 | aliguori | PCIBus *pci_find_bus(int bus_num);
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193 | 3ae80618 | aliguori | PCIDevice *pci_find_device(int bus_num, int slot, int function); |
194 | 87ecb68b | pbrook | |
195 | 880345c4 | aliguori | int pci_read_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp); |
196 | 880345c4 | aliguori | int pci_assign_devaddr(const char *addr, int *domp, int *busp, unsigned *slotp); |
197 | 880345c4 | aliguori | |
198 | 376253ec | aliguori | void pci_info(Monitor *mon);
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199 | 480b9f24 | blueswir1 | PCIBus *pci_bridge_init(PCIBus *bus, int devfn, uint16_t vid, uint16_t did,
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200 | 87ecb68b | pbrook | pci_map_irq_fn map_irq, const char *name); |
201 | 87ecb68b | pbrook | |
202 | deb54399 | aliguori | static inline void |
203 | deb54399 | aliguori | pci_config_set_vendor_id(uint8_t *pci_config, uint16_t val) |
204 | deb54399 | aliguori | { |
205 | deb54399 | aliguori | cpu_to_le16wu((uint16_t *)&pci_config[PCI_VENDOR_ID], val); |
206 | deb54399 | aliguori | } |
207 | deb54399 | aliguori | |
208 | deb54399 | aliguori | static inline void |
209 | deb54399 | aliguori | pci_config_set_device_id(uint8_t *pci_config, uint16_t val) |
210 | deb54399 | aliguori | { |
211 | deb54399 | aliguori | cpu_to_le16wu((uint16_t *)&pci_config[PCI_DEVICE_ID], val); |
212 | deb54399 | aliguori | } |
213 | deb54399 | aliguori | |
214 | 173a543b | blueswir1 | static inline void |
215 | 173a543b | blueswir1 | pci_config_set_class(uint8_t *pci_config, uint16_t val) |
216 | 173a543b | blueswir1 | { |
217 | 173a543b | blueswir1 | cpu_to_le16wu((uint16_t *)&pci_config[PCI_CLASS_DEVICE], val); |
218 | 173a543b | blueswir1 | } |
219 | 173a543b | blueswir1 | |
220 | 6b1b92d3 | Paul Brook | typedef void (*pci_qdev_initfn)(PCIDevice *dev); |
221 | 6b1b92d3 | Paul Brook | void pci_qdev_register(const char *name, int size, pci_qdev_initfn init); |
222 | 6b1b92d3 | Paul Brook | |
223 | 6b1b92d3 | Paul Brook | PCIDevice *pci_create_simple(PCIBus *bus, int devfn, const char *name); |
224 | 6b1b92d3 | Paul Brook | |
225 | 87ecb68b | pbrook | /* lsi53c895a.c */
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226 | e4bcb14c | ths | #define LSI_MAX_DEVS 7 |
227 | 9be5dafe | Paul Brook | void lsi_scsi_attach(DeviceState *host, BlockDriverState *bd, int id); |
228 | 87ecb68b | pbrook | |
229 | 87ecb68b | pbrook | /* vmware_vga.c */
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230 | fbe1b595 | Paul Brook | void pci_vmsvga_init(PCIBus *bus);
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231 | 87ecb68b | pbrook | |
232 | 87ecb68b | pbrook | /* usb-uhci.c */
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233 | 87ecb68b | pbrook | void usb_uhci_piix3_init(PCIBus *bus, int devfn); |
234 | 87ecb68b | pbrook | void usb_uhci_piix4_init(PCIBus *bus, int devfn); |
235 | 87ecb68b | pbrook | |
236 | 87ecb68b | pbrook | /* usb-ohci.c */
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237 | 87ecb68b | pbrook | void usb_ohci_init_pci(struct PCIBus *bus, int num_ports, int devfn); |
238 | 87ecb68b | pbrook | |
239 | 87ecb68b | pbrook | /* prep_pci.c */
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240 | 87ecb68b | pbrook | PCIBus *pci_prep_init(qemu_irq *pic); |
241 | 87ecb68b | pbrook | |
242 | 87ecb68b | pbrook | /* apb_pci.c */
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243 | c190ea07 | blueswir1 | PCIBus *pci_apb_init(target_phys_addr_t special_base, |
244 | c190ea07 | blueswir1 | target_phys_addr_t mem_base, |
245 | c190ea07 | blueswir1 | qemu_irq *pic, PCIBus **bus2, PCIBus **bus3); |
246 | 87ecb68b | pbrook | |
247 | b79e1752 | aurel32 | /* sh_pci.c */
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248 | b79e1752 | aurel32 | PCIBus *sh_pci_register_bus(pci_set_irq_fn set_irq, pci_map_irq_fn map_irq, |
249 | b79e1752 | aurel32 | qemu_irq *pic, int devfn_min, int nirq); |
250 | b79e1752 | aurel32 | |
251 | 87ecb68b | pbrook | #endif |