root / hw / ppc_oldworld.c @ aeeb69c7
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1 | 3cbee15b | j_mayer | /*
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2 | 4d7ca41e | aurel32 | * QEMU OldWorld PowerMac (currently ~G3 Beige) hardware System Emulator
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3 | 3cbee15b | j_mayer | *
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4 | 3cbee15b | j_mayer | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 3cbee15b | j_mayer | * Copyright (c) 2007 Jocelyn Mayer
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6 | 3cbee15b | j_mayer | *
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7 | 3cbee15b | j_mayer | * Permission is hereby granted, free of charge, to any person obtaining a copy
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8 | 3cbee15b | j_mayer | * of this software and associated documentation files (the "Software"), to deal
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9 | 3cbee15b | j_mayer | * in the Software without restriction, including without limitation the rights
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10 | 3cbee15b | j_mayer | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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11 | 3cbee15b | j_mayer | * copies of the Software, and to permit persons to whom the Software is
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12 | 3cbee15b | j_mayer | * furnished to do so, subject to the following conditions:
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13 | 3cbee15b | j_mayer | *
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14 | 3cbee15b | j_mayer | * The above copyright notice and this permission notice shall be included in
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15 | 3cbee15b | j_mayer | * all copies or substantial portions of the Software.
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16 | 3cbee15b | j_mayer | *
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17 | 3cbee15b | j_mayer | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 | 3cbee15b | j_mayer | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 | 3cbee15b | j_mayer | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 | 3cbee15b | j_mayer | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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21 | 3cbee15b | j_mayer | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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22 | 3cbee15b | j_mayer | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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23 | 3cbee15b | j_mayer | * THE SOFTWARE.
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24 | 3cbee15b | j_mayer | */
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25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "ppc.h" |
27 | 3cbee15b | j_mayer | #include "ppc_mac.h" |
28 | 87ecb68b | pbrook | #include "nvram.h" |
29 | 87ecb68b | pbrook | #include "pc.h" |
30 | 87ecb68b | pbrook | #include "sysemu.h" |
31 | 87ecb68b | pbrook | #include "net.h" |
32 | 87ecb68b | pbrook | #include "isa.h" |
33 | 87ecb68b | pbrook | #include "pci.h" |
34 | 87ecb68b | pbrook | #include "boards.h" |
35 | 271dd5e0 | blueswir1 | #include "fw_cfg.h" |
36 | 7fa9ae1a | blueswir1 | #include "escc.h" |
37 | 3cbee15b | j_mayer | |
38 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
39 | a748ab6d | aurel32 | #define VGA_BIOS_SIZE 65536 |
40 | 271dd5e0 | blueswir1 | #define CFG_ADDR 0xf0000510 |
41 | 271dd5e0 | blueswir1 | |
42 | 3cbee15b | j_mayer | /* temporary frame buffer OSI calls for the video.x driver. The right
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43 | 3cbee15b | j_mayer | solution is to modify the driver to use VGA PCI I/Os */
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44 | 3cbee15b | j_mayer | /* XXX: to be removed. This is no way related to emulation */
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45 | 3cbee15b | j_mayer | static int vga_osi_call (CPUState *env) |
46 | 3cbee15b | j_mayer | { |
47 | 3cbee15b | j_mayer | static int vga_vbl_enabled; |
48 | 3cbee15b | j_mayer | int linesize;
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49 | 3cbee15b | j_mayer | |
50 | aae9366a | j_mayer | // printf("osi_call R5=" REGX "\n", ppc_dump_gpr(env, 5));
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51 | 3cbee15b | j_mayer | |
52 | 3cbee15b | j_mayer | /* same handler as PearPC, coming from the original MOL video
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53 | 3cbee15b | j_mayer | driver. */
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54 | 3cbee15b | j_mayer | switch(env->gpr[5]) { |
55 | 3cbee15b | j_mayer | case 4: |
56 | 3cbee15b | j_mayer | break;
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57 | 3cbee15b | j_mayer | case 28: /* set_vmode */ |
58 | 3cbee15b | j_mayer | if (env->gpr[6] != 1 || env->gpr[7] != 0) |
59 | 3cbee15b | j_mayer | env->gpr[3] = 1; |
60 | 3cbee15b | j_mayer | else
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61 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
62 | 3cbee15b | j_mayer | break;
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63 | 3cbee15b | j_mayer | case 29: /* get_vmode_info */ |
64 | 3cbee15b | j_mayer | if (env->gpr[6] != 0) { |
65 | 3cbee15b | j_mayer | if (env->gpr[6] != 1 || env->gpr[7] != 0) { |
66 | 3cbee15b | j_mayer | env->gpr[3] = 1; |
67 | 3cbee15b | j_mayer | break;
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68 | 3cbee15b | j_mayer | } |
69 | 3cbee15b | j_mayer | } |
70 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
71 | 3cbee15b | j_mayer | env->gpr[4] = (1 << 16) | 1; /* num_vmodes, cur_vmode */ |
72 | 3cbee15b | j_mayer | env->gpr[5] = (1 << 16) | 0; /* num_depths, cur_depth_mode */ |
73 | 3cbee15b | j_mayer | env->gpr[6] = (graphic_width << 16) | graphic_height; /* w, h */ |
74 | 3cbee15b | j_mayer | env->gpr[7] = 85 << 16; /* refresh rate */ |
75 | 3cbee15b | j_mayer | env->gpr[8] = (graphic_depth + 7) & ~7; /* depth (round to byte) */ |
76 | 3cbee15b | j_mayer | linesize = ((graphic_depth + 7) >> 3) * graphic_width; |
77 | 3cbee15b | j_mayer | linesize = (linesize + 3) & ~3; |
78 | 3cbee15b | j_mayer | env->gpr[9] = (linesize << 16) | 0; /* row_bytes, offset */ |
79 | 3cbee15b | j_mayer | break;
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80 | 3cbee15b | j_mayer | case 31: /* set_video power */ |
81 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
82 | 3cbee15b | j_mayer | break;
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83 | 3cbee15b | j_mayer | case 39: /* video_ctrl */ |
84 | 3cbee15b | j_mayer | if (env->gpr[6] == 0 || env->gpr[6] == 1) |
85 | 3cbee15b | j_mayer | vga_vbl_enabled = env->gpr[6];
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86 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
87 | 3cbee15b | j_mayer | break;
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88 | 3cbee15b | j_mayer | case 47: |
89 | 3cbee15b | j_mayer | break;
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90 | 3cbee15b | j_mayer | case 59: /* set_color */ |
91 | 3cbee15b | j_mayer | /* R6 = index, R7 = RGB */
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92 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
93 | 3cbee15b | j_mayer | break;
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94 | 3cbee15b | j_mayer | case 64: /* get color */ |
95 | 3cbee15b | j_mayer | /* R6 = index */
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96 | 3cbee15b | j_mayer | env->gpr[3] = 0; |
97 | 3cbee15b | j_mayer | break;
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98 | 3cbee15b | j_mayer | case 116: /* set hwcursor */ |
99 | 3cbee15b | j_mayer | /* R6 = x, R7 = y, R8 = visible, R9 = data */
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100 | 3cbee15b | j_mayer | break;
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101 | 3cbee15b | j_mayer | default:
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102 | aae9366a | j_mayer | fprintf(stderr, "unsupported OSI call R5=" REGX "\n", |
103 | aae9366a | j_mayer | ppc_dump_gpr(env, 5));
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104 | 3cbee15b | j_mayer | break;
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105 | 3cbee15b | j_mayer | } |
106 | 3cbee15b | j_mayer | |
107 | 3cbee15b | j_mayer | return 1; /* osi_call handled */ |
108 | 3cbee15b | j_mayer | } |
109 | 3cbee15b | j_mayer | |
110 | 00f82b8a | aurel32 | static void ppc_heathrow_init (ram_addr_t ram_size, int vga_ram_size, |
111 | 6ac0e82d | balrog | const char *boot_device, DisplayState *ds, |
112 | 3cbee15b | j_mayer | const char *kernel_filename, |
113 | 3cbee15b | j_mayer | const char *kernel_cmdline, |
114 | 3cbee15b | j_mayer | const char *initrd_filename, |
115 | 3cbee15b | j_mayer | const char *cpu_model) |
116 | 3cbee15b | j_mayer | { |
117 | aaed909a | bellard | CPUState *env = NULL, *envs[MAX_CPUS];
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118 | 3cbee15b | j_mayer | char buf[1024]; |
119 | 3cbee15b | j_mayer | qemu_irq *pic, **heathrow_irqs; |
120 | 3cbee15b | j_mayer | nvram_t nvram; |
121 | 3cbee15b | j_mayer | m48t59_t *m48t59; |
122 | 3cbee15b | j_mayer | int linux_boot, i;
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123 | a748ab6d | aurel32 | ram_addr_t ram_offset, vga_ram_offset, bios_offset, vga_bios_offset; |
124 | 3cbee15b | j_mayer | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
125 | 3cbee15b | j_mayer | PCIBus *pci_bus; |
126 | 3cbee15b | j_mayer | MacIONVRAMState *nvr; |
127 | 3cbee15b | j_mayer | int vga_bios_size, bios_size;
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128 | 3cbee15b | j_mayer | qemu_irq *dummy_irq; |
129 | 3cbee15b | j_mayer | int pic_mem_index, nvram_mem_index, dbdma_mem_index, cuda_mem_index;
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130 | 7fa9ae1a | blueswir1 | int escc_mem_index, ide_mem_index[2]; |
131 | 28c5af54 | j_mayer | int ppc_boot_device;
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132 | e4bcb14c | ths | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
133 | e4bcb14c | ths | int index;
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134 | 271dd5e0 | blueswir1 | void *fw_cfg;
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135 | 3cbee15b | j_mayer | |
136 | 3cbee15b | j_mayer | linux_boot = (kernel_filename != NULL);
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137 | 3cbee15b | j_mayer | |
138 | 3cbee15b | j_mayer | /* init CPUs */
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139 | 3cbee15b | j_mayer | if (cpu_model == NULL) |
140 | f2fde45a | aurel32 | cpu_model = "G3";
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141 | 3cbee15b | j_mayer | for (i = 0; i < smp_cpus; i++) { |
142 | aaed909a | bellard | env = cpu_init(cpu_model); |
143 | aaed909a | bellard | if (!env) {
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144 | aaed909a | bellard | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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145 | aaed909a | bellard | exit(1);
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146 | aaed909a | bellard | } |
147 | 3cbee15b | j_mayer | /* Set time-base frequency to 100 Mhz */
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148 | 3cbee15b | j_mayer | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); |
149 | 3cbee15b | j_mayer | env->osi_call = vga_osi_call; |
150 | 3cbee15b | j_mayer | qemu_register_reset(&cpu_ppc_reset, env); |
151 | 3cbee15b | j_mayer | envs[i] = env; |
152 | 3cbee15b | j_mayer | } |
153 | 4c823cff | j_mayer | if (env->nip < 0xFFF80000) { |
154 | 4c823cff | j_mayer | /* Special test for PowerPC 601:
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155 | 4c823cff | j_mayer | * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
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156 | 4c823cff | j_mayer | * But the NVRAM is located at 0xFFF04000...
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157 | 4c823cff | j_mayer | */
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158 | d45952a0 | aurel32 | cpu_abort(env, "G3 Beige Mac hardware can not handle 1 MB BIOS\n");
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159 | 4c823cff | j_mayer | } |
160 | 3cbee15b | j_mayer | |
161 | 3cbee15b | j_mayer | /* allocate RAM */
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162 | 6b4079f8 | aurel32 | if (ram_size > (2047 << 20)) { |
163 | 6b4079f8 | aurel32 | fprintf(stderr, |
164 | 6b4079f8 | aurel32 | "qemu: Too much memory for this machine: %d MB, maximum 2047 MB\n",
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165 | 6b4079f8 | aurel32 | ((unsigned int)ram_size / (1 << 20))); |
166 | 6b4079f8 | aurel32 | exit(1);
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167 | 6b4079f8 | aurel32 | } |
168 | 6b4079f8 | aurel32 | |
169 | a748ab6d | aurel32 | ram_offset = qemu_ram_alloc(ram_size); |
170 | a748ab6d | aurel32 | cpu_register_physical_memory(0, ram_size, ram_offset);
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171 | a748ab6d | aurel32 | |
172 | a748ab6d | aurel32 | /* allocate VGA RAM */
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173 | a748ab6d | aurel32 | vga_ram_offset = qemu_ram_alloc(vga_ram_size); |
174 | 3cbee15b | j_mayer | |
175 | 3cbee15b | j_mayer | /* allocate and load BIOS */
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176 | a748ab6d | aurel32 | bios_offset = qemu_ram_alloc(BIOS_SIZE); |
177 | 3cbee15b | j_mayer | if (bios_name == NULL) |
178 | 992e5acd | blueswir1 | bios_name = PROM_FILENAME; |
179 | 3cbee15b | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
180 | 992e5acd | blueswir1 | cpu_register_physical_memory(PROM_ADDR, BIOS_SIZE, bios_offset | IO_MEM_ROM); |
181 | 992e5acd | blueswir1 | |
182 | 992e5acd | blueswir1 | /* Load OpenBIOS (ELF) */
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183 | 992e5acd | blueswir1 | bios_size = load_elf(buf, 0, NULL, NULL, NULL); |
184 | 3cbee15b | j_mayer | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
185 | 3cbee15b | j_mayer | cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
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186 | 3cbee15b | j_mayer | exit(1);
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187 | 3cbee15b | j_mayer | } |
188 | 3cbee15b | j_mayer | |
189 | 3cbee15b | j_mayer | /* allocate and load VGA BIOS */
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190 | a748ab6d | aurel32 | vga_bios_offset = qemu_ram_alloc(VGA_BIOS_SIZE); |
191 | 3cbee15b | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
192 | 3cbee15b | j_mayer | vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
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193 | 3cbee15b | j_mayer | if (vga_bios_size < 0) { |
194 | 3cbee15b | j_mayer | /* if no bios is present, we can still work */
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195 | 3cbee15b | j_mayer | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
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196 | 3cbee15b | j_mayer | vga_bios_size = 0;
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197 | 3cbee15b | j_mayer | } else {
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198 | 3cbee15b | j_mayer | /* set a specific header (XXX: find real Apple format for NDRV
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199 | 3cbee15b | j_mayer | drivers) */
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200 | 3cbee15b | j_mayer | phys_ram_base[vga_bios_offset] = 'N';
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201 | 3cbee15b | j_mayer | phys_ram_base[vga_bios_offset + 1] = 'D'; |
202 | 3cbee15b | j_mayer | phys_ram_base[vga_bios_offset + 2] = 'R'; |
203 | 3cbee15b | j_mayer | phys_ram_base[vga_bios_offset + 3] = 'V'; |
204 | 3cbee15b | j_mayer | cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
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205 | 3cbee15b | j_mayer | vga_bios_size); |
206 | 3cbee15b | j_mayer | vga_bios_size += 8;
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207 | 3cbee15b | j_mayer | } |
208 | 3cbee15b | j_mayer | |
209 | 3cbee15b | j_mayer | if (linux_boot) {
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210 | 3cbee15b | j_mayer | kernel_base = KERNEL_LOAD_ADDR; |
211 | 3cbee15b | j_mayer | /* now we can load the kernel */
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212 | 6b419964 | aurel32 | kernel_size = load_elf(kernel_filename, kernel_base - 0xc0000000ULL,
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213 | 52f163b7 | blueswir1 | NULL, NULL, NULL); |
214 | 52f163b7 | blueswir1 | if (kernel_size < 0) |
215 | 52f163b7 | blueswir1 | kernel_size = load_aout(kernel_filename, kernel_base, |
216 | 52f163b7 | blueswir1 | ram_size - kernel_base); |
217 | 52f163b7 | blueswir1 | if (kernel_size < 0) |
218 | 52f163b7 | blueswir1 | kernel_size = load_image_targphys(kernel_filename, |
219 | 52f163b7 | blueswir1 | kernel_base, |
220 | 52f163b7 | blueswir1 | ram_size - kernel_base); |
221 | 3cbee15b | j_mayer | if (kernel_size < 0) { |
222 | 3cbee15b | j_mayer | cpu_abort(env, "qemu: could not load kernel '%s'\n",
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223 | 3cbee15b | j_mayer | kernel_filename); |
224 | 3cbee15b | j_mayer | exit(1);
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225 | 3cbee15b | j_mayer | } |
226 | 3cbee15b | j_mayer | /* load initrd */
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227 | 3cbee15b | j_mayer | if (initrd_filename) {
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228 | 3cbee15b | j_mayer | initrd_base = INITRD_LOAD_ADDR; |
229 | 3cbee15b | j_mayer | initrd_size = load_image(initrd_filename, |
230 | 3cbee15b | j_mayer | phys_ram_base + initrd_base); |
231 | 3cbee15b | j_mayer | if (initrd_size < 0) { |
232 | 3cbee15b | j_mayer | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
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233 | 3cbee15b | j_mayer | initrd_filename); |
234 | 3cbee15b | j_mayer | exit(1);
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235 | 3cbee15b | j_mayer | } |
236 | 3cbee15b | j_mayer | } else {
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237 | 3cbee15b | j_mayer | initrd_base = 0;
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238 | 3cbee15b | j_mayer | initrd_size = 0;
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239 | 3cbee15b | j_mayer | } |
240 | 6ac0e82d | balrog | ppc_boot_device = 'm';
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241 | 3cbee15b | j_mayer | } else {
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242 | 3cbee15b | j_mayer | kernel_base = 0;
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243 | 3cbee15b | j_mayer | kernel_size = 0;
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244 | 3cbee15b | j_mayer | initrd_base = 0;
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245 | 3cbee15b | j_mayer | initrd_size = 0;
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246 | 28c5af54 | j_mayer | ppc_boot_device = '\0';
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247 | 0d913fdb | j_mayer | for (i = 0; boot_device[i] != '\0'; i++) { |
248 | 28c5af54 | j_mayer | /* TOFIX: for now, the second IDE channel is not properly
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249 | 0d913fdb | j_mayer | * used by OHW. The Mac floppy disk are not emulated.
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250 | 28c5af54 | j_mayer | * For now, OHW cannot boot from the network.
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251 | 28c5af54 | j_mayer | */
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252 | 28c5af54 | j_mayer | #if 0
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253 | 0d913fdb | j_mayer | if (boot_device[i] >= 'a' && boot_device[i] <= 'f') {
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254 | 0d913fdb | j_mayer | ppc_boot_device = boot_device[i];
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255 | 28c5af54 | j_mayer | break;
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256 | 0d913fdb | j_mayer | }
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257 | 28c5af54 | j_mayer | #else
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258 | 0d913fdb | j_mayer | if (boot_device[i] >= 'c' && boot_device[i] <= 'd') { |
259 | 0d913fdb | j_mayer | ppc_boot_device = boot_device[i]; |
260 | 28c5af54 | j_mayer | break;
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261 | 0d913fdb | j_mayer | } |
262 | 28c5af54 | j_mayer | #endif
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263 | 28c5af54 | j_mayer | } |
264 | 28c5af54 | j_mayer | if (ppc_boot_device == '\0') { |
265 | 8a901def | aurel32 | fprintf(stderr, "No valid boot device for G3 Beige machine\n");
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266 | 28c5af54 | j_mayer | exit(1);
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267 | 28c5af54 | j_mayer | } |
268 | 3cbee15b | j_mayer | } |
269 | 3cbee15b | j_mayer | |
270 | 3cbee15b | j_mayer | isa_mem_base = 0x80000000;
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271 | aae9366a | j_mayer | |
272 | 3cbee15b | j_mayer | /* Register 2 MB of ISA IO space */
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273 | 3cbee15b | j_mayer | isa_mmio_init(0xfe000000, 0x00200000); |
274 | 3cbee15b | j_mayer | |
275 | 3cbee15b | j_mayer | /* XXX: we register only 1 output pin for heathrow PIC */
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276 | 3cbee15b | j_mayer | heathrow_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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277 | 3cbee15b | j_mayer | heathrow_irqs[0] =
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278 | 3cbee15b | j_mayer | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * 1); |
279 | 3cbee15b | j_mayer | /* Connect the heathrow PIC outputs to the 6xx bus */
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280 | 3cbee15b | j_mayer | for (i = 0; i < smp_cpus; i++) { |
281 | 3cbee15b | j_mayer | switch (PPC_INPUT(env)) {
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282 | 3cbee15b | j_mayer | case PPC_FLAGS_INPUT_6xx:
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283 | 3cbee15b | j_mayer | heathrow_irqs[i] = heathrow_irqs[0] + (i * 1); |
284 | 3cbee15b | j_mayer | heathrow_irqs[i][0] =
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285 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
286 | 3cbee15b | j_mayer | break;
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287 | 3cbee15b | j_mayer | default:
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288 | 3cbee15b | j_mayer | cpu_abort(env, "Bus model not supported on OldWorld Mac machine\n");
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289 | 3cbee15b | j_mayer | exit(1);
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290 | 3cbee15b | j_mayer | } |
291 | 3cbee15b | j_mayer | } |
292 | 3cbee15b | j_mayer | |
293 | 3cbee15b | j_mayer | /* init basic PC hardware */
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294 | 3cbee15b | j_mayer | if (PPC_INPUT(env) != PPC_FLAGS_INPUT_6xx) {
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295 | 3cbee15b | j_mayer | cpu_abort(env, "Only 6xx bus is supported on heathrow machine\n");
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296 | 3cbee15b | j_mayer | exit(1);
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297 | 3cbee15b | j_mayer | } |
298 | 3cbee15b | j_mayer | pic = heathrow_pic_init(&pic_mem_index, 1, heathrow_irqs);
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299 | 3cbee15b | j_mayer | pci_bus = pci_grackle_init(0xfec00000, pic);
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300 | a748ab6d | aurel32 | pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_offset, |
301 | a748ab6d | aurel32 | vga_ram_offset, vga_ram_size, |
302 | 3cbee15b | j_mayer | vga_bios_offset, vga_bios_size); |
303 | aae9366a | j_mayer | |
304 | 3cbee15b | j_mayer | /* XXX: suppress that */
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305 | 3cbee15b | j_mayer | dummy_irq = i8259_init(NULL);
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306 | 3cbee15b | j_mayer | |
307 | aeeb69c7 | aurel32 | escc_mem_index = escc_init(0x80013000, pic[0x0f], pic[0x10], serial_hds[0], |
308 | 7fa9ae1a | blueswir1 | serial_hds[1], ESCC_CLOCK, 4); |
309 | aae9366a | j_mayer | |
310 | cb457d76 | aliguori | for(i = 0; i < nb_nics; i++) |
311 | cb457d76 | aliguori | pci_nic_init(pci_bus, &nd_table[i], -1, "ne2k_pci"); |
312 | 0d913fdb | j_mayer | |
313 | 0d913fdb | j_mayer | /* First IDE channel is a CMD646 on the PCI bus */
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314 | e4bcb14c | ths | |
315 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
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316 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
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317 | e4bcb14c | ths | exit(1);
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318 | e4bcb14c | ths | } |
319 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 0, 0); |
320 | e4bcb14c | ths | if (index == -1) |
321 | e4bcb14c | ths | hd[0] = NULL; |
322 | e4bcb14c | ths | else
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323 | e4bcb14c | ths | hd[0] = drives_table[index].bdrv;
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324 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 0, 1); |
325 | e4bcb14c | ths | if (index == -1) |
326 | e4bcb14c | ths | hd[1] = NULL; |
327 | e4bcb14c | ths | else
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328 | e4bcb14c | ths | hd[1] = drives_table[index].bdrv;
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329 | e4bcb14c | ths | hd[3] = hd[2] = NULL; |
330 | e4bcb14c | ths | pci_cmd646_ide_init(pci_bus, hd, 0);
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331 | e4bcb14c | ths | |
332 | 0d913fdb | j_mayer | /* Second IDE channel is a MAC IDE on the MacIO bus */
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333 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 1, 0); |
334 | e4bcb14c | ths | if (index == -1) |
335 | e4bcb14c | ths | hd[0] = NULL; |
336 | e4bcb14c | ths | else
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337 | e4bcb14c | ths | hd[0] = drives_table[index].bdrv;
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338 | e4bcb14c | ths | index = drive_get_index(IF_IDE, 1, 1); |
339 | e4bcb14c | ths | if (index == -1) |
340 | e4bcb14c | ths | hd[1] = NULL; |
341 | e4bcb14c | ths | else
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342 | e4bcb14c | ths | hd[1] = drives_table[index].bdrv;
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343 | 0d913fdb | j_mayer | ide_mem_index[0] = -1; |
344 | e4bcb14c | ths | ide_mem_index[1] = pmac_ide_init(hd, pic[0x0D]); |
345 | 3cbee15b | j_mayer | |
346 | 3cbee15b | j_mayer | /* cuda also initialize ADB */
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347 | 3cbee15b | j_mayer | cuda_init(&cuda_mem_index, pic[0x12]);
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348 | 3cbee15b | j_mayer | |
349 | 3cbee15b | j_mayer | adb_kbd_init(&adb_bus); |
350 | 3cbee15b | j_mayer | adb_mouse_init(&adb_bus); |
351 | aae9366a | j_mayer | |
352 | 74e91155 | j_mayer | nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
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353 | 3cbee15b | j_mayer | pmac_format_nvram_partition(nvr, 0x2000);
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354 | 3cbee15b | j_mayer | |
355 | 3cbee15b | j_mayer | dbdma_init(&dbdma_mem_index); |
356 | 28c5af54 | j_mayer | |
357 | 4d7ca41e | aurel32 | macio_init(pci_bus, 0x0010, 1, pic_mem_index, dbdma_mem_index, |
358 | 7fa9ae1a | blueswir1 | cuda_mem_index, nvr, 2, ide_mem_index, escc_mem_index);
|
359 | 3cbee15b | j_mayer | |
360 | 3cbee15b | j_mayer | if (usb_enabled) {
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361 | 3cbee15b | j_mayer | usb_ohci_init_pci(pci_bus, 3, -1); |
362 | 3cbee15b | j_mayer | } |
363 | 3cbee15b | j_mayer | |
364 | 3cbee15b | j_mayer | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
365 | 3cbee15b | j_mayer | graphic_depth = 15;
|
366 | 3cbee15b | j_mayer | |
367 | 3cbee15b | j_mayer | m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59); |
368 | 3cbee15b | j_mayer | nvram.opaque = m48t59; |
369 | 3cbee15b | j_mayer | nvram.read_fn = &m48t59_read; |
370 | 3cbee15b | j_mayer | nvram.write_fn = &m48t59_write; |
371 | 6ac0e82d | balrog | PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "HEATHROW", ram_size,
|
372 | 6ac0e82d | balrog | ppc_boot_device, kernel_base, kernel_size, |
373 | 3cbee15b | j_mayer | kernel_cmdline, |
374 | 3cbee15b | j_mayer | initrd_base, initrd_size, |
375 | 3cbee15b | j_mayer | /* XXX: need an option to load a NVRAM image */
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376 | 3cbee15b | j_mayer | 0,
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377 | 3cbee15b | j_mayer | graphic_width, graphic_height, graphic_depth); |
378 | 3cbee15b | j_mayer | /* No PCI init: the BIOS will do it */
|
379 | 3cbee15b | j_mayer | |
380 | 3cbee15b | j_mayer | /* Special port to get debug messages from Open-Firmware */
|
381 | 3cbee15b | j_mayer | register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); |
382 | 271dd5e0 | blueswir1 | |
383 | 271dd5e0 | blueswir1 | fw_cfg = fw_cfg_init(0, 0, CFG_ADDR, CFG_ADDR + 2); |
384 | 271dd5e0 | blueswir1 | fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
|
385 | 271dd5e0 | blueswir1 | fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size); |
386 | 271dd5e0 | blueswir1 | fw_cfg_add_i16(fw_cfg, FW_CFG_MACHINE_ID, ARCH_HEATHROW); |
387 | 3cbee15b | j_mayer | } |
388 | 3cbee15b | j_mayer | |
389 | 3cbee15b | j_mayer | QEMUMachine heathrow_machine = { |
390 | 4d7ca41e | aurel32 | .name = "g3beige",
|
391 | 4b32e168 | aliguori | .desc = "Heathrow based PowerMAC",
|
392 | 4b32e168 | aliguori | .init = ppc_heathrow_init, |
393 | a748ab6d | aurel32 | .ram_require = BIOS_SIZE + VGA_BIOS_SIZE + VGA_RAM_SIZE, |
394 | 3d878caa | balrog | .max_cpus = MAX_CPUS, |
395 | 3cbee15b | j_mayer | }; |