root / hw / spapr.c @ b13ce26d
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | 0ee2c058 | Alexey Kardashevskiy | #include "hw/msi.h" |
45 | 9fdf0c29 | David Gibson | |
46 | f61b4bed | Alexander Graf | #include "kvm.h" |
47 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
48 | 3384f95c | David Gibson | #include "pci.h" |
49 | f61b4bed | Alexander Graf | |
50 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
51 | 35139a59 | David Gibson | #include "hw/usb.h" |
52 | 890c2b77 | Avi Kivity | |
53 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
54 | 9fdf0c29 | David Gibson | |
55 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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56 | 4d8d5467 | Benjamin Herrenschmidt | *
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57 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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58 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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59 | 4d8d5467 | Benjamin Herrenschmidt | *
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60 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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61 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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62 | 4d8d5467 | Benjamin Herrenschmidt | *
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63 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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64 | 4d8d5467 | Benjamin Herrenschmidt | */
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65 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
66 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
67 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
68 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
69 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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71 | a9f8ad8f | David Gibson | |
72 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
73 | 9fdf0c29 | David Gibson | |
74 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
75 | 9fdf0c29 | David Gibson | |
76 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
77 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
78 | 9fdf0c29 | David Gibson | |
79 | 3384f95c | David Gibson | #define SPAPR_PCI_BUID 0x800000020000001ULL |
80 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_ADDR (0x10000000000ULL + 0xA0000000) |
81 | 3384f95c | David Gibson | #define SPAPR_PCI_MEM_WIN_SIZE 0x20000000 |
82 | 3384f95c | David Gibson | #define SPAPR_PCI_IO_WIN_ADDR (0x10000000000ULL + 0x80000000) |
83 | 0ee2c058 | Alexey Kardashevskiy | #define SPAPR_PCI_MSI_WIN_ADDR (0x10000000000ULL + 0x90000000) |
84 | 3384f95c | David Gibson | |
85 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
86 | 0c103f8e | David Gibson | |
87 | 7f763a5d | David Gibson | #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) |
88 | 7f763a5d | David Gibson | |
89 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
90 | 9fdf0c29 | David Gibson | |
91 | ff9d2afa | David Gibson | int spapr_allocate_irq(int hint, bool lsi) |
92 | e6c866d4 | David Gibson | { |
93 | a307d594 | Alexey Kardashevskiy | int irq;
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94 | e6c866d4 | David Gibson | |
95 | e6c866d4 | David Gibson | if (hint) {
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96 | e6c866d4 | David Gibson | irq = hint; |
97 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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98 | e6c866d4 | David Gibson | } else {
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99 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
100 | e6c866d4 | David Gibson | } |
101 | e6c866d4 | David Gibson | |
102 | a307d594 | Alexey Kardashevskiy | /* Configure irq type */
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103 | a307d594 | Alexey Kardashevskiy | if (!xics_get_qirq(spapr->icp, irq)) {
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104 | a307d594 | Alexey Kardashevskiy | return 0; |
105 | e6c866d4 | David Gibson | } |
106 | e6c866d4 | David Gibson | |
107 | ff9d2afa | David Gibson | xics_set_irq_type(spapr->icp, irq, lsi); |
108 | e6c866d4 | David Gibson | |
109 | a307d594 | Alexey Kardashevskiy | return irq;
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110 | e6c866d4 | David Gibson | } |
111 | e6c866d4 | David Gibson | |
112 | f4b9523b | Alexey Kardashevskiy | /* Allocate block of consequtive IRQs, returns a number of the first */
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113 | ff9d2afa | David Gibson | int spapr_allocate_irq_block(int num, bool lsi) |
114 | f4b9523b | Alexey Kardashevskiy | { |
115 | f4b9523b | Alexey Kardashevskiy | int first = -1; |
116 | f4b9523b | Alexey Kardashevskiy | int i;
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117 | f4b9523b | Alexey Kardashevskiy | |
118 | f4b9523b | Alexey Kardashevskiy | for (i = 0; i < num; ++i) { |
119 | f4b9523b | Alexey Kardashevskiy | int irq;
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120 | f4b9523b | Alexey Kardashevskiy | |
121 | ff9d2afa | David Gibson | irq = spapr_allocate_irq(0, lsi);
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122 | f4b9523b | Alexey Kardashevskiy | if (!irq) {
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123 | f4b9523b | Alexey Kardashevskiy | return -1; |
124 | f4b9523b | Alexey Kardashevskiy | } |
125 | f4b9523b | Alexey Kardashevskiy | |
126 | f4b9523b | Alexey Kardashevskiy | if (0 == i) { |
127 | f4b9523b | Alexey Kardashevskiy | first = irq; |
128 | f4b9523b | Alexey Kardashevskiy | } |
129 | f4b9523b | Alexey Kardashevskiy | |
130 | f4b9523b | Alexey Kardashevskiy | /* If the above doesn't create a consecutive block then that's
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131 | f4b9523b | Alexey Kardashevskiy | * an internal bug */
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132 | f4b9523b | Alexey Kardashevskiy | assert(irq == (first + i)); |
133 | f4b9523b | Alexey Kardashevskiy | } |
134 | f4b9523b | Alexey Kardashevskiy | |
135 | f4b9523b | Alexey Kardashevskiy | return first;
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136 | f4b9523b | Alexey Kardashevskiy | } |
137 | f4b9523b | Alexey Kardashevskiy | |
138 | 7f763a5d | David Gibson | static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr) |
139 | 6e806cc3 | Bharata B Rao | { |
140 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
141 | e2684c0b | Andreas Färber | CPUPPCState *env; |
142 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
143 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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144 | 7f763a5d | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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145 | 6e806cc3 | Bharata B Rao | |
146 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
147 | 6e806cc3 | Bharata B Rao | |
148 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
149 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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150 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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151 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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152 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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153 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->numa_node), |
154 | 6e806cc3 | Bharata B Rao | cpu_to_be32(env->cpu_index)}; |
155 | 6e806cc3 | Bharata B Rao | |
156 | 6e806cc3 | Bharata B Rao | if ((env->cpu_index % smt) != 0) { |
157 | 6e806cc3 | Bharata B Rao | continue;
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158 | 6e806cc3 | Bharata B Rao | } |
159 | 6e806cc3 | Bharata B Rao | |
160 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
161 | 6e806cc3 | Bharata B Rao | env->cpu_index); |
162 | 6e806cc3 | Bharata B Rao | |
163 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
164 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
165 | 6e806cc3 | Bharata B Rao | return offset;
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166 | 6e806cc3 | Bharata B Rao | } |
167 | 6e806cc3 | Bharata B Rao | |
168 | 7f763a5d | David Gibson | if (nb_numa_nodes > 1) { |
169 | 7f763a5d | David Gibson | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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170 | 7f763a5d | David Gibson | sizeof(associativity));
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171 | 7f763a5d | David Gibson | if (ret < 0) { |
172 | 7f763a5d | David Gibson | return ret;
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173 | 7f763a5d | David Gibson | } |
174 | 7f763a5d | David Gibson | } |
175 | 7f763a5d | David Gibson | |
176 | 7f763a5d | David Gibson | ret = fdt_setprop(fdt, offset, "ibm,pft-size",
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177 | 7f763a5d | David Gibson | pft_size_prop, sizeof(pft_size_prop));
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178 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
179 | 6e806cc3 | Bharata B Rao | return ret;
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180 | 6e806cc3 | Bharata B Rao | } |
181 | 6e806cc3 | Bharata B Rao | } |
182 | 6e806cc3 | Bharata B Rao | return ret;
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183 | 6e806cc3 | Bharata B Rao | } |
184 | 6e806cc3 | Bharata B Rao | |
185 | 5af9873d | Benjamin Herrenschmidt | |
186 | 5af9873d | Benjamin Herrenschmidt | static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
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187 | 5af9873d | Benjamin Herrenschmidt | size_t maxsize) |
188 | 5af9873d | Benjamin Herrenschmidt | { |
189 | 5af9873d | Benjamin Herrenschmidt | size_t maxcells = maxsize / sizeof(uint32_t);
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190 | 5af9873d | Benjamin Herrenschmidt | int i, j, count;
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191 | 5af9873d | Benjamin Herrenschmidt | uint32_t *p = prop; |
192 | 5af9873d | Benjamin Herrenschmidt | |
193 | 5af9873d | Benjamin Herrenschmidt | for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { |
194 | 5af9873d | Benjamin Herrenschmidt | struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
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195 | 5af9873d | Benjamin Herrenschmidt | |
196 | 5af9873d | Benjamin Herrenschmidt | if (!sps->page_shift) {
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197 | 5af9873d | Benjamin Herrenschmidt | break;
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198 | 5af9873d | Benjamin Herrenschmidt | } |
199 | 5af9873d | Benjamin Herrenschmidt | for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) { |
200 | 5af9873d | Benjamin Herrenschmidt | if (sps->enc[count].page_shift == 0) { |
201 | 5af9873d | Benjamin Herrenschmidt | break;
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202 | 5af9873d | Benjamin Herrenschmidt | } |
203 | 5af9873d | Benjamin Herrenschmidt | } |
204 | 5af9873d | Benjamin Herrenschmidt | if ((p - prop) >= (maxcells - 3 - count * 2)) { |
205 | 5af9873d | Benjamin Herrenschmidt | break;
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206 | 5af9873d | Benjamin Herrenschmidt | } |
207 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->page_shift); |
208 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->slb_enc); |
209 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(count); |
210 | 5af9873d | Benjamin Herrenschmidt | for (j = 0; j < count; j++) { |
211 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].page_shift); |
212 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].pte_enc); |
213 | 5af9873d | Benjamin Herrenschmidt | } |
214 | 5af9873d | Benjamin Herrenschmidt | } |
215 | 5af9873d | Benjamin Herrenschmidt | |
216 | 5af9873d | Benjamin Herrenschmidt | return (p - prop) * sizeof(uint32_t); |
217 | 5af9873d | Benjamin Herrenschmidt | } |
218 | 5af9873d | Benjamin Herrenschmidt | |
219 | 7f763a5d | David Gibson | #define _FDT(exp) \
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220 | 7f763a5d | David Gibson | do { \
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221 | 7f763a5d | David Gibson | int ret = (exp); \
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222 | 7f763a5d | David Gibson | if (ret < 0) { \ |
223 | 7f763a5d | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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224 | 7f763a5d | David Gibson | #exp, fdt_strerror(ret)); \
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225 | 7f763a5d | David Gibson | exit(1); \
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226 | 7f763a5d | David Gibson | } \ |
227 | 7f763a5d | David Gibson | } while (0) |
228 | 7f763a5d | David Gibson | |
229 | 7f763a5d | David Gibson | |
230 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
231 | a8170e5e | Avi Kivity | hwaddr initrd_base, |
232 | a8170e5e | Avi Kivity | hwaddr initrd_size, |
233 | a8170e5e | Avi Kivity | hwaddr kernel_size, |
234 | a3467baa | David Gibson | const char *boot_device, |
235 | 74d042e5 | David Gibson | const char *kernel_cmdline, |
236 | 74d042e5 | David Gibson | uint32_t epow_irq) |
237 | 9fdf0c29 | David Gibson | { |
238 | 9fdf0c29 | David Gibson | void *fdt;
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239 | e2684c0b | Andreas Färber | CPUPPCState *env; |
240 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
241 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
242 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
243 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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244 | c73e3771 | Benjamin Herrenschmidt | char qemu_hypertas_prop[] = "hcall-memop1"; |
245 | 7f763a5d | David Gibson | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
246 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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247 | 9fdf0c29 | David Gibson | char *modelname;
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248 | 7f763a5d | David Gibson | int i, smt = kvmppc_smt_threads();
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249 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
250 | 9fdf0c29 | David Gibson | |
251 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
252 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
253 | 9fdf0c29 | David Gibson | |
254 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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255 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
256 | 4d8d5467 | Benjamin Herrenschmidt | } |
257 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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258 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
259 | 4d8d5467 | Benjamin Herrenschmidt | } |
260 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
261 | 9fdf0c29 | David Gibson | |
262 | 9fdf0c29 | David Gibson | /* Root node */
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263 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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264 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
265 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
266 | 9fdf0c29 | David Gibson | |
267 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
268 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
269 | 9fdf0c29 | David Gibson | |
270 | 9fdf0c29 | David Gibson | /* /chosen */
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271 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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272 | 9fdf0c29 | David Gibson | |
273 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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274 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
275 | 6e806cc3 | Bharata B Rao | |
276 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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277 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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278 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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279 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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280 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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281 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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282 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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283 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
284 | 9fdf0c29 | David Gibson | |
285 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
286 | 4d8d5467 | Benjamin Herrenschmidt | } |
287 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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288 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
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289 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
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290 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
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291 | 3384f95c | David Gibson | |
292 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
293 | 9fdf0c29 | David Gibson | |
294 | 9fdf0c29 | David Gibson | /* cpus */
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295 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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296 | 9fdf0c29 | David Gibson | |
297 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
298 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
299 | 9fdf0c29 | David Gibson | |
300 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
301 | 9fdf0c29 | David Gibson | |
302 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
303 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
304 | 9fdf0c29 | David Gibson | } |
305 | 9fdf0c29 | David Gibson | |
306 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
|
307 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
308 | 6e806cc3 | Bharata B Rao | |
309 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
310 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
|
311 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
312 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
|
313 | 9fdf0c29 | David Gibson | char *nodename;
|
314 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
315 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
316 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
317 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
318 | 5af9873d | Benjamin Herrenschmidt | uint32_t page_sizes_prop[64];
|
319 | 5af9873d | Benjamin Herrenschmidt | size_t page_sizes_prop_size; |
320 | 9fdf0c29 | David Gibson | |
321 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
322 | e97c3636 | David Gibson | continue;
|
323 | e97c3636 | David Gibson | } |
324 | e97c3636 | David Gibson | |
325 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
326 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
|
327 | 9fdf0c29 | David Gibson | exit(1);
|
328 | 9fdf0c29 | David Gibson | } |
329 | 9fdf0c29 | David Gibson | |
330 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
331 | 9fdf0c29 | David Gibson | |
332 | 9fdf0c29 | David Gibson | free(nodename); |
333 | 9fdf0c29 | David Gibson | |
334 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
335 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
336 | 9fdf0c29 | David Gibson | |
337 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
338 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
339 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
340 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
341 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
342 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
343 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
344 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
345 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
346 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
347 | e97c3636 | David Gibson | |
348 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
349 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
350 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
351 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
352 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
353 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
354 | e97c3636 | David Gibson | } |
355 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
356 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
357 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
358 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
359 | 9fdf0c29 | David Gibson | |
360 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
361 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
362 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
363 | 9fdf0c29 | David Gibson | } |
364 | 9fdf0c29 | David Gibson | |
365 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
366 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
367 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
368 | 6659394f | David Gibson | * 2 == VSX available */
|
369 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
370 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
371 | a7342588 | David Gibson | |
372 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
373 | 6659394f | David Gibson | } |
374 | 6659394f | David Gibson | |
375 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
376 | 6659394f | David Gibson | * 0 / no property == no DFP
|
377 | 6659394f | David Gibson | * 1 == DFP available */
|
378 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
379 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
380 | 6659394f | David Gibson | } |
381 | 6659394f | David Gibson | |
382 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, |
383 | 5af9873d | Benjamin Herrenschmidt | sizeof(page_sizes_prop));
|
384 | 5af9873d | Benjamin Herrenschmidt | if (page_sizes_prop_size) {
|
385 | 5af9873d | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
386 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop, page_sizes_prop_size))); |
387 | 5af9873d | Benjamin Herrenschmidt | } |
388 | 5af9873d | Benjamin Herrenschmidt | |
389 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
390 | 9fdf0c29 | David Gibson | } |
391 | 9fdf0c29 | David Gibson | |
392 | 7267c094 | Anthony Liguori | g_free(modelname); |
393 | 9fdf0c29 | David Gibson | |
394 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
395 | 9fdf0c29 | David Gibson | |
396 | f43e3525 | David Gibson | /* RTAS */
|
397 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
398 | f43e3525 | David Gibson | |
399 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
400 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
401 | c73e3771 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
402 | c73e3771 | Benjamin Herrenschmidt | sizeof(qemu_hypertas_prop))));
|
403 | f43e3525 | David Gibson | |
404 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
405 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
406 | 6e806cc3 | Bharata B Rao | |
407 | 74d042e5 | David Gibson | _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
|
408 | 74d042e5 | David Gibson | |
409 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
410 | f43e3525 | David Gibson | |
411 | b5cec4c5 | David Gibson | /* interrupt controller */
|
412 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
413 | b5cec4c5 | David Gibson | |
414 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
415 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
416 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
417 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
418 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
419 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
420 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
421 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
422 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
423 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
424 | b5cec4c5 | David Gibson | |
425 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
426 | b5cec4c5 | David Gibson | |
427 | 4040ab72 | David Gibson | /* vdevice */
|
428 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
429 | 4040ab72 | David Gibson | |
430 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
431 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
432 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
433 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
434 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
435 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
436 | 4040ab72 | David Gibson | |
437 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
438 | 4040ab72 | David Gibson | |
439 | 74d042e5 | David Gibson | /* event-sources */
|
440 | 74d042e5 | David Gibson | spapr_events_fdt_skel(fdt, epow_irq); |
441 | 74d042e5 | David Gibson | |
442 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
443 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
444 | 9fdf0c29 | David Gibson | |
445 | a3467baa | David Gibson | return fdt;
|
446 | a3467baa | David Gibson | } |
447 | a3467baa | David Gibson | |
448 | 7f763a5d | David Gibson | static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt) |
449 | 7f763a5d | David Gibson | { |
450 | 7f763a5d | David Gibson | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
451 | 7f763a5d | David Gibson | cpu_to_be32(0x0), cpu_to_be32(0x0), |
452 | 7f763a5d | David Gibson | cpu_to_be32(0x0)};
|
453 | 7f763a5d | David Gibson | char mem_name[32]; |
454 | a8170e5e | Avi Kivity | hwaddr node0_size, mem_start; |
455 | 7f763a5d | David Gibson | uint64_t mem_reg_property[2];
|
456 | 7f763a5d | David Gibson | int i, off;
|
457 | 7f763a5d | David Gibson | |
458 | 7f763a5d | David Gibson | /* memory node(s) */
|
459 | 7f763a5d | David Gibson | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
460 | 7f763a5d | David Gibson | if (spapr->rma_size > node0_size) {
|
461 | 7f763a5d | David Gibson | spapr->rma_size = node0_size; |
462 | 7f763a5d | David Gibson | } |
463 | 7f763a5d | David Gibson | |
464 | 7f763a5d | David Gibson | /* RMA */
|
465 | 7f763a5d | David Gibson | mem_reg_property[0] = 0; |
466 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
|
467 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, "memory@0"); |
468 | 7f763a5d | David Gibson | _FDT(off); |
469 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
470 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
471 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
472 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
473 | 7f763a5d | David Gibson | sizeof(associativity))));
|
474 | 7f763a5d | David Gibson | |
475 | 7f763a5d | David Gibson | /* RAM: Node 0 */
|
476 | 7f763a5d | David Gibson | if (node0_size > spapr->rma_size) {
|
477 | 7f763a5d | David Gibson | mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
|
478 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
|
479 | 7f763a5d | David Gibson | |
480 | 7f763a5d | David Gibson | sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
|
481 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, mem_name);
|
482 | 7f763a5d | David Gibson | _FDT(off); |
483 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
484 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
485 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
486 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
487 | 7f763a5d | David Gibson | sizeof(associativity))));
|
488 | 7f763a5d | David Gibson | } |
489 | 7f763a5d | David Gibson | |
490 | 7f763a5d | David Gibson | /* RAM: Node 1 and beyond */
|
491 | 7f763a5d | David Gibson | mem_start = node0_size; |
492 | 7f763a5d | David Gibson | for (i = 1; i < nb_numa_nodes; i++) { |
493 | 7f763a5d | David Gibson | mem_reg_property[0] = cpu_to_be64(mem_start);
|
494 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
|
495 | 7f763a5d | David Gibson | associativity[3] = associativity[4] = cpu_to_be32(i); |
496 | 7f763a5d | David Gibson | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
497 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, mem_name);
|
498 | 7f763a5d | David Gibson | _FDT(off); |
499 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
500 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
501 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
502 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
503 | 7f763a5d | David Gibson | sizeof(associativity))));
|
504 | 7f763a5d | David Gibson | mem_start += node_mem[i]; |
505 | 7f763a5d | David Gibson | } |
506 | 7f763a5d | David Gibson | |
507 | 7f763a5d | David Gibson | return 0; |
508 | 7f763a5d | David Gibson | } |
509 | 7f763a5d | David Gibson | |
510 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
511 | a8170e5e | Avi Kivity | hwaddr fdt_addr, |
512 | a8170e5e | Avi Kivity | hwaddr rtas_addr, |
513 | a8170e5e | Avi Kivity | hwaddr rtas_size) |
514 | a3467baa | David Gibson | { |
515 | a3467baa | David Gibson | int ret;
|
516 | a3467baa | David Gibson | void *fdt;
|
517 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
518 | a3467baa | David Gibson | |
519 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
520 | a3467baa | David Gibson | |
521 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
522 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
523 | 4040ab72 | David Gibson | |
524 | 7f763a5d | David Gibson | ret = spapr_populate_memory(spapr, fdt); |
525 | 7f763a5d | David Gibson | if (ret < 0) { |
526 | 7f763a5d | David Gibson | fprintf(stderr, "couldn't setup memory nodes in fdt\n");
|
527 | 7f763a5d | David Gibson | exit(1);
|
528 | 7f763a5d | David Gibson | } |
529 | 7f763a5d | David Gibson | |
530 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
531 | 4040ab72 | David Gibson | if (ret < 0) { |
532 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
533 | 4040ab72 | David Gibson | exit(1);
|
534 | 4040ab72 | David Gibson | } |
535 | 4040ab72 | David Gibson | |
536 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
537 | e0fdbd7c | Alexey Kardashevskiy | ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt); |
538 | 3384f95c | David Gibson | } |
539 | 3384f95c | David Gibson | |
540 | 3384f95c | David Gibson | if (ret < 0) { |
541 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
542 | 3384f95c | David Gibson | exit(1);
|
543 | 3384f95c | David Gibson | } |
544 | 3384f95c | David Gibson | |
545 | 39ac8455 | David Gibson | /* RTAS */
|
546 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
547 | 39ac8455 | David Gibson | if (ret < 0) { |
548 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
549 | 39ac8455 | David Gibson | } |
550 | 39ac8455 | David Gibson | |
551 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
552 | 7f763a5d | David Gibson | ret = spapr_fixup_cpu_dt(fdt, spapr); |
553 | 7f763a5d | David Gibson | if (ret < 0) { |
554 | 7f763a5d | David Gibson | fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
|
555 | 6e806cc3 | Bharata B Rao | } |
556 | 6e806cc3 | Bharata B Rao | |
557 | 3fc5acde | Alexander Graf | if (!spapr->has_graphics) {
|
558 | f28359d8 | zhlcindy@gmail.com | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
559 | f28359d8 | zhlcindy@gmail.com | } |
560 | 68f3a94c | David Gibson | |
561 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
562 | 4040ab72 | David Gibson | |
563 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
564 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
565 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
566 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
567 | 4d8d5467 | Benjamin Herrenschmidt | } |
568 | 4d8d5467 | Benjamin Herrenschmidt | |
569 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
570 | 9fdf0c29 | David Gibson | |
571 | 7267c094 | Anthony Liguori | g_free(fdt); |
572 | 9fdf0c29 | David Gibson | } |
573 | 9fdf0c29 | David Gibson | |
574 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
575 | 9fdf0c29 | David Gibson | { |
576 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
577 | 9fdf0c29 | David Gibson | } |
578 | 9fdf0c29 | David Gibson | |
579 | 1b14670a | Andreas Färber | static void emulate_spapr_hypercall(PowerPCCPU *cpu) |
580 | 9fdf0c29 | David Gibson | { |
581 | 1b14670a | Andreas Färber | CPUPPCState *env = &cpu->env; |
582 | 1b14670a | Andreas Färber | |
583 | efcb9383 | David Gibson | if (msr_pr) {
|
584 | efcb9383 | David Gibson | hcall_dprintf("Hypercall made with MSR[PR]=1\n");
|
585 | efcb9383 | David Gibson | env->gpr[3] = H_PRIVILEGE;
|
586 | efcb9383 | David Gibson | } else {
|
587 | aa100fa4 | Andreas Färber | env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); |
588 | efcb9383 | David Gibson | } |
589 | 9fdf0c29 | David Gibson | } |
590 | 9fdf0c29 | David Gibson | |
591 | 7f763a5d | David Gibson | static void spapr_reset_htab(sPAPREnvironment *spapr) |
592 | 7f763a5d | David Gibson | { |
593 | 7f763a5d | David Gibson | long shift;
|
594 | 7f763a5d | David Gibson | |
595 | 7f763a5d | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
596 | 7f763a5d | David Gibson | * later we should probably make it scale to the size of guest
|
597 | 7f763a5d | David Gibson | * RAM */
|
598 | 7f763a5d | David Gibson | |
599 | 7f763a5d | David Gibson | shift = kvmppc_reset_htab(spapr->htab_shift); |
600 | 7f763a5d | David Gibson | |
601 | 7f763a5d | David Gibson | if (shift > 0) { |
602 | 7f763a5d | David Gibson | /* Kernel handles htab, we don't need to allocate one */
|
603 | 7f763a5d | David Gibson | spapr->htab_shift = shift; |
604 | 7f763a5d | David Gibson | } else {
|
605 | 7f763a5d | David Gibson | if (!spapr->htab) {
|
606 | 7f763a5d | David Gibson | /* Allocate an htab if we don't yet have one */
|
607 | 7f763a5d | David Gibson | spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr)); |
608 | 7f763a5d | David Gibson | } |
609 | 7f763a5d | David Gibson | |
610 | 7f763a5d | David Gibson | /* And clear it */
|
611 | 7f763a5d | David Gibson | memset(spapr->htab, 0, HTAB_SIZE(spapr));
|
612 | 7f763a5d | David Gibson | } |
613 | 7f763a5d | David Gibson | |
614 | 7f763a5d | David Gibson | /* Update the RMA size if necessary */
|
615 | 7f763a5d | David Gibson | if (spapr->vrma_adjust) {
|
616 | 7f763a5d | David Gibson | spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift); |
617 | 7f763a5d | David Gibson | } |
618 | 9fdf0c29 | David Gibson | } |
619 | 9fdf0c29 | David Gibson | |
620 | c8787ad4 | David Gibson | static void ppc_spapr_reset(void) |
621 | a3467baa | David Gibson | { |
622 | 7f763a5d | David Gibson | /* Reset the hash table & recalc the RMA */
|
623 | 7f763a5d | David Gibson | spapr_reset_htab(spapr); |
624 | a3467baa | David Gibson | |
625 | c8787ad4 | David Gibson | qemu_devices_reset(); |
626 | a3467baa | David Gibson | |
627 | a3467baa | David Gibson | /* Load the fdt */
|
628 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
629 | a3467baa | David Gibson | spapr->rtas_size); |
630 | a3467baa | David Gibson | |
631 | a3467baa | David Gibson | /* Set up the entry state */
|
632 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
633 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
634 | a3467baa | David Gibson | first_cpu->halted = 0;
|
635 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
636 | a3467baa | David Gibson | |
637 | a3467baa | David Gibson | } |
638 | a3467baa | David Gibson | |
639 | 1bba0dc9 | Andreas Färber | static void spapr_cpu_reset(void *opaque) |
640 | 1bba0dc9 | Andreas Färber | { |
641 | 5b2038e0 | Andreas Färber | PowerPCCPU *cpu = opaque; |
642 | 048706d9 | David Gibson | CPUPPCState *env = &cpu->env; |
643 | 1bba0dc9 | Andreas Färber | |
644 | 5b2038e0 | Andreas Färber | cpu_reset(CPU(cpu)); |
645 | 048706d9 | David Gibson | |
646 | 048706d9 | David Gibson | /* All CPUs start halted. CPU0 is unhalted from the machine level
|
647 | 048706d9 | David Gibson | * reset code and the rest are explicitly started up by the guest
|
648 | 048706d9 | David Gibson | * using an RTAS call */
|
649 | 048706d9 | David Gibson | env->halted = 1;
|
650 | 048706d9 | David Gibson | |
651 | 048706d9 | David Gibson | env->spr[SPR_HIOR] = 0;
|
652 | 7f763a5d | David Gibson | |
653 | 7f763a5d | David Gibson | env->external_htab = spapr->htab; |
654 | 7f763a5d | David Gibson | env->htab_base = -1;
|
655 | 7f763a5d | David Gibson | env->htab_mask = HTAB_SIZE(spapr) - 1;
|
656 | 7f763a5d | David Gibson | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
657 | 7f763a5d | David Gibson | (spapr->htab_shift - 18);
|
658 | 1bba0dc9 | Andreas Färber | } |
659 | 1bba0dc9 | Andreas Färber | |
660 | 8c57b867 | Alexander Graf | /* Returns whether we want to use VGA or not */
|
661 | f28359d8 | zhlcindy@gmail.com | static int spapr_vga_init(PCIBus *pci_bus) |
662 | f28359d8 | zhlcindy@gmail.com | { |
663 | 8c57b867 | Alexander Graf | switch (vga_interface_type) {
|
664 | 8c57b867 | Alexander Graf | case VGA_NONE:
|
665 | 1ddcae82 | Aurelien Jarno | case VGA_STD:
|
666 | 1ddcae82 | Aurelien Jarno | return pci_vga_init(pci_bus) != NULL; |
667 | 8c57b867 | Alexander Graf | default:
|
668 | f28359d8 | zhlcindy@gmail.com | fprintf(stderr, "This vga model is not supported,"
|
669 | f28359d8 | zhlcindy@gmail.com | "currently it only supports -vga std\n");
|
670 | 8c57b867 | Alexander Graf | exit(0);
|
671 | 8c57b867 | Alexander Graf | break;
|
672 | f28359d8 | zhlcindy@gmail.com | } |
673 | f28359d8 | zhlcindy@gmail.com | } |
674 | f28359d8 | zhlcindy@gmail.com | |
675 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
676 | 5f072e1f | Eduardo Habkost | static void ppc_spapr_init(QEMUMachineInitArgs *args) |
677 | 9fdf0c29 | David Gibson | { |
678 | 5f072e1f | Eduardo Habkost | ram_addr_t ram_size = args->ram_size; |
679 | 5f072e1f | Eduardo Habkost | const char *cpu_model = args->cpu_model; |
680 | 5f072e1f | Eduardo Habkost | const char *kernel_filename = args->kernel_filename; |
681 | 5f072e1f | Eduardo Habkost | const char *kernel_cmdline = args->kernel_cmdline; |
682 | 5f072e1f | Eduardo Habkost | const char *initrd_filename = args->initrd_filename; |
683 | 5f072e1f | Eduardo Habkost | const char *boot_device = args->boot_device; |
684 | 05769733 | Andreas Färber | PowerPCCPU *cpu; |
685 | e2684c0b | Andreas Färber | CPUPPCState *env; |
686 | 8c9f64df | Andreas Färber | PCIHostState *phb; |
687 | 9fdf0c29 | David Gibson | int i;
|
688 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
689 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
690 | a8170e5e | Avi Kivity | hwaddr rma_alloc_size; |
691 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
692 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
693 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
694 | 39ac8455 | David Gibson | char *filename;
|
695 | 9fdf0c29 | David Gibson | |
696 | 0ee2c058 | Alexey Kardashevskiy | msi_supported = true;
|
697 | 0ee2c058 | Alexey Kardashevskiy | |
698 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
699 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
700 | d43b45e2 | David Gibson | |
701 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
702 | 9fdf0c29 | David Gibson | |
703 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
704 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
705 | 354ac20a | David Gibson | |
706 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
707 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
708 | 354ac20a | David Gibson | exit(1);
|
709 | 354ac20a | David Gibson | } |
710 | 7f763a5d | David Gibson | |
711 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
712 | 7f763a5d | David Gibson | spapr->rma_size = rma_alloc_size; |
713 | 354ac20a | David Gibson | } else {
|
714 | 7f763a5d | David Gibson | spapr->rma_size = ram_size; |
715 | 7f763a5d | David Gibson | |
716 | 7f763a5d | David Gibson | /* With KVM, we don't actually know whether KVM supports an
|
717 | 7f763a5d | David Gibson | * unbounded RMA (PR KVM) or is limited by the hash table size
|
718 | 7f763a5d | David Gibson | * (HV KVM using VRMA), so we always assume the latter
|
719 | 7f763a5d | David Gibson | *
|
720 | 7f763a5d | David Gibson | * In that case, we also limit the initial allocations for RTAS
|
721 | 7f763a5d | David Gibson | * etc... to 256M since we have no way to know what the VRMA size
|
722 | 7f763a5d | David Gibson | * is going to be as it depends on the size of the hash table
|
723 | 7f763a5d | David Gibson | * isn't determined yet.
|
724 | 7f763a5d | David Gibson | */
|
725 | 7f763a5d | David Gibson | if (kvm_enabled()) {
|
726 | 7f763a5d | David Gibson | spapr->vrma_adjust = 1;
|
727 | 7f763a5d | David Gibson | spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
|
728 | 7f763a5d | David Gibson | } |
729 | 354ac20a | David Gibson | } |
730 | 354ac20a | David Gibson | |
731 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
732 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
733 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
734 | 7f763a5d | David Gibson | rtas_limit = MIN(spapr->rma_size, 0x80000000);
|
735 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
736 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
737 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
738 | 9fdf0c29 | David Gibson | |
739 | 382be75d | David Gibson | /* We aim for a hash table of size 1/128 the size of RAM. The
|
740 | 382be75d | David Gibson | * normal rule of thumb is 1/64 the size of RAM, but that's much
|
741 | 382be75d | David Gibson | * more than needed for the Linux guests we support. */
|
742 | 382be75d | David Gibson | spapr->htab_shift = 18; /* Minimum architected size */ |
743 | 382be75d | David Gibson | while (spapr->htab_shift <= 46) { |
744 | 382be75d | David Gibson | if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) { |
745 | 382be75d | David Gibson | break;
|
746 | 382be75d | David Gibson | } |
747 | 382be75d | David Gibson | spapr->htab_shift++; |
748 | 382be75d | David Gibson | } |
749 | 7f763a5d | David Gibson | |
750 | 9fdf0c29 | David Gibson | /* init CPUs */
|
751 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
752 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
753 | 9fdf0c29 | David Gibson | } |
754 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
755 | 05769733 | Andreas Färber | cpu = cpu_ppc_init(cpu_model); |
756 | 05769733 | Andreas Färber | if (cpu == NULL) { |
757 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
758 | 9fdf0c29 | David Gibson | exit(1);
|
759 | 9fdf0c29 | David Gibson | } |
760 | 05769733 | Andreas Färber | env = &cpu->env; |
761 | 05769733 | Andreas Färber | |
762 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
763 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
764 | 9fdf0c29 | David Gibson | |
765 | 048706d9 | David Gibson | /* PAPR always has exception vectors in RAM not ROM */
|
766 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
767 | 048706d9 | David Gibson | |
768 | 048706d9 | David Gibson | /* Tell KVM that we're in PAPR mode */
|
769 | 048706d9 | David Gibson | if (kvm_enabled()) {
|
770 | 048706d9 | David Gibson | kvmppc_set_papr(env); |
771 | 048706d9 | David Gibson | } |
772 | 048706d9 | David Gibson | |
773 | 048706d9 | David Gibson | qemu_register_reset(spapr_cpu_reset, cpu); |
774 | 9fdf0c29 | David Gibson | } |
775 | 9fdf0c29 | David Gibson | |
776 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
777 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
778 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
779 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
780 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
781 | 354ac20a | David Gibson | |
782 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
783 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
784 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
785 | 354ac20a | David Gibson | } |
786 | 9fdf0c29 | David Gibson | |
787 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
788 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
789 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
790 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
791 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
792 | 39ac8455 | David Gibson | exit(1);
|
793 | 39ac8455 | David Gibson | } |
794 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
795 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
796 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
797 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
798 | 4d8d5467 | Benjamin Herrenschmidt | } |
799 | 7267c094 | Anthony Liguori | g_free(filename); |
800 | 39ac8455 | David Gibson | |
801 | 4d8d5467 | Benjamin Herrenschmidt | |
802 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
803 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
804 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
805 | b5cec4c5 | David Gibson | |
806 | 74d042e5 | David Gibson | /* Set up EPOW events infrastructure */
|
807 | 74d042e5 | David Gibson | spapr_events_init(spapr); |
808 | 74d042e5 | David Gibson | |
809 | ad0ebb91 | David Gibson | /* Set up IOMMU */
|
810 | ad0ebb91 | David Gibson | spapr_iommu_init(); |
811 | ad0ebb91 | David Gibson | |
812 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
813 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
814 | 4040ab72 | David Gibson | |
815 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
816 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
817 | d601fac4 | David Gibson | spapr_vty_create(spapr->vio_bus, serial_hds[i]); |
818 | 4040ab72 | David Gibson | } |
819 | 4040ab72 | David Gibson | } |
820 | 9fdf0c29 | David Gibson | |
821 | 3384f95c | David Gibson | /* Set up PCI */
|
822 | fa28f71b | Alexey Kardashevskiy | spapr_pci_rtas_init(); |
823 | fa28f71b | Alexey Kardashevskiy | |
824 | 3384f95c | David Gibson | spapr_create_phb(spapr, "pci", SPAPR_PCI_BUID,
|
825 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_ADDR, |
826 | 3384f95c | David Gibson | SPAPR_PCI_MEM_WIN_SIZE, |
827 | 0ee2c058 | Alexey Kardashevskiy | SPAPR_PCI_IO_WIN_ADDR, |
828 | 0ee2c058 | Alexey Kardashevskiy | SPAPR_PCI_MSI_WIN_ADDR); |
829 | 8558d942 | Andreas Färber | phb = PCI_HOST_BRIDGE(QLIST_FIRST(&spapr->phbs)); |
830 | 3384f95c | David Gibson | |
831 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
832 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
833 | 8d90ad90 | David Gibson | |
834 | 8d90ad90 | David Gibson | if (!nd->model) {
|
835 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
836 | 8d90ad90 | David Gibson | } |
837 | 8d90ad90 | David Gibson | |
838 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
839 | d601fac4 | David Gibson | spapr_vlan_create(spapr->vio_bus, nd); |
840 | 8d90ad90 | David Gibson | } else {
|
841 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
842 | 8d90ad90 | David Gibson | } |
843 | 8d90ad90 | David Gibson | } |
844 | 8d90ad90 | David Gibson | |
845 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
846 | d601fac4 | David Gibson | spapr_vscsi_create(spapr->vio_bus); |
847 | 6e270446 | Ben Herrenschmidt | } |
848 | 6e270446 | Ben Herrenschmidt | |
849 | f28359d8 | zhlcindy@gmail.com | /* Graphics */
|
850 | 8c9f64df | Andreas Färber | if (spapr_vga_init(phb->bus)) {
|
851 | 3fc5acde | Alexander Graf | spapr->has_graphics = true;
|
852 | f28359d8 | zhlcindy@gmail.com | } |
853 | f28359d8 | zhlcindy@gmail.com | |
854 | 094b287f | zhlcindy@gmail.com | if (usb_enabled(spapr->has_graphics)) {
|
855 | 8c9f64df | Andreas Färber | pci_create_simple(phb->bus, -1, "pci-ohci"); |
856 | 35139a59 | David Gibson | if (spapr->has_graphics) {
|
857 | 35139a59 | David Gibson | usbdevice_create("keyboard");
|
858 | 35139a59 | David Gibson | usbdevice_create("mouse");
|
859 | 35139a59 | David Gibson | } |
860 | 35139a59 | David Gibson | } |
861 | 35139a59 | David Gibson | |
862 | 7f763a5d | David Gibson | if (spapr->rma_size < (MIN_RMA_SLOF << 20)) { |
863 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
864 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
865 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
866 | 4d8d5467 | Benjamin Herrenschmidt | } |
867 | 4d8d5467 | Benjamin Herrenschmidt | |
868 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
869 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
870 | 9fdf0c29 | David Gibson | |
871 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
872 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
873 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
874 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
875 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
876 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
877 | 9fdf0c29 | David Gibson | } |
878 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
879 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
880 | 9fdf0c29 | David Gibson | kernel_filename); |
881 | 9fdf0c29 | David Gibson | exit(1);
|
882 | 9fdf0c29 | David Gibson | } |
883 | 9fdf0c29 | David Gibson | |
884 | 9fdf0c29 | David Gibson | /* load initrd */
|
885 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
886 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
887 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
888 | 4d8d5467 | Benjamin Herrenschmidt | */
|
889 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
890 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
891 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
892 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
893 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
894 | 9fdf0c29 | David Gibson | initrd_filename); |
895 | 9fdf0c29 | David Gibson | exit(1);
|
896 | 9fdf0c29 | David Gibson | } |
897 | 9fdf0c29 | David Gibson | } else {
|
898 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
899 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
900 | 9fdf0c29 | David Gibson | } |
901 | 4d8d5467 | Benjamin Herrenschmidt | } |
902 | a3467baa | David Gibson | |
903 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
904 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
905 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
906 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
907 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
908 | 4d8d5467 | Benjamin Herrenschmidt | } |
909 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
910 | 4d8d5467 | Benjamin Herrenschmidt | |
911 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
912 | 4d8d5467 | Benjamin Herrenschmidt | |
913 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
914 | 7f763a5d | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, |
915 | a3467baa | David Gibson | initrd_base, initrd_size, |
916 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
917 | 74d042e5 | David Gibson | boot_device, kernel_cmdline, |
918 | 74d042e5 | David Gibson | spapr->epow_irq); |
919 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
920 | 9fdf0c29 | David Gibson | } |
921 | 9fdf0c29 | David Gibson | |
922 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
923 | 9fdf0c29 | David Gibson | .name = "pseries",
|
924 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
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925 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
926 | c8787ad4 | David Gibson | .reset = ppc_spapr_reset, |
927 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
928 | 9fdf0c29 | David Gibson | .no_parallel = 1,
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929 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
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930 | 9fdf0c29 | David Gibson | }; |
931 | 9fdf0c29 | David Gibson | |
932 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
933 | 9fdf0c29 | David Gibson | { |
934 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
935 | 9fdf0c29 | David Gibson | } |
936 | 9fdf0c29 | David Gibson | |
937 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |