root / hw / ppc_chrp.c @ b2097003
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1 | 64201201 | bellard | /*
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2 | 3cbee15b | j_mayer | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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3 | 5fafdf24 | ths | *
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4 | 47103572 | j_mayer | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 3cbee15b | j_mayer | * Copyright (c) 2007 Jocelyn Mayer
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6 | 5fafdf24 | ths | *
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7 | 64201201 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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8 | 64201201 | bellard | * of this software and associated documentation files (the "Software"), to deal
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9 | 64201201 | bellard | * in the Software without restriction, including without limitation the rights
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10 | 64201201 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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11 | 64201201 | bellard | * copies of the Software, and to permit persons to whom the Software is
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12 | 64201201 | bellard | * furnished to do so, subject to the following conditions:
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13 | 64201201 | bellard | *
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14 | 64201201 | bellard | * The above copyright notice and this permission notice shall be included in
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15 | 64201201 | bellard | * all copies or substantial portions of the Software.
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16 | 64201201 | bellard | *
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17 | 64201201 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 | 64201201 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 | 64201201 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 | 64201201 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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21 | 64201201 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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22 | 64201201 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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23 | 64201201 | bellard | * THE SOFTWARE.
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24 | 64201201 | bellard | */
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25 | 87ecb68b | pbrook | #include "hw.h" |
26 | 87ecb68b | pbrook | #include "ppc.h" |
27 | 3cbee15b | j_mayer | #include "ppc_mac.h" |
28 | 87ecb68b | pbrook | #include "nvram.h" |
29 | 87ecb68b | pbrook | #include "pc.h" |
30 | 87ecb68b | pbrook | #include "pci.h" |
31 | 87ecb68b | pbrook | #include "net.h" |
32 | 87ecb68b | pbrook | #include "sysemu.h" |
33 | 87ecb68b | pbrook | #include "boards.h" |
34 | 267002cd | bellard | |
35 | e4bcb14c | ths | #define MAX_IDE_BUS 2 |
36 | e4bcb14c | ths | |
37 | 0aa6a4a2 | bellard | /* UniN device */
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38 | 0aa6a4a2 | bellard | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
39 | 0aa6a4a2 | bellard | { |
40 | 0aa6a4a2 | bellard | } |
41 | 0aa6a4a2 | bellard | |
42 | 0aa6a4a2 | bellard | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) |
43 | 0aa6a4a2 | bellard | { |
44 | 0aa6a4a2 | bellard | return 0; |
45 | 0aa6a4a2 | bellard | } |
46 | 0aa6a4a2 | bellard | |
47 | 0aa6a4a2 | bellard | static CPUWriteMemoryFunc *unin_write[] = {
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48 | 0aa6a4a2 | bellard | &unin_writel, |
49 | 0aa6a4a2 | bellard | &unin_writel, |
50 | 0aa6a4a2 | bellard | &unin_writel, |
51 | 0aa6a4a2 | bellard | }; |
52 | 0aa6a4a2 | bellard | |
53 | 0aa6a4a2 | bellard | static CPUReadMemoryFunc *unin_read[] = {
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54 | 0aa6a4a2 | bellard | &unin_readl, |
55 | 0aa6a4a2 | bellard | &unin_readl, |
56 | 0aa6a4a2 | bellard | &unin_readl, |
57 | 0aa6a4a2 | bellard | }; |
58 | 0aa6a4a2 | bellard | |
59 | 3cbee15b | j_mayer | /* PowerPC Mac99 hardware initialisation */
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60 | 00f82b8a | aurel32 | static void ppc_core99_init (ram_addr_t ram_size, int vga_ram_size, |
61 | 6ac0e82d | balrog | const char *boot_device, DisplayState *ds, |
62 | 3cbee15b | j_mayer | const char *kernel_filename, |
63 | 3cbee15b | j_mayer | const char *kernel_cmdline, |
64 | 3cbee15b | j_mayer | const char *initrd_filename, |
65 | 3cbee15b | j_mayer | const char *cpu_model) |
66 | 64201201 | bellard | { |
67 | aaed909a | bellard | CPUState *env = NULL, *envs[MAX_CPUS];
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68 | 64201201 | bellard | char buf[1024]; |
69 | e9df014c | j_mayer | qemu_irq *pic, **openpic_irqs; |
70 | aef445bd | pbrook | int unin_memory;
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71 | d5295253 | bellard | int linux_boot, i;
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72 | d5295253 | bellard | unsigned long bios_offset, vga_bios_offset; |
73 | b6b8bd18 | bellard | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
74 | 46e50e9d | bellard | PCIBus *pci_bus; |
75 | 3cbee15b | j_mayer | nvram_t nvram; |
76 | 3cbee15b | j_mayer | #if 0
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77 | 3cbee15b | j_mayer | MacIONVRAMState *nvr;
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78 | 3cbee15b | j_mayer | int nvram_mem_index;
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79 | 3cbee15b | j_mayer | #endif
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80 | 3cbee15b | j_mayer | m48t59_t *m48t59; |
81 | d5295253 | bellard | int vga_bios_size, bios_size;
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82 | d537cf6c | pbrook | qemu_irq *dummy_irq; |
83 | 3cbee15b | j_mayer | int pic_mem_index, dbdma_mem_index, cuda_mem_index;
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84 | 3cbee15b | j_mayer | int ide_mem_index[2]; |
85 | 28c5af54 | j_mayer | int ppc_boot_device;
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86 | e4bcb14c | ths | int index;
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87 | e4bcb14c | ths | BlockDriverState *hd[MAX_IDE_BUS * MAX_IDE_DEVS]; |
88 | 46e50e9d | bellard | |
89 | 64201201 | bellard | linux_boot = (kernel_filename != NULL);
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90 | 64201201 | bellard | |
91 | c68ea704 | bellard | /* init CPUs */
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92 | 94fc95cd | j_mayer | if (cpu_model == NULL) |
93 | d12f4c38 | j_mayer | cpu_model = "default";
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94 | e9df014c | j_mayer | for (i = 0; i < smp_cpus; i++) { |
95 | aaed909a | bellard | env = cpu_init(cpu_model); |
96 | aaed909a | bellard | if (!env) {
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97 | aaed909a | bellard | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
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98 | aaed909a | bellard | exit(1);
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99 | aaed909a | bellard | } |
100 | e9df014c | j_mayer | /* Set time-base frequency to 100 Mhz */
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101 | e9df014c | j_mayer | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); |
102 | 3cbee15b | j_mayer | #if 0
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103 | e9df014c | j_mayer | env->osi_call = vga_osi_call;
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104 | 3cbee15b | j_mayer | #endif
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105 | fe33cc71 | j_mayer | qemu_register_reset(&cpu_ppc_reset, env); |
106 | e9df014c | j_mayer | envs[i] = env; |
107 | e9df014c | j_mayer | } |
108 | 4c823cff | j_mayer | if (env->nip < 0xFFF80000) { |
109 | 4c823cff | j_mayer | /* Special test for PowerPC 601:
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110 | 4c823cff | j_mayer | * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
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111 | 4c823cff | j_mayer | * But the NVRAM is located at 0xFFF04000...
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112 | 4c823cff | j_mayer | */
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113 | 4c823cff | j_mayer | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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114 | 4c823cff | j_mayer | } |
115 | c68ea704 | bellard | |
116 | 64201201 | bellard | /* allocate RAM */
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117 | 64201201 | bellard | cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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118 | 64201201 | bellard | |
119 | 64201201 | bellard | /* allocate and load BIOS */
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120 | 64201201 | bellard | bios_offset = ram_size + vga_ram_size; |
121 | 1192dad8 | j_mayer | if (bios_name == NULL) |
122 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
123 | 1192dad8 | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
124 | d5295253 | bellard | bios_size = load_image(buf, phys_ram_base + bios_offset); |
125 | d5295253 | bellard | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
126 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
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127 | 64201201 | bellard | exit(1);
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128 | 64201201 | bellard | } |
129 | d5295253 | bellard | bios_size = (bios_size + 0xfff) & ~0xfff; |
130 | 4c823cff | j_mayer | if (bios_size > 0x00080000) { |
131 | 4c823cff | j_mayer | /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
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132 | 4c823cff | j_mayer | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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133 | 4c823cff | j_mayer | } |
134 | 4a057712 | j_mayer | cpu_register_physical_memory((uint32_t)(-bios_size), |
135 | d5295253 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
136 | 3b46e624 | ths | |
137 | d5295253 | bellard | /* allocate and load VGA BIOS */
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138 | d5295253 | bellard | vga_bios_offset = bios_offset + bios_size; |
139 | d5295253 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
140 | d5295253 | bellard | vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
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141 | d5295253 | bellard | if (vga_bios_size < 0) { |
142 | d5295253 | bellard | /* if no bios is present, we can still work */
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143 | d5295253 | bellard | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
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144 | d5295253 | bellard | vga_bios_size = 0;
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145 | d5295253 | bellard | } else {
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146 | d5295253 | bellard | /* set a specific header (XXX: find real Apple format for NDRV
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147 | d5295253 | bellard | drivers) */
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148 | d5295253 | bellard | phys_ram_base[vga_bios_offset] = 'N';
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149 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 1] = 'D'; |
150 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 2] = 'R'; |
151 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 3] = 'V'; |
152 | 5fafdf24 | ths | cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
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153 | d5295253 | bellard | vga_bios_size); |
154 | d5295253 | bellard | vga_bios_size += 8;
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155 | d5295253 | bellard | } |
156 | d5295253 | bellard | vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff; |
157 | 3b46e624 | ths | |
158 | b6b8bd18 | bellard | if (linux_boot) {
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159 | b6b8bd18 | bellard | kernel_base = KERNEL_LOAD_ADDR; |
160 | b6b8bd18 | bellard | /* now we can load the kernel */
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161 | b6b8bd18 | bellard | kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base); |
162 | b6b8bd18 | bellard | if (kernel_size < 0) { |
163 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load kernel '%s'\n",
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164 | 4a057712 | j_mayer | kernel_filename); |
165 | b6b8bd18 | bellard | exit(1);
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166 | b6b8bd18 | bellard | } |
167 | b6b8bd18 | bellard | /* load initrd */
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168 | b6b8bd18 | bellard | if (initrd_filename) {
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169 | b6b8bd18 | bellard | initrd_base = INITRD_LOAD_ADDR; |
170 | b6b8bd18 | bellard | initrd_size = load_image(initrd_filename, |
171 | b6b8bd18 | bellard | phys_ram_base + initrd_base); |
172 | b6b8bd18 | bellard | if (initrd_size < 0) { |
173 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
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174 | 4a057712 | j_mayer | initrd_filename); |
175 | b6b8bd18 | bellard | exit(1);
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176 | b6b8bd18 | bellard | } |
177 | b6b8bd18 | bellard | } else {
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178 | b6b8bd18 | bellard | initrd_base = 0;
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179 | b6b8bd18 | bellard | initrd_size = 0;
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180 | b6b8bd18 | bellard | } |
181 | 6ac0e82d | balrog | ppc_boot_device = 'm';
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182 | b6b8bd18 | bellard | } else {
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183 | b6b8bd18 | bellard | kernel_base = 0;
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184 | b6b8bd18 | bellard | kernel_size = 0;
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185 | b6b8bd18 | bellard | initrd_base = 0;
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186 | b6b8bd18 | bellard | initrd_size = 0;
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187 | 28c5af54 | j_mayer | ppc_boot_device = '\0';
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188 | 28c5af54 | j_mayer | /* We consider that NewWorld PowerMac never have any floppy drive
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189 | 28c5af54 | j_mayer | * For now, OHW cannot boot from the network.
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190 | 28c5af54 | j_mayer | */
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191 | 0d913fdb | j_mayer | for (i = 0; boot_device[i] != '\0'; i++) { |
192 | 0d913fdb | j_mayer | if (boot_device[i] >= 'c' && boot_device[i] <= 'f') { |
193 | 0d913fdb | j_mayer | ppc_boot_device = boot_device[i]; |
194 | 28c5af54 | j_mayer | break;
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195 | 0d913fdb | j_mayer | } |
196 | 28c5af54 | j_mayer | } |
197 | 28c5af54 | j_mayer | if (ppc_boot_device == '\0') { |
198 | 28c5af54 | j_mayer | fprintf(stderr, "No valid boot device for Mac99 machine\n");
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199 | 28c5af54 | j_mayer | exit(1);
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200 | 28c5af54 | j_mayer | } |
201 | b6b8bd18 | bellard | } |
202 | 0aa6a4a2 | bellard | |
203 | 3cbee15b | j_mayer | isa_mem_base = 0x80000000;
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204 | aef445bd | pbrook | |
205 | 3cbee15b | j_mayer | /* Register 8 MB of ISA IO space */
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206 | 3cbee15b | j_mayer | isa_mmio_init(0xf2000000, 0x00800000); |
207 | 3b46e624 | ths | |
208 | 3cbee15b | j_mayer | /* UniN init */
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209 | 3cbee15b | j_mayer | unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); |
210 | 3cbee15b | j_mayer | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); |
211 | 47103572 | j_mayer | |
212 | 3cbee15b | j_mayer | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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213 | 3cbee15b | j_mayer | openpic_irqs[0] =
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214 | 3cbee15b | j_mayer | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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215 | 3cbee15b | j_mayer | for (i = 0; i < smp_cpus; i++) { |
216 | 3cbee15b | j_mayer | /* Mac99 IRQ connection between OpenPIC outputs pins
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217 | 3cbee15b | j_mayer | * and PowerPC input pins
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218 | 3cbee15b | j_mayer | */
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219 | 3cbee15b | j_mayer | switch (PPC_INPUT(env)) {
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220 | 3cbee15b | j_mayer | case PPC_FLAGS_INPUT_6xx:
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221 | 3cbee15b | j_mayer | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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222 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
223 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
224 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
225 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
226 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
227 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
228 | 3cbee15b | j_mayer | /* Not connected ? */
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229 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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230 | 3cbee15b | j_mayer | /* Check this */
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231 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
232 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
233 | 3cbee15b | j_mayer | break;
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234 | 00af685f | j_mayer | #if defined(TARGET_PPC64)
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235 | 3cbee15b | j_mayer | case PPC_FLAGS_INPUT_970:
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236 | 3cbee15b | j_mayer | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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237 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
238 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
239 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
240 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
241 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
242 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; |
243 | 3cbee15b | j_mayer | /* Not connected ? */
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244 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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245 | 3cbee15b | j_mayer | /* Check this */
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246 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
247 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
248 | 3cbee15b | j_mayer | break;
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249 | 00af685f | j_mayer | #endif /* defined(TARGET_PPC64) */ |
250 | 3cbee15b | j_mayer | default:
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251 | 3cbee15b | j_mayer | cpu_abort(env, "Bus model not supported on mac99 machine\n");
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252 | 3cbee15b | j_mayer | exit(1);
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253 | 0aa6a4a2 | bellard | } |
254 | 3cbee15b | j_mayer | } |
255 | 3cbee15b | j_mayer | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); |
256 | 3cbee15b | j_mayer | pci_bus = pci_pmac_init(pic); |
257 | 3cbee15b | j_mayer | /* init basic PC hardware */
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258 | 3cbee15b | j_mayer | pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, |
259 | 3cbee15b | j_mayer | ram_size, vga_ram_size, |
260 | 3cbee15b | j_mayer | vga_bios_offset, vga_bios_size); |
261 | aae9366a | j_mayer | |
262 | 3cbee15b | j_mayer | /* XXX: suppress that */
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263 | 3cbee15b | j_mayer | dummy_irq = i8259_init(NULL);
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264 | 3cbee15b | j_mayer | |
265 | 3cbee15b | j_mayer | /* XXX: use Mac Serial port */
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266 | b6cd0ea1 | aurel32 | serial_init(0x3f8, dummy_irq[4], 115200, serial_hds[0]); |
267 | 3cbee15b | j_mayer | for(i = 0; i < nb_nics; i++) { |
268 | 3cbee15b | j_mayer | if (!nd_table[i].model)
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269 | 3cbee15b | j_mayer | nd_table[i].model = "ne2k_pci";
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270 | 3cbee15b | j_mayer | pci_nic_init(pci_bus, &nd_table[i], -1);
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271 | 3cbee15b | j_mayer | } |
272 | e4bcb14c | ths | if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
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273 | e4bcb14c | ths | fprintf(stderr, "qemu: too many IDE bus\n");
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274 | e4bcb14c | ths | exit(1);
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275 | e4bcb14c | ths | } |
276 | e4bcb14c | ths | for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) { |
277 | e4bcb14c | ths | index = drive_get_index(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS); |
278 | e4bcb14c | ths | if (index != -1) |
279 | e4bcb14c | ths | hd[i] = drives_table[index].bdrv; |
280 | e4bcb14c | ths | else
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281 | e4bcb14c | ths | hd[i] = NULL;
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282 | e4bcb14c | ths | } |
283 | 0aa6a4a2 | bellard | #if 1 |
284 | e4bcb14c | ths | ide_mem_index[0] = pmac_ide_init(&hd[0], pic[0x13]); |
285 | e4bcb14c | ths | ide_mem_index[1] = pmac_ide_init(&hd[2], pic[0x14]); |
286 | 0aa6a4a2 | bellard | #else
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287 | e4bcb14c | ths | pci_cmd646_ide_init(pci_bus, &hd[0], 0); |
288 | 0aa6a4a2 | bellard | #endif
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289 | 3cbee15b | j_mayer | /* cuda also initialize ADB */
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290 | 3cbee15b | j_mayer | cuda_init(&cuda_mem_index, pic[0x19]);
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291 | aae9366a | j_mayer | |
292 | 3cbee15b | j_mayer | adb_kbd_init(&adb_bus); |
293 | 3cbee15b | j_mayer | adb_mouse_init(&adb_bus); |
294 | 3b46e624 | ths | |
295 | 3cbee15b | j_mayer | dbdma_init(&dbdma_mem_index); |
296 | 3b46e624 | ths | |
297 | 3cbee15b | j_mayer | macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index, |
298 | 74e91155 | j_mayer | cuda_mem_index, NULL, 2, ide_mem_index); |
299 | 0d92ed30 | pbrook | |
300 | 0d92ed30 | pbrook | if (usb_enabled) {
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301 | e24ad6f1 | pbrook | usb_ohci_init_pci(pci_bus, 3, -1); |
302 | 0d92ed30 | pbrook | } |
303 | 0d92ed30 | pbrook | |
304 | b6b8bd18 | bellard | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
305 | b6b8bd18 | bellard | graphic_depth = 15;
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306 | 3cbee15b | j_mayer | #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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307 | 3cbee15b | j_mayer | /* The NewWorld NVRAM is not located in the MacIO device */
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308 | 74e91155 | j_mayer | nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
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309 | 3cbee15b | j_mayer | pmac_format_nvram_partition(nvr, 0x2000);
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310 | 74e91155 | j_mayer | macio_nvram_map(nvr, 0xFFF04000);
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311 | 3cbee15b | j_mayer | nvram.opaque = nvr;
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312 | 3cbee15b | j_mayer | nvram.read_fn = &macio_nvram_read;
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313 | 3cbee15b | j_mayer | nvram.write_fn = &macio_nvram_write;
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314 | 3cbee15b | j_mayer | #else
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315 | 3cbee15b | j_mayer | m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59); |
316 | 3cbee15b | j_mayer | nvram.opaque = m48t59; |
317 | 3cbee15b | j_mayer | nvram.read_fn = &m48t59_read; |
318 | 3cbee15b | j_mayer | nvram.write_fn = &m48t59_write; |
319 | 3cbee15b | j_mayer | #endif
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320 | 6ac0e82d | balrog | PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
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321 | 6ac0e82d | balrog | ppc_boot_device, kernel_base, kernel_size, |
322 | b6b8bd18 | bellard | kernel_cmdline, |
323 | b6b8bd18 | bellard | initrd_base, initrd_size, |
324 | 64201201 | bellard | /* XXX: need an option to load a NVRAM image */
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325 | b6b8bd18 | bellard | 0,
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326 | b6b8bd18 | bellard | graphic_width, graphic_height, graphic_depth); |
327 | b6b8bd18 | bellard | /* No PCI init: the BIOS will do it */
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328 | 0aa6a4a2 | bellard | |
329 | 0aa6a4a2 | bellard | /* Special port to get debug messages from Open-Firmware */
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330 | 0aa6a4a2 | bellard | register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); |
331 | aae9366a | j_mayer | } |
332 | 0aa6a4a2 | bellard | |
333 | 0aa6a4a2 | bellard | QEMUMachine core99_machine = { |
334 | 4b32e168 | aliguori | .name = "mac99",
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335 | 4b32e168 | aliguori | .desc = "Mac99 based PowerMAC",
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336 | 4b32e168 | aliguori | .init = ppc_core99_init, |
337 | 4b32e168 | aliguori | .ram_require = BIOS_SIZE + VGA_RAM_SIZE, |
338 | b2097003 | aliguori | .max_cpus = 1,
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339 | 0aa6a4a2 | bellard | }; |