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1 | 31e31b8a | bellard | /*
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2 | 93ac68bc | bellard | * qemu user main
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3 | 5fafdf24 | ths | *
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4 | 31e31b8a | bellard | * Copyright (c) 2003 Fabrice Bellard
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5 | 31e31b8a | bellard | *
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6 | 31e31b8a | bellard | * This program is free software; you can redistribute it and/or modify
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7 | 31e31b8a | bellard | * it under the terms of the GNU General Public License as published by
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8 | 31e31b8a | bellard | * the Free Software Foundation; either version 2 of the License, or
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9 | 31e31b8a | bellard | * (at your option) any later version.
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10 | 31e31b8a | bellard | *
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11 | 31e31b8a | bellard | * This program is distributed in the hope that it will be useful,
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12 | 31e31b8a | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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13 | 31e31b8a | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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14 | 31e31b8a | bellard | * GNU General Public License for more details.
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15 | 31e31b8a | bellard | *
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16 | 31e31b8a | bellard | * You should have received a copy of the GNU General Public License
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17 | 31e31b8a | bellard | * along with this program; if not, write to the Free Software
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18 | 31e31b8a | bellard | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
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19 | 31e31b8a | bellard | */
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20 | 31e31b8a | bellard | #include <stdlib.h> |
21 | 31e31b8a | bellard | #include <stdio.h> |
22 | 31e31b8a | bellard | #include <stdarg.h> |
23 | 04369ff2 | bellard | #include <string.h> |
24 | 31e31b8a | bellard | #include <errno.h> |
25 | 0ecfa993 | bellard | #include <unistd.h> |
26 | 31e31b8a | bellard | |
27 | 3ef693a0 | bellard | #include "qemu.h" |
28 | 31e31b8a | bellard | |
29 | 3ef693a0 | bellard | #define DEBUG_LOGFILE "/tmp/qemu.log" |
30 | 586314f2 | bellard | |
31 | 83fb7adf | bellard | #ifdef __APPLE__
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32 | 83fb7adf | bellard | #include <crt_externs.h> |
33 | 83fb7adf | bellard | # define environ (*_NSGetEnviron())
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34 | 83fb7adf | bellard | #endif
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35 | 83fb7adf | bellard | |
36 | 74cd30b8 | bellard | static const char *interp_prefix = CONFIG_QEMU_PREFIX; |
37 | c5937220 | pbrook | const char *qemu_uname_release = CONFIG_UNAME_RELEASE; |
38 | 586314f2 | bellard | |
39 | 3a4739d6 | bellard | #if defined(__i386__) && !defined(CONFIG_STATIC)
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40 | f801f97e | bellard | /* Force usage of an ELF interpreter even if it is an ELF shared
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41 | f801f97e | bellard | object ! */
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42 | f801f97e | bellard | const char interp[] __attribute__((section(".interp"))) = "/lib/ld-linux.so.2"; |
43 | 4304763b | bellard | #endif
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44 | 74cd30b8 | bellard | |
45 | 93ac68bc | bellard | /* for recent libc, we add these dummy symbols which are not declared
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46 | 74cd30b8 | bellard | when generating a linked object (bug in ld ?) */
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47 | fbf59244 | bellard | #if (__GLIBC__ > 2 || (__GLIBC__ == 2 && __GLIBC_MINOR__ >= 3)) && !defined(CONFIG_STATIC) |
48 | c6981055 | bellard | long __preinit_array_start[0]; |
49 | c6981055 | bellard | long __preinit_array_end[0]; |
50 | 74cd30b8 | bellard | long __init_array_start[0]; |
51 | 74cd30b8 | bellard | long __init_array_end[0]; |
52 | 74cd30b8 | bellard | long __fini_array_start[0]; |
53 | 74cd30b8 | bellard | long __fini_array_end[0]; |
54 | 74cd30b8 | bellard | #endif
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55 | 74cd30b8 | bellard | |
56 | 9de5e440 | bellard | /* XXX: on x86 MAP_GROWSDOWN only works if ESP <= address + 32, so
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57 | 9de5e440 | bellard | we allocate a bigger stack. Need a better solution, for example
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58 | 9de5e440 | bellard | by remapping the process stack directly at the right place */
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59 | 9de5e440 | bellard | unsigned long x86_stack_size = 512 * 1024; |
60 | 31e31b8a | bellard | |
61 | 31e31b8a | bellard | void gemu_log(const char *fmt, ...) |
62 | 31e31b8a | bellard | { |
63 | 31e31b8a | bellard | va_list ap; |
64 | 31e31b8a | bellard | |
65 | 31e31b8a | bellard | va_start(ap, fmt); |
66 | 31e31b8a | bellard | vfprintf(stderr, fmt, ap); |
67 | 31e31b8a | bellard | va_end(ap); |
68 | 31e31b8a | bellard | } |
69 | 31e31b8a | bellard | |
70 | 61190b14 | bellard | void cpu_outb(CPUState *env, int addr, int val) |
71 | 367e86e8 | bellard | { |
72 | 367e86e8 | bellard | fprintf(stderr, "outb: port=0x%04x, data=%02x\n", addr, val);
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73 | 367e86e8 | bellard | } |
74 | 367e86e8 | bellard | |
75 | 61190b14 | bellard | void cpu_outw(CPUState *env, int addr, int val) |
76 | 367e86e8 | bellard | { |
77 | 367e86e8 | bellard | fprintf(stderr, "outw: port=0x%04x, data=%04x\n", addr, val);
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78 | 367e86e8 | bellard | } |
79 | 367e86e8 | bellard | |
80 | 61190b14 | bellard | void cpu_outl(CPUState *env, int addr, int val) |
81 | 367e86e8 | bellard | { |
82 | 367e86e8 | bellard | fprintf(stderr, "outl: port=0x%04x, data=%08x\n", addr, val);
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83 | 367e86e8 | bellard | } |
84 | 367e86e8 | bellard | |
85 | 61190b14 | bellard | int cpu_inb(CPUState *env, int addr) |
86 | 367e86e8 | bellard | { |
87 | 367e86e8 | bellard | fprintf(stderr, "inb: port=0x%04x\n", addr);
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88 | 367e86e8 | bellard | return 0; |
89 | 367e86e8 | bellard | } |
90 | 367e86e8 | bellard | |
91 | 61190b14 | bellard | int cpu_inw(CPUState *env, int addr) |
92 | 367e86e8 | bellard | { |
93 | 367e86e8 | bellard | fprintf(stderr, "inw: port=0x%04x\n", addr);
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94 | 367e86e8 | bellard | return 0; |
95 | 367e86e8 | bellard | } |
96 | 367e86e8 | bellard | |
97 | 61190b14 | bellard | int cpu_inl(CPUState *env, int addr) |
98 | 367e86e8 | bellard | { |
99 | 367e86e8 | bellard | fprintf(stderr, "inl: port=0x%04x\n", addr);
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100 | 367e86e8 | bellard | return 0; |
101 | 367e86e8 | bellard | } |
102 | 367e86e8 | bellard | |
103 | a541f297 | bellard | int cpu_get_pic_interrupt(CPUState *env)
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104 | 92ccca6a | bellard | { |
105 | 92ccca6a | bellard | return -1; |
106 | 92ccca6a | bellard | } |
107 | 92ccca6a | bellard | |
108 | 28ab0e2e | bellard | /* timers for rdtsc */
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109 | 28ab0e2e | bellard | |
110 | 1dce7c3c | bellard | #if 0
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111 | 28ab0e2e | bellard | |
112 | 28ab0e2e | bellard | static uint64_t emu_time;
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113 | 28ab0e2e | bellard | |
114 | 28ab0e2e | bellard | int64_t cpu_get_real_ticks(void)
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115 | 28ab0e2e | bellard | {
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116 | 28ab0e2e | bellard | return emu_time++;
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117 | 28ab0e2e | bellard | }
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118 | 28ab0e2e | bellard | |
119 | 28ab0e2e | bellard | #endif
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120 | 28ab0e2e | bellard | |
121 | a541f297 | bellard | #ifdef TARGET_I386
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122 | a541f297 | bellard | /***********************************************************/
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123 | a541f297 | bellard | /* CPUX86 core interface */
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124 | a541f297 | bellard | |
125 | 02a1602e | bellard | void cpu_smm_update(CPUState *env)
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126 | 02a1602e | bellard | { |
127 | 02a1602e | bellard | } |
128 | 02a1602e | bellard | |
129 | 28ab0e2e | bellard | uint64_t cpu_get_tsc(CPUX86State *env) |
130 | 28ab0e2e | bellard | { |
131 | 28ab0e2e | bellard | return cpu_get_real_ticks();
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132 | 28ab0e2e | bellard | } |
133 | 28ab0e2e | bellard | |
134 | 5fafdf24 | ths | static void write_dt(void *ptr, unsigned long addr, unsigned long limit, |
135 | f4beb510 | bellard | int flags)
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136 | 6dbad63e | bellard | { |
137 | f4beb510 | bellard | unsigned int e1, e2; |
138 | 53a5960a | pbrook | uint32_t *p; |
139 | 6dbad63e | bellard | e1 = (addr << 16) | (limit & 0xffff); |
140 | 6dbad63e | bellard | e2 = ((addr >> 16) & 0xff) | (addr & 0xff000000) | (limit & 0x000f0000); |
141 | f4beb510 | bellard | e2 |= flags; |
142 | 53a5960a | pbrook | p = ptr; |
143 | 53a5960a | pbrook | p[0] = tswapl(e1);
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144 | 53a5960a | pbrook | p[1] = tswapl(e2);
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145 | f4beb510 | bellard | } |
146 | f4beb510 | bellard | |
147 | 5fafdf24 | ths | static void set_gate(void *ptr, unsigned int type, unsigned int dpl, |
148 | f4beb510 | bellard | unsigned long addr, unsigned int sel) |
149 | f4beb510 | bellard | { |
150 | f4beb510 | bellard | unsigned int e1, e2; |
151 | 53a5960a | pbrook | uint32_t *p; |
152 | f4beb510 | bellard | e1 = (addr & 0xffff) | (sel << 16); |
153 | f4beb510 | bellard | e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8); |
154 | 53a5960a | pbrook | p = ptr; |
155 | 53a5960a | pbrook | p[0] = tswapl(e1);
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156 | 53a5960a | pbrook | p[1] = tswapl(e2);
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157 | 6dbad63e | bellard | } |
158 | 6dbad63e | bellard | |
159 | 6dbad63e | bellard | uint64_t gdt_table[6];
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160 | f4beb510 | bellard | uint64_t idt_table[256];
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161 | f4beb510 | bellard | |
162 | f4beb510 | bellard | /* only dpl matters as we do only user space emulation */
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163 | f4beb510 | bellard | static void set_idt(int n, unsigned int dpl) |
164 | f4beb510 | bellard | { |
165 | f4beb510 | bellard | set_gate(idt_table + n, 0, dpl, 0, 0); |
166 | f4beb510 | bellard | } |
167 | 31e31b8a | bellard | |
168 | 89e957e7 | bellard | void cpu_loop(CPUX86State *env)
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169 | 1b6b029e | bellard | { |
170 | bc8a22cc | bellard | int trapnr;
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171 | 992f48a0 | blueswir1 | abi_ulong pc; |
172 | 9de5e440 | bellard | target_siginfo_t info; |
173 | 851e67a1 | bellard | |
174 | 1b6b029e | bellard | for(;;) {
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175 | bc8a22cc | bellard | trapnr = cpu_x86_exec(env); |
176 | bc8a22cc | bellard | switch(trapnr) {
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177 | f4beb510 | bellard | case 0x80: |
178 | f4beb510 | bellard | /* linux syscall */
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179 | 5fafdf24 | ths | env->regs[R_EAX] = do_syscall(env, |
180 | 5fafdf24 | ths | env->regs[R_EAX], |
181 | f4beb510 | bellard | env->regs[R_EBX], |
182 | f4beb510 | bellard | env->regs[R_ECX], |
183 | f4beb510 | bellard | env->regs[R_EDX], |
184 | f4beb510 | bellard | env->regs[R_ESI], |
185 | f4beb510 | bellard | env->regs[R_EDI], |
186 | f4beb510 | bellard | env->regs[R_EBP]); |
187 | f4beb510 | bellard | break;
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188 | f4beb510 | bellard | case EXCP0B_NOSEG:
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189 | f4beb510 | bellard | case EXCP0C_STACK:
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190 | f4beb510 | bellard | info.si_signo = SIGBUS; |
191 | f4beb510 | bellard | info.si_errno = 0;
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192 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
193 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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194 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
195 | f4beb510 | bellard | break;
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196 | 1b6b029e | bellard | case EXCP0D_GPF:
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197 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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198 | 851e67a1 | bellard | if (env->eflags & VM_MASK) {
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199 | 89e957e7 | bellard | handle_vm86_fault(env); |
200 | 84409ddb | j_mayer | } else
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201 | 84409ddb | j_mayer | #endif
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202 | 84409ddb | j_mayer | { |
203 | f4beb510 | bellard | info.si_signo = SIGSEGV; |
204 | f4beb510 | bellard | info.si_errno = 0;
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205 | f4beb510 | bellard | info.si_code = TARGET_SI_KERNEL; |
206 | f4beb510 | bellard | info._sifields._sigfault._addr = 0;
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207 | f4beb510 | bellard | queue_signal(info.si_signo, &info); |
208 | 1b6b029e | bellard | } |
209 | 1b6b029e | bellard | break;
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210 | b689bc57 | bellard | case EXCP0E_PAGE:
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211 | b689bc57 | bellard | info.si_signo = SIGSEGV; |
212 | b689bc57 | bellard | info.si_errno = 0;
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213 | b689bc57 | bellard | if (!(env->error_code & 1)) |
214 | b689bc57 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
215 | b689bc57 | bellard | else
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216 | b689bc57 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
217 | 970a87a6 | bellard | info._sifields._sigfault._addr = env->cr[2];
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218 | b689bc57 | bellard | queue_signal(info.si_signo, &info); |
219 | b689bc57 | bellard | break;
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220 | 9de5e440 | bellard | case EXCP00_DIVZ:
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221 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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222 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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223 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
224 | 84409ddb | j_mayer | } else
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225 | 84409ddb | j_mayer | #endif
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226 | 84409ddb | j_mayer | { |
227 | bc8a22cc | bellard | /* division by zero */
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228 | bc8a22cc | bellard | info.si_signo = SIGFPE; |
229 | bc8a22cc | bellard | info.si_errno = 0;
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230 | bc8a22cc | bellard | info.si_code = TARGET_FPE_INTDIV; |
231 | bc8a22cc | bellard | info._sifields._sigfault._addr = env->eip; |
232 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
233 | bc8a22cc | bellard | } |
234 | 9de5e440 | bellard | break;
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235 | 447db213 | bellard | case EXCP01_SSTP:
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236 | 447db213 | bellard | case EXCP03_INT3:
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237 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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238 | 447db213 | bellard | if (env->eflags & VM_MASK) {
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239 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
240 | 84409ddb | j_mayer | } else
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241 | 84409ddb | j_mayer | #endif
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242 | 84409ddb | j_mayer | { |
243 | 447db213 | bellard | info.si_signo = SIGTRAP; |
244 | 447db213 | bellard | info.si_errno = 0;
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245 | 447db213 | bellard | if (trapnr == EXCP01_SSTP) {
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246 | 447db213 | bellard | info.si_code = TARGET_TRAP_BRKPT; |
247 | 447db213 | bellard | info._sifields._sigfault._addr = env->eip; |
248 | 447db213 | bellard | } else {
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249 | 447db213 | bellard | info.si_code = TARGET_SI_KERNEL; |
250 | 447db213 | bellard | info._sifields._sigfault._addr = 0;
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251 | 447db213 | bellard | } |
252 | 447db213 | bellard | queue_signal(info.si_signo, &info); |
253 | 447db213 | bellard | } |
254 | 447db213 | bellard | break;
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255 | 9de5e440 | bellard | case EXCP04_INTO:
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256 | 9de5e440 | bellard | case EXCP05_BOUND:
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257 | 84409ddb | j_mayer | #ifndef TARGET_X86_64
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258 | bc8a22cc | bellard | if (env->eflags & VM_MASK) {
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259 | 447db213 | bellard | handle_vm86_trap(env, trapnr); |
260 | 84409ddb | j_mayer | } else
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261 | 84409ddb | j_mayer | #endif
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262 | 84409ddb | j_mayer | { |
263 | bc8a22cc | bellard | info.si_signo = SIGSEGV; |
264 | bc8a22cc | bellard | info.si_errno = 0;
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265 | b689bc57 | bellard | info.si_code = TARGET_SI_KERNEL; |
266 | bc8a22cc | bellard | info._sifields._sigfault._addr = 0;
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267 | bc8a22cc | bellard | queue_signal(info.si_signo, &info); |
268 | bc8a22cc | bellard | } |
269 | 9de5e440 | bellard | break;
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270 | 9de5e440 | bellard | case EXCP06_ILLOP:
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271 | 9de5e440 | bellard | info.si_signo = SIGILL; |
272 | 9de5e440 | bellard | info.si_errno = 0;
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273 | 9de5e440 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
274 | 9de5e440 | bellard | info._sifields._sigfault._addr = env->eip; |
275 | 9de5e440 | bellard | queue_signal(info.si_signo, &info); |
276 | 9de5e440 | bellard | break;
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277 | 9de5e440 | bellard | case EXCP_INTERRUPT:
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278 | 9de5e440 | bellard | /* just indicate that signals should be handled asap */
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279 | 9de5e440 | bellard | break;
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280 | 1fddef4b | bellard | case EXCP_DEBUG:
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281 | 1fddef4b | bellard | { |
282 | 1fddef4b | bellard | int sig;
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283 | 1fddef4b | bellard | |
284 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
285 | 1fddef4b | bellard | if (sig)
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286 | 1fddef4b | bellard | { |
287 | 1fddef4b | bellard | info.si_signo = sig; |
288 | 1fddef4b | bellard | info.si_errno = 0;
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289 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
290 | 1fddef4b | bellard | queue_signal(info.si_signo, &info); |
291 | 1fddef4b | bellard | } |
292 | 1fddef4b | bellard | } |
293 | 1fddef4b | bellard | break;
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294 | 1b6b029e | bellard | default:
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295 | 970a87a6 | bellard | pc = env->segs[R_CS].base + env->eip; |
296 | 5fafdf24 | ths | fprintf(stderr, "qemu: 0x%08lx: unhandled CPU exception 0x%x - aborting\n",
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297 | bc8a22cc | bellard | (long)pc, trapnr);
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298 | 1b6b029e | bellard | abort(); |
299 | 1b6b029e | bellard | } |
300 | 66fb9763 | bellard | process_pending_signals(env); |
301 | 1b6b029e | bellard | } |
302 | 1b6b029e | bellard | } |
303 | b346ff46 | bellard | #endif
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304 | b346ff46 | bellard | |
305 | b346ff46 | bellard | #ifdef TARGET_ARM
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306 | b346ff46 | bellard | |
307 | 6f1f31c0 | bellard | /* XXX: find a better solution */
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308 | 992f48a0 | blueswir1 | extern void tb_invalidate_page_range(abi_ulong start, abi_ulong end); |
309 | 6f1f31c0 | bellard | |
310 | 992f48a0 | blueswir1 | static void arm_cache_flush(abi_ulong start, abi_ulong last) |
311 | 6f1f31c0 | bellard | { |
312 | 992f48a0 | blueswir1 | abi_ulong addr, last1; |
313 | 6f1f31c0 | bellard | |
314 | 6f1f31c0 | bellard | if (last < start)
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315 | 6f1f31c0 | bellard | return;
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316 | 6f1f31c0 | bellard | addr = start; |
317 | 6f1f31c0 | bellard | for(;;) {
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318 | 6f1f31c0 | bellard | last1 = ((addr + TARGET_PAGE_SIZE) & TARGET_PAGE_MASK) - 1;
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319 | 6f1f31c0 | bellard | if (last1 > last)
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320 | 6f1f31c0 | bellard | last1 = last; |
321 | 6f1f31c0 | bellard | tb_invalidate_page_range(addr, last1 + 1);
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322 | 6f1f31c0 | bellard | if (last1 == last)
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323 | 6f1f31c0 | bellard | break;
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324 | 6f1f31c0 | bellard | addr = last1 + 1;
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325 | 6f1f31c0 | bellard | } |
326 | 6f1f31c0 | bellard | } |
327 | 6f1f31c0 | bellard | |
328 | b346ff46 | bellard | void cpu_loop(CPUARMState *env)
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329 | b346ff46 | bellard | { |
330 | b346ff46 | bellard | int trapnr;
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331 | b346ff46 | bellard | unsigned int n, insn; |
332 | b346ff46 | bellard | target_siginfo_t info; |
333 | b5ff1b31 | bellard | uint32_t addr; |
334 | 3b46e624 | ths | |
335 | b346ff46 | bellard | for(;;) {
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336 | b346ff46 | bellard | trapnr = cpu_arm_exec(env); |
337 | b346ff46 | bellard | switch(trapnr) {
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338 | b346ff46 | bellard | case EXCP_UDEF:
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339 | c6981055 | bellard | { |
340 | c6981055 | bellard | TaskState *ts = env->opaque; |
341 | c6981055 | bellard | uint32_t opcode; |
342 | c6981055 | bellard | |
343 | c6981055 | bellard | /* we handle the FPU emulation here, as Linux */
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344 | c6981055 | bellard | /* we get the opcode */
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345 | 53a5960a | pbrook | opcode = tget32(env->regs[15]);
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346 | 3b46e624 | ths | |
347 | 19b045de | pbrook | if (EmulateAll(opcode, &ts->fpa, env) == 0) { |
348 | c6981055 | bellard | info.si_signo = SIGILL; |
349 | c6981055 | bellard | info.si_errno = 0;
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350 | c6981055 | bellard | info.si_code = TARGET_ILL_ILLOPN; |
351 | c6981055 | bellard | info._sifields._sigfault._addr = env->regs[15];
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352 | c6981055 | bellard | queue_signal(info.si_signo, &info); |
353 | c6981055 | bellard | } else {
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354 | c6981055 | bellard | /* increment PC */
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355 | c6981055 | bellard | env->regs[15] += 4; |
356 | c6981055 | bellard | } |
357 | c6981055 | bellard | } |
358 | b346ff46 | bellard | break;
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359 | b346ff46 | bellard | case EXCP_SWI:
|
360 | 06c949e6 | pbrook | case EXCP_BKPT:
|
361 | b346ff46 | bellard | { |
362 | ce4defa0 | pbrook | env->eabi = 1;
|
363 | b346ff46 | bellard | /* system call */
|
364 | 06c949e6 | pbrook | if (trapnr == EXCP_BKPT) {
|
365 | 06c949e6 | pbrook | if (env->thumb) {
|
366 | 53a5960a | pbrook | insn = tget16(env->regs[15]);
|
367 | 06c949e6 | pbrook | n = insn & 0xff;
|
368 | 06c949e6 | pbrook | env->regs[15] += 2; |
369 | 06c949e6 | pbrook | } else {
|
370 | 53a5960a | pbrook | insn = tget32(env->regs[15]);
|
371 | 06c949e6 | pbrook | n = (insn & 0xf) | ((insn >> 4) & 0xff0); |
372 | 06c949e6 | pbrook | env->regs[15] += 4; |
373 | 06c949e6 | pbrook | } |
374 | 192c7bd9 | bellard | } else {
|
375 | 06c949e6 | pbrook | if (env->thumb) {
|
376 | 53a5960a | pbrook | insn = tget16(env->regs[15] - 2); |
377 | 06c949e6 | pbrook | n = insn & 0xff;
|
378 | 06c949e6 | pbrook | } else {
|
379 | 53a5960a | pbrook | insn = tget32(env->regs[15] - 4); |
380 | 06c949e6 | pbrook | n = insn & 0xffffff;
|
381 | 06c949e6 | pbrook | } |
382 | 192c7bd9 | bellard | } |
383 | 192c7bd9 | bellard | |
384 | 6f1f31c0 | bellard | if (n == ARM_NR_cacheflush) {
|
385 | 6f1f31c0 | bellard | arm_cache_flush(env->regs[0], env->regs[1]); |
386 | a4f81979 | bellard | } else if (n == ARM_NR_semihosting |
387 | a4f81979 | bellard | || n == ARM_NR_thumb_semihosting) { |
388 | a4f81979 | bellard | env->regs[0] = do_arm_semihosting (env);
|
389 | ce4defa0 | pbrook | } else if (n == 0 || n >= ARM_SYSCALL_BASE |
390 | 192c7bd9 | bellard | || (env->thumb && n == ARM_THUMB_SYSCALL)) { |
391 | b346ff46 | bellard | /* linux syscall */
|
392 | ce4defa0 | pbrook | if (env->thumb || n == 0) { |
393 | 192c7bd9 | bellard | n = env->regs[7];
|
394 | 192c7bd9 | bellard | } else {
|
395 | 192c7bd9 | bellard | n -= ARM_SYSCALL_BASE; |
396 | ce4defa0 | pbrook | env->eabi = 0;
|
397 | 192c7bd9 | bellard | } |
398 | 5fafdf24 | ths | env->regs[0] = do_syscall(env,
|
399 | 5fafdf24 | ths | n, |
400 | b346ff46 | bellard | env->regs[0],
|
401 | b346ff46 | bellard | env->regs[1],
|
402 | b346ff46 | bellard | env->regs[2],
|
403 | b346ff46 | bellard | env->regs[3],
|
404 | b346ff46 | bellard | env->regs[4],
|
405 | e1a2849c | bellard | env->regs[5]);
|
406 | b346ff46 | bellard | } else {
|
407 | b346ff46 | bellard | goto error;
|
408 | b346ff46 | bellard | } |
409 | b346ff46 | bellard | } |
410 | b346ff46 | bellard | break;
|
411 | 43fff238 | bellard | case EXCP_INTERRUPT:
|
412 | 43fff238 | bellard | /* just indicate that signals should be handled asap */
|
413 | 43fff238 | bellard | break;
|
414 | 68016c62 | bellard | case EXCP_PREFETCH_ABORT:
|
415 | b5ff1b31 | bellard | addr = env->cp15.c6_data; |
416 | b5ff1b31 | bellard | goto do_segv;
|
417 | 68016c62 | bellard | case EXCP_DATA_ABORT:
|
418 | b5ff1b31 | bellard | addr = env->cp15.c6_insn; |
419 | b5ff1b31 | bellard | goto do_segv;
|
420 | b5ff1b31 | bellard | do_segv:
|
421 | 68016c62 | bellard | { |
422 | 68016c62 | bellard | info.si_signo = SIGSEGV; |
423 | 68016c62 | bellard | info.si_errno = 0;
|
424 | 68016c62 | bellard | /* XXX: check env->error_code */
|
425 | 68016c62 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
426 | b5ff1b31 | bellard | info._sifields._sigfault._addr = addr; |
427 | 68016c62 | bellard | queue_signal(info.si_signo, &info); |
428 | 68016c62 | bellard | } |
429 | 68016c62 | bellard | break;
|
430 | 1fddef4b | bellard | case EXCP_DEBUG:
|
431 | 1fddef4b | bellard | { |
432 | 1fddef4b | bellard | int sig;
|
433 | 1fddef4b | bellard | |
434 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
435 | 1fddef4b | bellard | if (sig)
|
436 | 1fddef4b | bellard | { |
437 | 1fddef4b | bellard | info.si_signo = sig; |
438 | 1fddef4b | bellard | info.si_errno = 0;
|
439 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
440 | 1fddef4b | bellard | queue_signal(info.si_signo, &info); |
441 | 1fddef4b | bellard | } |
442 | 1fddef4b | bellard | } |
443 | 1fddef4b | bellard | break;
|
444 | b346ff46 | bellard | default:
|
445 | b346ff46 | bellard | error:
|
446 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
447 | b346ff46 | bellard | trapnr); |
448 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
449 | b346ff46 | bellard | abort(); |
450 | b346ff46 | bellard | } |
451 | b346ff46 | bellard | process_pending_signals(env); |
452 | b346ff46 | bellard | } |
453 | b346ff46 | bellard | } |
454 | b346ff46 | bellard | |
455 | b346ff46 | bellard | #endif
|
456 | 1b6b029e | bellard | |
457 | 93ac68bc | bellard | #ifdef TARGET_SPARC
|
458 | 93ac68bc | bellard | |
459 | 060366c5 | bellard | //#define DEBUG_WIN
|
460 | 060366c5 | bellard | |
461 | 2623cbaf | bellard | /* WARNING: dealing with register windows _is_ complicated. More info
|
462 | 2623cbaf | bellard | can be found at http://www.sics.se/~psm/sparcstack.html */
|
463 | 060366c5 | bellard | static inline int get_reg_index(CPUSPARCState *env, int cwp, int index) |
464 | 060366c5 | bellard | { |
465 | 060366c5 | bellard | index = (index + cwp * 16) & (16 * NWINDOWS - 1); |
466 | 060366c5 | bellard | /* wrap handling : if cwp is on the last window, then we use the
|
467 | 060366c5 | bellard | registers 'after' the end */
|
468 | 060366c5 | bellard | if (index < 8 && env->cwp == (NWINDOWS - 1)) |
469 | 060366c5 | bellard | index += (16 * NWINDOWS);
|
470 | 060366c5 | bellard | return index;
|
471 | 060366c5 | bellard | } |
472 | 060366c5 | bellard | |
473 | 2623cbaf | bellard | /* save the register window 'cwp1' */
|
474 | 2623cbaf | bellard | static inline void save_window_offset(CPUSPARCState *env, int cwp1) |
475 | 060366c5 | bellard | { |
476 | 2623cbaf | bellard | unsigned int i; |
477 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
478 | 3b46e624 | ths | |
479 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
480 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
481 | 5fafdf24 | ths | printf("win_overflow: sp_ptr=0x%x save_cwp=%d\n",
|
482 | 060366c5 | bellard | (int)sp_ptr, cwp1);
|
483 | 060366c5 | bellard | #endif
|
484 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
485 | 53a5960a | pbrook | tputl(sp_ptr, env->regbase[get_reg_index(env, cwp1, 8 + i)]);
|
486 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
487 | 2623cbaf | bellard | } |
488 | 060366c5 | bellard | } |
489 | 060366c5 | bellard | |
490 | 060366c5 | bellard | static void save_window(CPUSPARCState *env) |
491 | 060366c5 | bellard | { |
492 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
493 | 2623cbaf | bellard | unsigned int new_wim; |
494 | 2623cbaf | bellard | new_wim = ((env->wim >> 1) | (env->wim << (NWINDOWS - 1))) & |
495 | 2623cbaf | bellard | ((1LL << NWINDOWS) - 1); |
496 | 2623cbaf | bellard | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
497 | 2623cbaf | bellard | env->wim = new_wim; |
498 | 5ef54116 | bellard | #else
|
499 | 5ef54116 | bellard | save_window_offset(env, (env->cwp - 2) & (NWINDOWS - 1)); |
500 | 5ef54116 | bellard | env->cansave++; |
501 | 5ef54116 | bellard | env->canrestore--; |
502 | 5ef54116 | bellard | #endif
|
503 | 060366c5 | bellard | } |
504 | 060366c5 | bellard | |
505 | 060366c5 | bellard | static void restore_window(CPUSPARCState *env) |
506 | 060366c5 | bellard | { |
507 | 060366c5 | bellard | unsigned int new_wim, i, cwp1; |
508 | 992f48a0 | blueswir1 | abi_ulong sp_ptr; |
509 | 3b46e624 | ths | |
510 | 060366c5 | bellard | new_wim = ((env->wim << 1) | (env->wim >> (NWINDOWS - 1))) & |
511 | 060366c5 | bellard | ((1LL << NWINDOWS) - 1); |
512 | 3b46e624 | ths | |
513 | 060366c5 | bellard | /* restore the invalid window */
|
514 | 060366c5 | bellard | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
515 | 53a5960a | pbrook | sp_ptr = env->regbase[get_reg_index(env, cwp1, 6)];
|
516 | 060366c5 | bellard | #if defined(DEBUG_WIN)
|
517 | 5fafdf24 | ths | printf("win_underflow: sp_ptr=0x%x load_cwp=%d\n",
|
518 | 060366c5 | bellard | (int)sp_ptr, cwp1);
|
519 | 060366c5 | bellard | #endif
|
520 | 2623cbaf | bellard | for(i = 0; i < 16; i++) { |
521 | 53a5960a | pbrook | env->regbase[get_reg_index(env, cwp1, 8 + i)] = tgetl(sp_ptr);
|
522 | 992f48a0 | blueswir1 | sp_ptr += sizeof(abi_ulong);
|
523 | 2623cbaf | bellard | } |
524 | 060366c5 | bellard | env->wim = new_wim; |
525 | 5ef54116 | bellard | #ifdef TARGET_SPARC64
|
526 | 5ef54116 | bellard | env->canrestore++; |
527 | 5ef54116 | bellard | if (env->cleanwin < NWINDOWS - 1) |
528 | 5ef54116 | bellard | env->cleanwin++; |
529 | 5ef54116 | bellard | env->cansave--; |
530 | 5ef54116 | bellard | #endif
|
531 | 060366c5 | bellard | } |
532 | 060366c5 | bellard | |
533 | 060366c5 | bellard | static void flush_windows(CPUSPARCState *env) |
534 | 060366c5 | bellard | { |
535 | 060366c5 | bellard | int offset, cwp1;
|
536 | 2623cbaf | bellard | |
537 | 2623cbaf | bellard | offset = 1;
|
538 | 060366c5 | bellard | for(;;) {
|
539 | 060366c5 | bellard | /* if restore would invoke restore_window(), then we can stop */
|
540 | 2623cbaf | bellard | cwp1 = (env->cwp + offset) & (NWINDOWS - 1);
|
541 | 060366c5 | bellard | if (env->wim & (1 << cwp1)) |
542 | 060366c5 | bellard | break;
|
543 | 2623cbaf | bellard | save_window_offset(env, cwp1); |
544 | 060366c5 | bellard | offset++; |
545 | 060366c5 | bellard | } |
546 | 2623cbaf | bellard | /* set wim so that restore will reload the registers */
|
547 | 2623cbaf | bellard | cwp1 = (env->cwp + 1) & (NWINDOWS - 1); |
548 | 2623cbaf | bellard | env->wim = 1 << cwp1;
|
549 | 2623cbaf | bellard | #if defined(DEBUG_WIN)
|
550 | 2623cbaf | bellard | printf("flush_windows: nb=%d\n", offset - 1); |
551 | 80a9d035 | bellard | #endif
|
552 | 2623cbaf | bellard | } |
553 | 060366c5 | bellard | |
554 | 93ac68bc | bellard | void cpu_loop (CPUSPARCState *env)
|
555 | 93ac68bc | bellard | { |
556 | 060366c5 | bellard | int trapnr, ret;
|
557 | 61ff6f58 | bellard | target_siginfo_t info; |
558 | 3b46e624 | ths | |
559 | 060366c5 | bellard | while (1) { |
560 | 060366c5 | bellard | trapnr = cpu_sparc_exec (env); |
561 | 3b46e624 | ths | |
562 | 060366c5 | bellard | switch (trapnr) {
|
563 | 5ef54116 | bellard | #ifndef TARGET_SPARC64
|
564 | 5fafdf24 | ths | case 0x88: |
565 | 060366c5 | bellard | case 0x90: |
566 | 5ef54116 | bellard | #else
|
567 | cb33da57 | blueswir1 | case 0x110: |
568 | 5ef54116 | bellard | case 0x16d: |
569 | 5ef54116 | bellard | #endif
|
570 | 060366c5 | bellard | ret = do_syscall (env, env->gregs[1],
|
571 | 5fafdf24 | ths | env->regwptr[0], env->regwptr[1], |
572 | 5fafdf24 | ths | env->regwptr[2], env->regwptr[3], |
573 | 060366c5 | bellard | env->regwptr[4], env->regwptr[5]); |
574 | 060366c5 | bellard | if ((unsigned int)ret >= (unsigned int)(-515)) { |
575 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
576 | 27908725 | bellard | env->xcc |= PSR_CARRY; |
577 | 27908725 | bellard | #else
|
578 | 060366c5 | bellard | env->psr |= PSR_CARRY; |
579 | 27908725 | bellard | #endif
|
580 | 060366c5 | bellard | ret = -ret; |
581 | 060366c5 | bellard | } else {
|
582 | 992f48a0 | blueswir1 | #if defined(TARGET_SPARC64) && !defined(TARGET_ABI32)
|
583 | 27908725 | bellard | env->xcc &= ~PSR_CARRY; |
584 | 27908725 | bellard | #else
|
585 | 060366c5 | bellard | env->psr &= ~PSR_CARRY; |
586 | 27908725 | bellard | #endif
|
587 | 060366c5 | bellard | } |
588 | 060366c5 | bellard | env->regwptr[0] = ret;
|
589 | 060366c5 | bellard | /* next instruction */
|
590 | 060366c5 | bellard | env->pc = env->npc; |
591 | 060366c5 | bellard | env->npc = env->npc + 4;
|
592 | 060366c5 | bellard | break;
|
593 | 060366c5 | bellard | case 0x83: /* flush windows */ |
594 | 992f48a0 | blueswir1 | #ifdef TARGET_ABI32
|
595 | 992f48a0 | blueswir1 | case 0x103: |
596 | 992f48a0 | blueswir1 | #endif
|
597 | 2623cbaf | bellard | flush_windows(env); |
598 | 060366c5 | bellard | /* next instruction */
|
599 | 060366c5 | bellard | env->pc = env->npc; |
600 | 060366c5 | bellard | env->npc = env->npc + 4;
|
601 | 060366c5 | bellard | break;
|
602 | 3475187d | bellard | #ifndef TARGET_SPARC64
|
603 | 060366c5 | bellard | case TT_WIN_OVF: /* window overflow */ |
604 | 060366c5 | bellard | save_window(env); |
605 | 060366c5 | bellard | break;
|
606 | 060366c5 | bellard | case TT_WIN_UNF: /* window underflow */ |
607 | 060366c5 | bellard | restore_window(env); |
608 | 060366c5 | bellard | break;
|
609 | 61ff6f58 | bellard | case TT_TFAULT:
|
610 | 61ff6f58 | bellard | case TT_DFAULT:
|
611 | 61ff6f58 | bellard | { |
612 | 61ff6f58 | bellard | info.si_signo = SIGSEGV; |
613 | 61ff6f58 | bellard | info.si_errno = 0;
|
614 | 61ff6f58 | bellard | /* XXX: check env->error_code */
|
615 | 61ff6f58 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
616 | 61ff6f58 | bellard | info._sifields._sigfault._addr = env->mmuregs[4];
|
617 | 61ff6f58 | bellard | queue_signal(info.si_signo, &info); |
618 | 61ff6f58 | bellard | } |
619 | 61ff6f58 | bellard | break;
|
620 | 3475187d | bellard | #else
|
621 | 5ef54116 | bellard | case TT_SPILL: /* window overflow */ |
622 | 5ef54116 | bellard | save_window(env); |
623 | 5ef54116 | bellard | break;
|
624 | 5ef54116 | bellard | case TT_FILL: /* window underflow */ |
625 | 5ef54116 | bellard | restore_window(env); |
626 | 5ef54116 | bellard | break;
|
627 | 7f84a729 | blueswir1 | case TT_TFAULT:
|
628 | 7f84a729 | blueswir1 | case TT_DFAULT:
|
629 | 7f84a729 | blueswir1 | { |
630 | 7f84a729 | blueswir1 | info.si_signo = SIGSEGV; |
631 | 7f84a729 | blueswir1 | info.si_errno = 0;
|
632 | 7f84a729 | blueswir1 | /* XXX: check env->error_code */
|
633 | 7f84a729 | blueswir1 | info.si_code = TARGET_SEGV_MAPERR; |
634 | 7f84a729 | blueswir1 | if (trapnr == TT_DFAULT)
|
635 | 7f84a729 | blueswir1 | info._sifields._sigfault._addr = env->dmmuregs[4];
|
636 | 7f84a729 | blueswir1 | else
|
637 | 7f84a729 | blueswir1 | info._sifields._sigfault._addr = env->tpc[env->tl]; |
638 | 7f84a729 | blueswir1 | queue_signal(info.si_signo, &info); |
639 | 7f84a729 | blueswir1 | } |
640 | 7f84a729 | blueswir1 | break;
|
641 | 5bfb56b2 | blueswir1 | case 0x16e: |
642 | 5bfb56b2 | blueswir1 | flush_windows(env); |
643 | 5bfb56b2 | blueswir1 | sparc64_get_context(env); |
644 | 5bfb56b2 | blueswir1 | break;
|
645 | 5bfb56b2 | blueswir1 | case 0x16f: |
646 | 5bfb56b2 | blueswir1 | flush_windows(env); |
647 | 5bfb56b2 | blueswir1 | sparc64_set_context(env); |
648 | 5bfb56b2 | blueswir1 | break;
|
649 | 3475187d | bellard | #endif
|
650 | 48dc41eb | bellard | case EXCP_INTERRUPT:
|
651 | 48dc41eb | bellard | /* just indicate that signals should be handled asap */
|
652 | 48dc41eb | bellard | break;
|
653 | 1fddef4b | bellard | case EXCP_DEBUG:
|
654 | 1fddef4b | bellard | { |
655 | 1fddef4b | bellard | int sig;
|
656 | 1fddef4b | bellard | |
657 | 1fddef4b | bellard | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
658 | 1fddef4b | bellard | if (sig)
|
659 | 1fddef4b | bellard | { |
660 | 1fddef4b | bellard | info.si_signo = sig; |
661 | 1fddef4b | bellard | info.si_errno = 0;
|
662 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
663 | 1fddef4b | bellard | queue_signal(info.si_signo, &info); |
664 | 1fddef4b | bellard | } |
665 | 1fddef4b | bellard | } |
666 | 1fddef4b | bellard | break;
|
667 | 060366c5 | bellard | default:
|
668 | 060366c5 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
669 | 7fe48483 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
670 | 060366c5 | bellard | exit (1);
|
671 | 060366c5 | bellard | } |
672 | 060366c5 | bellard | process_pending_signals (env); |
673 | 060366c5 | bellard | } |
674 | 93ac68bc | bellard | } |
675 | 93ac68bc | bellard | |
676 | 93ac68bc | bellard | #endif
|
677 | 93ac68bc | bellard | |
678 | 67867308 | bellard | #ifdef TARGET_PPC
|
679 | 9fddaa0c | bellard | static inline uint64_t cpu_ppc_get_tb (CPUState *env) |
680 | 9fddaa0c | bellard | { |
681 | 9fddaa0c | bellard | /* TO FIX */
|
682 | 9fddaa0c | bellard | return 0; |
683 | 9fddaa0c | bellard | } |
684 | 3b46e624 | ths | |
685 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbl (CPUState *env) |
686 | 9fddaa0c | bellard | { |
687 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
688 | 9fddaa0c | bellard | } |
689 | 3b46e624 | ths | |
690 | 9fddaa0c | bellard | uint32_t cpu_ppc_load_tbu (CPUState *env) |
691 | 9fddaa0c | bellard | { |
692 | 9fddaa0c | bellard | return cpu_ppc_get_tb(env) >> 32; |
693 | 9fddaa0c | bellard | } |
694 | 3b46e624 | ths | |
695 | a062e36c | j_mayer | uint32_t cpu_ppc_load_atbl (CPUState *env) |
696 | 9fddaa0c | bellard | { |
697 | a062e36c | j_mayer | return cpu_ppc_get_tb(env) & 0xFFFFFFFF; |
698 | 9fddaa0c | bellard | } |
699 | 5fafdf24 | ths | |
700 | a062e36c | j_mayer | uint32_t cpu_ppc_load_atbu (CPUState *env) |
701 | 9fddaa0c | bellard | { |
702 | a062e36c | j_mayer | return cpu_ppc_get_tb(env) >> 32; |
703 | 9fddaa0c | bellard | } |
704 | 76a66253 | j_mayer | |
705 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcu (CPUState *env) |
706 | 76a66253 | j_mayer | __attribute__ (( alias ("cpu_ppc_load_tbu") ));
|
707 | 76a66253 | j_mayer | |
708 | 76a66253 | j_mayer | uint32_t cpu_ppc601_load_rtcl (CPUState *env) |
709 | 9fddaa0c | bellard | { |
710 | 76a66253 | j_mayer | return cpu_ppc_load_tbl(env) & 0x3FFFFF80; |
711 | 9fddaa0c | bellard | } |
712 | 76a66253 | j_mayer | |
713 | a750fc0b | j_mayer | /* XXX: to be fixed */
|
714 | a750fc0b | j_mayer | int ppc_dcr_read (ppc_dcr_t *dcr_env, int dcrn, target_ulong *valp) |
715 | a750fc0b | j_mayer | { |
716 | a750fc0b | j_mayer | return -1; |
717 | a750fc0b | j_mayer | } |
718 | a750fc0b | j_mayer | |
719 | a750fc0b | j_mayer | int ppc_dcr_write (ppc_dcr_t *dcr_env, int dcrn, target_ulong val) |
720 | a750fc0b | j_mayer | { |
721 | a750fc0b | j_mayer | return -1; |
722 | a750fc0b | j_mayer | } |
723 | a750fc0b | j_mayer | |
724 | e1833e1f | j_mayer | #define EXCP_DUMP(env, fmt, args...) \
|
725 | e1833e1f | j_mayer | do { \
|
726 | e1833e1f | j_mayer | fprintf(stderr, fmt , ##args); \ |
727 | e1833e1f | j_mayer | cpu_dump_state(env, stderr, fprintf, 0); \
|
728 | e1833e1f | j_mayer | if (loglevel != 0) { \ |
729 | e1833e1f | j_mayer | fprintf(logfile, fmt , ##args); \ |
730 | e1833e1f | j_mayer | cpu_dump_state(env, logfile, fprintf, 0); \
|
731 | e1833e1f | j_mayer | } \ |
732 | e1833e1f | j_mayer | } while (0) |
733 | e1833e1f | j_mayer | |
734 | 67867308 | bellard | void cpu_loop(CPUPPCState *env)
|
735 | 67867308 | bellard | { |
736 | 67867308 | bellard | target_siginfo_t info; |
737 | 61190b14 | bellard | int trapnr;
|
738 | 61190b14 | bellard | uint32_t ret; |
739 | 3b46e624 | ths | |
740 | 67867308 | bellard | for(;;) {
|
741 | 67867308 | bellard | trapnr = cpu_ppc_exec(env); |
742 | 67867308 | bellard | switch(trapnr) {
|
743 | e1833e1f | j_mayer | case POWERPC_EXCP_NONE:
|
744 | e1833e1f | j_mayer | /* Just go on */
|
745 | 67867308 | bellard | break;
|
746 | e1833e1f | j_mayer | case POWERPC_EXCP_CRITICAL: /* Critical input */ |
747 | e1833e1f | j_mayer | cpu_abort(env, "Critical interrupt while in user mode. "
|
748 | e1833e1f | j_mayer | "Aborting\n");
|
749 | 61190b14 | bellard | break;
|
750 | e1833e1f | j_mayer | case POWERPC_EXCP_MCHECK: /* Machine check exception */ |
751 | e1833e1f | j_mayer | cpu_abort(env, "Machine check exception while in user mode. "
|
752 | e1833e1f | j_mayer | "Aborting\n");
|
753 | e1833e1f | j_mayer | break;
|
754 | e1833e1f | j_mayer | case POWERPC_EXCP_DSI: /* Data storage exception */ |
755 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid data memory access: 0x" ADDRX "\n", |
756 | e1833e1f | j_mayer | env->spr[SPR_DAR]); |
757 | e1833e1f | j_mayer | /* XXX: check this. Seems bugged */
|
758 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
759 | 2be0071f | bellard | case 0x40000000: |
760 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
761 | 61190b14 | bellard | info.si_errno = 0;
|
762 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
763 | 61190b14 | bellard | break;
|
764 | 2be0071f | bellard | case 0x04000000: |
765 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
766 | 61190b14 | bellard | info.si_errno = 0;
|
767 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
768 | 61190b14 | bellard | break;
|
769 | 2be0071f | bellard | case 0x08000000: |
770 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
771 | 61190b14 | bellard | info.si_errno = 0;
|
772 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
773 | 61190b14 | bellard | break;
|
774 | 61190b14 | bellard | default:
|
775 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
776 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
777 | e1833e1f | j_mayer | env->error_code); |
778 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
779 | 61190b14 | bellard | info.si_errno = 0;
|
780 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
781 | 61190b14 | bellard | break;
|
782 | 61190b14 | bellard | } |
783 | 67867308 | bellard | info._sifields._sigfault._addr = env->nip; |
784 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
785 | 67867308 | bellard | break;
|
786 | e1833e1f | j_mayer | case POWERPC_EXCP_ISI: /* Instruction storage exception */ |
787 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid instruction fetch: 0x\n" ADDRX "\n", |
788 | e1833e1f | j_mayer | env->spr[SPR_DAR]); |
789 | e1833e1f | j_mayer | /* XXX: check this */
|
790 | 2be0071f | bellard | switch (env->error_code & 0xFF000000) { |
791 | 2be0071f | bellard | case 0x40000000: |
792 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
793 | 67867308 | bellard | info.si_errno = 0;
|
794 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
795 | 61190b14 | bellard | break;
|
796 | 2be0071f | bellard | case 0x10000000: |
797 | 2be0071f | bellard | case 0x08000000: |
798 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
799 | 61190b14 | bellard | info.si_errno = 0;
|
800 | 61190b14 | bellard | info.si_code = TARGET_SEGV_ACCERR; |
801 | 61190b14 | bellard | break;
|
802 | 61190b14 | bellard | default:
|
803 | 61190b14 | bellard | /* Let's send a regular segfault... */
|
804 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid segfault errno (%02x)\n",
|
805 | e1833e1f | j_mayer | env->error_code); |
806 | 61190b14 | bellard | info.si_signo = TARGET_SIGSEGV; |
807 | 61190b14 | bellard | info.si_errno = 0;
|
808 | 61190b14 | bellard | info.si_code = TARGET_SEGV_MAPERR; |
809 | 61190b14 | bellard | break;
|
810 | 61190b14 | bellard | } |
811 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
812 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
813 | 67867308 | bellard | break;
|
814 | e1833e1f | j_mayer | case POWERPC_EXCP_EXTERNAL: /* External input */ |
815 | e1833e1f | j_mayer | cpu_abort(env, "External interrupt while in user mode. "
|
816 | e1833e1f | j_mayer | "Aborting\n");
|
817 | e1833e1f | j_mayer | break;
|
818 | e1833e1f | j_mayer | case POWERPC_EXCP_ALIGN: /* Alignment exception */ |
819 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unaligned memory access\n");
|
820 | e1833e1f | j_mayer | /* XXX: check this */
|
821 | 61190b14 | bellard | info.si_signo = TARGET_SIGBUS; |
822 | 67867308 | bellard | info.si_errno = 0;
|
823 | 61190b14 | bellard | info.si_code = TARGET_BUS_ADRALN; |
824 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
825 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
826 | 67867308 | bellard | break;
|
827 | e1833e1f | j_mayer | case POWERPC_EXCP_PROGRAM: /* Program exception */ |
828 | e1833e1f | j_mayer | /* XXX: check this */
|
829 | 61190b14 | bellard | switch (env->error_code & ~0xF) { |
830 | e1833e1f | j_mayer | case POWERPC_EXCP_FP:
|
831 | e1833e1f | j_mayer | EXCP_DUMP(env, "Floating point program exception\n");
|
832 | 61190b14 | bellard | info.si_signo = TARGET_SIGFPE; |
833 | 61190b14 | bellard | info.si_errno = 0;
|
834 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
835 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_OX:
|
836 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTOVF; |
837 | 61190b14 | bellard | break;
|
838 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_UX:
|
839 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTUND; |
840 | 61190b14 | bellard | break;
|
841 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_ZX:
|
842 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXZDZ:
|
843 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTDIV; |
844 | 61190b14 | bellard | break;
|
845 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_XX:
|
846 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTRES; |
847 | 61190b14 | bellard | break;
|
848 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSOFT:
|
849 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTINV; |
850 | 61190b14 | bellard | break;
|
851 | 7c58044c | j_mayer | case POWERPC_EXCP_FP_VXSNAN:
|
852 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXISI:
|
853 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIDI:
|
854 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXIMZ:
|
855 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXVC:
|
856 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXSQRT:
|
857 | e1833e1f | j_mayer | case POWERPC_EXCP_FP_VXCVI:
|
858 | 61190b14 | bellard | info.si_code = TARGET_FPE_FLTSUB; |
859 | 61190b14 | bellard | break;
|
860 | 61190b14 | bellard | default:
|
861 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown floating point exception (%02x)\n",
|
862 | e1833e1f | j_mayer | env->error_code); |
863 | e1833e1f | j_mayer | break;
|
864 | 61190b14 | bellard | } |
865 | e1833e1f | j_mayer | break;
|
866 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL:
|
867 | e1833e1f | j_mayer | EXCP_DUMP(env, "Invalid instruction\n");
|
868 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
869 | 61190b14 | bellard | info.si_errno = 0;
|
870 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
871 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_INVAL:
|
872 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLOPC; |
873 | 61190b14 | bellard | break;
|
874 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_LSWX:
|
875 | a750fc0b | j_mayer | info.si_code = TARGET_ILL_ILLOPN; |
876 | 61190b14 | bellard | break;
|
877 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_SPR:
|
878 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
879 | 61190b14 | bellard | break;
|
880 | e1833e1f | j_mayer | case POWERPC_EXCP_INVAL_FP:
|
881 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
882 | 61190b14 | bellard | break;
|
883 | 61190b14 | bellard | default:
|
884 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown invalid operation (%02x)\n",
|
885 | e1833e1f | j_mayer | env->error_code & 0xF);
|
886 | 61190b14 | bellard | info.si_code = TARGET_ILL_ILLADR; |
887 | 61190b14 | bellard | break;
|
888 | 61190b14 | bellard | } |
889 | 61190b14 | bellard | break;
|
890 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV:
|
891 | e1833e1f | j_mayer | EXCP_DUMP(env, "Privilege violation\n");
|
892 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
893 | 61190b14 | bellard | info.si_errno = 0;
|
894 | 61190b14 | bellard | switch (env->error_code & 0xF) { |
895 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_OPC:
|
896 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
897 | 61190b14 | bellard | break;
|
898 | e1833e1f | j_mayer | case POWERPC_EXCP_PRIV_REG:
|
899 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVREG; |
900 | e1833e1f | j_mayer | break;
|
901 | 61190b14 | bellard | default:
|
902 | e1833e1f | j_mayer | EXCP_DUMP(env, "Unknown privilege violation (%02x)\n",
|
903 | e1833e1f | j_mayer | env->error_code & 0xF);
|
904 | 61190b14 | bellard | info.si_code = TARGET_ILL_PRVOPC; |
905 | 61190b14 | bellard | break;
|
906 | 61190b14 | bellard | } |
907 | 61190b14 | bellard | break;
|
908 | e1833e1f | j_mayer | case POWERPC_EXCP_TRAP:
|
909 | e1833e1f | j_mayer | cpu_abort(env, "Tried to call a TRAP\n");
|
910 | e1833e1f | j_mayer | break;
|
911 | 61190b14 | bellard | default:
|
912 | 61190b14 | bellard | /* Should not happen ! */
|
913 | e1833e1f | j_mayer | cpu_abort(env, "Unknown program exception (%02x)\n",
|
914 | e1833e1f | j_mayer | env->error_code); |
915 | e1833e1f | j_mayer | break;
|
916 | 61190b14 | bellard | } |
917 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
918 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
919 | 67867308 | bellard | break;
|
920 | e1833e1f | j_mayer | case POWERPC_EXCP_FPU: /* Floating-point unavailable exception */ |
921 | e1833e1f | j_mayer | EXCP_DUMP(env, "No floating point allowed\n");
|
922 | 61190b14 | bellard | info.si_signo = TARGET_SIGILL; |
923 | 67867308 | bellard | info.si_errno = 0;
|
924 | 61190b14 | bellard | info.si_code = TARGET_ILL_COPROC; |
925 | 61190b14 | bellard | info._sifields._sigfault._addr = env->nip - 4;
|
926 | 67867308 | bellard | queue_signal(info.si_signo, &info); |
927 | 67867308 | bellard | break;
|
928 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL: /* System call exception */ |
929 | e1833e1f | j_mayer | cpu_abort(env, "Syscall exception while in user mode. "
|
930 | e1833e1f | j_mayer | "Aborting\n");
|
931 | 61190b14 | bellard | break;
|
932 | e1833e1f | j_mayer | case POWERPC_EXCP_APU: /* Auxiliary processor unavailable */ |
933 | e1833e1f | j_mayer | EXCP_DUMP(env, "No APU instruction allowed\n");
|
934 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
935 | e1833e1f | j_mayer | info.si_errno = 0;
|
936 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
937 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
938 | e1833e1f | j_mayer | queue_signal(info.si_signo, &info); |
939 | 61190b14 | bellard | break;
|
940 | e1833e1f | j_mayer | case POWERPC_EXCP_DECR: /* Decrementer exception */ |
941 | e1833e1f | j_mayer | cpu_abort(env, "Decrementer interrupt while in user mode. "
|
942 | e1833e1f | j_mayer | "Aborting\n");
|
943 | 61190b14 | bellard | break;
|
944 | e1833e1f | j_mayer | case POWERPC_EXCP_FIT: /* Fixed-interval timer interrupt */ |
945 | e1833e1f | j_mayer | cpu_abort(env, "Fix interval timer interrupt while in user mode. "
|
946 | e1833e1f | j_mayer | "Aborting\n");
|
947 | e1833e1f | j_mayer | break;
|
948 | e1833e1f | j_mayer | case POWERPC_EXCP_WDT: /* Watchdog timer interrupt */ |
949 | e1833e1f | j_mayer | cpu_abort(env, "Watchdog timer interrupt while in user mode. "
|
950 | e1833e1f | j_mayer | "Aborting\n");
|
951 | e1833e1f | j_mayer | break;
|
952 | e1833e1f | j_mayer | case POWERPC_EXCP_DTLB: /* Data TLB error */ |
953 | e1833e1f | j_mayer | cpu_abort(env, "Data TLB exception while in user mode. "
|
954 | e1833e1f | j_mayer | "Aborting\n");
|
955 | e1833e1f | j_mayer | break;
|
956 | e1833e1f | j_mayer | case POWERPC_EXCP_ITLB: /* Instruction TLB error */ |
957 | e1833e1f | j_mayer | cpu_abort(env, "Instruction TLB exception while in user mode. "
|
958 | e1833e1f | j_mayer | "Aborting\n");
|
959 | e1833e1f | j_mayer | break;
|
960 | e1833e1f | j_mayer | case POWERPC_EXCP_DEBUG: /* Debug interrupt */ |
961 | e1833e1f | j_mayer | /* XXX: check this */
|
962 | 1fddef4b | bellard | { |
963 | 1fddef4b | bellard | int sig;
|
964 | 1fddef4b | bellard | |
965 | e1833e1f | j_mayer | sig = gdb_handlesig(env, TARGET_SIGTRAP); |
966 | e1833e1f | j_mayer | if (sig) {
|
967 | 1fddef4b | bellard | info.si_signo = sig; |
968 | 1fddef4b | bellard | info.si_errno = 0;
|
969 | 1fddef4b | bellard | info.si_code = TARGET_TRAP_BRKPT; |
970 | 1fddef4b | bellard | queue_signal(info.si_signo, &info); |
971 | 1fddef4b | bellard | } |
972 | 1fddef4b | bellard | } |
973 | 1fddef4b | bellard | break;
|
974 | e1833e1f | j_mayer | #if defined(TARGET_PPCEMB)
|
975 | e1833e1f | j_mayer | case POWERPC_EXCP_SPEU: /* SPE/embedded floating-point unavail. */ |
976 | e1833e1f | j_mayer | EXCP_DUMP(env, "No SPE/floating-point instruction allowed\n");
|
977 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
978 | e1833e1f | j_mayer | info.si_errno = 0;
|
979 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
980 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
981 | e1833e1f | j_mayer | queue_signal(info.si_signo, &info); |
982 | e1833e1f | j_mayer | break;
|
983 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPDI: /* Embedded floating-point data IRQ */ |
984 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point data IRQ not handled\n");
|
985 | e1833e1f | j_mayer | break;
|
986 | e1833e1f | j_mayer | case POWERPC_EXCP_EFPRI: /* Embedded floating-point round IRQ */ |
987 | e1833e1f | j_mayer | cpu_abort(env, "Embedded floating-point round IRQ not handled\n");
|
988 | e1833e1f | j_mayer | break;
|
989 | e1833e1f | j_mayer | case POWERPC_EXCP_EPERFM: /* Embedded performance monitor IRQ */ |
990 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
991 | e1833e1f | j_mayer | break;
|
992 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORI: /* Embedded doorbell interrupt */ |
993 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell interrupt while in user mode. "
|
994 | e1833e1f | j_mayer | "Aborting\n");
|
995 | e1833e1f | j_mayer | break;
|
996 | e1833e1f | j_mayer | case POWERPC_EXCP_DOORCI: /* Embedded doorbell critical interrupt */ |
997 | e1833e1f | j_mayer | cpu_abort(env, "Doorbell critical interrupt while in user mode. "
|
998 | e1833e1f | j_mayer | "Aborting\n");
|
999 | e1833e1f | j_mayer | break;
|
1000 | e1833e1f | j_mayer | case POWERPC_EXCP_RESET: /* System reset exception */ |
1001 | e1833e1f | j_mayer | cpu_abort(env, "Reset interrupt while in user mode. "
|
1002 | e1833e1f | j_mayer | "Aborting\n");
|
1003 | e1833e1f | j_mayer | break;
|
1004 | e1833e1f | j_mayer | #endif /* defined(TARGET_PPCEMB) */ |
1005 | e85e7c6e | j_mayer | #if defined(TARGET_PPC64) && !defined(TARGET_ABI32) /* PowerPC 64 */ |
1006 | e1833e1f | j_mayer | case POWERPC_EXCP_DSEG: /* Data segment exception */ |
1007 | e1833e1f | j_mayer | cpu_abort(env, "Data segment exception while in user mode. "
|
1008 | e1833e1f | j_mayer | "Aborting\n");
|
1009 | e1833e1f | j_mayer | break;
|
1010 | e1833e1f | j_mayer | case POWERPC_EXCP_ISEG: /* Instruction segment exception */ |
1011 | e1833e1f | j_mayer | cpu_abort(env, "Instruction segment exception "
|
1012 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1013 | e1833e1f | j_mayer | break;
|
1014 | e85e7c6e | j_mayer | #endif /* defined(TARGET_PPC64) && !defined(TARGET_ABI32) */ |
1015 | e85e7c6e | j_mayer | #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
|
1016 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1017 | e1833e1f | j_mayer | case POWERPC_EXCP_HDECR: /* Hypervisor decrementer exception */ |
1018 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor decrementer interrupt "
|
1019 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1020 | e1833e1f | j_mayer | break;
|
1021 | e85e7c6e | j_mayer | #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ |
1022 | e1833e1f | j_mayer | case POWERPC_EXCP_TRACE: /* Trace exception */ |
1023 | e1833e1f | j_mayer | /* Nothing to do:
|
1024 | e1833e1f | j_mayer | * we use this exception to emulate step-by-step execution mode.
|
1025 | e1833e1f | j_mayer | */
|
1026 | e1833e1f | j_mayer | break;
|
1027 | e85e7c6e | j_mayer | #if defined(TARGET_PPC64H) && !defined(TARGET_ABI32)
|
1028 | e85e7c6e | j_mayer | /* PowerPC 64 with hypervisor mode support */
|
1029 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSI: /* Hypervisor data storage exception */ |
1030 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data storage exception "
|
1031 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1032 | e1833e1f | j_mayer | break;
|
1033 | e1833e1f | j_mayer | case POWERPC_EXCP_HISI: /* Hypervisor instruction storage excp */ |
1034 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction storage exception "
|
1035 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1036 | e1833e1f | j_mayer | break;
|
1037 | e1833e1f | j_mayer | case POWERPC_EXCP_HDSEG: /* Hypervisor data segment exception */ |
1038 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor data segment exception "
|
1039 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1040 | e1833e1f | j_mayer | break;
|
1041 | e1833e1f | j_mayer | case POWERPC_EXCP_HISEG: /* Hypervisor instruction segment excp */ |
1042 | e1833e1f | j_mayer | cpu_abort(env, "Hypervisor instruction segment exception "
|
1043 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1044 | e1833e1f | j_mayer | break;
|
1045 | e85e7c6e | j_mayer | #endif /* defined(TARGET_PPC64H) && !defined(TARGET_ABI32) */ |
1046 | e1833e1f | j_mayer | case POWERPC_EXCP_VPU: /* Vector unavailable exception */ |
1047 | e1833e1f | j_mayer | EXCP_DUMP(env, "No Altivec instructions allowed\n");
|
1048 | e1833e1f | j_mayer | info.si_signo = TARGET_SIGILL; |
1049 | e1833e1f | j_mayer | info.si_errno = 0;
|
1050 | e1833e1f | j_mayer | info.si_code = TARGET_ILL_COPROC; |
1051 | e1833e1f | j_mayer | info._sifields._sigfault._addr = env->nip - 4;
|
1052 | e1833e1f | j_mayer | queue_signal(info.si_signo, &info); |
1053 | e1833e1f | j_mayer | break;
|
1054 | e1833e1f | j_mayer | case POWERPC_EXCP_PIT: /* Programmable interval timer IRQ */ |
1055 | e1833e1f | j_mayer | cpu_abort(env, "Programable interval timer interrupt "
|
1056 | e1833e1f | j_mayer | "while in user mode. Aborting\n");
|
1057 | e1833e1f | j_mayer | break;
|
1058 | e1833e1f | j_mayer | case POWERPC_EXCP_IO: /* IO error exception */ |
1059 | e1833e1f | j_mayer | cpu_abort(env, "IO error exception while in user mode. "
|
1060 | e1833e1f | j_mayer | "Aborting\n");
|
1061 | e1833e1f | j_mayer | break;
|
1062 | e1833e1f | j_mayer | case POWERPC_EXCP_RUNM: /* Run mode exception */ |
1063 | e1833e1f | j_mayer | cpu_abort(env, "Run mode exception while in user mode. "
|
1064 | e1833e1f | j_mayer | "Aborting\n");
|
1065 | e1833e1f | j_mayer | break;
|
1066 | e1833e1f | j_mayer | case POWERPC_EXCP_EMUL: /* Emulation trap exception */ |
1067 | e1833e1f | j_mayer | cpu_abort(env, "Emulation trap exception not handled\n");
|
1068 | e1833e1f | j_mayer | break;
|
1069 | e1833e1f | j_mayer | case POWERPC_EXCP_IFTLB: /* Instruction fetch TLB error */ |
1070 | e1833e1f | j_mayer | cpu_abort(env, "Instruction fetch TLB exception "
|
1071 | e1833e1f | j_mayer | "while in user-mode. Aborting");
|
1072 | e1833e1f | j_mayer | break;
|
1073 | e1833e1f | j_mayer | case POWERPC_EXCP_DLTLB: /* Data load TLB miss */ |
1074 | e1833e1f | j_mayer | cpu_abort(env, "Data load TLB exception while in user-mode. "
|
1075 | e1833e1f | j_mayer | "Aborting");
|
1076 | e1833e1f | j_mayer | break;
|
1077 | e1833e1f | j_mayer | case POWERPC_EXCP_DSTLB: /* Data store TLB miss */ |
1078 | e1833e1f | j_mayer | cpu_abort(env, "Data store TLB exception while in user-mode. "
|
1079 | e1833e1f | j_mayer | "Aborting");
|
1080 | e1833e1f | j_mayer | break;
|
1081 | e1833e1f | j_mayer | case POWERPC_EXCP_FPA: /* Floating-point assist exception */ |
1082 | e1833e1f | j_mayer | cpu_abort(env, "Floating-point assist exception not handled\n");
|
1083 | e1833e1f | j_mayer | break;
|
1084 | e1833e1f | j_mayer | case POWERPC_EXCP_IABR: /* Instruction address breakpoint */ |
1085 | e1833e1f | j_mayer | cpu_abort(env, "Instruction address breakpoint exception "
|
1086 | e1833e1f | j_mayer | "not handled\n");
|
1087 | e1833e1f | j_mayer | break;
|
1088 | e1833e1f | j_mayer | case POWERPC_EXCP_SMI: /* System management interrupt */ |
1089 | e1833e1f | j_mayer | cpu_abort(env, "System management interrupt while in user mode. "
|
1090 | e1833e1f | j_mayer | "Aborting\n");
|
1091 | e1833e1f | j_mayer | break;
|
1092 | e1833e1f | j_mayer | case POWERPC_EXCP_THERM: /* Thermal interrupt */ |
1093 | e1833e1f | j_mayer | cpu_abort(env, "Thermal interrupt interrupt while in user mode. "
|
1094 | e1833e1f | j_mayer | "Aborting\n");
|
1095 | e1833e1f | j_mayer | break;
|
1096 | e1833e1f | j_mayer | case POWERPC_EXCP_PERFM: /* Embedded performance monitor IRQ */ |
1097 | e1833e1f | j_mayer | cpu_abort(env, "Performance monitor exception not handled\n");
|
1098 | e1833e1f | j_mayer | break;
|
1099 | e1833e1f | j_mayer | case POWERPC_EXCP_VPUA: /* Vector assist exception */ |
1100 | e1833e1f | j_mayer | cpu_abort(env, "Vector assist exception not handled\n");
|
1101 | e1833e1f | j_mayer | break;
|
1102 | e1833e1f | j_mayer | case POWERPC_EXCP_SOFTP: /* Soft patch exception */ |
1103 | e1833e1f | j_mayer | cpu_abort(env, "Soft patch exception not handled\n");
|
1104 | e1833e1f | j_mayer | break;
|
1105 | e1833e1f | j_mayer | case POWERPC_EXCP_MAINT: /* Maintenance exception */ |
1106 | e1833e1f | j_mayer | cpu_abort(env, "Maintenance exception while in user mode. "
|
1107 | e1833e1f | j_mayer | "Aborting\n");
|
1108 | e1833e1f | j_mayer | break;
|
1109 | e1833e1f | j_mayer | case POWERPC_EXCP_STOP: /* stop translation */ |
1110 | e1833e1f | j_mayer | /* We did invalidate the instruction cache. Go on */
|
1111 | e1833e1f | j_mayer | break;
|
1112 | e1833e1f | j_mayer | case POWERPC_EXCP_BRANCH: /* branch instruction: */ |
1113 | e1833e1f | j_mayer | /* We just stopped because of a branch. Go on */
|
1114 | e1833e1f | j_mayer | break;
|
1115 | e1833e1f | j_mayer | case POWERPC_EXCP_SYSCALL_USER:
|
1116 | e1833e1f | j_mayer | /* system call in user-mode emulation */
|
1117 | e1833e1f | j_mayer | /* WARNING:
|
1118 | e1833e1f | j_mayer | * PPC ABI uses overflow flag in cr0 to signal an error
|
1119 | e1833e1f | j_mayer | * in syscalls.
|
1120 | e1833e1f | j_mayer | */
|
1121 | e1833e1f | j_mayer | #if 0
|
1122 | e1833e1f | j_mayer | printf("syscall %d 0x%08x 0x%08x 0x%08x 0x%08x\n", env->gpr[0],
|
1123 | e1833e1f | j_mayer | env->gpr[3], env->gpr[4], env->gpr[5], env->gpr[6]);
|
1124 | e1833e1f | j_mayer | #endif
|
1125 | e1833e1f | j_mayer | env->crf[0] &= ~0x1; |
1126 | e1833e1f | j_mayer | ret = do_syscall(env, env->gpr[0], env->gpr[3], env->gpr[4], |
1127 | e1833e1f | j_mayer | env->gpr[5], env->gpr[6], env->gpr[7], |
1128 | e1833e1f | j_mayer | env->gpr[8]);
|
1129 | e1833e1f | j_mayer | if (ret > (uint32_t)(-515)) { |
1130 | e1833e1f | j_mayer | env->crf[0] |= 0x1; |
1131 | e1833e1f | j_mayer | ret = -ret; |
1132 | 61190b14 | bellard | } |
1133 | e1833e1f | j_mayer | env->gpr[3] = ret;
|
1134 | e1833e1f | j_mayer | #if 0
|
1135 | e1833e1f | j_mayer | printf("syscall returned 0x%08x (%d)\n", ret, ret);
|
1136 | e1833e1f | j_mayer | #endif
|
1137 | e1833e1f | j_mayer | break;
|
1138 | 56ba31ff | j_mayer | case EXCP_INTERRUPT:
|
1139 | 56ba31ff | j_mayer | /* just indicate that signals should be handled asap */
|
1140 | 56ba31ff | j_mayer | break;
|
1141 | e1833e1f | j_mayer | default:
|
1142 | e1833e1f | j_mayer | cpu_abort(env, "Unknown exception 0x%d. Aborting\n", trapnr);
|
1143 | e1833e1f | j_mayer | break;
|
1144 | 67867308 | bellard | } |
1145 | 67867308 | bellard | process_pending_signals(env); |
1146 | 67867308 | bellard | } |
1147 | 67867308 | bellard | } |
1148 | 67867308 | bellard | #endif
|
1149 | 67867308 | bellard | |
1150 | 048f6b4d | bellard | #ifdef TARGET_MIPS
|
1151 | 048f6b4d | bellard | |
1152 | 048f6b4d | bellard | #define MIPS_SYS(name, args) args,
|
1153 | 048f6b4d | bellard | |
1154 | 048f6b4d | bellard | static const uint8_t mips_syscall_args[] = { |
1155 | 048f6b4d | bellard | MIPS_SYS(sys_syscall , 0) /* 4000 */ |
1156 | 048f6b4d | bellard | MIPS_SYS(sys_exit , 1)
|
1157 | 048f6b4d | bellard | MIPS_SYS(sys_fork , 0)
|
1158 | 048f6b4d | bellard | MIPS_SYS(sys_read , 3)
|
1159 | 048f6b4d | bellard | MIPS_SYS(sys_write , 3)
|
1160 | 048f6b4d | bellard | MIPS_SYS(sys_open , 3) /* 4005 */ |
1161 | 048f6b4d | bellard | MIPS_SYS(sys_close , 1)
|
1162 | 048f6b4d | bellard | MIPS_SYS(sys_waitpid , 3)
|
1163 | 048f6b4d | bellard | MIPS_SYS(sys_creat , 2)
|
1164 | 048f6b4d | bellard | MIPS_SYS(sys_link , 2)
|
1165 | 048f6b4d | bellard | MIPS_SYS(sys_unlink , 1) /* 4010 */ |
1166 | 048f6b4d | bellard | MIPS_SYS(sys_execve , 0)
|
1167 | 048f6b4d | bellard | MIPS_SYS(sys_chdir , 1)
|
1168 | 048f6b4d | bellard | MIPS_SYS(sys_time , 1)
|
1169 | 048f6b4d | bellard | MIPS_SYS(sys_mknod , 3)
|
1170 | 048f6b4d | bellard | MIPS_SYS(sys_chmod , 2) /* 4015 */ |
1171 | 048f6b4d | bellard | MIPS_SYS(sys_lchown , 3)
|
1172 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1173 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_stat */ |
1174 | 048f6b4d | bellard | MIPS_SYS(sys_lseek , 3)
|
1175 | 048f6b4d | bellard | MIPS_SYS(sys_getpid , 0) /* 4020 */ |
1176 | 048f6b4d | bellard | MIPS_SYS(sys_mount , 5)
|
1177 | 048f6b4d | bellard | MIPS_SYS(sys_oldumount , 1)
|
1178 | 048f6b4d | bellard | MIPS_SYS(sys_setuid , 1)
|
1179 | 048f6b4d | bellard | MIPS_SYS(sys_getuid , 0)
|
1180 | 048f6b4d | bellard | MIPS_SYS(sys_stime , 1) /* 4025 */ |
1181 | 048f6b4d | bellard | MIPS_SYS(sys_ptrace , 4)
|
1182 | 048f6b4d | bellard | MIPS_SYS(sys_alarm , 1)
|
1183 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_fstat */ |
1184 | 048f6b4d | bellard | MIPS_SYS(sys_pause , 0)
|
1185 | 048f6b4d | bellard | MIPS_SYS(sys_utime , 2) /* 4030 */ |
1186 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1187 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1188 | 048f6b4d | bellard | MIPS_SYS(sys_access , 2)
|
1189 | 048f6b4d | bellard | MIPS_SYS(sys_nice , 1)
|
1190 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4035 */ |
1191 | 048f6b4d | bellard | MIPS_SYS(sys_sync , 0)
|
1192 | 048f6b4d | bellard | MIPS_SYS(sys_kill , 2)
|
1193 | 048f6b4d | bellard | MIPS_SYS(sys_rename , 2)
|
1194 | 048f6b4d | bellard | MIPS_SYS(sys_mkdir , 2)
|
1195 | 048f6b4d | bellard | MIPS_SYS(sys_rmdir , 1) /* 4040 */ |
1196 | 048f6b4d | bellard | MIPS_SYS(sys_dup , 1)
|
1197 | 048f6b4d | bellard | MIPS_SYS(sys_pipe , 0)
|
1198 | 048f6b4d | bellard | MIPS_SYS(sys_times , 1)
|
1199 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1200 | 048f6b4d | bellard | MIPS_SYS(sys_brk , 1) /* 4045 */ |
1201 | 048f6b4d | bellard | MIPS_SYS(sys_setgid , 1)
|
1202 | 048f6b4d | bellard | MIPS_SYS(sys_getgid , 0)
|
1203 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was signal(2) */ |
1204 | 048f6b4d | bellard | MIPS_SYS(sys_geteuid , 0)
|
1205 | 048f6b4d | bellard | MIPS_SYS(sys_getegid , 0) /* 4050 */ |
1206 | 048f6b4d | bellard | MIPS_SYS(sys_acct , 0)
|
1207 | 048f6b4d | bellard | MIPS_SYS(sys_umount , 2)
|
1208 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1209 | 048f6b4d | bellard | MIPS_SYS(sys_ioctl , 3)
|
1210 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl , 3) /* 4055 */ |
1211 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 2)
|
1212 | 048f6b4d | bellard | MIPS_SYS(sys_setpgid , 2)
|
1213 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1214 | 048f6b4d | bellard | MIPS_SYS(sys_olduname , 1)
|
1215 | 048f6b4d | bellard | MIPS_SYS(sys_umask , 1) /* 4060 */ |
1216 | 048f6b4d | bellard | MIPS_SYS(sys_chroot , 1)
|
1217 | 048f6b4d | bellard | MIPS_SYS(sys_ustat , 2)
|
1218 | 048f6b4d | bellard | MIPS_SYS(sys_dup2 , 2)
|
1219 | 048f6b4d | bellard | MIPS_SYS(sys_getppid , 0)
|
1220 | 048f6b4d | bellard | MIPS_SYS(sys_getpgrp , 0) /* 4065 */ |
1221 | 048f6b4d | bellard | MIPS_SYS(sys_setsid , 0)
|
1222 | 048f6b4d | bellard | MIPS_SYS(sys_sigaction , 3)
|
1223 | 048f6b4d | bellard | MIPS_SYS(sys_sgetmask , 0)
|
1224 | 048f6b4d | bellard | MIPS_SYS(sys_ssetmask , 1)
|
1225 | 048f6b4d | bellard | MIPS_SYS(sys_setreuid , 2) /* 4070 */ |
1226 | 048f6b4d | bellard | MIPS_SYS(sys_setregid , 2)
|
1227 | 048f6b4d | bellard | MIPS_SYS(sys_sigsuspend , 0)
|
1228 | 048f6b4d | bellard | MIPS_SYS(sys_sigpending , 1)
|
1229 | 048f6b4d | bellard | MIPS_SYS(sys_sethostname , 2)
|
1230 | 048f6b4d | bellard | MIPS_SYS(sys_setrlimit , 2) /* 4075 */ |
1231 | 048f6b4d | bellard | MIPS_SYS(sys_getrlimit , 2)
|
1232 | 048f6b4d | bellard | MIPS_SYS(sys_getrusage , 2)
|
1233 | 048f6b4d | bellard | MIPS_SYS(sys_gettimeofday, 2)
|
1234 | 048f6b4d | bellard | MIPS_SYS(sys_settimeofday, 2)
|
1235 | 048f6b4d | bellard | MIPS_SYS(sys_getgroups , 2) /* 4080 */ |
1236 | 048f6b4d | bellard | MIPS_SYS(sys_setgroups , 2)
|
1237 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* old_select */ |
1238 | 048f6b4d | bellard | MIPS_SYS(sys_symlink , 2)
|
1239 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_lstat */ |
1240 | 048f6b4d | bellard | MIPS_SYS(sys_readlink , 3) /* 4085 */ |
1241 | 048f6b4d | bellard | MIPS_SYS(sys_uselib , 1)
|
1242 | 048f6b4d | bellard | MIPS_SYS(sys_swapon , 2)
|
1243 | 048f6b4d | bellard | MIPS_SYS(sys_reboot , 3)
|
1244 | 048f6b4d | bellard | MIPS_SYS(old_readdir , 3)
|
1245 | 048f6b4d | bellard | MIPS_SYS(old_mmap , 6) /* 4090 */ |
1246 | 048f6b4d | bellard | MIPS_SYS(sys_munmap , 2)
|
1247 | 048f6b4d | bellard | MIPS_SYS(sys_truncate , 2)
|
1248 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate , 2)
|
1249 | 048f6b4d | bellard | MIPS_SYS(sys_fchmod , 2)
|
1250 | 048f6b4d | bellard | MIPS_SYS(sys_fchown , 3) /* 4095 */ |
1251 | 048f6b4d | bellard | MIPS_SYS(sys_getpriority , 2)
|
1252 | 048f6b4d | bellard | MIPS_SYS(sys_setpriority , 3)
|
1253 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1254 | 048f6b4d | bellard | MIPS_SYS(sys_statfs , 2)
|
1255 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs , 2) /* 4100 */ |
1256 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was ioperm(2) */ |
1257 | 048f6b4d | bellard | MIPS_SYS(sys_socketcall , 2)
|
1258 | 048f6b4d | bellard | MIPS_SYS(sys_syslog , 3)
|
1259 | 048f6b4d | bellard | MIPS_SYS(sys_setitimer , 3)
|
1260 | 048f6b4d | bellard | MIPS_SYS(sys_getitimer , 2) /* 4105 */ |
1261 | 048f6b4d | bellard | MIPS_SYS(sys_newstat , 2)
|
1262 | 048f6b4d | bellard | MIPS_SYS(sys_newlstat , 2)
|
1263 | 048f6b4d | bellard | MIPS_SYS(sys_newfstat , 2)
|
1264 | 048f6b4d | bellard | MIPS_SYS(sys_uname , 1)
|
1265 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4110 was iopl(2) */ |
1266 | 048f6b4d | bellard | MIPS_SYS(sys_vhangup , 0)
|
1267 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_idle() */ |
1268 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_vm86 */ |
1269 | 048f6b4d | bellard | MIPS_SYS(sys_wait4 , 4)
|
1270 | 048f6b4d | bellard | MIPS_SYS(sys_swapoff , 1) /* 4115 */ |
1271 | 048f6b4d | bellard | MIPS_SYS(sys_sysinfo , 1)
|
1272 | 048f6b4d | bellard | MIPS_SYS(sys_ipc , 6)
|
1273 | 048f6b4d | bellard | MIPS_SYS(sys_fsync , 1)
|
1274 | 048f6b4d | bellard | MIPS_SYS(sys_sigreturn , 0)
|
1275 | 048f6b4d | bellard | MIPS_SYS(sys_clone , 0) /* 4120 */ |
1276 | 048f6b4d | bellard | MIPS_SYS(sys_setdomainname, 2)
|
1277 | 048f6b4d | bellard | MIPS_SYS(sys_newuname , 1)
|
1278 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_modify_ldt */ |
1279 | 048f6b4d | bellard | MIPS_SYS(sys_adjtimex , 1)
|
1280 | 048f6b4d | bellard | MIPS_SYS(sys_mprotect , 3) /* 4125 */ |
1281 | 048f6b4d | bellard | MIPS_SYS(sys_sigprocmask , 3)
|
1282 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was create_module */ |
1283 | 048f6b4d | bellard | MIPS_SYS(sys_init_module , 5)
|
1284 | 048f6b4d | bellard | MIPS_SYS(sys_delete_module, 1)
|
1285 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4130 was get_kernel_syms */ |
1286 | 048f6b4d | bellard | MIPS_SYS(sys_quotactl , 0)
|
1287 | 048f6b4d | bellard | MIPS_SYS(sys_getpgid , 1)
|
1288 | 048f6b4d | bellard | MIPS_SYS(sys_fchdir , 1)
|
1289 | 048f6b4d | bellard | MIPS_SYS(sys_bdflush , 2)
|
1290 | 048f6b4d | bellard | MIPS_SYS(sys_sysfs , 3) /* 4135 */ |
1291 | 048f6b4d | bellard | MIPS_SYS(sys_personality , 1)
|
1292 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* for afs_syscall */ |
1293 | 048f6b4d | bellard | MIPS_SYS(sys_setfsuid , 1)
|
1294 | 048f6b4d | bellard | MIPS_SYS(sys_setfsgid , 1)
|
1295 | 048f6b4d | bellard | MIPS_SYS(sys_llseek , 5) /* 4140 */ |
1296 | 048f6b4d | bellard | MIPS_SYS(sys_getdents , 3)
|
1297 | 048f6b4d | bellard | MIPS_SYS(sys_select , 5)
|
1298 | 048f6b4d | bellard | MIPS_SYS(sys_flock , 2)
|
1299 | 048f6b4d | bellard | MIPS_SYS(sys_msync , 3)
|
1300 | 048f6b4d | bellard | MIPS_SYS(sys_readv , 3) /* 4145 */ |
1301 | 048f6b4d | bellard | MIPS_SYS(sys_writev , 3)
|
1302 | 048f6b4d | bellard | MIPS_SYS(sys_cacheflush , 3)
|
1303 | 048f6b4d | bellard | MIPS_SYS(sys_cachectl , 3)
|
1304 | 048f6b4d | bellard | MIPS_SYS(sys_sysmips , 4)
|
1305 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4150 */ |
1306 | 048f6b4d | bellard | MIPS_SYS(sys_getsid , 1)
|
1307 | 048f6b4d | bellard | MIPS_SYS(sys_fdatasync , 0)
|
1308 | 048f6b4d | bellard | MIPS_SYS(sys_sysctl , 1)
|
1309 | 048f6b4d | bellard | MIPS_SYS(sys_mlock , 2)
|
1310 | 048f6b4d | bellard | MIPS_SYS(sys_munlock , 2) /* 4155 */ |
1311 | 048f6b4d | bellard | MIPS_SYS(sys_mlockall , 1)
|
1312 | 048f6b4d | bellard | MIPS_SYS(sys_munlockall , 0)
|
1313 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setparam, 2)
|
1314 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getparam, 2)
|
1315 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setscheduler, 3) /* 4160 */ |
1316 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getscheduler, 1)
|
1317 | 048f6b4d | bellard | MIPS_SYS(sys_sched_yield , 0)
|
1318 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_max, 1)
|
1319 | 048f6b4d | bellard | MIPS_SYS(sys_sched_get_priority_min, 1)
|
1320 | 048f6b4d | bellard | MIPS_SYS(sys_sched_rr_get_interval, 2) /* 4165 */ |
1321 | 048f6b4d | bellard | MIPS_SYS(sys_nanosleep, 2)
|
1322 | 048f6b4d | bellard | MIPS_SYS(sys_mremap , 4)
|
1323 | 048f6b4d | bellard | MIPS_SYS(sys_accept , 3)
|
1324 | 048f6b4d | bellard | MIPS_SYS(sys_bind , 3)
|
1325 | 048f6b4d | bellard | MIPS_SYS(sys_connect , 3) /* 4170 */ |
1326 | 048f6b4d | bellard | MIPS_SYS(sys_getpeername , 3)
|
1327 | 048f6b4d | bellard | MIPS_SYS(sys_getsockname , 3)
|
1328 | 048f6b4d | bellard | MIPS_SYS(sys_getsockopt , 5)
|
1329 | 048f6b4d | bellard | MIPS_SYS(sys_listen , 2)
|
1330 | 048f6b4d | bellard | MIPS_SYS(sys_recv , 4) /* 4175 */ |
1331 | 048f6b4d | bellard | MIPS_SYS(sys_recvfrom , 6)
|
1332 | 048f6b4d | bellard | MIPS_SYS(sys_recvmsg , 3)
|
1333 | 048f6b4d | bellard | MIPS_SYS(sys_send , 4)
|
1334 | 048f6b4d | bellard | MIPS_SYS(sys_sendmsg , 3)
|
1335 | 048f6b4d | bellard | MIPS_SYS(sys_sendto , 6) /* 4180 */ |
1336 | 048f6b4d | bellard | MIPS_SYS(sys_setsockopt , 5)
|
1337 | 048f6b4d | bellard | MIPS_SYS(sys_shutdown , 2)
|
1338 | 048f6b4d | bellard | MIPS_SYS(sys_socket , 3)
|
1339 | 048f6b4d | bellard | MIPS_SYS(sys_socketpair , 4)
|
1340 | 048f6b4d | bellard | MIPS_SYS(sys_setresuid , 3) /* 4185 */ |
1341 | 048f6b4d | bellard | MIPS_SYS(sys_getresuid , 3)
|
1342 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* was sys_query_module */ |
1343 | 048f6b4d | bellard | MIPS_SYS(sys_poll , 3)
|
1344 | 048f6b4d | bellard | MIPS_SYS(sys_nfsservctl , 3)
|
1345 | 048f6b4d | bellard | MIPS_SYS(sys_setresgid , 3) /* 4190 */ |
1346 | 048f6b4d | bellard | MIPS_SYS(sys_getresgid , 3)
|
1347 | 048f6b4d | bellard | MIPS_SYS(sys_prctl , 5)
|
1348 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigreturn, 0)
|
1349 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigaction, 4)
|
1350 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigprocmask, 4) /* 4195 */ |
1351 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigpending, 2)
|
1352 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigtimedwait, 4)
|
1353 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigqueueinfo, 3)
|
1354 | 048f6b4d | bellard | MIPS_SYS(sys_rt_sigsuspend, 0)
|
1355 | 048f6b4d | bellard | MIPS_SYS(sys_pread64 , 6) /* 4200 */ |
1356 | 048f6b4d | bellard | MIPS_SYS(sys_pwrite64 , 6)
|
1357 | 048f6b4d | bellard | MIPS_SYS(sys_chown , 3)
|
1358 | 048f6b4d | bellard | MIPS_SYS(sys_getcwd , 2)
|
1359 | 048f6b4d | bellard | MIPS_SYS(sys_capget , 2)
|
1360 | 048f6b4d | bellard | MIPS_SYS(sys_capset , 2) /* 4205 */ |
1361 | 048f6b4d | bellard | MIPS_SYS(sys_sigaltstack , 0)
|
1362 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile , 4)
|
1363 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1364 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1365 | 048f6b4d | bellard | MIPS_SYS(sys_mmap2 , 6) /* 4210 */ |
1366 | 048f6b4d | bellard | MIPS_SYS(sys_truncate64 , 4)
|
1367 | 048f6b4d | bellard | MIPS_SYS(sys_ftruncate64 , 4)
|
1368 | 048f6b4d | bellard | MIPS_SYS(sys_stat64 , 2)
|
1369 | 048f6b4d | bellard | MIPS_SYS(sys_lstat64 , 2)
|
1370 | 048f6b4d | bellard | MIPS_SYS(sys_fstat64 , 2) /* 4215 */ |
1371 | 048f6b4d | bellard | MIPS_SYS(sys_pivot_root , 2)
|
1372 | 048f6b4d | bellard | MIPS_SYS(sys_mincore , 3)
|
1373 | 048f6b4d | bellard | MIPS_SYS(sys_madvise , 3)
|
1374 | 048f6b4d | bellard | MIPS_SYS(sys_getdents64 , 3)
|
1375 | 048f6b4d | bellard | MIPS_SYS(sys_fcntl64 , 3) /* 4220 */ |
1376 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0)
|
1377 | 048f6b4d | bellard | MIPS_SYS(sys_gettid , 0)
|
1378 | 048f6b4d | bellard | MIPS_SYS(sys_readahead , 5)
|
1379 | 048f6b4d | bellard | MIPS_SYS(sys_setxattr , 5)
|
1380 | 048f6b4d | bellard | MIPS_SYS(sys_lsetxattr , 5) /* 4225 */ |
1381 | 048f6b4d | bellard | MIPS_SYS(sys_fsetxattr , 5)
|
1382 | 048f6b4d | bellard | MIPS_SYS(sys_getxattr , 4)
|
1383 | 048f6b4d | bellard | MIPS_SYS(sys_lgetxattr , 4)
|
1384 | 048f6b4d | bellard | MIPS_SYS(sys_fgetxattr , 4)
|
1385 | 048f6b4d | bellard | MIPS_SYS(sys_listxattr , 3) /* 4230 */ |
1386 | 048f6b4d | bellard | MIPS_SYS(sys_llistxattr , 3)
|
1387 | 048f6b4d | bellard | MIPS_SYS(sys_flistxattr , 3)
|
1388 | 048f6b4d | bellard | MIPS_SYS(sys_removexattr , 2)
|
1389 | 048f6b4d | bellard | MIPS_SYS(sys_lremovexattr, 2)
|
1390 | 048f6b4d | bellard | MIPS_SYS(sys_fremovexattr, 2) /* 4235 */ |
1391 | 048f6b4d | bellard | MIPS_SYS(sys_tkill , 2)
|
1392 | 048f6b4d | bellard | MIPS_SYS(sys_sendfile64 , 5)
|
1393 | 048f6b4d | bellard | MIPS_SYS(sys_futex , 2)
|
1394 | 048f6b4d | bellard | MIPS_SYS(sys_sched_setaffinity, 3)
|
1395 | 048f6b4d | bellard | MIPS_SYS(sys_sched_getaffinity, 3) /* 4240 */ |
1396 | 048f6b4d | bellard | MIPS_SYS(sys_io_setup , 2)
|
1397 | 048f6b4d | bellard | MIPS_SYS(sys_io_destroy , 1)
|
1398 | 048f6b4d | bellard | MIPS_SYS(sys_io_getevents, 5)
|
1399 | 048f6b4d | bellard | MIPS_SYS(sys_io_submit , 3)
|
1400 | 048f6b4d | bellard | MIPS_SYS(sys_io_cancel , 3) /* 4245 */ |
1401 | 048f6b4d | bellard | MIPS_SYS(sys_exit_group , 1)
|
1402 | 048f6b4d | bellard | MIPS_SYS(sys_lookup_dcookie, 3)
|
1403 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_create, 1)
|
1404 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_ctl , 4)
|
1405 | 048f6b4d | bellard | MIPS_SYS(sys_epoll_wait , 3) /* 4250 */ |
1406 | 048f6b4d | bellard | MIPS_SYS(sys_remap_file_pages, 5)
|
1407 | 048f6b4d | bellard | MIPS_SYS(sys_set_tid_address, 1)
|
1408 | 048f6b4d | bellard | MIPS_SYS(sys_restart_syscall, 0)
|
1409 | 048f6b4d | bellard | MIPS_SYS(sys_fadvise64_64, 7)
|
1410 | 048f6b4d | bellard | MIPS_SYS(sys_statfs64 , 3) /* 4255 */ |
1411 | 048f6b4d | bellard | MIPS_SYS(sys_fstatfs64 , 2)
|
1412 | 048f6b4d | bellard | MIPS_SYS(sys_timer_create, 3)
|
1413 | 048f6b4d | bellard | MIPS_SYS(sys_timer_settime, 4)
|
1414 | 048f6b4d | bellard | MIPS_SYS(sys_timer_gettime, 2)
|
1415 | 048f6b4d | bellard | MIPS_SYS(sys_timer_getoverrun, 1) /* 4260 */ |
1416 | 048f6b4d | bellard | MIPS_SYS(sys_timer_delete, 1)
|
1417 | 048f6b4d | bellard | MIPS_SYS(sys_clock_settime, 2)
|
1418 | 048f6b4d | bellard | MIPS_SYS(sys_clock_gettime, 2)
|
1419 | 048f6b4d | bellard | MIPS_SYS(sys_clock_getres, 2)
|
1420 | 048f6b4d | bellard | MIPS_SYS(sys_clock_nanosleep, 4) /* 4265 */ |
1421 | 048f6b4d | bellard | MIPS_SYS(sys_tgkill , 3)
|
1422 | 048f6b4d | bellard | MIPS_SYS(sys_utimes , 2)
|
1423 | 048f6b4d | bellard | MIPS_SYS(sys_mbind , 4)
|
1424 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_get_mempolicy */ |
1425 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* 4270 sys_set_mempolicy */ |
1426 | 048f6b4d | bellard | MIPS_SYS(sys_mq_open , 4)
|
1427 | 048f6b4d | bellard | MIPS_SYS(sys_mq_unlink , 1)
|
1428 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedsend, 5)
|
1429 | 048f6b4d | bellard | MIPS_SYS(sys_mq_timedreceive, 5)
|
1430 | 048f6b4d | bellard | MIPS_SYS(sys_mq_notify , 2) /* 4275 */ |
1431 | 048f6b4d | bellard | MIPS_SYS(sys_mq_getsetattr, 3)
|
1432 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* sys_vserver */ |
1433 | 048f6b4d | bellard | MIPS_SYS(sys_waitid , 4)
|
1434 | 048f6b4d | bellard | MIPS_SYS(sys_ni_syscall , 0) /* available, was setaltroot */ |
1435 | 048f6b4d | bellard | MIPS_SYS(sys_add_key , 5)
|
1436 | 388bb21a | ths | MIPS_SYS(sys_request_key, 4)
|
1437 | 048f6b4d | bellard | MIPS_SYS(sys_keyctl , 5)
|
1438 | 6f5b89a0 | ths | MIPS_SYS(sys_set_thread_area, 1)
|
1439 | 388bb21a | ths | MIPS_SYS(sys_inotify_init, 0)
|
1440 | 388bb21a | ths | MIPS_SYS(sys_inotify_add_watch, 3) /* 4285 */ |
1441 | 388bb21a | ths | MIPS_SYS(sys_inotify_rm_watch, 2)
|
1442 | 388bb21a | ths | MIPS_SYS(sys_migrate_pages, 4)
|
1443 | 388bb21a | ths | MIPS_SYS(sys_openat, 4)
|
1444 | 388bb21a | ths | MIPS_SYS(sys_mkdirat, 3)
|
1445 | 388bb21a | ths | MIPS_SYS(sys_mknodat, 4) /* 4290 */ |
1446 | 388bb21a | ths | MIPS_SYS(sys_fchownat, 5)
|
1447 | 388bb21a | ths | MIPS_SYS(sys_futimesat, 3)
|
1448 | 388bb21a | ths | MIPS_SYS(sys_fstatat64, 4)
|
1449 | 388bb21a | ths | MIPS_SYS(sys_unlinkat, 3)
|
1450 | 388bb21a | ths | MIPS_SYS(sys_renameat, 4) /* 4295 */ |
1451 | 388bb21a | ths | MIPS_SYS(sys_linkat, 5)
|
1452 | 388bb21a | ths | MIPS_SYS(sys_symlinkat, 3)
|
1453 | 388bb21a | ths | MIPS_SYS(sys_readlinkat, 4)
|
1454 | 388bb21a | ths | MIPS_SYS(sys_fchmodat, 3)
|
1455 | 388bb21a | ths | MIPS_SYS(sys_faccessat, 3) /* 4300 */ |
1456 | 388bb21a | ths | MIPS_SYS(sys_pselect6, 6)
|
1457 | 388bb21a | ths | MIPS_SYS(sys_ppoll, 5)
|
1458 | 388bb21a | ths | MIPS_SYS(sys_unshare, 1)
|
1459 | 388bb21a | ths | MIPS_SYS(sys_splice, 4)
|
1460 | 388bb21a | ths | MIPS_SYS(sys_sync_file_range, 7) /* 4305 */ |
1461 | 388bb21a | ths | MIPS_SYS(sys_tee, 4)
|
1462 | 388bb21a | ths | MIPS_SYS(sys_vmsplice, 4)
|
1463 | 388bb21a | ths | MIPS_SYS(sys_move_pages, 6)
|
1464 | 388bb21a | ths | MIPS_SYS(sys_set_robust_list, 2)
|
1465 | 388bb21a | ths | MIPS_SYS(sys_get_robust_list, 3) /* 4310 */ |
1466 | 388bb21a | ths | MIPS_SYS(sys_kexec_load, 4)
|
1467 | 388bb21a | ths | MIPS_SYS(sys_getcpu, 3)
|
1468 | 388bb21a | ths | MIPS_SYS(sys_epoll_pwait, 6)
|
1469 | 388bb21a | ths | MIPS_SYS(sys_ioprio_set, 3)
|
1470 | 388bb21a | ths | MIPS_SYS(sys_ioprio_get, 2)
|
1471 | 048f6b4d | bellard | }; |
1472 | 048f6b4d | bellard | |
1473 | 048f6b4d | bellard | #undef MIPS_SYS
|
1474 | 048f6b4d | bellard | |
1475 | 048f6b4d | bellard | void cpu_loop(CPUMIPSState *env)
|
1476 | 048f6b4d | bellard | { |
1477 | 048f6b4d | bellard | target_siginfo_t info; |
1478 | 388bb21a | ths | int trapnr, ret;
|
1479 | 048f6b4d | bellard | unsigned int syscall_num; |
1480 | 048f6b4d | bellard | |
1481 | 048f6b4d | bellard | for(;;) {
|
1482 | 048f6b4d | bellard | trapnr = cpu_mips_exec(env); |
1483 | 048f6b4d | bellard | switch(trapnr) {
|
1484 | 048f6b4d | bellard | case EXCP_SYSCALL:
|
1485 | ead9360e | ths | syscall_num = env->gpr[2][env->current_tc] - 4000; |
1486 | ead9360e | ths | env->PC[env->current_tc] += 4;
|
1487 | 388bb21a | ths | if (syscall_num >= sizeof(mips_syscall_args)) { |
1488 | 388bb21a | ths | ret = -ENOSYS; |
1489 | 388bb21a | ths | } else {
|
1490 | 388bb21a | ths | int nb_args;
|
1491 | 992f48a0 | blueswir1 | abi_ulong sp_reg; |
1492 | 992f48a0 | blueswir1 | abi_ulong arg5 = 0, arg6 = 0, arg7 = 0, arg8 = 0; |
1493 | 388bb21a | ths | |
1494 | 388bb21a | ths | nb_args = mips_syscall_args[syscall_num]; |
1495 | ead9360e | ths | sp_reg = env->gpr[29][env->current_tc];
|
1496 | 388bb21a | ths | switch (nb_args) {
|
1497 | 388bb21a | ths | /* these arguments are taken from the stack */
|
1498 | 388bb21a | ths | case 8: arg8 = tgetl(sp_reg + 28); |
1499 | 388bb21a | ths | case 7: arg7 = tgetl(sp_reg + 24); |
1500 | 388bb21a | ths | case 6: arg6 = tgetl(sp_reg + 20); |
1501 | 388bb21a | ths | case 5: arg5 = tgetl(sp_reg + 16); |
1502 | 388bb21a | ths | default:
|
1503 | 388bb21a | ths | break;
|
1504 | 048f6b4d | bellard | } |
1505 | ead9360e | ths | ret = do_syscall(env, env->gpr[2][env->current_tc],
|
1506 | ead9360e | ths | env->gpr[4][env->current_tc],
|
1507 | ead9360e | ths | env->gpr[5][env->current_tc],
|
1508 | ead9360e | ths | env->gpr[6][env->current_tc],
|
1509 | ead9360e | ths | env->gpr[7][env->current_tc],
|
1510 | 388bb21a | ths | arg5, arg6/*, arg7, arg8*/);
|
1511 | 388bb21a | ths | } |
1512 | 388bb21a | ths | if ((unsigned int)ret >= (unsigned int)(-1133)) { |
1513 | ead9360e | ths | env->gpr[7][env->current_tc] = 1; /* error flag */ |
1514 | 388bb21a | ths | ret = -ret; |
1515 | 388bb21a | ths | } else {
|
1516 | ead9360e | ths | env->gpr[7][env->current_tc] = 0; /* error flag */ |
1517 | 048f6b4d | bellard | } |
1518 | ead9360e | ths | env->gpr[2][env->current_tc] = ret;
|
1519 | 048f6b4d | bellard | break;
|
1520 | ca7c2b1b | ths | case EXCP_TLBL:
|
1521 | ca7c2b1b | ths | case EXCP_TLBS:
|
1522 | 6900e84b | bellard | case EXCP_CpU:
|
1523 | 048f6b4d | bellard | case EXCP_RI:
|
1524 | bc1ad2de | bellard | info.si_signo = TARGET_SIGILL; |
1525 | bc1ad2de | bellard | info.si_errno = 0;
|
1526 | bc1ad2de | bellard | info.si_code = 0;
|
1527 | bc1ad2de | bellard | queue_signal(info.si_signo, &info); |
1528 | 048f6b4d | bellard | break;
|
1529 | 106ec879 | bellard | case EXCP_INTERRUPT:
|
1530 | 106ec879 | bellard | /* just indicate that signals should be handled asap */
|
1531 | 106ec879 | bellard | break;
|
1532 | d08b2a28 | pbrook | case EXCP_DEBUG:
|
1533 | d08b2a28 | pbrook | { |
1534 | d08b2a28 | pbrook | int sig;
|
1535 | d08b2a28 | pbrook | |
1536 | d08b2a28 | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1537 | d08b2a28 | pbrook | if (sig)
|
1538 | d08b2a28 | pbrook | { |
1539 | d08b2a28 | pbrook | info.si_signo = sig; |
1540 | d08b2a28 | pbrook | info.si_errno = 0;
|
1541 | d08b2a28 | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
1542 | d08b2a28 | pbrook | queue_signal(info.si_signo, &info); |
1543 | d08b2a28 | pbrook | } |
1544 | d08b2a28 | pbrook | } |
1545 | d08b2a28 | pbrook | break;
|
1546 | 048f6b4d | bellard | default:
|
1547 | 048f6b4d | bellard | // error:
|
1548 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
1549 | 048f6b4d | bellard | trapnr); |
1550 | 048f6b4d | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
1551 | 048f6b4d | bellard | abort(); |
1552 | 048f6b4d | bellard | } |
1553 | 048f6b4d | bellard | process_pending_signals(env); |
1554 | 048f6b4d | bellard | } |
1555 | 048f6b4d | bellard | } |
1556 | 048f6b4d | bellard | #endif
|
1557 | 048f6b4d | bellard | |
1558 | fdf9b3e8 | bellard | #ifdef TARGET_SH4
|
1559 | fdf9b3e8 | bellard | void cpu_loop (CPUState *env)
|
1560 | fdf9b3e8 | bellard | { |
1561 | fdf9b3e8 | bellard | int trapnr, ret;
|
1562 | 355fb23d | pbrook | target_siginfo_t info; |
1563 | 3b46e624 | ths | |
1564 | fdf9b3e8 | bellard | while (1) { |
1565 | fdf9b3e8 | bellard | trapnr = cpu_sh4_exec (env); |
1566 | 3b46e624 | ths | |
1567 | fdf9b3e8 | bellard | switch (trapnr) {
|
1568 | fdf9b3e8 | bellard | case 0x160: |
1569 | 5fafdf24 | ths | ret = do_syscall(env, |
1570 | 5fafdf24 | ths | env->gregs[3],
|
1571 | 5fafdf24 | ths | env->gregs[4],
|
1572 | 5fafdf24 | ths | env->gregs[5],
|
1573 | 5fafdf24 | ths | env->gregs[6],
|
1574 | 5fafdf24 | ths | env->gregs[7],
|
1575 | 5fafdf24 | ths | env->gregs[0],
|
1576 | fdf9b3e8 | bellard | 0);
|
1577 | 9c2a9ea1 | pbrook | env->gregs[0] = ret;
|
1578 | fdf9b3e8 | bellard | env->pc += 2;
|
1579 | fdf9b3e8 | bellard | break;
|
1580 | 355fb23d | pbrook | case EXCP_DEBUG:
|
1581 | 355fb23d | pbrook | { |
1582 | 355fb23d | pbrook | int sig;
|
1583 | 355fb23d | pbrook | |
1584 | 355fb23d | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1585 | 355fb23d | pbrook | if (sig)
|
1586 | 355fb23d | pbrook | { |
1587 | 355fb23d | pbrook | info.si_signo = sig; |
1588 | 355fb23d | pbrook | info.si_errno = 0;
|
1589 | 355fb23d | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
1590 | 355fb23d | pbrook | queue_signal(info.si_signo, &info); |
1591 | 355fb23d | pbrook | } |
1592 | 355fb23d | pbrook | } |
1593 | 355fb23d | pbrook | break;
|
1594 | fdf9b3e8 | bellard | default:
|
1595 | fdf9b3e8 | bellard | printf ("Unhandled trap: 0x%x\n", trapnr);
|
1596 | fdf9b3e8 | bellard | cpu_dump_state(env, stderr, fprintf, 0);
|
1597 | fdf9b3e8 | bellard | exit (1);
|
1598 | fdf9b3e8 | bellard | } |
1599 | fdf9b3e8 | bellard | process_pending_signals (env); |
1600 | fdf9b3e8 | bellard | } |
1601 | fdf9b3e8 | bellard | } |
1602 | fdf9b3e8 | bellard | #endif
|
1603 | fdf9b3e8 | bellard | |
1604 | 48733d19 | ths | #ifdef TARGET_CRIS
|
1605 | 48733d19 | ths | void cpu_loop (CPUState *env)
|
1606 | 48733d19 | ths | { |
1607 | 48733d19 | ths | int trapnr, ret;
|
1608 | 48733d19 | ths | target_siginfo_t info; |
1609 | 48733d19 | ths | |
1610 | 48733d19 | ths | while (1) { |
1611 | 48733d19 | ths | trapnr = cpu_cris_exec (env); |
1612 | 48733d19 | ths | switch (trapnr) {
|
1613 | 48733d19 | ths | case 0xaa: |
1614 | 48733d19 | ths | { |
1615 | 48733d19 | ths | info.si_signo = SIGSEGV; |
1616 | 48733d19 | ths | info.si_errno = 0;
|
1617 | 48733d19 | ths | /* XXX: check env->error_code */
|
1618 | 48733d19 | ths | info.si_code = TARGET_SEGV_MAPERR; |
1619 | 48733d19 | ths | info._sifields._sigfault._addr = env->debug1; |
1620 | 48733d19 | ths | queue_signal(info.si_signo, &info); |
1621 | 48733d19 | ths | } |
1622 | 48733d19 | ths | break;
|
1623 | 48733d19 | ths | case EXCP_BREAK:
|
1624 | 48733d19 | ths | ret = do_syscall(env, |
1625 | 48733d19 | ths | env->regs[9],
|
1626 | 48733d19 | ths | env->regs[10],
|
1627 | 48733d19 | ths | env->regs[11],
|
1628 | 48733d19 | ths | env->regs[12],
|
1629 | 48733d19 | ths | env->regs[13],
|
1630 | 48733d19 | ths | env->pregs[7],
|
1631 | 48733d19 | ths | env->pregs[11]);
|
1632 | 48733d19 | ths | env->regs[10] = ret;
|
1633 | 48733d19 | ths | env->pc += 2;
|
1634 | 48733d19 | ths | break;
|
1635 | 48733d19 | ths | case EXCP_DEBUG:
|
1636 | 48733d19 | ths | { |
1637 | 48733d19 | ths | int sig;
|
1638 | 48733d19 | ths | |
1639 | 48733d19 | ths | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1640 | 48733d19 | ths | if (sig)
|
1641 | 48733d19 | ths | { |
1642 | 48733d19 | ths | info.si_signo = sig; |
1643 | 48733d19 | ths | info.si_errno = 0;
|
1644 | 48733d19 | ths | info.si_code = TARGET_TRAP_BRKPT; |
1645 | 48733d19 | ths | queue_signal(info.si_signo, &info); |
1646 | 48733d19 | ths | } |
1647 | 48733d19 | ths | } |
1648 | 48733d19 | ths | break;
|
1649 | 48733d19 | ths | default:
|
1650 | 48733d19 | ths | printf ("Unhandled trap: 0x%x\n", trapnr);
|
1651 | 48733d19 | ths | cpu_dump_state(env, stderr, fprintf, 0);
|
1652 | 48733d19 | ths | exit (1);
|
1653 | 48733d19 | ths | } |
1654 | 48733d19 | ths | process_pending_signals (env); |
1655 | 48733d19 | ths | } |
1656 | 48733d19 | ths | } |
1657 | 48733d19 | ths | #endif
|
1658 | 48733d19 | ths | |
1659 | e6e5906b | pbrook | #ifdef TARGET_M68K
|
1660 | e6e5906b | pbrook | |
1661 | e6e5906b | pbrook | void cpu_loop(CPUM68KState *env)
|
1662 | e6e5906b | pbrook | { |
1663 | e6e5906b | pbrook | int trapnr;
|
1664 | e6e5906b | pbrook | unsigned int n; |
1665 | e6e5906b | pbrook | target_siginfo_t info; |
1666 | e6e5906b | pbrook | TaskState *ts = env->opaque; |
1667 | 3b46e624 | ths | |
1668 | e6e5906b | pbrook | for(;;) {
|
1669 | e6e5906b | pbrook | trapnr = cpu_m68k_exec(env); |
1670 | e6e5906b | pbrook | switch(trapnr) {
|
1671 | e6e5906b | pbrook | case EXCP_ILLEGAL:
|
1672 | e6e5906b | pbrook | { |
1673 | e6e5906b | pbrook | if (ts->sim_syscalls) {
|
1674 | e6e5906b | pbrook | uint16_t nr; |
1675 | e6e5906b | pbrook | nr = lduw(env->pc + 2);
|
1676 | e6e5906b | pbrook | env->pc += 4;
|
1677 | e6e5906b | pbrook | do_m68k_simcall(env, nr); |
1678 | e6e5906b | pbrook | } else {
|
1679 | e6e5906b | pbrook | goto do_sigill;
|
1680 | e6e5906b | pbrook | } |
1681 | e6e5906b | pbrook | } |
1682 | e6e5906b | pbrook | break;
|
1683 | a87295e8 | pbrook | case EXCP_HALT_INSN:
|
1684 | e6e5906b | pbrook | /* Semihosing syscall. */
|
1685 | a87295e8 | pbrook | env->pc += 4;
|
1686 | e6e5906b | pbrook | do_m68k_semihosting(env, env->dregs[0]);
|
1687 | e6e5906b | pbrook | break;
|
1688 | e6e5906b | pbrook | case EXCP_LINEA:
|
1689 | e6e5906b | pbrook | case EXCP_LINEF:
|
1690 | e6e5906b | pbrook | case EXCP_UNSUPPORTED:
|
1691 | e6e5906b | pbrook | do_sigill:
|
1692 | e6e5906b | pbrook | info.si_signo = SIGILL; |
1693 | e6e5906b | pbrook | info.si_errno = 0;
|
1694 | e6e5906b | pbrook | info.si_code = TARGET_ILL_ILLOPN; |
1695 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->pc; |
1696 | e6e5906b | pbrook | queue_signal(info.si_signo, &info); |
1697 | e6e5906b | pbrook | break;
|
1698 | e6e5906b | pbrook | case EXCP_TRAP0:
|
1699 | e6e5906b | pbrook | { |
1700 | e6e5906b | pbrook | ts->sim_syscalls = 0;
|
1701 | e6e5906b | pbrook | n = env->dregs[0];
|
1702 | e6e5906b | pbrook | env->pc += 2;
|
1703 | 5fafdf24 | ths | env->dregs[0] = do_syscall(env,
|
1704 | 5fafdf24 | ths | n, |
1705 | e6e5906b | pbrook | env->dregs[1],
|
1706 | e6e5906b | pbrook | env->dregs[2],
|
1707 | e6e5906b | pbrook | env->dregs[3],
|
1708 | e6e5906b | pbrook | env->dregs[4],
|
1709 | e6e5906b | pbrook | env->dregs[5],
|
1710 | e6e5906b | pbrook | env->dregs[6]);
|
1711 | e6e5906b | pbrook | } |
1712 | e6e5906b | pbrook | break;
|
1713 | e6e5906b | pbrook | case EXCP_INTERRUPT:
|
1714 | e6e5906b | pbrook | /* just indicate that signals should be handled asap */
|
1715 | e6e5906b | pbrook | break;
|
1716 | e6e5906b | pbrook | case EXCP_ACCESS:
|
1717 | e6e5906b | pbrook | { |
1718 | e6e5906b | pbrook | info.si_signo = SIGSEGV; |
1719 | e6e5906b | pbrook | info.si_errno = 0;
|
1720 | e6e5906b | pbrook | /* XXX: check env->error_code */
|
1721 | e6e5906b | pbrook | info.si_code = TARGET_SEGV_MAPERR; |
1722 | e6e5906b | pbrook | info._sifields._sigfault._addr = env->mmu.ar; |
1723 | e6e5906b | pbrook | queue_signal(info.si_signo, &info); |
1724 | e6e5906b | pbrook | } |
1725 | e6e5906b | pbrook | break;
|
1726 | e6e5906b | pbrook | case EXCP_DEBUG:
|
1727 | e6e5906b | pbrook | { |
1728 | e6e5906b | pbrook | int sig;
|
1729 | e6e5906b | pbrook | |
1730 | e6e5906b | pbrook | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1731 | e6e5906b | pbrook | if (sig)
|
1732 | e6e5906b | pbrook | { |
1733 | e6e5906b | pbrook | info.si_signo = sig; |
1734 | e6e5906b | pbrook | info.si_errno = 0;
|
1735 | e6e5906b | pbrook | info.si_code = TARGET_TRAP_BRKPT; |
1736 | e6e5906b | pbrook | queue_signal(info.si_signo, &info); |
1737 | e6e5906b | pbrook | } |
1738 | e6e5906b | pbrook | } |
1739 | e6e5906b | pbrook | break;
|
1740 | e6e5906b | pbrook | default:
|
1741 | 5fafdf24 | ths | fprintf(stderr, "qemu: unhandled CPU exception 0x%x - aborting\n",
|
1742 | e6e5906b | pbrook | trapnr); |
1743 | e6e5906b | pbrook | cpu_dump_state(env, stderr, fprintf, 0);
|
1744 | e6e5906b | pbrook | abort(); |
1745 | e6e5906b | pbrook | } |
1746 | e6e5906b | pbrook | process_pending_signals(env); |
1747 | e6e5906b | pbrook | } |
1748 | e6e5906b | pbrook | } |
1749 | e6e5906b | pbrook | #endif /* TARGET_M68K */ |
1750 | e6e5906b | pbrook | |
1751 | 7a3148a9 | j_mayer | #ifdef TARGET_ALPHA
|
1752 | 7a3148a9 | j_mayer | void cpu_loop (CPUState *env)
|
1753 | 7a3148a9 | j_mayer | { |
1754 | e96efcfc | j_mayer | int trapnr;
|
1755 | 7a3148a9 | j_mayer | target_siginfo_t info; |
1756 | 3b46e624 | ths | |
1757 | 7a3148a9 | j_mayer | while (1) { |
1758 | 7a3148a9 | j_mayer | trapnr = cpu_alpha_exec (env); |
1759 | 3b46e624 | ths | |
1760 | 7a3148a9 | j_mayer | switch (trapnr) {
|
1761 | 7a3148a9 | j_mayer | case EXCP_RESET:
|
1762 | 7a3148a9 | j_mayer | fprintf(stderr, "Reset requested. Exit\n");
|
1763 | 7a3148a9 | j_mayer | exit(1);
|
1764 | 7a3148a9 | j_mayer | break;
|
1765 | 7a3148a9 | j_mayer | case EXCP_MCHK:
|
1766 | 7a3148a9 | j_mayer | fprintf(stderr, "Machine check exception. Exit\n");
|
1767 | 7a3148a9 | j_mayer | exit(1);
|
1768 | 7a3148a9 | j_mayer | break;
|
1769 | 7a3148a9 | j_mayer | case EXCP_ARITH:
|
1770 | 7a3148a9 | j_mayer | fprintf(stderr, "Arithmetic trap.\n");
|
1771 | 7a3148a9 | j_mayer | exit(1);
|
1772 | 7a3148a9 | j_mayer | break;
|
1773 | 7a3148a9 | j_mayer | case EXCP_HW_INTERRUPT:
|
1774 | 5fafdf24 | ths | fprintf(stderr, "External interrupt. Exit\n");
|
1775 | 7a3148a9 | j_mayer | exit(1);
|
1776 | 7a3148a9 | j_mayer | break;
|
1777 | 7a3148a9 | j_mayer | case EXCP_DFAULT:
|
1778 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU data fault\n");
|
1779 | 7a3148a9 | j_mayer | exit(1);
|
1780 | 7a3148a9 | j_mayer | break;
|
1781 | 7a3148a9 | j_mayer | case EXCP_DTB_MISS_PAL:
|
1782 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU data TLB miss in PALcode\n");
|
1783 | 7a3148a9 | j_mayer | exit(1);
|
1784 | 7a3148a9 | j_mayer | break;
|
1785 | 7a3148a9 | j_mayer | case EXCP_ITB_MISS:
|
1786 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU instruction TLB miss\n");
|
1787 | 7a3148a9 | j_mayer | exit(1);
|
1788 | 7a3148a9 | j_mayer | break;
|
1789 | 7a3148a9 | j_mayer | case EXCP_ITB_ACV:
|
1790 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU instruction access violation\n");
|
1791 | 7a3148a9 | j_mayer | exit(1);
|
1792 | 7a3148a9 | j_mayer | break;
|
1793 | 7a3148a9 | j_mayer | case EXCP_DTB_MISS_NATIVE:
|
1794 | 7a3148a9 | j_mayer | fprintf(stderr, "MMU data TLB miss\n");
|
1795 | 7a3148a9 | j_mayer | exit(1);
|
1796 | 7a3148a9 | j_mayer | break;
|
1797 | 7a3148a9 | j_mayer | case EXCP_UNALIGN:
|
1798 | 7a3148a9 | j_mayer | fprintf(stderr, "Unaligned access\n");
|
1799 | 7a3148a9 | j_mayer | exit(1);
|
1800 | 7a3148a9 | j_mayer | break;
|
1801 | 7a3148a9 | j_mayer | case EXCP_OPCDEC:
|
1802 | 7a3148a9 | j_mayer | fprintf(stderr, "Invalid instruction\n");
|
1803 | 7a3148a9 | j_mayer | exit(1);
|
1804 | 7a3148a9 | j_mayer | break;
|
1805 | 7a3148a9 | j_mayer | case EXCP_FEN:
|
1806 | 7a3148a9 | j_mayer | fprintf(stderr, "Floating-point not allowed\n");
|
1807 | 7a3148a9 | j_mayer | exit(1);
|
1808 | 7a3148a9 | j_mayer | break;
|
1809 | 7a3148a9 | j_mayer | case EXCP_CALL_PAL ... (EXCP_CALL_PALP - 1): |
1810 | 7a3148a9 | j_mayer | fprintf(stderr, "Call to PALcode\n");
|
1811 | 7a3148a9 | j_mayer | call_pal(env, (trapnr >> 6) | 0x80); |
1812 | 7a3148a9 | j_mayer | break;
|
1813 | 7a3148a9 | j_mayer | case EXCP_CALL_PALP ... (EXCP_CALL_PALE - 1): |
1814 | 7f75ffd3 | blueswir1 | fprintf(stderr, "Privileged call to PALcode\n");
|
1815 | 7a3148a9 | j_mayer | exit(1);
|
1816 | 7a3148a9 | j_mayer | break;
|
1817 | 7a3148a9 | j_mayer | case EXCP_DEBUG:
|
1818 | 7a3148a9 | j_mayer | { |
1819 | 7a3148a9 | j_mayer | int sig;
|
1820 | 7a3148a9 | j_mayer | |
1821 | 7a3148a9 | j_mayer | sig = gdb_handlesig (env, TARGET_SIGTRAP); |
1822 | 7a3148a9 | j_mayer | if (sig)
|
1823 | 7a3148a9 | j_mayer | { |
1824 | 7a3148a9 | j_mayer | info.si_signo = sig; |
1825 | 7a3148a9 | j_mayer | info.si_errno = 0;
|
1826 | 7a3148a9 | j_mayer | info.si_code = TARGET_TRAP_BRKPT; |
1827 | 7a3148a9 | j_mayer | queue_signal(info.si_signo, &info); |
1828 | 7a3148a9 | j_mayer | } |
1829 | 7a3148a9 | j_mayer | } |
1830 | 7a3148a9 | j_mayer | break;
|
1831 | 7a3148a9 | j_mayer | default:
|
1832 | 7a3148a9 | j_mayer | printf ("Unhandled trap: 0x%x\n", trapnr);
|
1833 | 7a3148a9 | j_mayer | cpu_dump_state(env, stderr, fprintf, 0);
|
1834 | 7a3148a9 | j_mayer | exit (1);
|
1835 | 7a3148a9 | j_mayer | } |
1836 | 7a3148a9 | j_mayer | process_pending_signals (env); |
1837 | 7a3148a9 | j_mayer | } |
1838 | 7a3148a9 | j_mayer | } |
1839 | 7a3148a9 | j_mayer | #endif /* TARGET_ALPHA */ |
1840 | 7a3148a9 | j_mayer | |
1841 | 31e31b8a | bellard | void usage(void) |
1842 | 31e31b8a | bellard | { |
1843 | 84f2e8ef | bellard | printf("qemu-" TARGET_ARCH " version " QEMU_VERSION ", Copyright (c) 2003-2007 Fabrice Bellard\n" |
1844 | b1f9be31 | j_mayer | "usage: qemu-" TARGET_ARCH " [-h] [-g] [-d opts] [-L path] [-s size] [-cpu model] program [arguments...]\n" |
1845 | b346ff46 | bellard | "Linux CPU emulator (compiled for %s emulation)\n"
|
1846 | d691f669 | bellard | "\n"
|
1847 | b12b6a18 | ths | "-h print this help\n"
|
1848 | b12b6a18 | ths | "-g port wait gdb connection to port\n"
|
1849 | b12b6a18 | ths | "-L path set the elf interpreter prefix (default=%s)\n"
|
1850 | b12b6a18 | ths | "-s size set the stack size in bytes (default=%ld)\n"
|
1851 | b12b6a18 | ths | "-cpu model select CPU (-cpu ? for list)\n"
|
1852 | b12b6a18 | ths | "-drop-ld-preload drop LD_PRELOAD for target process\n"
|
1853 | 54936004 | bellard | "\n"
|
1854 | 54936004 | bellard | "debug options:\n"
|
1855 | c6981055 | bellard | #ifdef USE_CODE_COPY
|
1856 | c6981055 | bellard | "-no-code-copy disable code copy acceleration\n"
|
1857 | c6981055 | bellard | #endif
|
1858 | 6f1f31c0 | bellard | "-d options activate log (logfile=%s)\n"
|
1859 | 54936004 | bellard | "-p pagesize set the host page size to 'pagesize'\n",
|
1860 | b346ff46 | bellard | TARGET_ARCH, |
1861 | 5fafdf24 | ths | interp_prefix, |
1862 | 54936004 | bellard | x86_stack_size, |
1863 | 54936004 | bellard | DEBUG_LOGFILE); |
1864 | 74cd30b8 | bellard | _exit(1);
|
1865 | 31e31b8a | bellard | } |
1866 | 31e31b8a | bellard | |
1867 | 9de5e440 | bellard | /* XXX: currently only used for async signals (see signal.c) */
|
1868 | b346ff46 | bellard | CPUState *global_env; |
1869 | 59faf6d6 | bellard | |
1870 | 851e67a1 | bellard | /* used to free thread contexts */
|
1871 | 851e67a1 | bellard | TaskState *first_task_state; |
1872 | 9de5e440 | bellard | |
1873 | 31e31b8a | bellard | int main(int argc, char **argv) |
1874 | 31e31b8a | bellard | { |
1875 | 31e31b8a | bellard | const char *filename; |
1876 | b1f9be31 | j_mayer | const char *cpu_model; |
1877 | 01ffc75b | bellard | struct target_pt_regs regs1, *regs = ®s1;
|
1878 | 31e31b8a | bellard | struct image_info info1, *info = &info1;
|
1879 | 851e67a1 | bellard | TaskState ts1, *ts = &ts1; |
1880 | b346ff46 | bellard | CPUState *env; |
1881 | 586314f2 | bellard | int optind;
|
1882 | d691f669 | bellard | const char *r; |
1883 | 74c33bed | bellard | int gdbstub_port = 0; |
1884 | b12b6a18 | ths | int drop_ld_preload = 0, environ_count = 0; |
1885 | b12b6a18 | ths | char **target_environ, **wrk, **dst;
|
1886 | b12b6a18 | ths | |
1887 | 31e31b8a | bellard | if (argc <= 1) |
1888 | 31e31b8a | bellard | usage(); |
1889 | f801f97e | bellard | |
1890 | cc38b844 | bellard | /* init debug */
|
1891 | cc38b844 | bellard | cpu_set_log_filename(DEBUG_LOGFILE); |
1892 | cc38b844 | bellard | |
1893 | b1f9be31 | j_mayer | cpu_model = NULL;
|
1894 | 586314f2 | bellard | optind = 1;
|
1895 | d691f669 | bellard | for(;;) {
|
1896 | d691f669 | bellard | if (optind >= argc)
|
1897 | d691f669 | bellard | break;
|
1898 | d691f669 | bellard | r = argv[optind]; |
1899 | d691f669 | bellard | if (r[0] != '-') |
1900 | d691f669 | bellard | break;
|
1901 | 586314f2 | bellard | optind++; |
1902 | d691f669 | bellard | r++; |
1903 | d691f669 | bellard | if (!strcmp(r, "-")) { |
1904 | d691f669 | bellard | break;
|
1905 | d691f669 | bellard | } else if (!strcmp(r, "d")) { |
1906 | e19e89a5 | bellard | int mask;
|
1907 | e19e89a5 | bellard | CPULogItem *item; |
1908 | 6f1f31c0 | bellard | |
1909 | 6f1f31c0 | bellard | if (optind >= argc)
|
1910 | 6f1f31c0 | bellard | break;
|
1911 | 3b46e624 | ths | |
1912 | 6f1f31c0 | bellard | r = argv[optind++]; |
1913 | 6f1f31c0 | bellard | mask = cpu_str_to_log_mask(r); |
1914 | e19e89a5 | bellard | if (!mask) {
|
1915 | e19e89a5 | bellard | printf("Log items (comma separated):\n");
|
1916 | e19e89a5 | bellard | for(item = cpu_log_items; item->mask != 0; item++) { |
1917 | e19e89a5 | bellard | printf("%-10s %s\n", item->name, item->help);
|
1918 | e19e89a5 | bellard | } |
1919 | e19e89a5 | bellard | exit(1);
|
1920 | e19e89a5 | bellard | } |
1921 | e19e89a5 | bellard | cpu_set_log(mask); |
1922 | d691f669 | bellard | } else if (!strcmp(r, "s")) { |
1923 | d691f669 | bellard | r = argv[optind++]; |
1924 | d691f669 | bellard | x86_stack_size = strtol(r, (char **)&r, 0); |
1925 | d691f669 | bellard | if (x86_stack_size <= 0) |
1926 | d691f669 | bellard | usage(); |
1927 | d691f669 | bellard | if (*r == 'M') |
1928 | d691f669 | bellard | x86_stack_size *= 1024 * 1024; |
1929 | d691f669 | bellard | else if (*r == 'k' || *r == 'K') |
1930 | d691f669 | bellard | x86_stack_size *= 1024;
|
1931 | d691f669 | bellard | } else if (!strcmp(r, "L")) { |
1932 | d691f669 | bellard | interp_prefix = argv[optind++]; |
1933 | 54936004 | bellard | } else if (!strcmp(r, "p")) { |
1934 | 83fb7adf | bellard | qemu_host_page_size = atoi(argv[optind++]); |
1935 | 83fb7adf | bellard | if (qemu_host_page_size == 0 || |
1936 | 83fb7adf | bellard | (qemu_host_page_size & (qemu_host_page_size - 1)) != 0) { |
1937 | 54936004 | bellard | fprintf(stderr, "page size must be a power of two\n");
|
1938 | 54936004 | bellard | exit(1);
|
1939 | 54936004 | bellard | } |
1940 | 1fddef4b | bellard | } else if (!strcmp(r, "g")) { |
1941 | 74c33bed | bellard | gdbstub_port = atoi(argv[optind++]); |
1942 | c5937220 | pbrook | } else if (!strcmp(r, "r")) { |
1943 | c5937220 | pbrook | qemu_uname_release = argv[optind++]; |
1944 | b1f9be31 | j_mayer | } else if (!strcmp(r, "cpu")) { |
1945 | b1f9be31 | j_mayer | cpu_model = argv[optind++]; |
1946 | b1f9be31 | j_mayer | if (strcmp(cpu_model, "?") == 0) { |
1947 | c732abe2 | j_mayer | /* XXX: implement xxx_cpu_list for targets that still miss it */
|
1948 | c732abe2 | j_mayer | #if defined(cpu_list)
|
1949 | c732abe2 | j_mayer | cpu_list(stdout, &fprintf); |
1950 | b1f9be31 | j_mayer | #endif
|
1951 | cff4cbed | ths | _exit(1);
|
1952 | b1f9be31 | j_mayer | } |
1953 | b12b6a18 | ths | } else if (!strcmp(r, "drop-ld-preload")) { |
1954 | b12b6a18 | ths | drop_ld_preload = 1;
|
1955 | 5fafdf24 | ths | } else
|
1956 | c6981055 | bellard | #ifdef USE_CODE_COPY
|
1957 | c6981055 | bellard | if (!strcmp(r, "no-code-copy")) { |
1958 | c6981055 | bellard | code_copy_enabled = 0;
|
1959 | 5fafdf24 | ths | } else
|
1960 | c6981055 | bellard | #endif
|
1961 | c6981055 | bellard | { |
1962 | d691f669 | bellard | usage(); |
1963 | d691f669 | bellard | } |
1964 | 586314f2 | bellard | } |
1965 | d691f669 | bellard | if (optind >= argc)
|
1966 | d691f669 | bellard | usage(); |
1967 | 586314f2 | bellard | filename = argv[optind]; |
1968 | 586314f2 | bellard | |
1969 | 31e31b8a | bellard | /* Zero out regs */
|
1970 | 01ffc75b | bellard | memset(regs, 0, sizeof(struct target_pt_regs)); |
1971 | 31e31b8a | bellard | |
1972 | 31e31b8a | bellard | /* Zero out image_info */
|
1973 | 31e31b8a | bellard | memset(info, 0, sizeof(struct image_info)); |
1974 | 31e31b8a | bellard | |
1975 | 74cd30b8 | bellard | /* Scan interp_prefix dir for replacement files. */
|
1976 | 74cd30b8 | bellard | init_paths(interp_prefix); |
1977 | 74cd30b8 | bellard | |
1978 | 83fb7adf | bellard | /* NOTE: we need to init the CPU at this stage to get
|
1979 | 83fb7adf | bellard | qemu_host_page_size */
|
1980 | b346ff46 | bellard | env = cpu_init(); |
1981 | 15338fd7 | bellard | global_env = env; |
1982 | 3b46e624 | ths | |
1983 | b92c47c1 | ths | if(getenv("QEMU_STRACE") ){ |
1984 | b92c47c1 | ths | do_strace=1;
|
1985 | b92c47c1 | ths | } |
1986 | b92c47c1 | ths | |
1987 | b12b6a18 | ths | wrk = environ; |
1988 | b12b6a18 | ths | while (*(wrk++))
|
1989 | b12b6a18 | ths | environ_count++; |
1990 | b12b6a18 | ths | |
1991 | b12b6a18 | ths | target_environ = malloc((environ_count + 1) * sizeof(char *)); |
1992 | b12b6a18 | ths | if (!target_environ)
|
1993 | b12b6a18 | ths | abort(); |
1994 | b12b6a18 | ths | for (wrk = environ, dst = target_environ; *wrk; wrk++) {
|
1995 | b12b6a18 | ths | if (drop_ld_preload && !strncmp(*wrk, "LD_PRELOAD=", 11)) |
1996 | b12b6a18 | ths | continue;
|
1997 | b12b6a18 | ths | *(dst++) = strdup(*wrk); |
1998 | b12b6a18 | ths | } |
1999 | 403f14ef | ths | *dst = NULL; /* NULL terminate target_environ */ |
2000 | b12b6a18 | ths | |
2001 | b12b6a18 | ths | if (loader_exec(filename, argv+optind, target_environ, regs, info) != 0) { |
2002 | b12b6a18 | ths | printf("Error loading %s\n", filename);
|
2003 | b12b6a18 | ths | _exit(1);
|
2004 | b12b6a18 | ths | } |
2005 | b12b6a18 | ths | |
2006 | b12b6a18 | ths | for (wrk = target_environ; *wrk; wrk++) {
|
2007 | b12b6a18 | ths | free(*wrk); |
2008 | 31e31b8a | bellard | } |
2009 | 3b46e624 | ths | |
2010 | b12b6a18 | ths | free(target_environ); |
2011 | b12b6a18 | ths | |
2012 | 4b74fe1f | bellard | if (loglevel) {
|
2013 | 54936004 | bellard | page_dump(logfile); |
2014 | 3b46e624 | ths | |
2015 | 3d177870 | j_mayer | fprintf(logfile, "start_brk 0x" TARGET_FMT_lx "\n", info->start_brk); |
2016 | 3d177870 | j_mayer | fprintf(logfile, "end_code 0x" TARGET_FMT_lx "\n", info->end_code); |
2017 | 3d177870 | j_mayer | fprintf(logfile, "start_code 0x" TARGET_FMT_lx "\n", |
2018 | 3d177870 | j_mayer | info->start_code); |
2019 | 3d177870 | j_mayer | fprintf(logfile, "start_data 0x" TARGET_FMT_lx "\n", |
2020 | 3d177870 | j_mayer | info->start_data); |
2021 | 3d177870 | j_mayer | fprintf(logfile, "end_data 0x" TARGET_FMT_lx "\n", info->end_data); |
2022 | 3d177870 | j_mayer | fprintf(logfile, "start_stack 0x" TARGET_FMT_lx "\n", |
2023 | 3d177870 | j_mayer | info->start_stack); |
2024 | 3d177870 | j_mayer | fprintf(logfile, "brk 0x" TARGET_FMT_lx "\n", info->brk); |
2025 | 3d177870 | j_mayer | fprintf(logfile, "entry 0x" TARGET_FMT_lx "\n", info->entry); |
2026 | 4b74fe1f | bellard | } |
2027 | 31e31b8a | bellard | |
2028 | 53a5960a | pbrook | target_set_brk(info->brk); |
2029 | 31e31b8a | bellard | syscall_init(); |
2030 | 66fb9763 | bellard | signal_init(); |
2031 | 31e31b8a | bellard | |
2032 | 851e67a1 | bellard | /* build Task State */
|
2033 | 851e67a1 | bellard | memset(ts, 0, sizeof(TaskState)); |
2034 | 851e67a1 | bellard | env->opaque = ts; |
2035 | 851e67a1 | bellard | ts->used = 1;
|
2036 | 978efd6a | pbrook | ts->info = info; |
2037 | 59faf6d6 | bellard | env->user_mode_only = 1;
|
2038 | 3b46e624 | ths | |
2039 | b346ff46 | bellard | #if defined(TARGET_I386)
|
2040 | 2e255c6b | bellard | cpu_x86_set_cpl(env, 3);
|
2041 | 2e255c6b | bellard | |
2042 | 3802ce26 | bellard | env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
|
2043 | 1bde465e | bellard | env->hflags |= HF_PE_MASK; |
2044 | 1bde465e | bellard | if (env->cpuid_features & CPUID_SSE) {
|
2045 | 1bde465e | bellard | env->cr[4] |= CR4_OSFXSR_MASK;
|
2046 | 1bde465e | bellard | env->hflags |= HF_OSFXSR_MASK; |
2047 | 1bde465e | bellard | } |
2048 | 1bde465e | bellard | |
2049 | 415e561f | bellard | /* flags setup : we activate the IRQs by default as in user mode */
|
2050 | 415e561f | bellard | env->eflags |= IF_MASK; |
2051 | 3b46e624 | ths | |
2052 | 6dbad63e | bellard | /* linux register setup */
|
2053 | 84409ddb | j_mayer | #if defined(TARGET_X86_64)
|
2054 | 84409ddb | j_mayer | env->regs[R_EAX] = regs->rax; |
2055 | 84409ddb | j_mayer | env->regs[R_EBX] = regs->rbx; |
2056 | 84409ddb | j_mayer | env->regs[R_ECX] = regs->rcx; |
2057 | 84409ddb | j_mayer | env->regs[R_EDX] = regs->rdx; |
2058 | 84409ddb | j_mayer | env->regs[R_ESI] = regs->rsi; |
2059 | 84409ddb | j_mayer | env->regs[R_EDI] = regs->rdi; |
2060 | 84409ddb | j_mayer | env->regs[R_EBP] = regs->rbp; |
2061 | 84409ddb | j_mayer | env->regs[R_ESP] = regs->rsp; |
2062 | 84409ddb | j_mayer | env->eip = regs->rip; |
2063 | 84409ddb | j_mayer | #else
|
2064 | 0ecfa993 | bellard | env->regs[R_EAX] = regs->eax; |
2065 | 0ecfa993 | bellard | env->regs[R_EBX] = regs->ebx; |
2066 | 0ecfa993 | bellard | env->regs[R_ECX] = regs->ecx; |
2067 | 0ecfa993 | bellard | env->regs[R_EDX] = regs->edx; |
2068 | 0ecfa993 | bellard | env->regs[R_ESI] = regs->esi; |
2069 | 0ecfa993 | bellard | env->regs[R_EDI] = regs->edi; |
2070 | 0ecfa993 | bellard | env->regs[R_EBP] = regs->ebp; |
2071 | 0ecfa993 | bellard | env->regs[R_ESP] = regs->esp; |
2072 | dab2ed99 | bellard | env->eip = regs->eip; |
2073 | 84409ddb | j_mayer | #endif
|
2074 | 31e31b8a | bellard | |
2075 | f4beb510 | bellard | /* linux interrupt setup */
|
2076 | 53a5960a | pbrook | env->idt.base = h2g(idt_table); |
2077 | f4beb510 | bellard | env->idt.limit = sizeof(idt_table) - 1; |
2078 | f4beb510 | bellard | set_idt(0, 0); |
2079 | f4beb510 | bellard | set_idt(1, 0); |
2080 | f4beb510 | bellard | set_idt(2, 0); |
2081 | f4beb510 | bellard | set_idt(3, 3); |
2082 | f4beb510 | bellard | set_idt(4, 3); |
2083 | f4beb510 | bellard | set_idt(5, 3); |
2084 | f4beb510 | bellard | set_idt(6, 0); |
2085 | f4beb510 | bellard | set_idt(7, 0); |
2086 | f4beb510 | bellard | set_idt(8, 0); |
2087 | f4beb510 | bellard | set_idt(9, 0); |
2088 | f4beb510 | bellard | set_idt(10, 0); |
2089 | f4beb510 | bellard | set_idt(11, 0); |
2090 | f4beb510 | bellard | set_idt(12, 0); |
2091 | f4beb510 | bellard | set_idt(13, 0); |
2092 | f4beb510 | bellard | set_idt(14, 0); |
2093 | f4beb510 | bellard | set_idt(15, 0); |
2094 | f4beb510 | bellard | set_idt(16, 0); |
2095 | f4beb510 | bellard | set_idt(17, 0); |
2096 | f4beb510 | bellard | set_idt(18, 0); |
2097 | f4beb510 | bellard | set_idt(19, 0); |
2098 | f4beb510 | bellard | set_idt(0x80, 3); |
2099 | f4beb510 | bellard | |
2100 | 6dbad63e | bellard | /* linux segment setup */
|
2101 | 53a5960a | pbrook | env->gdt.base = h2g(gdt_table); |
2102 | 6dbad63e | bellard | env->gdt.limit = sizeof(gdt_table) - 1; |
2103 | f4beb510 | bellard | write_dt(&gdt_table[__USER_CS >> 3], 0, 0xfffff, |
2104 | 5fafdf24 | ths | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
2105 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0xa << DESC_TYPE_SHIFT)); |
2106 | f4beb510 | bellard | write_dt(&gdt_table[__USER_DS >> 3], 0, 0xfffff, |
2107 | 5fafdf24 | ths | DESC_G_MASK | DESC_B_MASK | DESC_P_MASK | DESC_S_MASK | |
2108 | f4beb510 | bellard | (3 << DESC_DPL_SHIFT) | (0x2 << DESC_TYPE_SHIFT)); |
2109 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_CS, __USER_CS); |
2110 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_DS, __USER_DS); |
2111 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_ES, __USER_DS); |
2112 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_SS, __USER_DS); |
2113 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_FS, __USER_DS); |
2114 | 6dbad63e | bellard | cpu_x86_load_seg(env, R_GS, __USER_DS); |
2115 | 92ccca6a | bellard | |
2116 | d6eb40f6 | ths | /* This hack makes Wine work... */
|
2117 | d6eb40f6 | ths | env->segs[R_FS].selector = 0;
|
2118 | b346ff46 | bellard | #elif defined(TARGET_ARM)
|
2119 | b346ff46 | bellard | { |
2120 | b346ff46 | bellard | int i;
|
2121 | b1f9be31 | j_mayer | if (cpu_model == NULL) |
2122 | b1f9be31 | j_mayer | cpu_model = "arm926";
|
2123 | b1f9be31 | j_mayer | cpu_arm_set_model(env, cpu_model); |
2124 | b5ff1b31 | bellard | cpsr_write(env, regs->uregs[16], 0xffffffff); |
2125 | b346ff46 | bellard | for(i = 0; i < 16; i++) { |
2126 | b346ff46 | bellard | env->regs[i] = regs->uregs[i]; |
2127 | b346ff46 | bellard | } |
2128 | b346ff46 | bellard | } |
2129 | 93ac68bc | bellard | #elif defined(TARGET_SPARC)
|
2130 | 060366c5 | bellard | { |
2131 | 060366c5 | bellard | int i;
|
2132 | 925fb139 | blueswir1 | const sparc_def_t *def;
|
2133 | 925fb139 | blueswir1 | #ifdef TARGET_SPARC64
|
2134 | 925fb139 | blueswir1 | if (cpu_model == NULL) |
2135 | 925fb139 | blueswir1 | cpu_model = "TI UltraSparc II";
|
2136 | 925fb139 | blueswir1 | #else
|
2137 | 925fb139 | blueswir1 | if (cpu_model == NULL) |
2138 | 925fb139 | blueswir1 | cpu_model = "Fujitsu MB86904";
|
2139 | 925fb139 | blueswir1 | #endif
|
2140 | 925fb139 | blueswir1 | sparc_find_by_name(cpu_model, &def); |
2141 | 925fb139 | blueswir1 | if (def == NULL) { |
2142 | 925fb139 | blueswir1 | fprintf(stderr, "Unable to find Sparc CPU definition\n");
|
2143 | 925fb139 | blueswir1 | exit(1);
|
2144 | 925fb139 | blueswir1 | } |
2145 | 952a328f | blueswir1 | cpu_sparc_register(env, def, 0);
|
2146 | 060366c5 | bellard | env->pc = regs->pc; |
2147 | 060366c5 | bellard | env->npc = regs->npc; |
2148 | 060366c5 | bellard | env->y = regs->y; |
2149 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
2150 | 060366c5 | bellard | env->gregs[i] = regs->u_regs[i]; |
2151 | 060366c5 | bellard | for(i = 0; i < 8; i++) |
2152 | 060366c5 | bellard | env->regwptr[i] = regs->u_regs[i + 8];
|
2153 | 060366c5 | bellard | } |
2154 | 67867308 | bellard | #elif defined(TARGET_PPC)
|
2155 | 67867308 | bellard | { |
2156 | 3fc6c082 | bellard | ppc_def_t *def; |
2157 | 67867308 | bellard | int i;
|
2158 | 3fc6c082 | bellard | |
2159 | 3fc6c082 | bellard | /* Choose and initialise CPU */
|
2160 | b1f9be31 | j_mayer | if (cpu_model == NULL) |
2161 | b1f9be31 | j_mayer | cpu_model = "750";
|
2162 | b1f9be31 | j_mayer | ppc_find_by_name(cpu_model, &def); |
2163 | 3fc6c082 | bellard | if (def == NULL) { |
2164 | c68ea704 | bellard | cpu_abort(env, |
2165 | 3fc6c082 | bellard | "Unable to find PowerPC CPU definition\n");
|
2166 | 3fc6c082 | bellard | } |
2167 | c68ea704 | bellard | cpu_ppc_register(env, def); |
2168 | 1cc8e6f0 | j_mayer | cpu_ppc_reset(env); |
2169 | 0411a972 | j_mayer | #if defined(TARGET_PPC64)
|
2170 | 0411a972 | j_mayer | #if defined(TARGET_ABI32)
|
2171 | 0411a972 | j_mayer | env->msr &= ~((target_ulong)1 << MSR_SF);
|
2172 | e85e7c6e | j_mayer | #else
|
2173 | 0411a972 | j_mayer | env->msr |= (target_ulong)1 << MSR_SF;
|
2174 | 0411a972 | j_mayer | #endif
|
2175 | 84409ddb | j_mayer | #endif
|
2176 | 67867308 | bellard | env->nip = regs->nip; |
2177 | 67867308 | bellard | for(i = 0; i < 32; i++) { |
2178 | 67867308 | bellard | env->gpr[i] = regs->gpr[i]; |
2179 | 67867308 | bellard | } |
2180 | 67867308 | bellard | } |
2181 | e6e5906b | pbrook | #elif defined(TARGET_M68K)
|
2182 | e6e5906b | pbrook | { |
2183 | 0633879f | pbrook | if (cpu_model == NULL) |
2184 | 0402f767 | pbrook | cpu_model = "any";
|
2185 | 0633879f | pbrook | if (cpu_m68k_set_model(env, cpu_model)) {
|
2186 | e6e5906b | pbrook | cpu_abort(cpu_single_env, |
2187 | e6e5906b | pbrook | "Unable to find m68k CPU definition\n");
|
2188 | e6e5906b | pbrook | } |
2189 | e6e5906b | pbrook | env->pc = regs->pc; |
2190 | e6e5906b | pbrook | env->dregs[0] = regs->d0;
|
2191 | e6e5906b | pbrook | env->dregs[1] = regs->d1;
|
2192 | e6e5906b | pbrook | env->dregs[2] = regs->d2;
|
2193 | e6e5906b | pbrook | env->dregs[3] = regs->d3;
|
2194 | e6e5906b | pbrook | env->dregs[4] = regs->d4;
|
2195 | e6e5906b | pbrook | env->dregs[5] = regs->d5;
|
2196 | e6e5906b | pbrook | env->dregs[6] = regs->d6;
|
2197 | e6e5906b | pbrook | env->dregs[7] = regs->d7;
|
2198 | e6e5906b | pbrook | env->aregs[0] = regs->a0;
|
2199 | e6e5906b | pbrook | env->aregs[1] = regs->a1;
|
2200 | e6e5906b | pbrook | env->aregs[2] = regs->a2;
|
2201 | e6e5906b | pbrook | env->aregs[3] = regs->a3;
|
2202 | e6e5906b | pbrook | env->aregs[4] = regs->a4;
|
2203 | e6e5906b | pbrook | env->aregs[5] = regs->a5;
|
2204 | e6e5906b | pbrook | env->aregs[6] = regs->a6;
|
2205 | e6e5906b | pbrook | env->aregs[7] = regs->usp;
|
2206 | e6e5906b | pbrook | env->sr = regs->sr; |
2207 | e6e5906b | pbrook | ts->sim_syscalls = 1;
|
2208 | e6e5906b | pbrook | } |
2209 | 048f6b4d | bellard | #elif defined(TARGET_MIPS)
|
2210 | 048f6b4d | bellard | { |
2211 | cff4cbed | ths | mips_def_t *def; |
2212 | 048f6b4d | bellard | int i;
|
2213 | 048f6b4d | bellard | |
2214 | cff4cbed | ths | /* Choose and initialise CPU */
|
2215 | cff4cbed | ths | if (cpu_model == NULL) |
2216 | 540635ba | ths | #if defined(TARGET_MIPSN32) || defined(TARGET_MIPS64)
|
2217 | 540635ba | ths | cpu_model = "20Kc";
|
2218 | 540635ba | ths | #else
|
2219 | cff4cbed | ths | cpu_model = "24Kf";
|
2220 | 540635ba | ths | #endif
|
2221 | cff4cbed | ths | mips_find_by_name(cpu_model, &def); |
2222 | cff4cbed | ths | if (def == NULL) |
2223 | cff4cbed | ths | cpu_abort(env, "Unable to find MIPS CPU definition\n");
|
2224 | cff4cbed | ths | cpu_mips_register(env, def); |
2225 | cff4cbed | ths | |
2226 | 048f6b4d | bellard | for(i = 0; i < 32; i++) { |
2227 | ead9360e | ths | env->gpr[i][env->current_tc] = regs->regs[i]; |
2228 | 048f6b4d | bellard | } |
2229 | ead9360e | ths | env->PC[env->current_tc] = regs->cp0_epc; |
2230 | 048f6b4d | bellard | } |
2231 | fdf9b3e8 | bellard | #elif defined(TARGET_SH4)
|
2232 | fdf9b3e8 | bellard | { |
2233 | fdf9b3e8 | bellard | int i;
|
2234 | fdf9b3e8 | bellard | |
2235 | fdf9b3e8 | bellard | for(i = 0; i < 16; i++) { |
2236 | fdf9b3e8 | bellard | env->gregs[i] = regs->regs[i]; |
2237 | fdf9b3e8 | bellard | } |
2238 | fdf9b3e8 | bellard | env->pc = regs->pc; |
2239 | fdf9b3e8 | bellard | } |
2240 | 7a3148a9 | j_mayer | #elif defined(TARGET_ALPHA)
|
2241 | 7a3148a9 | j_mayer | { |
2242 | 7a3148a9 | j_mayer | int i;
|
2243 | 7a3148a9 | j_mayer | |
2244 | 7a3148a9 | j_mayer | for(i = 0; i < 28; i++) { |
2245 | 992f48a0 | blueswir1 | env->ir[i] = ((abi_ulong *)regs)[i]; |
2246 | 7a3148a9 | j_mayer | } |
2247 | 7a3148a9 | j_mayer | env->ipr[IPR_USP] = regs->usp; |
2248 | 7a3148a9 | j_mayer | env->ir[30] = regs->usp;
|
2249 | 7a3148a9 | j_mayer | env->pc = regs->pc; |
2250 | 7a3148a9 | j_mayer | env->unique = regs->unique; |
2251 | 7a3148a9 | j_mayer | } |
2252 | 48733d19 | ths | #elif defined(TARGET_CRIS)
|
2253 | 48733d19 | ths | { |
2254 | 48733d19 | ths | env->regs[0] = regs->r0;
|
2255 | 48733d19 | ths | env->regs[1] = regs->r1;
|
2256 | 48733d19 | ths | env->regs[2] = regs->r2;
|
2257 | 48733d19 | ths | env->regs[3] = regs->r3;
|
2258 | 48733d19 | ths | env->regs[4] = regs->r4;
|
2259 | 48733d19 | ths | env->regs[5] = regs->r5;
|
2260 | 48733d19 | ths | env->regs[6] = regs->r6;
|
2261 | 48733d19 | ths | env->regs[7] = regs->r7;
|
2262 | 48733d19 | ths | env->regs[8] = regs->r8;
|
2263 | 48733d19 | ths | env->regs[9] = regs->r9;
|
2264 | 48733d19 | ths | env->regs[10] = regs->r10;
|
2265 | 48733d19 | ths | env->regs[11] = regs->r11;
|
2266 | 48733d19 | ths | env->regs[12] = regs->r12;
|
2267 | 48733d19 | ths | env->regs[13] = regs->r13;
|
2268 | 48733d19 | ths | env->regs[14] = info->start_stack;
|
2269 | 48733d19 | ths | env->regs[15] = regs->acr;
|
2270 | 48733d19 | ths | env->pc = regs->erp; |
2271 | 48733d19 | ths | } |
2272 | b346ff46 | bellard | #else
|
2273 | b346ff46 | bellard | #error unsupported target CPU
|
2274 | b346ff46 | bellard | #endif
|
2275 | 31e31b8a | bellard | |
2276 | a87295e8 | pbrook | #if defined(TARGET_ARM) || defined(TARGET_M68K)
|
2277 | a87295e8 | pbrook | ts->stack_base = info->start_stack; |
2278 | a87295e8 | pbrook | ts->heap_base = info->brk; |
2279 | a87295e8 | pbrook | /* This will be filled in on the first SYS_HEAPINFO call. */
|
2280 | a87295e8 | pbrook | ts->heap_limit = 0;
|
2281 | a87295e8 | pbrook | #endif
|
2282 | a87295e8 | pbrook | |
2283 | 74c33bed | bellard | if (gdbstub_port) {
|
2284 | 74c33bed | bellard | gdbserver_start (gdbstub_port); |
2285 | 1fddef4b | bellard | gdb_handlesig(env, 0);
|
2286 | 1fddef4b | bellard | } |
2287 | 1b6b029e | bellard | cpu_loop(env); |
2288 | 1b6b029e | bellard | /* never exits */
|
2289 | 31e31b8a | bellard | return 0; |
2290 | 31e31b8a | bellard | } |