root / target-ppc / kvm.c @ ba5e5090
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/*
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* PowerPC implementation of KVM hooks
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*
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* Copyright IBM Corp. 2007
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*
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* Authors:
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* Jerone Young <jyoung5@us.ibm.com>
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* Christian Ehrhardt <ehrhardt@linux.vnet.ibm.com>
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* Hollis Blanchard <hollisb@us.ibm.com>
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or later.
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* See the COPYING file in the top-level directory.
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*
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*/
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#include <sys/types.h> |
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#include <sys/ioctl.h> |
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#include <sys/mman.h> |
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#include <linux/kvm.h> |
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#include "qemu-common.h" |
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#include "qemu-timer.h" |
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#include "sysemu.h" |
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#include "kvm.h" |
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#include "kvm_ppc.h" |
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#include "cpu.h" |
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#include "device_tree.h" |
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//#define DEBUG_KVM
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#ifdef DEBUG_KVM
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#define dprintf(fmt, ...) \
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do { fprintf(stderr, fmt, ## __VA_ARGS__); } while (0) |
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#else
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#define dprintf(fmt, ...) \
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do { } while (0) |
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#endif
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int kvm_arch_init(KVMState *s, int smp_cpus) |
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{ |
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return 0; |
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} |
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int kvm_arch_init_vcpu(CPUState *cenv)
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{ |
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int ret = 0; |
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struct kvm_sregs sregs;
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sregs.pvr = cenv->spr[SPR_PVR]; |
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ret = kvm_vcpu_ioctl(cenv, KVM_SET_SREGS, &sregs); |
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return ret;
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} |
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void kvm_arch_reset_vcpu(CPUState *env)
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{ |
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} |
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int kvm_arch_put_registers(CPUState *env)
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{ |
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struct kvm_regs regs;
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int ret;
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int i;
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ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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regs.ctr = env->ctr; |
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regs.lr = env->lr; |
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regs.xer = env->xer; |
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regs.msr = env->msr; |
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regs.pc = env->nip; |
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regs.srr0 = env->spr[SPR_SRR0]; |
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regs.srr1 = env->spr[SPR_SRR1]; |
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regs.sprg0 = env->spr[SPR_SPRG0]; |
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regs.sprg1 = env->spr[SPR_SPRG1]; |
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regs.sprg2 = env->spr[SPR_SPRG2]; |
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regs.sprg3 = env->spr[SPR_SPRG3]; |
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regs.sprg4 = env->spr[SPR_SPRG4]; |
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regs.sprg5 = env->spr[SPR_SPRG5]; |
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regs.sprg6 = env->spr[SPR_SPRG6]; |
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regs.sprg7 = env->spr[SPR_SPRG7]; |
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for (i = 0;i < 32; i++) |
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regs.gpr[i] = env->gpr[i]; |
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ret = kvm_vcpu_ioctl(env, KVM_SET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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return ret;
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} |
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int kvm_arch_get_registers(CPUState *env)
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{ |
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struct kvm_regs regs;
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struct kvm_sregs sregs;
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uint32_t i, ret; |
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ret = kvm_vcpu_ioctl(env, KVM_GET_REGS, ®s); |
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if (ret < 0) |
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return ret;
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ret = kvm_vcpu_ioctl(env, KVM_GET_SREGS, &sregs); |
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if (ret < 0) |
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return ret;
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env->ctr = regs.ctr; |
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env->lr = regs.lr; |
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env->xer = regs.xer; |
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env->msr = regs.msr; |
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env->nip = regs.pc; |
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env->spr[SPR_SRR0] = regs.srr0; |
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env->spr[SPR_SRR1] = regs.srr1; |
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env->spr[SPR_SPRG0] = regs.sprg0; |
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env->spr[SPR_SPRG1] = regs.sprg1; |
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env->spr[SPR_SPRG2] = regs.sprg2; |
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env->spr[SPR_SPRG3] = regs.sprg3; |
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env->spr[SPR_SPRG4] = regs.sprg4; |
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env->spr[SPR_SPRG5] = regs.sprg5; |
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env->spr[SPR_SPRG6] = regs.sprg6; |
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env->spr[SPR_SPRG7] = regs.sprg7; |
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for (i = 0;i < 32; i++) |
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env->gpr[i] = regs.gpr[i]; |
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#ifdef KVM_CAP_PPC_SEGSTATE
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if (kvm_check_extension(env->kvm_state, KVM_CAP_PPC_SEGSTATE)) {
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env->sdr1 = sregs.u.s.sdr1; |
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/* Sync SLB */
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for (i = 0; i < 64; i++) { |
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ppc_store_slb(env, sregs.u.s.ppc64.slb[i].slbe, |
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sregs.u.s.ppc64.slb[i].slbv); |
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} |
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/* Sync SRs */
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for (i = 0; i < 16; i++) { |
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env->sr[i] = sregs.u.s.ppc32.sr[i]; |
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} |
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/* Sync BATs */
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for (i = 0; i < 8; i++) { |
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env->DBAT[0][i] = sregs.u.s.ppc32.dbat[i] & 0xffffffff; |
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env->DBAT[1][i] = sregs.u.s.ppc32.dbat[i] >> 32; |
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env->IBAT[0][i] = sregs.u.s.ppc32.ibat[i] & 0xffffffff; |
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env->IBAT[1][i] = sregs.u.s.ppc32.ibat[i] >> 32; |
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} |
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} |
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#endif
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return 0; |
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} |
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#if defined(TARGET_PPCEMB)
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#define PPC_INPUT_INT PPC40x_INPUT_INT
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#elif defined(TARGET_PPC64)
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#define PPC_INPUT_INT PPC970_INPUT_INT
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#else
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#define PPC_INPUT_INT PPC6xx_INPUT_INT
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#endif
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int kvm_arch_pre_run(CPUState *env, struct kvm_run *run) |
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{ |
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int r;
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unsigned irq;
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/* PowerPC Qemu tracks the various core input pins (interrupt, critical
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* interrupt, reset, etc) in PPC-specific env->irq_input_state. */
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if (run->ready_for_interrupt_injection &&
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(env->interrupt_request & CPU_INTERRUPT_HARD) && |
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(env->irq_input_state & (1<<PPC_INPUT_INT)))
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{ |
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/* For now KVM disregards the 'irq' argument. However, in the
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* future KVM could cache it in-kernel to avoid a heavyweight exit
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* when reading the UIC.
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*/
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irq = -1U;
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dprintf("injected interrupt %d\n", irq);
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r = kvm_vcpu_ioctl(env, KVM_INTERRUPT, &irq); |
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if (r < 0) |
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printf("cpu %d fail inject %x\n", env->cpu_index, irq);
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} |
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/* We don't know if there are more interrupts pending after this. However,
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* the guest will return to userspace in the course of handling this one
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* anyways, so we will get a chance to deliver the rest. */
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return 0; |
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} |
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int kvm_arch_post_run(CPUState *env, struct kvm_run *run) |
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{ |
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return 0; |
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} |
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static int kvmppc_handle_halt(CPUState *env) |
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{ |
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if (!(env->interrupt_request & CPU_INTERRUPT_HARD) && (msr_ee)) {
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env->halted = 1;
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env->exception_index = EXCP_HLT; |
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} |
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return 1; |
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} |
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/* map dcr access to existing qemu dcr emulation */
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static int kvmppc_handle_dcr_read(CPUState *env, uint32_t dcrn, uint32_t *data) |
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{ |
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if (ppc_dcr_read(env->dcr_env, dcrn, data) < 0) |
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fprintf(stderr, "Read to unhandled DCR (0x%x)\n", dcrn);
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return 1; |
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} |
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static int kvmppc_handle_dcr_write(CPUState *env, uint32_t dcrn, uint32_t data) |
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{ |
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if (ppc_dcr_write(env->dcr_env, dcrn, data) < 0) |
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fprintf(stderr, "Write to unhandled DCR (0x%x)\n", dcrn);
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return 1; |
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} |
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int kvm_arch_handle_exit(CPUState *env, struct kvm_run *run) |
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{ |
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int ret = 0; |
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switch (run->exit_reason) {
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case KVM_EXIT_DCR:
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if (run->dcr.is_write) {
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dprintf("handle dcr write\n");
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ret = kvmppc_handle_dcr_write(env, run->dcr.dcrn, run->dcr.data); |
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} else {
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dprintf("handle dcr read\n");
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ret = kvmppc_handle_dcr_read(env, run->dcr.dcrn, &run->dcr.data); |
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} |
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break;
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case KVM_EXIT_HLT:
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dprintf("handle halt\n");
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ret = kvmppc_handle_halt(env); |
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break;
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} |
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return ret;
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} |
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