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# Date Author Comment
bbc863bf 02/23/2013 07:25 pm Richard Henderson

tcg-i386: Always implement 32-bit multiword ops

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
163fa4b0 01/12/2013 02:45 pm Paolo Bonzini

tcg-i386: use LEA for 3-operand 64-bit addition

Signed-off-by: Paolo Bonzini <>
Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
76a347e1 12/29/2012 02:21 pm Richard Henderson

tcg-i386: Perform cmov detection at runtime for 32-bit.

Existing compile-time detection is spotty at best. Convert
it all to runtime detection instead.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
022c62cb 12/19/2012 09:31 am Paolo Bonzini

exec: move include files to include/exec/

Signed-off-by: Paolo Bonzini <>
b76f0d8c 11/03/2012 11:44 am Yeongkyoon Lee

tcg: Optimize qemu_ld/st by generating slow paths at the end of a block

Add optimized TCG qemu_ld/st generation which locates the code of TLB miss
cases at the end of a block after generating the other IRs.
Currently, this optimization supports only i386 and x86_64 hosts....
44b37ace 10/28/2012 03:54 pm Richard Henderson

tcg-i386: Use %gs prefixes for x86_64 GUEST_BASE

When we allocate a reserved_va for the guest, the kernel will likely
choose an address well above 4G. At which point we must use a pair
of movabsq+addq to form the host address. If we have OS support,
set up a segment register to point to guest_base instead....
17b91491 10/28/2012 03:54 pm Aurelien Jarno

tcg/i386: remove ld/st third argument register constraint

On x86_64, remove the constraint on the third argument register which
is not needed:
- For loads the helper arguments are env, addr, mem_idx. The addr
value should not be in the two first argument registers as they are...
166792f7 10/28/2012 03:54 pm Aurelien Jarno

tcg/i386: remove suboptimal register shifting

Now that CONFIG_TCG_PASS_AREG0 has been removed, it's easier to get
an optimal code for the load/store functions.

First swap the two registers used in tcg_out_tlb_load() so that the
address end-up in the second register instead of the first one. Adjust...
0aed257f 10/06/2012 07:48 pm Richard Henderson

tcg: Add TCG_COND_NEVER, TCG_COND_ALWAYS

There are several cases that can be handled easier inside both
translators and code generators if we have out-of-band values
for conditions. It's easy enough to handle ALWAYS and NEVER in
the natural way inside the tcg middle-end....
626cd050 10/06/2012 07:47 pm Aurelien Jarno

tcg: remove obsolete jmp op

The TCG jmp operation doesn't really make sense in the QEMU context, it
is unused, it is not implemented by some targets, and it is wrongly
implemented by some others.

This patch simply removes it.

Reviewed-by: Richard Henderson <>...
f813cb83 09/26/2012 01:31 am Aurelien Jarno

tcg/i386: fix build with -march < i686

The movcond_i32 op has to be protected with TCG_TARGET_HAS_movcond_i32
to fix the build with -march < i686.

Thanks to Richard Henderson for the hint.

Reported-by: Alex Barcelo <>
Signed-off-by: Aurelien Jarno <>
b18212c6 09/22/2012 05:52 pm Stefan Weil

tcg/i386: Add shortcuts for registers used in L constraint

While 64 bit hosts use the first three registers which are also used
as function input parameters, 32 bit hosts use TCG_REG_EAX and
TCG_REG_EDX which are not used in parameter passing.

After defining new register macros for the registers used in L...
d73685e3 09/22/2012 05:52 pm Stefan Weil

tcg/i386: Remove unused registers from tcg_target_call_iarg_regs

32 bit x86 hosts don't need registers for helper function arguments
because they use the default stack based calling convention.

Removing the registers allows simpler code for function
tcg_target_get_call_iarg_regs_count....
6e17d0c5 09/22/2012 05:52 pm Stefan Weil

tcg: Remove tcg_target_get_call_iarg_regs_count

The TCG targets no longer need individual implementations.

Since commit 6a18ae2d2947532d5c26439548afa0481c4529f9,
'flags' is no longer used in tcg_target_get_call_iarg_regs_count.

The remaining tcg_target_get_call_iarg_regs_count is trivial and only...
1b7621ad 09/22/2012 04:10 pm Stefan Weil

w64: Fix TCG helper functions with 5 arguments

TCG uses 6 registers for function arguments on 64 bit Linux hosts,
but only 4 registers on W64 hosts.

Commit 2999a0b20074a7e4a58f56572bb1436749368f59 increased the number
of arguments for some important helper functions from 4 to 5...
d0a16297 09/21/2012 08:53 pm Richard Henderson

tcg-i386: Implement movcond

Signed-off-by: Richard Henderson <>
Reviewed-by: Aurelien Jarno <>
Signed-off-by: Aurelien Jarno <>
5c2d2a9e 09/19/2012 10:40 pm Aurelien Jarno

tcg/i386: allow constants in load/store ops

On x86, it is possible to move a constant value to memory. Add code to
handle a constant argument to load/store ops.

Reviewed-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
89c33337 09/15/2012 08:51 pm Blue Swirl

Remove unused CONFIG_TCG_PASS_AREG0 and dead code

Now that CONFIG_TCG_PASS_AREG0 is enabled for all targets,
remove dead code and support for !CONFIG_TCG_PASS_AREG0 case.

Remove dyngen-exec.h and all references to it. Although included by
hw/spapr_hcall.c, it does not seem to use it....
c170cb66 04/15/2012 10:25 pm Stefan Weil

tcg/i386: Use GDB JIT debugging interface only for hosts with ELF

Not all i386 / x86_64 hosts use ELF.
Ask the compiler whether ELF is used.

On w64, gdb crashes when ELF_HOST_MACHINE is defined.

Cc: Blue Swirl <>
Acked-by: Richard Henderson <>...
8d918718 04/15/2012 10:25 pm Stefan Weil

tcg/i386: Add support for w64 ABI

w64 uses the registers rcx, rdx, r8 and r9 for function arguments,
so it needs a different declaration of tcg_target_call_iarg_regs.

rax, rcx, rdx, r8, r9, r10 and r11 may be changed by function calls.

rbx, rbp, rdi, rsi, r12, r13, r14 and r15 remain unchanged by function calls....
813da627 03/24/2012 03:07 pm Richard Henderson

tcg: Use the GDB JIT debugging interface.

This allows us to generate unwind info for the dynamicly generated
code in the code_gen_buffer. Only i386 is converted at this point.

Signed-off-by: Richard Henderson <>
Signed-off-by: Blue Swirl <>
e141ab52 03/18/2012 02:21 pm Blue Swirl

softmmu templates: optionally pass CPUState to memory access functions

Optionally, make memory access helpers take a parameter for CPUState
instead of relying on global env.

On most targets, perform simple moves to reorder registers. On i386,
switch from regparm(3) calling convention to standard stack-based...
6a18ae2d 03/18/2012 02:21 pm Blue Swirl

i386: Remove REGPARM

Use stack based calling convention (GCC default) for interfacing with
generated code instead of register based convention (regparm(3)).

Signed-off-by: Blue Swirl <>
9349b4f9 03/14/2012 11:20 pm Andreas Färber

Rename CPUState -> CPUArchState

Scripted conversion:
for file in .[hc] hw/.[hc] hw/kvm/*.[hc] linux-user/*.[hc] linux-user/m68k/*.[hc] bsd-user/*.[hc] darwin-user/*.[hc] tcg/*/*.[hc] target-*/cpu.h; do
sed -i "s/CPUState/CPUArchState/g" $file
done...
9d6fca70 03/11/2012 01:28 pm Stefan Weil

tcg: Improve tcg_out_label and fix its usage for w64

tcg_out_label is always called with a third argument of pointer type
which was casted to tcg_target_long.

These casts can be avoided by changing the prototype of tcg_out_label.

There was also a cast to long. For most hosts with...
2a534aff 11/14/2011 06:47 pm Richard Henderson

tcg: Use TCGReg for standard tcg-target entry points.

Including tcg_out_ld, tcg_out_st, tcg_out_mov, tcg_out_movi.

Signed-off-by: Richard Henderson <>
Reviewed-by: Andreas Färber <>
Reviewed-by: Stefan Weil <>...
a4773324 10/01/2011 09:42 am Jan Kiszka

tcg-i386: Introduce limited deposit support

x86 cannot provide an optimized generic deposit implementation. But at
least for a few special cases, namely for writing bits 0..7, 8..15, and
0..15, versions using only a single instruction are feasible.
Introducing such limited support improves emulating 16-bit x86 code on...
68af23af 09/17/2011 08:54 pm Stefan Weil

tcg/i386: Only one call output register needed for 64 bit hosts

The second register is only needed for 32 bit hosts.

Signed-off-by: Stefan Weil <>
Signed-off-by: Blue Swirl <>
ac0275dc 06/26/2011 09:25 pm Blue Swirl

TCG/x86: use stack for TCG temps

Use stack instead of temp_buf array in CPUState for TCG
temps.

Signed-off-by: Blue Swirl <>
e83c80f7 06/26/2011 09:25 pm Blue Swirl

TCG/x86: use TCG_REG_CALL_STACK instead of TCG_REG_ESP

Except for specific cases where the use of %esp changes the encoding of
the instruction, it's cleaner to use TCG_REG_CALL_STACK instead of
TCG_REG_ESP.

Signed-off-by: Blue Swirl <>
614f104d 06/26/2011 09:25 pm Blue Swirl

Delegate setup of TCG temporaries to targets

Delegate TCG temp_buf setup to targets, so that they can use a stack
frame later instead.

Signed-off-by: Blue Swirl <>
cea5f9a2 06/26/2011 09:25 pm Blue Swirl

cpu-exec.c: avoid AREG0 use

Make functions take a parameter for CPUState instead of relying
on global env. Pass CPUState pointer to TCG prologue, which moves
it to AREG0.

Thanks to Peter Maydell and Laurent Desnogues for the ARM prologue
change.

Revert the hacks to avoid AREG0 use on Sparc hosts....
dc397ca3 06/10/2010 09:52 pm Aurelien Jarno

tcg-i386: fix andi r, r, 0xff

Signed-off-by: Aurelien Jarno <>
447d681e 06/10/2010 09:41 pm Aurelien Jarno

tcg-i386: remove use of _Bool that slipped code review

Signed-off-by: Aurelien Jarno <>
5d8a4f8f 06/10/2010 01:16 am Richard Henderson

tcg-i386: Merge 64-bit generation.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
e4d58b41 06/09/2010 12:18 pm Richard Henderson

tcg: Make some tcg-target.c routines static.

Both tcg_target_init and tcg_target_qemu_prologue
are unused outside of tcg.c.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
3b6dac34 06/09/2010 12:18 pm Richard Henderson

tcg: Add TYPE parameter to tcg_out_mov.

Mirror tcg_out_movi in having a TYPE parameter. This allows x86_64
to perform the move at the proper width, which may elide a REX prefix.

Introduce a TCG_TYPE_REG enumerator to represent the "native width"
of the host register, and to distinguish the usage from "pointer data"...
4309a79b 06/03/2010 01:02 am Aurelien Jarno

tcg-i386: fix a typo

Fix a typo introduced by c28b14c694d759f39fe3ae4f8d03b567da5b93f8.

Signed-off-by: Aurelien Jarno <>
c28b14c6 06/02/2010 11:51 pm Aurelien Jarno

tcg-i386: declare tcg_out_tlb_load() inline

Declare tcg_out_tlb_load() inline so that we don't loose optimisations
with commit 8516a04467cb7954cdc32e8b79b4b7df56dccb16.

Signed-off-by: Aurelien Jarno <>
82bb07db 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Remove some ifdefs in qemu_ld/st.

Tidy some code by replacing ifdefs by C ifs.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
96b4cf38 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Tidy data16 prefixes.

Include it in the opcode as an extension, as with P_EXT
or the REX bits in the x86-64 port.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
be5a4eb7 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out TLB Hit path from qemu_ld/st.

Splitting out these functions will allow further cleanups.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
1a6dc1e4 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Swap order of TLB hit and miss paths.

Make fallthru be TLB hit and branch be TLB miss. Doing this
both improves branch prediction and will allow further cleanup.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
8516a044 06/02/2010 11:50 pm Richard Henderson

tcg-i386: Split out tlb load function.

Share some code between qemu_ld and qemu_st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
5d1e4e85 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Use lea for three-operand add.

The result is shorter than the mov+add that TCG would
otherwise generate for us.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
78686523 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Nuke trailing whitespace.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
55e082a7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8u and ext16u operations.

Define OPC_MOVZBL and OPC_MOVZWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
6817c355 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ext8s and ext16s operations.

Define OPC_MOVSBL and OPC_MOVSWL. Factor opcode emission to
separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a369a702 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy immediate arithmetic operations.

Define OPC_ARITH_EvI[bz]; use throughout. Use tcg_out_ext8u
directly in setcond. Use tgen_arithi in qemu_ld/st.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
81570a70 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy non-immediate arithmetic operations.

Add more OPC values, and tgen_arithr. Use the later throughout.

Note that normal reg/reg arithmetic now uses the Gv,Ev opcode form
instead of the Ev,Gv opcode form used previously. Both forms
disassemble properly, and so there's no visible change when diffing...
ef10b106 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy movi.

Define and use OPC_MOVL_Iv.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
6858614e 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy push/pop.

Move tcg_out_push/pop up in the file so that they can be used
by qemu_ld/st. Define a tcg_out_pushi to be used as well.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
aadb21a4 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy calls.

Define OPC_CALL_Jz, generated by tcg_out_calli; use the later
throughout. Unify the calls within qemu_st; adjust the stack
with a single pop if applicable.

Define and use EXT_CALLN_Ev for indirect calls.

Signed-off-by: Richard Henderson <>...
3c3accc6 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy ret.

Define and use OPC_RET.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
32a8ffb9 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy setcc.

Define and use OPC_SETCC.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
9363dedb 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy unary arithmetic.

Define OPC_GRP3 and EXT3_FOO to match. Use them instead of
bare constants.

Define OPC_GRP5 and rename the existing EXT_BAR to EXT5_BAR to
make it clear which extension should be used with which opcode.

Signed-off-by: Richard Henderson <>...
0566d387 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy multiply.

Define and use OPC_IMUL_GvEv{,Ib,Iz}.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
b3e66df7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy xchg.

Define and use OPC_XCHG_ax_r32.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
34a6d0b7 05/21/2010 07:20 pm Richard Henderson

tcg-i386: Tidy lea.

Implement full modrm+sib addressing mode processing.
Use that in qemu_ld/st to output the LEA.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
da441cff 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Tidy jumps.

Define OPC_JCC*, OC_JMP*, and EXT_JMPN_Ev. Use them throughout.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a042ef94 05/20/2010 10:15 pm Richard Henderson

tcg-i386: Eliminate extra move from qemu_ld64.

If the address register overlaps one of the output registers
simply issue the clobbering load last, rather than emitting
an extra move of the address register.

Signed-off-by: Richard Henderson <>...
af266089 05/20/2010 10:13 pm Richard Henderson

tcg-i386: Tidy move operations.

Define OPC_MOVB* and OPC_MOVL*; use them throughout.
Use tcg_out_ld/st instead of bare tcg_out_modrm_offset
when it makes sense.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
f53dba01 05/20/2010 10:09 pm Richard Henderson

tcg-i386: Tidy shift operations.

Define OPC_SHIFT_{1,Ib,cl}. Factor opcode emission to a function.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
fcb5dac1 05/20/2010 10:04 pm Richard Henderson

tcg-i386: Tidy bswap operations.

Define OPC_BSWAP. Factor opcode emission to separate functions.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
6648e296 05/19/2010 09:46 am Richard Henderson

tcg-i386: Allocate call-saved registers first.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
4ab50ccf 05/19/2010 09:46 am Richard Henderson

tcg-i386: Tidy initialization of tcg_target_call_clobber_regs.

Setting the registers one by one is easier to read, and gets
optimized by the compiler just the same.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
86feb1c8 03/27/2010 12:01 am Richard Henderson

tcg: Disambiguate qemu_ld32u with 32-bit and 64-bit outputs.

Some targets (e.g. Alpha and MIPS64) need to keep 32-bit operands
sign-extended in 64-bit registers (regardless of the "real" sign
of the operand). For that, we need to be able to distinguish
between a 32-bit load with a 32-bit result and a 32-bit load with...
8a56e840 03/26/2010 10:29 pm Richard Henderson

tcg: Use TCGCond where appropriate.

Use the TCGCond enumeration type in the brcond and setcond
related prototypes in tcg-op.h and each code generator.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
a9751609 03/26/2010 10:28 pm Richard Henderson

tcg: Name the opcode enumeration.

Give the enumeration formed from tcg-opc.h a name: TCGOpcode.
Use that enumeration type instead of "int" whereever appropriate.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
20cb400d 03/12/2010 08:34 pm Paul Brook

Remove TLB from userspace

Remove TLB from userspace CPU structure.

Signed-off-by: Paul Brook <>
1d2699ae 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement setcond.

Signed-off-by: Richard Henderson <>
Signed-off-by: Aurelien Jarno <>
f75b56c1 02/06/2010 11:23 pm Richard Henderson

tcg-i386: Implement small forward branches.

There are places, like brcond2, where we know that the destination
of a forward branch will be within 127 bytes.

Add the R_386_PC8 relocation type to support this. Add a flag to
tcg_out_jxx and tcg_out_brcond* to enable it. Set the flag in the...
b785e476 11/14/2009 02:17 am Magnus Damm

tcg/i386: remove duplicate sar opcode

Signed-off-by: Magnus Damm <>
Signed-off-by: Aurelien Jarno <>
5f0ce17f 10/04/2009 02:24 pm Aurelien Jarno

tcg/i386: add support for ext{8,16}u_i32 TCG ops

Signed-off-by: Aurelien Jarno <>
17cf428f 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: generates dec/inc instead of sub/add when possible

We must take care that dec/inc do not compute CF, which is needed by
add2/sub2.

Signed-off-by: Aurelien Jarno <>
b70650cb 09/27/2009 09:00 pm Aurelien Jarno

tcg/i386: optimize and $0xff(ff), reg

Signed-off-by: Aurelien Jarno <>
adea8197 07/17/2009 09:50 pm Juan Quintela

Userspace guest address offsetting

Fix type in i386 tcg.

Signed-off-by: Juan Quintela <>
379f6698 07/17/2009 03:12 pm Paul Brook

Userspace guest address offsetting

Re-implement GUEST_BASE support.
Offset guest ddress space by default if the guest binary contains
regions below the host mmap_min_addr.
Implement support for i386, x86-64 and arm hosts.

Signed-off-by: Riku Voipio <>...
5d40cd63 03/13/2009 11:35 am aurel32

tcg/x86: add bswap16_i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6837 c046a42c-6fe2-441c-8c8c-71466251a162
66896cb8 03/13/2009 11:34 am aurel32

tcg: rename bswap_i32/i64 functions

Rename bswap_i32 into bswap32_i32 and bswap_i64 into bswap64_i64

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6829 c046a42c-6fe2-441c-8c8c-71466251a162
9619376c 03/10/2009 09:37 pm aurel32

tcg/x86: add not/neg/extu/bswap/rot i32 ops

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6806 c046a42c-6fe2-441c-8c8c-71466251a162
3e9a474e 12/14/2008 07:29 pm aurel32

tcg: kill two warnings

Signed-off-by: Aurelien Jarno <>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6029 c046a42c-6fe2-441c-8c8c-71466251a162
9db3ba4d 12/13/2008 08:57 pm aurel32

TCG x86/x86-64: use move with zero-extend for loads/stores

Starting with version 4.3, gcc returns the result of a function in
rax/eax/ax/al instead of rax/eax, depending of the return type. As
a consequence we should use a zero extend moe in TCG loads/stores....
d4a9eb1f 10/05/2008 12:59 pm blueswir1

Add some missing static and const qualifiers, reg_names only used if NDEBUG set

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5421 c046a42c-6fe2-441c-8c8c-71466251a162
79383c9c 08/30/2008 12:51 pm blueswir1

Fix some warnings that would be generated by gcc -Wredundant-decls

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5115 c046a42c-6fe2-441c-8c8c-71466251a162
d643ccca 07/07/2008 11:15 pm bellard

64 bit signed comparison fix (Juergen Lock)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4855 c046a42c-6fe2-441c-8c8c-71466251a162
affa3264 05/25/2008 09:41 pm bellard

jump optimizations

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4582 c046a42c-6fe2-441c-8c8c-71466251a162
b03cce8e 05/10/2008 01:52 pm bellard

fixed global variable handling with qemu load/stores - initial global prologue/epilogue implementation

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4406 c046a42c-6fe2-441c-8c8c-71466251a162
f54b3f92 04/12/2008 11:14 pm aurel32

HPPA (PA-RISC) host support

(Stuart Brady)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4199 c046a42c-6fe2-441c-8c8c-71466251a162
e4d5434c 03/13/2008 07:34 pm blueswir1

Fix i32 memory backed variables on 64-bit host

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4044 c046a42c-6fe2-441c-8c8c-71466251a162
0954d0d9 03/11/2008 11:01 pm blueswir1

Remove blank elements in tcg_target_reg_alloc_order[] (Stuart Brady)

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4039 c046a42c-6fe2-441c-8c8c-71466251a162
623e265c 02/10/2008 04:09 pm pbrook

Simplify TCG relocation bugfix.

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3974 c046a42c-6fe2-441c-8c8c-71466251a162
bb210e78 02/03/2008 11:06 pm bellard

compare fix

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3962 c046a42c-6fe2-441c-8c8c-71466251a162
c896fe29 02/01/2008 12:05 pm bellard

TCG code generator

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3943 c046a42c-6fe2-441c-8c8c-71466251a162