root / hw / spapr.c @ be40edcd
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9fdf0c29 | David Gibson | #include "sysemu.h" |
28 | 9fdf0c29 | David Gibson | #include "hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 8d90ad90 | David Gibson | #include "net.h" |
31 | 6e270446 | Ben Herrenschmidt | #include "blockdev.h" |
32 | e97c3636 | David Gibson | #include "cpus.h" |
33 | e97c3636 | David Gibson | #include "kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
43 | 9fdf0c29 | David Gibson | |
44 | f61b4bed | Alexander Graf | #include "kvm.h" |
45 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
46 | f61b4bed | Alexander Graf | |
47 | 890c2b77 | Avi Kivity | #include "exec-memory.h" |
48 | 890c2b77 | Avi Kivity | |
49 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
50 | 9fdf0c29 | David Gibson | |
51 | 9fdf0c29 | David Gibson | #define KERNEL_LOAD_ADDR 0x00000000 |
52 | 9fdf0c29 | David Gibson | #define INITRD_LOAD_ADDR 0x02800000 |
53 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
54 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
55 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
56 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
57 | a9f8ad8f | David Gibson | |
58 | a9f8ad8f | David Gibson | #define MIN_RAM_SLOF 512UL |
59 | 9fdf0c29 | David Gibson | |
60 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
61 | 9fdf0c29 | David Gibson | |
62 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
63 | b5cec4c5 | David Gibson | #define XICS_IRQS 1024 |
64 | 9fdf0c29 | David Gibson | |
65 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
66 | 0c103f8e | David Gibson | |
67 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
68 | 9fdf0c29 | David Gibson | |
69 | e6c866d4 | David Gibson | qemu_irq spapr_allocate_irq(uint32_t hint, uint32_t *irq_num) |
70 | e6c866d4 | David Gibson | { |
71 | e6c866d4 | David Gibson | uint32_t irq; |
72 | e6c866d4 | David Gibson | qemu_irq qirq; |
73 | e6c866d4 | David Gibson | |
74 | e6c866d4 | David Gibson | if (hint) {
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75 | e6c866d4 | David Gibson | irq = hint; |
76 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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77 | e6c866d4 | David Gibson | } else {
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78 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
79 | e6c866d4 | David Gibson | } |
80 | e6c866d4 | David Gibson | |
81 | e6c866d4 | David Gibson | qirq = xics_find_qirq(spapr->icp, irq); |
82 | e6c866d4 | David Gibson | if (!qirq) {
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83 | e6c866d4 | David Gibson | return NULL; |
84 | e6c866d4 | David Gibson | } |
85 | e6c866d4 | David Gibson | |
86 | e6c866d4 | David Gibson | if (irq_num) {
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87 | e6c866d4 | David Gibson | *irq_num = irq; |
88 | e6c866d4 | David Gibson | } |
89 | e6c866d4 | David Gibson | |
90 | e6c866d4 | David Gibson | return qirq;
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91 | e6c866d4 | David Gibson | } |
92 | e6c866d4 | David Gibson | |
93 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
94 | 354ac20a | David Gibson | target_phys_addr_t rma_size, |
95 | a3467baa | David Gibson | target_phys_addr_t initrd_base, |
96 | a3467baa | David Gibson | target_phys_addr_t initrd_size, |
97 | a3467baa | David Gibson | const char *boot_device, |
98 | a3467baa | David Gibson | const char *kernel_cmdline, |
99 | a3467baa | David Gibson | long hash_shift)
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100 | 9fdf0c29 | David Gibson | { |
101 | 9fdf0c29 | David Gibson | void *fdt;
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102 | c7a5c0c9 | David Gibson | CPUState *env; |
103 | 354ac20a | David Gibson | uint64_t mem_reg_property_rma[] = { 0, cpu_to_be64(rma_size) };
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104 | 354ac20a | David Gibson | uint64_t mem_reg_property_nonrma[] = { cpu_to_be64(rma_size), |
105 | 354ac20a | David Gibson | cpu_to_be64(ram_size - rma_size) }; |
106 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
107 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
108 | f43e3525 | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(hash_shift)};
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109 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
110 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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111 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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112 | 9fdf0c29 | David Gibson | int i;
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113 | 9fdf0c29 | David Gibson | char *modelname;
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114 | e97c3636 | David Gibson | int smt = kvmppc_smt_threads();
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115 | 9fdf0c29 | David Gibson | |
116 | 9fdf0c29 | David Gibson | #define _FDT(exp) \
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117 | 9fdf0c29 | David Gibson | do { \
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118 | 9fdf0c29 | David Gibson | int ret = (exp); \
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119 | 9fdf0c29 | David Gibson | if (ret < 0) { \ |
120 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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121 | 9fdf0c29 | David Gibson | #exp, fdt_strerror(ret)); \
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122 | 9fdf0c29 | David Gibson | exit(1); \
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123 | 9fdf0c29 | David Gibson | } \ |
124 | 9fdf0c29 | David Gibson | } while (0) |
125 | 9fdf0c29 | David Gibson | |
126 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
127 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
128 | 9fdf0c29 | David Gibson | |
129 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
130 | 9fdf0c29 | David Gibson | |
131 | 9fdf0c29 | David Gibson | /* Root node */
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132 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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133 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
134 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
135 | 9fdf0c29 | David Gibson | |
136 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
137 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
138 | 9fdf0c29 | David Gibson | |
139 | 9fdf0c29 | David Gibson | /* /chosen */
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140 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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141 | 9fdf0c29 | David Gibson | |
142 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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143 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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144 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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145 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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146 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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147 | a9f8ad8f | David Gibson | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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148 | 9fdf0c29 | David Gibson | |
149 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
150 | 9fdf0c29 | David Gibson | |
151 | 354ac20a | David Gibson | /* memory node(s) */
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152 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "memory@0")));
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153 | 9fdf0c29 | David Gibson | |
154 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
155 | 354ac20a | David Gibson | _FDT((fdt_property(fdt, "reg", mem_reg_property_rma,
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156 | 354ac20a | David Gibson | sizeof(mem_reg_property_rma))));
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157 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
158 | 9fdf0c29 | David Gibson | |
159 | 354ac20a | David Gibson | if (ram_size > rma_size) {
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160 | 354ac20a | David Gibson | char mem_name[32]; |
161 | 354ac20a | David Gibson | |
162 | 354ac20a | David Gibson | sprintf(mem_name, "memory@%" PRIx64, (uint64_t)rma_size);
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163 | 354ac20a | David Gibson | _FDT((fdt_begin_node(fdt, mem_name))); |
164 | 354ac20a | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "memory"))); |
165 | 354ac20a | David Gibson | _FDT((fdt_property(fdt, "reg", mem_reg_property_nonrma,
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166 | 354ac20a | David Gibson | sizeof(mem_reg_property_nonrma))));
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167 | 354ac20a | David Gibson | _FDT((fdt_end_node(fdt))); |
168 | 354ac20a | David Gibson | } |
169 | 354ac20a | David Gibson | |
170 | 9fdf0c29 | David Gibson | /* cpus */
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171 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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172 | 9fdf0c29 | David Gibson | |
173 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
174 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
175 | 9fdf0c29 | David Gibson | |
176 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
177 | 9fdf0c29 | David Gibson | |
178 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
179 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
180 | 9fdf0c29 | David Gibson | } |
181 | 9fdf0c29 | David Gibson | |
182 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
183 | c7a5c0c9 | David Gibson | int index = env->cpu_index;
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184 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
185 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
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186 | 9fdf0c29 | David Gibson | char *nodename;
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187 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
188 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
189 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
190 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
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191 | 6659394f | David Gibson | uint32_t vmx = kvm_enabled() ? kvmppc_get_vmx() : 0;
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192 | 6659394f | David Gibson | uint32_t dfp = kvm_enabled() ? kvmppc_get_dfp() : 0;
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193 | 9fdf0c29 | David Gibson | |
194 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
195 | e97c3636 | David Gibson | continue;
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196 | e97c3636 | David Gibson | } |
197 | e97c3636 | David Gibson | |
198 | c7a5c0c9 | David Gibson | if (asprintf(&nodename, "%s@%x", modelname, index) < 0) { |
199 | 9fdf0c29 | David Gibson | fprintf(stderr, "Allocation failure\n");
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200 | 9fdf0c29 | David Gibson | exit(1);
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201 | 9fdf0c29 | David Gibson | } |
202 | 9fdf0c29 | David Gibson | |
203 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
204 | 9fdf0c29 | David Gibson | |
205 | 9fdf0c29 | David Gibson | free(nodename); |
206 | 9fdf0c29 | David Gibson | |
207 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
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208 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
209 | 9fdf0c29 | David Gibson | |
210 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
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211 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
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212 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
213 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
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214 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
215 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
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216 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
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217 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
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218 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,pft-size",
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219 | f43e3525 | David Gibson | pft_size_prop, sizeof(pft_size_prop))));
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220 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
221 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
222 | e97c3636 | David Gibson | |
223 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
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224 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
225 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
226 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
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227 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
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228 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
229 | e97c3636 | David Gibson | } |
230 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
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231 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
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232 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
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233 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
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234 | 9fdf0c29 | David Gibson | |
235 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
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236 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
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237 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
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238 | 9fdf0c29 | David Gibson | } |
239 | 9fdf0c29 | David Gibson | |
240 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
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241 | 6659394f | David Gibson | * 0 / no property == no vector extensions
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242 | 6659394f | David Gibson | * 1 == VMX / Altivec available
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243 | 6659394f | David Gibson | * 2 == VSX available */
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244 | 6659394f | David Gibson | if (vmx) {
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245 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
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246 | 6659394f | David Gibson | } |
247 | 6659394f | David Gibson | |
248 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
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249 | 6659394f | David Gibson | * 0 / no property == no DFP
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250 | 6659394f | David Gibson | * 1 == DFP available */
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251 | 6659394f | David Gibson | if (dfp) {
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252 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", dfp)));
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253 | 6659394f | David Gibson | } |
254 | 6659394f | David Gibson | |
255 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
256 | 9fdf0c29 | David Gibson | } |
257 | 9fdf0c29 | David Gibson | |
258 | 7267c094 | Anthony Liguori | g_free(modelname); |
259 | 9fdf0c29 | David Gibson | |
260 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
261 | 9fdf0c29 | David Gibson | |
262 | f43e3525 | David Gibson | /* RTAS */
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263 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
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264 | f43e3525 | David Gibson | |
265 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
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266 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
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267 | f43e3525 | David Gibson | |
268 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
269 | f43e3525 | David Gibson | |
270 | b5cec4c5 | David Gibson | /* interrupt controller */
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271 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
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272 | b5cec4c5 | David Gibson | |
273 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
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274 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
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275 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
276 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
277 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
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278 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
279 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
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280 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
281 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
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282 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
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283 | b5cec4c5 | David Gibson | |
284 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
285 | b5cec4c5 | David Gibson | |
286 | 4040ab72 | David Gibson | /* vdevice */
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287 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
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288 | 4040ab72 | David Gibson | |
289 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
290 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
291 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
292 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
293 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
294 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
295 | 4040ab72 | David Gibson | |
296 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
297 | 4040ab72 | David Gibson | |
298 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
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299 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
300 | 9fdf0c29 | David Gibson | |
301 | a3467baa | David Gibson | return fdt;
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302 | a3467baa | David Gibson | } |
303 | a3467baa | David Gibson | |
304 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
305 | a3467baa | David Gibson | target_phys_addr_t fdt_addr, |
306 | a3467baa | David Gibson | target_phys_addr_t rtas_addr, |
307 | a3467baa | David Gibson | target_phys_addr_t rtas_size) |
308 | a3467baa | David Gibson | { |
309 | a3467baa | David Gibson | int ret;
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310 | a3467baa | David Gibson | void *fdt;
|
311 | a3467baa | David Gibson | |
312 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
313 | a3467baa | David Gibson | |
314 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
315 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
316 | 4040ab72 | David Gibson | |
317 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
318 | 4040ab72 | David Gibson | if (ret < 0) { |
319 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
320 | 4040ab72 | David Gibson | exit(1);
|
321 | 4040ab72 | David Gibson | } |
322 | 4040ab72 | David Gibson | |
323 | 39ac8455 | David Gibson | /* RTAS */
|
324 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
325 | 39ac8455 | David Gibson | if (ret < 0) { |
326 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
327 | 39ac8455 | David Gibson | } |
328 | 39ac8455 | David Gibson | |
329 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
330 | 4040ab72 | David Gibson | |
331 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
332 | 9fdf0c29 | David Gibson | |
333 | 7267c094 | Anthony Liguori | g_free(fdt); |
334 | 9fdf0c29 | David Gibson | } |
335 | 9fdf0c29 | David Gibson | |
336 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
337 | 9fdf0c29 | David Gibson | { |
338 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
339 | 9fdf0c29 | David Gibson | } |
340 | 9fdf0c29 | David Gibson | |
341 | 9fdf0c29 | David Gibson | static void emulate_spapr_hypercall(CPUState *env) |
342 | 9fdf0c29 | David Gibson | { |
343 | 9fdf0c29 | David Gibson | env->gpr[3] = spapr_hypercall(env, env->gpr[3], &env->gpr[4]); |
344 | 9fdf0c29 | David Gibson | } |
345 | 9fdf0c29 | David Gibson | |
346 | a3467baa | David Gibson | static void spapr_reset(void *opaque) |
347 | a3467baa | David Gibson | { |
348 | a3467baa | David Gibson | sPAPREnvironment *spapr = (sPAPREnvironment *)opaque; |
349 | a3467baa | David Gibson | |
350 | a3467baa | David Gibson | fprintf(stderr, "sPAPR reset\n");
|
351 | a3467baa | David Gibson | |
352 | a3467baa | David Gibson | /* flush out the hash table */
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353 | a3467baa | David Gibson | memset(spapr->htab, 0, spapr->htab_size);
|
354 | a3467baa | David Gibson | |
355 | a3467baa | David Gibson | /* Load the fdt */
|
356 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
357 | a3467baa | David Gibson | spapr->rtas_size); |
358 | a3467baa | David Gibson | |
359 | a3467baa | David Gibson | /* Set up the entry state */
|
360 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
361 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
362 | a3467baa | David Gibson | first_cpu->halted = 0;
|
363 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
364 | a3467baa | David Gibson | |
365 | a3467baa | David Gibson | } |
366 | a3467baa | David Gibson | |
367 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
368 | 9fdf0c29 | David Gibson | static void ppc_spapr_init(ram_addr_t ram_size, |
369 | 9fdf0c29 | David Gibson | const char *boot_device, |
370 | 9fdf0c29 | David Gibson | const char *kernel_filename, |
371 | 9fdf0c29 | David Gibson | const char *kernel_cmdline, |
372 | 9fdf0c29 | David Gibson | const char *initrd_filename, |
373 | 9fdf0c29 | David Gibson | const char *cpu_model) |
374 | 9fdf0c29 | David Gibson | { |
375 | c7a5c0c9 | David Gibson | CPUState *env; |
376 | 9fdf0c29 | David Gibson | int i;
|
377 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
378 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
379 | 354ac20a | David Gibson | target_phys_addr_t rma_alloc_size, rma_size; |
380 | a3467baa | David Gibson | uint32_t initrd_base; |
381 | a3467baa | David Gibson | long kernel_size, initrd_size, fw_size;
|
382 | f43e3525 | David Gibson | long pteg_shift = 17; |
383 | 39ac8455 | David Gibson | char *filename;
|
384 | 9fdf0c29 | David Gibson | |
385 | 7267c094 | Anthony Liguori | spapr = g_malloc(sizeof(*spapr));
|
386 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
387 | 9fdf0c29 | David Gibson | |
388 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
389 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
390 | 354ac20a | David Gibson | |
391 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
392 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
393 | 354ac20a | David Gibson | exit(1);
|
394 | 354ac20a | David Gibson | } |
395 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
396 | 354ac20a | David Gibson | rma_size = rma_alloc_size; |
397 | 354ac20a | David Gibson | } else {
|
398 | 354ac20a | David Gibson | rma_size = ram_size; |
399 | 354ac20a | David Gibson | } |
400 | 354ac20a | David Gibson | |
401 | 354ac20a | David Gibson | /* We place the device tree just below either the top of the RMA,
|
402 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
403 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
404 | 354ac20a | David Gibson | spapr->fdt_addr = MIN(rma_size, 0x80000000) - FDT_MAX_SIZE;
|
405 | a3467baa | David Gibson | spapr->rtas_addr = spapr->fdt_addr - RTAS_MAX_SIZE; |
406 | 9fdf0c29 | David Gibson | |
407 | 9fdf0c29 | David Gibson | /* init CPUs */
|
408 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
409 | 9fdf0c29 | David Gibson | cpu_model = "POWER7";
|
410 | 9fdf0c29 | David Gibson | } |
411 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
412 | c7a5c0c9 | David Gibson | env = cpu_init(cpu_model); |
413 | 9fdf0c29 | David Gibson | |
414 | 9fdf0c29 | David Gibson | if (!env) {
|
415 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
416 | 9fdf0c29 | David Gibson | exit(1);
|
417 | 9fdf0c29 | David Gibson | } |
418 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
419 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
420 | 9fdf0c29 | David Gibson | qemu_register_reset((QEMUResetHandler *)&cpu_reset, env); |
421 | 9fdf0c29 | David Gibson | |
422 | 9fdf0c29 | David Gibson | env->hreset_vector = 0x60;
|
423 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
424 | c7a5c0c9 | David Gibson | env->gpr[3] = env->cpu_index;
|
425 | 9fdf0c29 | David Gibson | } |
426 | 9fdf0c29 | David Gibson | |
427 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
428 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
429 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
430 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
431 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
432 | 354ac20a | David Gibson | |
433 | 354ac20a | David Gibson | memory_region_init_ram(ram, NULL, "ppc_spapr.ram", nonrma_size); |
434 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
435 | 354ac20a | David Gibson | } |
436 | 9fdf0c29 | David Gibson | |
437 | f43e3525 | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
438 | f43e3525 | David Gibson | * later we should probably make it scale to the size of guest
|
439 | f43e3525 | David Gibson | * RAM */
|
440 | a3467baa | David Gibson | spapr->htab_size = 1ULL << (pteg_shift + 7); |
441 | f61b4bed | Alexander Graf | spapr->htab = qemu_memalign(spapr->htab_size, spapr->htab_size); |
442 | f43e3525 | David Gibson | |
443 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
444 | a3467baa | David Gibson | env->external_htab = spapr->htab; |
445 | c7a5c0c9 | David Gibson | env->htab_base = -1;
|
446 | a3467baa | David Gibson | env->htab_mask = spapr->htab_size - 1;
|
447 | f61b4bed | Alexander Graf | |
448 | f61b4bed | Alexander Graf | /* Tell KVM that we're in PAPR mode */
|
449 | f61b4bed | Alexander Graf | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
450 | f61b4bed | Alexander Graf | ((pteg_shift + 7) - 18); |
451 | f61b4bed | Alexander Graf | env->spr[SPR_HIOR] = 0;
|
452 | f61b4bed | Alexander Graf | |
453 | f61b4bed | Alexander Graf | if (kvm_enabled()) {
|
454 | f61b4bed | Alexander Graf | kvmppc_set_papr(env); |
455 | f61b4bed | Alexander Graf | } |
456 | f43e3525 | David Gibson | } |
457 | f43e3525 | David Gibson | |
458 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
459 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
460 | a3467baa | David Gibson | ram_size - spapr->rtas_addr); |
461 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
462 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
463 | 39ac8455 | David Gibson | exit(1);
|
464 | 39ac8455 | David Gibson | } |
465 | 7267c094 | Anthony Liguori | g_free(filename); |
466 | 39ac8455 | David Gibson | |
467 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
468 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
469 | e6c866d4 | David Gibson | spapr->next_irq = 16;
|
470 | b5cec4c5 | David Gibson | |
471 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
472 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
473 | 4040ab72 | David Gibson | |
474 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
475 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
476 | b4a78527 | David Gibson | spapr_vty_create(spapr->vio_bus, SPAPR_VTY_BASE_ADDRESS + i, |
477 | 277f9acf | Paolo Bonzini | serial_hds[i]); |
478 | 4040ab72 | David Gibson | } |
479 | 4040ab72 | David Gibson | } |
480 | 9fdf0c29 | David Gibson | |
481 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
482 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
483 | 8d90ad90 | David Gibson | |
484 | 8d90ad90 | David Gibson | if (!nd->model) {
|
485 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
486 | 8d90ad90 | David Gibson | } |
487 | 8d90ad90 | David Gibson | |
488 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
489 | 277f9acf | Paolo Bonzini | spapr_vlan_create(spapr->vio_bus, 0x1000 + i, nd);
|
490 | 8d90ad90 | David Gibson | } else {
|
491 | 8d90ad90 | David Gibson | fprintf(stderr, "pSeries (sPAPR) platform does not support "
|
492 | 8d90ad90 | David Gibson | "NIC model '%s' (only ibmveth is supported)\n",
|
493 | 8d90ad90 | David Gibson | nd->model); |
494 | 8d90ad90 | David Gibson | exit(1);
|
495 | 8d90ad90 | David Gibson | } |
496 | 8d90ad90 | David Gibson | } |
497 | 8d90ad90 | David Gibson | |
498 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
499 | 277f9acf | Paolo Bonzini | spapr_vscsi_create(spapr->vio_bus, 0x2000 + i);
|
500 | 6e270446 | Ben Herrenschmidt | } |
501 | 6e270446 | Ben Herrenschmidt | |
502 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
503 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
504 | 9fdf0c29 | David Gibson | |
505 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
506 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
507 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
508 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
509 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
510 | a3467baa | David Gibson | ram_size - KERNEL_LOAD_ADDR); |
511 | 9fdf0c29 | David Gibson | } |
512 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
513 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
514 | 9fdf0c29 | David Gibson | kernel_filename); |
515 | 9fdf0c29 | David Gibson | exit(1);
|
516 | 9fdf0c29 | David Gibson | } |
517 | 9fdf0c29 | David Gibson | |
518 | 9fdf0c29 | David Gibson | /* load initrd */
|
519 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
520 | 9fdf0c29 | David Gibson | initrd_base = INITRD_LOAD_ADDR; |
521 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
522 | 9fdf0c29 | David Gibson | ram_size - initrd_base); |
523 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
524 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
525 | 9fdf0c29 | David Gibson | initrd_filename); |
526 | 9fdf0c29 | David Gibson | exit(1);
|
527 | 9fdf0c29 | David Gibson | } |
528 | 9fdf0c29 | David Gibson | } else {
|
529 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
530 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
531 | 9fdf0c29 | David Gibson | } |
532 | a3467baa | David Gibson | |
533 | a3467baa | David Gibson | spapr->entry_point = KERNEL_LOAD_ADDR; |
534 | 9fdf0c29 | David Gibson | } else {
|
535 | a9f8ad8f | David Gibson | if (ram_size < (MIN_RAM_SLOF << 20)) { |
536 | a9f8ad8f | David Gibson | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
537 | a9f8ad8f | David Gibson | "%ldM guest RAM\n", MIN_RAM_SLOF);
|
538 | a9f8ad8f | David Gibson | exit(1);
|
539 | a9f8ad8f | David Gibson | } |
540 | 68722054 | Nishanth Aravamudan | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
541 | a9f8ad8f | David Gibson | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
542 | a9f8ad8f | David Gibson | if (fw_size < 0) { |
543 | a9f8ad8f | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
544 | a9f8ad8f | David Gibson | exit(1);
|
545 | a9f8ad8f | David Gibson | } |
546 | 7267c094 | Anthony Liguori | g_free(filename); |
547 | a3467baa | David Gibson | spapr->entry_point = 0x100;
|
548 | a9f8ad8f | David Gibson | initrd_base = 0;
|
549 | a9f8ad8f | David Gibson | initrd_size = 0;
|
550 | a9f8ad8f | David Gibson | |
551 | a9f8ad8f | David Gibson | /* SLOF will startup the secondary CPUs using RTAS,
|
552 | a9f8ad8f | David Gibson | rather than expecting a kexec() style entry */
|
553 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
554 | c7a5c0c9 | David Gibson | env->halted = 1;
|
555 | a9f8ad8f | David Gibson | } |
556 | 9fdf0c29 | David Gibson | } |
557 | 9fdf0c29 | David Gibson | |
558 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
559 | 354ac20a | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, rma_size, |
560 | a3467baa | David Gibson | initrd_base, initrd_size, |
561 | a3467baa | David Gibson | boot_device, kernel_cmdline, |
562 | a3467baa | David Gibson | pteg_shift + 7);
|
563 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
564 | 9fdf0c29 | David Gibson | |
565 | a3467baa | David Gibson | qemu_register_reset(spapr_reset, spapr); |
566 | 9fdf0c29 | David Gibson | } |
567 | 9fdf0c29 | David Gibson | |
568 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
569 | 9fdf0c29 | David Gibson | .name = "pseries",
|
570 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
571 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
572 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
573 | 9fdf0c29 | David Gibson | .no_vga = 1,
|
574 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
575 | 6e270446 | Ben Herrenschmidt | .use_scsi = 1,
|
576 | 9fdf0c29 | David Gibson | }; |
577 | 9fdf0c29 | David Gibson | |
578 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
579 | 9fdf0c29 | David Gibson | { |
580 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
581 | 9fdf0c29 | David Gibson | } |
582 | 9fdf0c29 | David Gibson | |
583 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |