Strip trailing '\n' from error_report()'s first argument (again)
Commit 6daf194d got rid of them, but Hans and Gerd added some morelately. Tracked down with this Coccinelle semantic patch:
r expression fmt; position p;@@ error_report(fmt, ...)@p...
r
Merge remote-tracking branch 'pmaydell/arm-devs.for-upstream' into staging
hw/omap1.c: Separate dpll_ctl from omap_mpu_state
Signed-off-by: Juha Riihimäki <juha.riihimaki@nokia.com>[Riku Voipio: Fixes and restructuring patchset]Signed-off-by: Riku Voipio <riku.voipio@iki.fi>[Peter Maydell: More fixes and cleanups for upstream submission]...
hw/omap1.c: Drop unused includes
Drop includes of qemu-timer.h, qemu-char.h and pc.h as they are nolonger needed.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
hw/omap_gpmc: Fix region map/unmap when configuring prefetch engine
When configuring the prefetch engine (and also when resetting froma state where the prefetch engine was enabled) be careful to adhereto the "unmap/change config fields/map" ordering, to avoid trying...
arm: add missing scu registers
Add power control register to a9mpcore
Signed-off-by: Rob Herring <rob.herring@calxeda.com>Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
arm: Set frequencies for arm_timer
Use qdev properties to allow board modelers to set the frequenciesfor the sp804 timer. Each of the sp804's timers can have anindividual frequency. The timers default to 1MHz.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>...
arm: add dummy gic security registers
Implement handling for the RAZ/WI gic security registers.
add L2x0/PL310 cache controller device
This is just a dummy device for ARM L2 cache controllers, based on thepl310. The cache type parameter can be defined by a property valueand has a meaningful default.
Signed-off-by: Rob Herring <rob.herring@calxeda.com>...
hw/omap1.c: Separate PWT from omap_mpu_state
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