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/*
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* QEMU PC System Emulator
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*
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* Copyright (c) 2003-2004 Fabrice Bellard
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to deal
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* in the Software without restriction, including without limitation the rights
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* to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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* copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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* OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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* THE SOFTWARE.
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*/
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#include "vl.h" |
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/* output Bochs bios info messages */
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//#define DEBUG_BIOS
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#define BIOS_FILENAME "bios.bin" |
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#define VGABIOS_FILENAME "vgabios.bin" |
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#define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin" |
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#define LINUX_BOOT_FILENAME "linux_boot.bin" |
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|
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#define KERNEL_LOAD_ADDR 0x00100000 |
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#define MAX_INITRD_LOAD_ADDR 0x38000000 |
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#define KERNEL_PARAMS_ADDR 0x00090000 |
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#define KERNEL_CMDLINE_ADDR 0x00099000 |
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/* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
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#define ACPI_DATA_SIZE 0x10000 |
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static fdctrl_t *floppy_controller;
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static RTCState *rtc_state;
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static PITState *pit;
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static IOAPICState *ioapic;
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static PCIDevice *i440fx_state;
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static void ioport80_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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} |
50 |
|
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/* MSDOS compatibility mode FPU exception support */
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/* XXX: add IGNNE support */
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void cpu_set_ferr(CPUX86State *s)
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{ |
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pic_set_irq(13, 1); |
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} |
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|
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static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data) |
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{ |
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pic_set_irq(13, 0); |
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} |
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|
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/* TSC handling */
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uint64_t cpu_get_tsc(CPUX86State *env) |
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{ |
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/* Note: when using kqemu, it is more logical to return the host TSC
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because kqemu does not trap the RDTSC instruction for
|
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performance reasons */
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#if USE_KQEMU
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if (env->kqemu_enabled) {
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return cpu_get_real_ticks();
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} else
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#endif
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{ |
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return cpu_get_ticks();
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} |
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} |
78 |
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/* SMM support */
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void cpu_smm_update(CPUState *env)
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{ |
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if (i440fx_state && env == first_cpu)
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i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
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} |
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/* IRQ handling */
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int cpu_get_pic_interrupt(CPUState *env)
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{ |
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int intno;
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intno = apic_get_interrupt(env); |
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if (intno >= 0) { |
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/* set irq request if a PIC irq is still pending */
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/* XXX: improve that */
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pic_update_irq(isa_pic); |
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return intno;
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} |
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/* read the irq from the PIC */
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intno = pic_read_irq(isa_pic); |
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return intno;
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} |
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static void pic_irq_request(void *opaque, int level) |
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{ |
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CPUState *env = opaque; |
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if (level)
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cpu_interrupt(env, CPU_INTERRUPT_HARD); |
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else
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cpu_reset_interrupt(env, CPU_INTERRUPT_HARD); |
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} |
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|
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/* PC cmos mappings */
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|
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#define REG_EQUIPMENT_BYTE 0x14 |
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static int cmos_get_fd_drive_type(int fd0) |
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{ |
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int val;
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switch (fd0) {
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case 0: |
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/* 1.44 Mb 3"5 drive */
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val = 4;
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break;
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case 1: |
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/* 2.88 Mb 3"5 drive */
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val = 5;
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break;
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case 2: |
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/* 1.2 Mb 5"5 drive */
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val = 2;
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break;
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default:
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val = 0;
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break;
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} |
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return val;
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} |
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|
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static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd) |
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{ |
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RTCState *s = rtc_state; |
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int cylinders, heads, sectors;
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bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors); |
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rtc_set_memory(s, type_ofs, 47);
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rtc_set_memory(s, info_ofs, cylinders); |
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rtc_set_memory(s, info_ofs + 1, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 2, heads);
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rtc_set_memory(s, info_ofs + 3, 0xff); |
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rtc_set_memory(s, info_ofs + 4, 0xff); |
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rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3)); |
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rtc_set_memory(s, info_ofs + 6, cylinders);
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rtc_set_memory(s, info_ofs + 7, cylinders >> 8); |
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rtc_set_memory(s, info_ofs + 8, sectors);
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} |
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/* hd_table must contain 4 block drivers */
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static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table) |
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{ |
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RTCState *s = rtc_state; |
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int val;
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int fd0, fd1, nb;
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int i;
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|
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/* various important CMOS locations needed by PC/Bochs bios */
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/* memory size */
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val = 640; /* base memory in K */ |
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rtc_set_memory(s, 0x15, val);
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rtc_set_memory(s, 0x16, val >> 8); |
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val = (ram_size / 1024) - 1024; |
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x17, val);
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rtc_set_memory(s, 0x18, val >> 8); |
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rtc_set_memory(s, 0x30, val);
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rtc_set_memory(s, 0x31, val >> 8); |
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if (ram_size > (16 * 1024 * 1024)) |
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val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536); |
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else
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val = 0;
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if (val > 65535) |
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val = 65535;
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rtc_set_memory(s, 0x34, val);
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rtc_set_memory(s, 0x35, val >> 8); |
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switch(boot_device) {
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case 'a': |
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case 'b': |
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rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */ |
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if (!fd_bootchk)
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rtc_set_memory(s, 0x38, 0x01); /* disable signature check */ |
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break;
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default:
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case 'c': |
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rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */ |
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break;
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case 'd': |
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rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */ |
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break;
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} |
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/* floppy type */
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fd0 = fdctrl_get_drive_type(floppy_controller, 0);
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fd1 = fdctrl_get_drive_type(floppy_controller, 1);
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val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
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rtc_set_memory(s, 0x10, val);
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val = 0;
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nb = 0;
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if (fd0 < 3) |
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nb++; |
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if (fd1 < 3) |
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nb++; |
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switch (nb) {
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case 0: |
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break;
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case 1: |
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val |= 0x01; /* 1 drive, ready for boot */ |
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break;
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case 2: |
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val |= 0x41; /* 2 drives, ready for boot */ |
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break;
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} |
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val |= 0x02; /* FPU is there */ |
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val |= 0x04; /* PS/2 mouse installed */ |
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rtc_set_memory(s, REG_EQUIPMENT_BYTE, val); |
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/* hard drives */
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rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0)); |
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if (hd_table[0]) |
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cmos_init_hd(0x19, 0x1b, hd_table[0]); |
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if (hd_table[1]) |
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cmos_init_hd(0x1a, 0x24, hd_table[1]); |
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val = 0;
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for (i = 0; i < 4; i++) { |
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if (hd_table[i]) {
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int cylinders, heads, sectors, translation;
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/* NOTE: bdrv_get_geometry_hint() returns the physical
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geometry. It is always such that: 1 <= sects <= 63, 1
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<= heads <= 16, 1 <= cylinders <= 16383. The BIOS
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geometry can be different if a translation is done. */
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translation = bdrv_get_translation_hint(hd_table[i]); |
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if (translation == BIOS_ATA_TRANSLATION_AUTO) {
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bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors); |
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if (cylinders <= 1024 && heads <= 16 && sectors <= 63) { |
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/* No translation. */
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translation = 0;
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} else {
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/* LBA translation. */
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translation = 1;
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} |
260 |
} else {
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translation--; |
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} |
263 |
val |= translation << (i * 2);
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} |
265 |
} |
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rtc_set_memory(s, 0x39, val);
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} |
268 |
|
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void ioport_set_a20(int enable) |
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{ |
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/* XXX: send to all CPUs ? */
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cpu_x86_set_a20(first_cpu, enable); |
273 |
} |
274 |
|
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int ioport_get_a20(void) |
276 |
{ |
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return ((first_cpu->a20_mask >> 20) & 1); |
278 |
} |
279 |
|
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static void ioport92_write(void *opaque, uint32_t addr, uint32_t val) |
281 |
{ |
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ioport_set_a20((val >> 1) & 1); |
283 |
/* XXX: bit 0 is fast reset */
|
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} |
285 |
|
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static uint32_t ioport92_read(void *opaque, uint32_t addr) |
287 |
{ |
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return ioport_get_a20() << 1; |
289 |
} |
290 |
|
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/***********************************************************/
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/* Bochs BIOS debug ports */
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|
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void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val) |
295 |
{ |
296 |
static const char shutdown_str[8] = "Shutdown"; |
297 |
static int shutdown_index = 0; |
298 |
|
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switch(addr) {
|
300 |
/* Bochs BIOS messages */
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case 0x400: |
302 |
case 0x401: |
303 |
fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
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exit(1);
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case 0x402: |
306 |
case 0x403: |
307 |
#ifdef DEBUG_BIOS
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fprintf(stderr, "%c", val);
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#endif
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310 |
break;
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311 |
case 0x8900: |
312 |
/* same as Bochs power off */
|
313 |
if (val == shutdown_str[shutdown_index]) {
|
314 |
shutdown_index++; |
315 |
if (shutdown_index == 8) { |
316 |
shutdown_index = 0;
|
317 |
qemu_system_shutdown_request(); |
318 |
} |
319 |
} else {
|
320 |
shutdown_index = 0;
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321 |
} |
322 |
break;
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323 |
|
324 |
/* LGPL'ed VGA BIOS messages */
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325 |
case 0x501: |
326 |
case 0x502: |
327 |
fprintf(stderr, "VGA BIOS panic, line %d\n", val);
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328 |
exit(1);
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329 |
case 0x500: |
330 |
case 0x503: |
331 |
#ifdef DEBUG_BIOS
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332 |
fprintf(stderr, "%c", val);
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333 |
#endif
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334 |
break;
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335 |
} |
336 |
} |
337 |
|
338 |
void bochs_bios_init(void) |
339 |
{ |
340 |
register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL); |
341 |
register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL); |
342 |
register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL); |
343 |
register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL); |
344 |
register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL); |
345 |
|
346 |
register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL); |
347 |
register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL); |
348 |
register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL); |
349 |
register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL); |
350 |
} |
351 |
|
352 |
|
353 |
int load_kernel(const char *filename, uint8_t *addr, |
354 |
uint8_t *real_addr) |
355 |
{ |
356 |
int fd, size;
|
357 |
int setup_sects;
|
358 |
|
359 |
fd = open(filename, O_RDONLY | O_BINARY); |
360 |
if (fd < 0) |
361 |
return -1; |
362 |
|
363 |
/* load 16 bit code */
|
364 |
if (read(fd, real_addr, 512) != 512) |
365 |
goto fail;
|
366 |
setup_sects = real_addr[0x1F1];
|
367 |
if (!setup_sects)
|
368 |
setup_sects = 4;
|
369 |
if (read(fd, real_addr + 512, setup_sects * 512) != |
370 |
setup_sects * 512)
|
371 |
goto fail;
|
372 |
|
373 |
/* load 32 bit code */
|
374 |
size = read(fd, addr, 16 * 1024 * 1024); |
375 |
if (size < 0) |
376 |
goto fail;
|
377 |
close(fd); |
378 |
return size;
|
379 |
fail:
|
380 |
close(fd); |
381 |
return -1; |
382 |
} |
383 |
|
384 |
static void main_cpu_reset(void *opaque) |
385 |
{ |
386 |
CPUState *env = opaque; |
387 |
cpu_reset(env); |
388 |
} |
389 |
|
390 |
static const int ide_iobase[2] = { 0x1f0, 0x170 }; |
391 |
static const int ide_iobase2[2] = { 0x3f6, 0x376 }; |
392 |
static const int ide_irq[2] = { 14, 15 }; |
393 |
|
394 |
#define NE2000_NB_MAX 6 |
395 |
|
396 |
static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 }; |
397 |
static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 }; |
398 |
|
399 |
static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 }; |
400 |
static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 }; |
401 |
|
402 |
static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc }; |
403 |
static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 }; |
404 |
|
405 |
#ifdef HAS_AUDIO
|
406 |
static void audio_init (PCIBus *pci_bus) |
407 |
{ |
408 |
struct soundhw *c;
|
409 |
int audio_enabled = 0; |
410 |
|
411 |
for (c = soundhw; !audio_enabled && c->name; ++c) {
|
412 |
audio_enabled = c->enabled; |
413 |
} |
414 |
|
415 |
if (audio_enabled) {
|
416 |
AudioState *s; |
417 |
|
418 |
s = AUD_init (); |
419 |
if (s) {
|
420 |
for (c = soundhw; c->name; ++c) {
|
421 |
if (c->enabled) {
|
422 |
if (c->isa) {
|
423 |
c->init.init_isa (s); |
424 |
} |
425 |
else {
|
426 |
if (pci_bus) {
|
427 |
c->init.init_pci (pci_bus, s); |
428 |
} |
429 |
} |
430 |
} |
431 |
} |
432 |
} |
433 |
} |
434 |
} |
435 |
#endif
|
436 |
|
437 |
static void pc_init_ne2k_isa(NICInfo *nd) |
438 |
{ |
439 |
static int nb_ne2k = 0; |
440 |
|
441 |
if (nb_ne2k == NE2000_NB_MAX)
|
442 |
return;
|
443 |
isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd); |
444 |
nb_ne2k++; |
445 |
} |
446 |
|
447 |
/* PC hardware initialisation */
|
448 |
static void pc_init1(int ram_size, int vga_ram_size, int boot_device, |
449 |
DisplayState *ds, const char **fd_filename, int snapshot, |
450 |
const char *kernel_filename, const char *kernel_cmdline, |
451 |
const char *initrd_filename, |
452 |
int pci_enabled)
|
453 |
{ |
454 |
char buf[1024]; |
455 |
int ret, linux_boot, initrd_size, i;
|
456 |
ram_addr_t ram_addr, vga_ram_addr, bios_offset, vga_bios_offset; |
457 |
ram_addr_t initrd_offset; |
458 |
int bios_size, isa_bios_size, vga_bios_size;
|
459 |
PCIBus *pci_bus; |
460 |
int piix3_devfn = -1; |
461 |
CPUState *env; |
462 |
NICInfo *nd; |
463 |
|
464 |
linux_boot = (kernel_filename != NULL);
|
465 |
|
466 |
/* init CPUs */
|
467 |
for(i = 0; i < smp_cpus; i++) { |
468 |
env = cpu_init(); |
469 |
if (i != 0) |
470 |
env->hflags |= HF_HALTED_MASK; |
471 |
if (smp_cpus > 1) { |
472 |
/* XXX: enable it in all cases */
|
473 |
env->cpuid_features |= CPUID_APIC; |
474 |
} |
475 |
register_savevm("cpu", i, 4, cpu_save, cpu_load, env); |
476 |
qemu_register_reset(main_cpu_reset, env); |
477 |
if (pci_enabled) {
|
478 |
apic_init(env); |
479 |
} |
480 |
} |
481 |
|
482 |
/* allocate RAM */
|
483 |
ram_addr = qemu_ram_alloc(ram_size); |
484 |
cpu_register_physical_memory(0, ram_size, ram_addr);
|
485 |
|
486 |
/* allocate VGA RAM */
|
487 |
vga_ram_addr = qemu_ram_alloc(vga_ram_size); |
488 |
|
489 |
/* BIOS load */
|
490 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME); |
491 |
bios_size = get_image_size(buf); |
492 |
if (bios_size <= 0 || |
493 |
(bios_size % 65536) != 0) { |
494 |
goto bios_error;
|
495 |
} |
496 |
bios_offset = qemu_ram_alloc(bios_size); |
497 |
ret = load_image(buf, phys_ram_base + bios_offset); |
498 |
if (ret != bios_size) {
|
499 |
bios_error:
|
500 |
fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", buf);
|
501 |
exit(1);
|
502 |
} |
503 |
|
504 |
/* VGA BIOS load */
|
505 |
if (cirrus_vga_enabled) {
|
506 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME); |
507 |
} else {
|
508 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
509 |
} |
510 |
vga_bios_size = get_image_size(buf); |
511 |
if (vga_bios_size <= 0 || vga_bios_size > 65536) |
512 |
goto vga_bios_error;
|
513 |
vga_bios_offset = qemu_ram_alloc(65536);
|
514 |
|
515 |
ret = load_image(buf, phys_ram_base + vga_bios_offset); |
516 |
if (ret != vga_bios_size) {
|
517 |
vga_bios_error:
|
518 |
fprintf(stderr, "qemu: could not load VGA BIOS '%s'\n", buf);
|
519 |
exit(1);
|
520 |
} |
521 |
|
522 |
/* setup basic memory access */
|
523 |
cpu_register_physical_memory(0xc0000, 0x10000, |
524 |
vga_bios_offset | IO_MEM_ROM); |
525 |
|
526 |
/* map the last 128KB of the BIOS in ISA space */
|
527 |
isa_bios_size = bios_size; |
528 |
if (isa_bios_size > (128 * 1024)) |
529 |
isa_bios_size = 128 * 1024; |
530 |
cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size, |
531 |
IO_MEM_UNASSIGNED); |
532 |
cpu_register_physical_memory(0x100000 - isa_bios_size,
|
533 |
isa_bios_size, |
534 |
(bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM); |
535 |
|
536 |
{ |
537 |
ram_addr_t option_rom_offset; |
538 |
int size, offset;
|
539 |
|
540 |
offset = 0;
|
541 |
for (i = 0; i < nb_option_roms; i++) { |
542 |
size = get_image_size(option_rom[i]); |
543 |
if (size < 0) { |
544 |
fprintf(stderr, "Could not load option rom '%s'\n",
|
545 |
option_rom[i]); |
546 |
exit(1);
|
547 |
} |
548 |
if (size > (0x10000 - offset)) |
549 |
goto option_rom_error;
|
550 |
option_rom_offset = qemu_ram_alloc(size); |
551 |
ret = load_image(option_rom[i], phys_ram_base + option_rom_offset); |
552 |
if (ret != size) {
|
553 |
option_rom_error:
|
554 |
fprintf(stderr, "Too many option ROMS\n");
|
555 |
exit(1);
|
556 |
} |
557 |
size = (size + 4095) & ~4095; |
558 |
cpu_register_physical_memory(0xd0000 + offset,
|
559 |
size, option_rom_offset | IO_MEM_ROM); |
560 |
offset += size; |
561 |
} |
562 |
} |
563 |
|
564 |
/* map all the bios at the top of memory */
|
565 |
cpu_register_physical_memory((uint32_t)(-bios_size), |
566 |
bios_size, bios_offset | IO_MEM_ROM); |
567 |
|
568 |
bochs_bios_init(); |
569 |
|
570 |
if (linux_boot) {
|
571 |
uint8_t bootsect[512];
|
572 |
uint8_t old_bootsect[512];
|
573 |
|
574 |
if (bs_table[0] == NULL) { |
575 |
fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
|
576 |
exit(1);
|
577 |
} |
578 |
snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME); |
579 |
ret = load_image(buf, bootsect); |
580 |
if (ret != sizeof(bootsect)) { |
581 |
fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
|
582 |
buf); |
583 |
exit(1);
|
584 |
} |
585 |
|
586 |
if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) { |
587 |
/* copy the MSDOS partition table */
|
588 |
memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40); |
589 |
} |
590 |
|
591 |
bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect)); |
592 |
|
593 |
/* now we can load the kernel */
|
594 |
ret = load_kernel(kernel_filename, |
595 |
phys_ram_base + KERNEL_LOAD_ADDR, |
596 |
phys_ram_base + KERNEL_PARAMS_ADDR); |
597 |
if (ret < 0) { |
598 |
fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
599 |
kernel_filename); |
600 |
exit(1);
|
601 |
} |
602 |
|
603 |
/* load initrd */
|
604 |
initrd_size = 0;
|
605 |
initrd_offset = 0;
|
606 |
if (initrd_filename) {
|
607 |
initrd_size = get_image_size (initrd_filename); |
608 |
if (initrd_size > 0) { |
609 |
initrd_offset = (ram_size - initrd_size) & TARGET_PAGE_MASK; |
610 |
/* Leave space for BIOS ACPI tables. */
|
611 |
initrd_offset -= ACPI_DATA_SIZE; |
612 |
/* Avoid the last 64k to avoid 2.2.x kernel bugs. */
|
613 |
initrd_offset -= 0x10000;
|
614 |
if (initrd_offset > MAX_INITRD_LOAD_ADDR)
|
615 |
initrd_offset = MAX_INITRD_LOAD_ADDR; |
616 |
|
617 |
if (initrd_size > ram_size
|
618 |
|| initrd_offset < KERNEL_LOAD_ADDR + ret) { |
619 |
fprintf(stderr, |
620 |
"qemu: memory too small for initial ram disk '%s'\n",
|
621 |
initrd_filename); |
622 |
exit(1);
|
623 |
} |
624 |
initrd_size = load_image(initrd_filename, |
625 |
phys_ram_base + initrd_offset); |
626 |
} |
627 |
if (initrd_size < 0) { |
628 |
fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
629 |
initrd_filename); |
630 |
exit(1);
|
631 |
} |
632 |
} |
633 |
if (initrd_size > 0) { |
634 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, initrd_offset);
|
635 |
stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
|
636 |
} |
637 |
pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
|
638 |
kernel_cmdline); |
639 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F); |
640 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
|
641 |
KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR); |
642 |
/* loader type */
|
643 |
stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01); |
644 |
} |
645 |
|
646 |
if (pci_enabled) {
|
647 |
pci_bus = i440fx_init(&i440fx_state); |
648 |
piix3_devfn = piix3_init(pci_bus, -1);
|
649 |
} else {
|
650 |
pci_bus = NULL;
|
651 |
} |
652 |
|
653 |
/* init basic PC hardware */
|
654 |
register_ioport_write(0x80, 1, 1, ioport80_write, NULL); |
655 |
|
656 |
register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL); |
657 |
|
658 |
if (cirrus_vga_enabled) {
|
659 |
if (pci_enabled) {
|
660 |
pci_cirrus_vga_init(pci_bus, |
661 |
ds, phys_ram_base + vga_ram_addr, |
662 |
vga_ram_addr, vga_ram_size); |
663 |
} else {
|
664 |
isa_cirrus_vga_init(ds, phys_ram_base + vga_ram_addr, |
665 |
vga_ram_addr, vga_ram_size); |
666 |
} |
667 |
} else if (vmsvga_enabled) { |
668 |
if (pci_enabled)
|
669 |
pci_vmsvga_init(pci_bus, ds, phys_ram_base + ram_size, |
670 |
ram_size, vga_ram_size); |
671 |
else
|
672 |
fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
|
673 |
} else {
|
674 |
if (pci_enabled) {
|
675 |
pci_vga_init(pci_bus, ds, phys_ram_base + vga_ram_addr, |
676 |
vga_ram_addr, vga_ram_size, 0, 0); |
677 |
} else {
|
678 |
isa_vga_init(ds, phys_ram_base + vga_ram_addr, |
679 |
vga_ram_addr, vga_ram_size); |
680 |
} |
681 |
} |
682 |
|
683 |
rtc_state = rtc_init(0x70, 8); |
684 |
|
685 |
register_ioport_read(0x92, 1, 1, ioport92_read, NULL); |
686 |
register_ioport_write(0x92, 1, 1, ioport92_write, NULL); |
687 |
|
688 |
if (pci_enabled) {
|
689 |
ioapic = ioapic_init(); |
690 |
} |
691 |
isa_pic = pic_init(pic_irq_request, first_cpu); |
692 |
pit = pit_init(0x40, 0); |
693 |
pcspk_init(pit); |
694 |
if (pci_enabled) {
|
695 |
pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic); |
696 |
} |
697 |
|
698 |
for(i = 0; i < MAX_SERIAL_PORTS; i++) { |
699 |
if (serial_hds[i]) {
|
700 |
serial_init(&pic_set_irq_new, isa_pic, |
701 |
serial_io[i], serial_irq[i], serial_hds[i]); |
702 |
} |
703 |
} |
704 |
|
705 |
for(i = 0; i < MAX_PARALLEL_PORTS; i++) { |
706 |
if (parallel_hds[i]) {
|
707 |
parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]); |
708 |
} |
709 |
} |
710 |
|
711 |
for(i = 0; i < nb_nics; i++) { |
712 |
nd = &nd_table[i]; |
713 |
if (!nd->model) {
|
714 |
if (pci_enabled) {
|
715 |
nd->model = "ne2k_pci";
|
716 |
} else {
|
717 |
nd->model = "ne2k_isa";
|
718 |
} |
719 |
} |
720 |
if (strcmp(nd->model, "ne2k_isa") == 0) { |
721 |
pc_init_ne2k_isa(nd); |
722 |
} else if (pci_enabled) { |
723 |
pci_nic_init(pci_bus, nd, -1);
|
724 |
} else {
|
725 |
fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
|
726 |
exit(1);
|
727 |
} |
728 |
} |
729 |
|
730 |
if (pci_enabled) {
|
731 |
pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
|
732 |
} else {
|
733 |
for(i = 0; i < 2; i++) { |
734 |
isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i], |
735 |
bs_table[2 * i], bs_table[2 * i + 1]); |
736 |
} |
737 |
} |
738 |
|
739 |
kbd_init(); |
740 |
DMA_init(0);
|
741 |
#ifdef HAS_AUDIO
|
742 |
audio_init(pci_enabled ? pci_bus : NULL);
|
743 |
#endif
|
744 |
|
745 |
floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table); |
746 |
|
747 |
cmos_init(ram_size, boot_device, bs_table); |
748 |
|
749 |
if (pci_enabled && usb_enabled) {
|
750 |
usb_uhci_init(pci_bus, piix3_devfn + 2);
|
751 |
} |
752 |
|
753 |
if (pci_enabled && acpi_enabled) {
|
754 |
uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */ |
755 |
piix4_pm_init(pci_bus, piix3_devfn + 3);
|
756 |
for (i = 0; i < 8; i++) { |
757 |
SMBusDevice *eeprom = smbus_eeprom_device_init(0x50 + i,
|
758 |
eeprom_buf + (i * 256));
|
759 |
piix4_smbus_register_device(eeprom, 0x50 + i);
|
760 |
} |
761 |
} |
762 |
|
763 |
if (i440fx_state) {
|
764 |
i440fx_init_memory_mappings(i440fx_state); |
765 |
} |
766 |
#if 0
|
767 |
/* ??? Need to figure out some way for the user to
|
768 |
specify SCSI devices. */
|
769 |
if (pci_enabled) {
|
770 |
void *scsi;
|
771 |
BlockDriverState *bdrv;
|
772 |
|
773 |
scsi = lsi_scsi_init(pci_bus, -1);
|
774 |
bdrv = bdrv_new("scsidisk");
|
775 |
bdrv_open(bdrv, "scsi_disk.img", 0);
|
776 |
lsi_scsi_attach(scsi, bdrv, -1);
|
777 |
bdrv = bdrv_new("scsicd");
|
778 |
bdrv_open(bdrv, "scsi_cd.iso", 0);
|
779 |
bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
|
780 |
lsi_scsi_attach(scsi, bdrv, -1);
|
781 |
}
|
782 |
#endif
|
783 |
} |
784 |
|
785 |
static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device, |
786 |
DisplayState *ds, const char **fd_filename, |
787 |
int snapshot,
|
788 |
const char *kernel_filename, |
789 |
const char *kernel_cmdline, |
790 |
const char *initrd_filename, |
791 |
const char *cpu_model) |
792 |
{ |
793 |
pc_init1(ram_size, vga_ram_size, boot_device, |
794 |
ds, fd_filename, snapshot, |
795 |
kernel_filename, kernel_cmdline, |
796 |
initrd_filename, 1);
|
797 |
} |
798 |
|
799 |
static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device, |
800 |
DisplayState *ds, const char **fd_filename, |
801 |
int snapshot,
|
802 |
const char *kernel_filename, |
803 |
const char *kernel_cmdline, |
804 |
const char *initrd_filename, |
805 |
const char *cpu_model) |
806 |
{ |
807 |
pc_init1(ram_size, vga_ram_size, boot_device, |
808 |
ds, fd_filename, snapshot, |
809 |
kernel_filename, kernel_cmdline, |
810 |
initrd_filename, 0);
|
811 |
} |
812 |
|
813 |
QEMUMachine pc_machine = { |
814 |
"pc",
|
815 |
"Standard PC",
|
816 |
pc_init_pci, |
817 |
}; |
818 |
|
819 |
QEMUMachine isapc_machine = { |
820 |
"isapc",
|
821 |
"ISA-only PC",
|
822 |
pc_init_isa, |
823 |
}; |