root / target-ppc / translate_init.c @ befa8af3
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1 | 3fc6c082 | bellard | /*
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2 | 3fc6c082 | bellard | * PowerPC CPU initialization for qemu.
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3 | 5fafdf24 | ths | *
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4 | 76a66253 | j_mayer | * Copyright (c) 2003-2007 Jocelyn Mayer
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5 | f7aa5583 | Varun Sethi | * Copyright 2011 Freescale Semiconductor, Inc.
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6 | 3fc6c082 | bellard | *
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7 | 3fc6c082 | bellard | * This library is free software; you can redistribute it and/or
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8 | 3fc6c082 | bellard | * modify it under the terms of the GNU Lesser General Public
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9 | 3fc6c082 | bellard | * License as published by the Free Software Foundation; either
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10 | 3fc6c082 | bellard | * version 2 of the License, or (at your option) any later version.
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11 | 3fc6c082 | bellard | *
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12 | 3fc6c082 | bellard | * This library is distributed in the hope that it will be useful,
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13 | 3fc6c082 | bellard | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | 3fc6c082 | bellard | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | 3fc6c082 | bellard | * Lesser General Public License for more details.
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16 | 3fc6c082 | bellard | *
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17 | 3fc6c082 | bellard | * You should have received a copy of the GNU Lesser General Public
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18 | 8167ee88 | Blue Swirl | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | 3fc6c082 | bellard | */
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20 | 3fc6c082 | bellard | |
21 | 76cad711 | Paolo Bonzini | #include "disas/bfd.h" |
22 | 022c62cb | Paolo Bonzini | #include "exec/gdbstub.h" |
23 | 9c17d615 | Paolo Bonzini | #include <sysemu/kvm.h> |
24 | a1e98583 | David Gibson | #include "kvm_ppc.h" |
25 | 9c17d615 | Paolo Bonzini | #include "sysemu/arch_init.h" |
26 | fe828a4d | Mike Qiu | #include "sysemu/cpus.h" |
27 | 953af181 | Andreas Färber | #include "cpu-models.h" |
28 | 237c0af0 | j_mayer | |
29 | 3fc6c082 | bellard | //#define PPC_DUMP_CPU
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30 | 3fc6c082 | bellard | //#define PPC_DEBUG_SPR
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31 | 80d11f44 | j_mayer | //#define PPC_DUMP_SPR_ACCESSES
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32 | 3fc6c082 | bellard | |
33 | e9df014c | j_mayer | /* For user-mode emulation, we don't emulate any IRQ controller */
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34 | e9df014c | j_mayer | #if defined(CONFIG_USER_ONLY)
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35 | a750fc0b | j_mayer | #define PPC_IRQ_INIT_FN(name) \
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36 | a750fc0b | j_mayer | static inline void glue(glue(ppc, name),_irq_init) (CPUPPCState *env) \ |
37 | a750fc0b | j_mayer | { \ |
38 | e9df014c | j_mayer | } |
39 | e9df014c | j_mayer | #else
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40 | a750fc0b | j_mayer | #define PPC_IRQ_INIT_FN(name) \
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41 | e9df014c | j_mayer | void glue(glue(ppc, name),_irq_init) (CPUPPCState *env);
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42 | e9df014c | j_mayer | #endif
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43 | a750fc0b | j_mayer | |
44 | 4e290a0b | j_mayer | PPC_IRQ_INIT_FN(40x);
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45 | e9df014c | j_mayer | PPC_IRQ_INIT_FN(6xx);
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46 | d0dfae6e | j_mayer | PPC_IRQ_INIT_FN(970);
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47 | 9d52e907 | David Gibson | PPC_IRQ_INIT_FN(POWER7); |
48 | 9fdc60bf | aurel32 | PPC_IRQ_INIT_FN(e500); |
49 | e9df014c | j_mayer | |
50 | 3fc6c082 | bellard | /* Generic callbacks:
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51 | 3fc6c082 | bellard | * do nothing but store/retrieve spr value
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52 | 3fc6c082 | bellard | */
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53 | 91f477fd | Alexander Graf | static void spr_load_dump_spr(int sprn) |
54 | 91f477fd | Alexander Graf | { |
55 | 91f477fd | Alexander Graf | #ifdef PPC_DUMP_SPR_ACCESSES
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56 | 91f477fd | Alexander Graf | TCGv_i32 t0 = tcg_const_i32(sprn); |
57 | 91f477fd | Alexander Graf | gen_helper_load_dump_spr(t0); |
58 | 91f477fd | Alexander Graf | tcg_temp_free_i32(t0); |
59 | 91f477fd | Alexander Graf | #endif
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60 | 91f477fd | Alexander Graf | } |
61 | 91f477fd | Alexander Graf | |
62 | 45d827d2 | aurel32 | static void spr_read_generic (void *opaque, int gprn, int sprn) |
63 | a496775f | j_mayer | { |
64 | 45d827d2 | aurel32 | gen_load_spr(cpu_gpr[gprn], sprn); |
65 | 91f477fd | Alexander Graf | spr_load_dump_spr(sprn); |
66 | 91f477fd | Alexander Graf | } |
67 | 91f477fd | Alexander Graf | |
68 | 91f477fd | Alexander Graf | static void spr_store_dump_spr(int sprn) |
69 | 91f477fd | Alexander Graf | { |
70 | 45d827d2 | aurel32 | #ifdef PPC_DUMP_SPR_ACCESSES
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71 | 91f477fd | Alexander Graf | TCGv_i32 t0 = tcg_const_i32(sprn); |
72 | 91f477fd | Alexander Graf | gen_helper_store_dump_spr(t0); |
73 | 91f477fd | Alexander Graf | tcg_temp_free_i32(t0); |
74 | 45d827d2 | aurel32 | #endif
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75 | a496775f | j_mayer | } |
76 | a496775f | j_mayer | |
77 | 45d827d2 | aurel32 | static void spr_write_generic (void *opaque, int sprn, int gprn) |
78 | a496775f | j_mayer | { |
79 | 45d827d2 | aurel32 | gen_store_spr(sprn, cpu_gpr[gprn]); |
80 | 91f477fd | Alexander Graf | spr_store_dump_spr(sprn); |
81 | 45d827d2 | aurel32 | } |
82 | a496775f | j_mayer | |
83 | a496775f | j_mayer | #if !defined(CONFIG_USER_ONLY)
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84 | ba38ab8d | Alexander Graf | static void spr_write_generic32(void *opaque, int sprn, int gprn) |
85 | ba38ab8d | Alexander Graf | { |
86 | ba38ab8d | Alexander Graf | #ifdef TARGET_PPC64
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87 | ba38ab8d | Alexander Graf | TCGv t0 = tcg_temp_new(); |
88 | ba38ab8d | Alexander Graf | tcg_gen_ext32u_tl(t0, cpu_gpr[gprn]); |
89 | ba38ab8d | Alexander Graf | gen_store_spr(sprn, t0); |
90 | ba38ab8d | Alexander Graf | tcg_temp_free(t0); |
91 | ba38ab8d | Alexander Graf | spr_store_dump_spr(sprn); |
92 | ba38ab8d | Alexander Graf | #else
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93 | ba38ab8d | Alexander Graf | spr_write_generic(opaque, sprn, gprn); |
94 | ba38ab8d | Alexander Graf | #endif
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95 | ba38ab8d | Alexander Graf | } |
96 | ba38ab8d | Alexander Graf | |
97 | 45d827d2 | aurel32 | static void spr_write_clear (void *opaque, int sprn, int gprn) |
98 | a496775f | j_mayer | { |
99 | 45d827d2 | aurel32 | TCGv t0 = tcg_temp_new(); |
100 | 45d827d2 | aurel32 | TCGv t1 = tcg_temp_new(); |
101 | 45d827d2 | aurel32 | gen_load_spr(t0, sprn); |
102 | 45d827d2 | aurel32 | tcg_gen_neg_tl(t1, cpu_gpr[gprn]); |
103 | 45d827d2 | aurel32 | tcg_gen_and_tl(t0, t0, t1); |
104 | 45d827d2 | aurel32 | gen_store_spr(sprn, t0); |
105 | 45d827d2 | aurel32 | tcg_temp_free(t0); |
106 | 45d827d2 | aurel32 | tcg_temp_free(t1); |
107 | a496775f | j_mayer | } |
108 | a496775f | j_mayer | #endif
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109 | a496775f | j_mayer | |
110 | 76a66253 | j_mayer | /* SPR common to all PowerPC */
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111 | 3fc6c082 | bellard | /* XER */
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112 | 45d827d2 | aurel32 | static void spr_read_xer (void *opaque, int gprn, int sprn) |
113 | 3fc6c082 | bellard | { |
114 | da91a00f | Richard Henderson | gen_read_xer(cpu_gpr[gprn]); |
115 | 3fc6c082 | bellard | } |
116 | 3fc6c082 | bellard | |
117 | 45d827d2 | aurel32 | static void spr_write_xer (void *opaque, int sprn, int gprn) |
118 | 3fc6c082 | bellard | { |
119 | da91a00f | Richard Henderson | gen_write_xer(cpu_gpr[gprn]); |
120 | 3fc6c082 | bellard | } |
121 | 3fc6c082 | bellard | |
122 | 3fc6c082 | bellard | /* LR */
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123 | 45d827d2 | aurel32 | static void spr_read_lr (void *opaque, int gprn, int sprn) |
124 | 3fc6c082 | bellard | { |
125 | 45d827d2 | aurel32 | tcg_gen_mov_tl(cpu_gpr[gprn], cpu_lr); |
126 | 3fc6c082 | bellard | } |
127 | 3fc6c082 | bellard | |
128 | 45d827d2 | aurel32 | static void spr_write_lr (void *opaque, int sprn, int gprn) |
129 | 3fc6c082 | bellard | { |
130 | 45d827d2 | aurel32 | tcg_gen_mov_tl(cpu_lr, cpu_gpr[gprn]); |
131 | 3fc6c082 | bellard | } |
132 | 3fc6c082 | bellard | |
133 | 697ab892 | David Gibson | /* CFAR */
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134 | 697ab892 | David Gibson | #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
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135 | 697ab892 | David Gibson | static void spr_read_cfar (void *opaque, int gprn, int sprn) |
136 | 697ab892 | David Gibson | { |
137 | 697ab892 | David Gibson | tcg_gen_mov_tl(cpu_gpr[gprn], cpu_cfar); |
138 | 697ab892 | David Gibson | } |
139 | 697ab892 | David Gibson | |
140 | 697ab892 | David Gibson | static void spr_write_cfar (void *opaque, int sprn, int gprn) |
141 | 697ab892 | David Gibson | { |
142 | 697ab892 | David Gibson | tcg_gen_mov_tl(cpu_cfar, cpu_gpr[gprn]); |
143 | 697ab892 | David Gibson | } |
144 | 697ab892 | David Gibson | #endif /* defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY) */ |
145 | 697ab892 | David Gibson | |
146 | 3fc6c082 | bellard | /* CTR */
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147 | 45d827d2 | aurel32 | static void spr_read_ctr (void *opaque, int gprn, int sprn) |
148 | 3fc6c082 | bellard | { |
149 | 45d827d2 | aurel32 | tcg_gen_mov_tl(cpu_gpr[gprn], cpu_ctr); |
150 | 3fc6c082 | bellard | } |
151 | 3fc6c082 | bellard | |
152 | 45d827d2 | aurel32 | static void spr_write_ctr (void *opaque, int sprn, int gprn) |
153 | 3fc6c082 | bellard | { |
154 | 45d827d2 | aurel32 | tcg_gen_mov_tl(cpu_ctr, cpu_gpr[gprn]); |
155 | 3fc6c082 | bellard | } |
156 | 3fc6c082 | bellard | |
157 | 3fc6c082 | bellard | /* User read access to SPR */
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158 | 3fc6c082 | bellard | /* USPRx */
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159 | 3fc6c082 | bellard | /* UMMCRx */
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160 | 3fc6c082 | bellard | /* UPMCx */
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161 | 3fc6c082 | bellard | /* USIA */
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162 | 3fc6c082 | bellard | /* UDECR */
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163 | 45d827d2 | aurel32 | static void spr_read_ureg (void *opaque, int gprn, int sprn) |
164 | 3fc6c082 | bellard | { |
165 | 45d827d2 | aurel32 | gen_load_spr(cpu_gpr[gprn], sprn + 0x10);
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166 | 3fc6c082 | bellard | } |
167 | 3fc6c082 | bellard | |
168 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC */
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169 | 3fc6c082 | bellard | /* DECR */
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170 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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171 | 45d827d2 | aurel32 | static void spr_read_decr (void *opaque, int gprn, int sprn) |
172 | 3fc6c082 | bellard | { |
173 | 630ecca0 | Tristan Gingold | if (use_icount) {
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174 | 630ecca0 | Tristan Gingold | gen_io_start(); |
175 | 630ecca0 | Tristan Gingold | } |
176 | d0f1562d | Blue Swirl | gen_helper_load_decr(cpu_gpr[gprn], cpu_env); |
177 | 630ecca0 | Tristan Gingold | if (use_icount) {
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178 | 630ecca0 | Tristan Gingold | gen_io_end(); |
179 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
180 | 630ecca0 | Tristan Gingold | } |
181 | 3fc6c082 | bellard | } |
182 | 3fc6c082 | bellard | |
183 | 45d827d2 | aurel32 | static void spr_write_decr (void *opaque, int sprn, int gprn) |
184 | 3fc6c082 | bellard | { |
185 | 630ecca0 | Tristan Gingold | if (use_icount) {
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186 | 630ecca0 | Tristan Gingold | gen_io_start(); |
187 | 630ecca0 | Tristan Gingold | } |
188 | d0f1562d | Blue Swirl | gen_helper_store_decr(cpu_env, cpu_gpr[gprn]); |
189 | 630ecca0 | Tristan Gingold | if (use_icount) {
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190 | 630ecca0 | Tristan Gingold | gen_io_end(); |
191 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
192 | 630ecca0 | Tristan Gingold | } |
193 | 3fc6c082 | bellard | } |
194 | 76a66253 | j_mayer | #endif
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195 | 3fc6c082 | bellard | |
196 | 76a66253 | j_mayer | /* SPR common to all non-embedded PowerPC, except 601 */
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197 | 3fc6c082 | bellard | /* Time base */
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198 | 45d827d2 | aurel32 | static void spr_read_tbl (void *opaque, int gprn, int sprn) |
199 | 3fc6c082 | bellard | { |
200 | 630ecca0 | Tristan Gingold | if (use_icount) {
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201 | 630ecca0 | Tristan Gingold | gen_io_start(); |
202 | 630ecca0 | Tristan Gingold | } |
203 | d0f1562d | Blue Swirl | gen_helper_load_tbl(cpu_gpr[gprn], cpu_env); |
204 | 630ecca0 | Tristan Gingold | if (use_icount) {
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205 | 630ecca0 | Tristan Gingold | gen_io_end(); |
206 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
207 | 630ecca0 | Tristan Gingold | } |
208 | 3fc6c082 | bellard | } |
209 | 3fc6c082 | bellard | |
210 | 45d827d2 | aurel32 | static void spr_read_tbu (void *opaque, int gprn, int sprn) |
211 | 3fc6c082 | bellard | { |
212 | 630ecca0 | Tristan Gingold | if (use_icount) {
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213 | 630ecca0 | Tristan Gingold | gen_io_start(); |
214 | 630ecca0 | Tristan Gingold | } |
215 | d0f1562d | Blue Swirl | gen_helper_load_tbu(cpu_gpr[gprn], cpu_env); |
216 | 630ecca0 | Tristan Gingold | if (use_icount) {
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217 | 630ecca0 | Tristan Gingold | gen_io_end(); |
218 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
219 | 630ecca0 | Tristan Gingold | } |
220 | 3fc6c082 | bellard | } |
221 | 3fc6c082 | bellard | |
222 | a062e36c | j_mayer | __attribute__ (( unused )) |
223 | 45d827d2 | aurel32 | static void spr_read_atbl (void *opaque, int gprn, int sprn) |
224 | a062e36c | j_mayer | { |
225 | d0f1562d | Blue Swirl | gen_helper_load_atbl(cpu_gpr[gprn], cpu_env); |
226 | a062e36c | j_mayer | } |
227 | a062e36c | j_mayer | |
228 | a062e36c | j_mayer | __attribute__ (( unused )) |
229 | 45d827d2 | aurel32 | static void spr_read_atbu (void *opaque, int gprn, int sprn) |
230 | a062e36c | j_mayer | { |
231 | d0f1562d | Blue Swirl | gen_helper_load_atbu(cpu_gpr[gprn], cpu_env); |
232 | a062e36c | j_mayer | } |
233 | a062e36c | j_mayer | |
234 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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235 | 45d827d2 | aurel32 | static void spr_write_tbl (void *opaque, int sprn, int gprn) |
236 | 3fc6c082 | bellard | { |
237 | 630ecca0 | Tristan Gingold | if (use_icount) {
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238 | 630ecca0 | Tristan Gingold | gen_io_start(); |
239 | 630ecca0 | Tristan Gingold | } |
240 | d0f1562d | Blue Swirl | gen_helper_store_tbl(cpu_env, cpu_gpr[gprn]); |
241 | 630ecca0 | Tristan Gingold | if (use_icount) {
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242 | 630ecca0 | Tristan Gingold | gen_io_end(); |
243 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
244 | 630ecca0 | Tristan Gingold | } |
245 | 3fc6c082 | bellard | } |
246 | 3fc6c082 | bellard | |
247 | 45d827d2 | aurel32 | static void spr_write_tbu (void *opaque, int sprn, int gprn) |
248 | 3fc6c082 | bellard | { |
249 | 630ecca0 | Tristan Gingold | if (use_icount) {
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250 | 630ecca0 | Tristan Gingold | gen_io_start(); |
251 | 630ecca0 | Tristan Gingold | } |
252 | d0f1562d | Blue Swirl | gen_helper_store_tbu(cpu_env, cpu_gpr[gprn]); |
253 | 630ecca0 | Tristan Gingold | if (use_icount) {
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254 | 630ecca0 | Tristan Gingold | gen_io_end(); |
255 | 630ecca0 | Tristan Gingold | gen_stop_exception(opaque); |
256 | 630ecca0 | Tristan Gingold | } |
257 | 3fc6c082 | bellard | } |
258 | a062e36c | j_mayer | |
259 | a062e36c | j_mayer | __attribute__ (( unused )) |
260 | 45d827d2 | aurel32 | static void spr_write_atbl (void *opaque, int sprn, int gprn) |
261 | a062e36c | j_mayer | { |
262 | d0f1562d | Blue Swirl | gen_helper_store_atbl(cpu_env, cpu_gpr[gprn]); |
263 | a062e36c | j_mayer | } |
264 | a062e36c | j_mayer | |
265 | a062e36c | j_mayer | __attribute__ (( unused )) |
266 | 45d827d2 | aurel32 | static void spr_write_atbu (void *opaque, int sprn, int gprn) |
267 | a062e36c | j_mayer | { |
268 | d0f1562d | Blue Swirl | gen_helper_store_atbu(cpu_env, cpu_gpr[gprn]); |
269 | a062e36c | j_mayer | } |
270 | 3a7f009a | David Gibson | |
271 | 3a7f009a | David Gibson | #if defined(TARGET_PPC64)
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272 | 3a7f009a | David Gibson | __attribute__ (( unused )) |
273 | 3a7f009a | David Gibson | static void spr_read_purr (void *opaque, int gprn, int sprn) |
274 | 3a7f009a | David Gibson | { |
275 | d0f1562d | Blue Swirl | gen_helper_load_purr(cpu_gpr[gprn], cpu_env); |
276 | 3a7f009a | David Gibson | } |
277 | 3a7f009a | David Gibson | #endif
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278 | 76a66253 | j_mayer | #endif
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279 | 3fc6c082 | bellard | |
280 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
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281 | 3fc6c082 | bellard | /* IBAT0U...IBAT0U */
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282 | 3fc6c082 | bellard | /* IBAT0L...IBAT7L */
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283 | 45d827d2 | aurel32 | static void spr_read_ibat (void *opaque, int gprn, int sprn) |
284 | 3fc6c082 | bellard | { |
285 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); |
286 | 3fc6c082 | bellard | } |
287 | 3fc6c082 | bellard | |
288 | 45d827d2 | aurel32 | static void spr_read_ibat_h (void *opaque, int gprn, int sprn) |
289 | 3fc6c082 | bellard | { |
290 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][(sprn - SPR_IBAT4U) / 2])); |
291 | 3fc6c082 | bellard | } |
292 | 3fc6c082 | bellard | |
293 | 45d827d2 | aurel32 | static void spr_write_ibatu (void *opaque, int sprn, int gprn) |
294 | 3fc6c082 | bellard | { |
295 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0U) / 2);
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296 | c6c7cf05 | Blue Swirl | gen_helper_store_ibatu(cpu_env, t0, cpu_gpr[gprn]); |
297 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
298 | 3fc6c082 | bellard | } |
299 | 3fc6c082 | bellard | |
300 | 45d827d2 | aurel32 | static void spr_write_ibatu_h (void *opaque, int sprn, int gprn) |
301 | 3fc6c082 | bellard | { |
302 | 8daf1781 | Thomas Monjalon | TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4U) / 2) + 4); |
303 | c6c7cf05 | Blue Swirl | gen_helper_store_ibatu(cpu_env, t0, cpu_gpr[gprn]); |
304 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
305 | 3fc6c082 | bellard | } |
306 | 3fc6c082 | bellard | |
307 | 45d827d2 | aurel32 | static void spr_write_ibatl (void *opaque, int sprn, int gprn) |
308 | 3fc6c082 | bellard | { |
309 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0L) / 2);
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310 | c6c7cf05 | Blue Swirl | gen_helper_store_ibatl(cpu_env, t0, cpu_gpr[gprn]); |
311 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
312 | 3fc6c082 | bellard | } |
313 | 3fc6c082 | bellard | |
314 | 45d827d2 | aurel32 | static void spr_write_ibatl_h (void *opaque, int sprn, int gprn) |
315 | 3fc6c082 | bellard | { |
316 | 8daf1781 | Thomas Monjalon | TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_IBAT4L) / 2) + 4); |
317 | c6c7cf05 | Blue Swirl | gen_helper_store_ibatl(cpu_env, t0, cpu_gpr[gprn]); |
318 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
319 | 3fc6c082 | bellard | } |
320 | 3fc6c082 | bellard | |
321 | 3fc6c082 | bellard | /* DBAT0U...DBAT7U */
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322 | 3fc6c082 | bellard | /* DBAT0L...DBAT7L */
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323 | 45d827d2 | aurel32 | static void spr_read_dbat (void *opaque, int gprn, int sprn) |
324 | 3fc6c082 | bellard | { |
325 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, DBAT[sprn & 1][(sprn - SPR_DBAT0U) / 2])); |
326 | 3fc6c082 | bellard | } |
327 | 3fc6c082 | bellard | |
328 | 45d827d2 | aurel32 | static void spr_read_dbat_h (void *opaque, int gprn, int sprn) |
329 | 3fc6c082 | bellard | { |
330 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, DBAT[sprn & 1][((sprn - SPR_DBAT4U) / 2) + 4])); |
331 | 3fc6c082 | bellard | } |
332 | 3fc6c082 | bellard | |
333 | 45d827d2 | aurel32 | static void spr_write_dbatu (void *opaque, int sprn, int gprn) |
334 | 3fc6c082 | bellard | { |
335 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_DBAT0U) / 2);
|
336 | c6c7cf05 | Blue Swirl | gen_helper_store_dbatu(cpu_env, t0, cpu_gpr[gprn]); |
337 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
338 | 3fc6c082 | bellard | } |
339 | 3fc6c082 | bellard | |
340 | 45d827d2 | aurel32 | static void spr_write_dbatu_h (void *opaque, int sprn, int gprn) |
341 | 3fc6c082 | bellard | { |
342 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_DBAT4U) / 2) + 4); |
343 | c6c7cf05 | Blue Swirl | gen_helper_store_dbatu(cpu_env, t0, cpu_gpr[gprn]); |
344 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
345 | 3fc6c082 | bellard | } |
346 | 3fc6c082 | bellard | |
347 | 45d827d2 | aurel32 | static void spr_write_dbatl (void *opaque, int sprn, int gprn) |
348 | 3fc6c082 | bellard | { |
349 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_DBAT0L) / 2);
|
350 | c6c7cf05 | Blue Swirl | gen_helper_store_dbatl(cpu_env, t0, cpu_gpr[gprn]); |
351 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
352 | 3fc6c082 | bellard | } |
353 | 3fc6c082 | bellard | |
354 | 45d827d2 | aurel32 | static void spr_write_dbatl_h (void *opaque, int sprn, int gprn) |
355 | 3fc6c082 | bellard | { |
356 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32(((sprn - SPR_DBAT4L) / 2) + 4); |
357 | c6c7cf05 | Blue Swirl | gen_helper_store_dbatl(cpu_env, t0, cpu_gpr[gprn]); |
358 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
359 | 3fc6c082 | bellard | } |
360 | 3fc6c082 | bellard | |
361 | 3fc6c082 | bellard | /* SDR1 */
|
362 | 45d827d2 | aurel32 | static void spr_write_sdr1 (void *opaque, int sprn, int gprn) |
363 | 3fc6c082 | bellard | { |
364 | d523dd00 | Blue Swirl | gen_helper_store_sdr1(cpu_env, cpu_gpr[gprn]); |
365 | 3fc6c082 | bellard | } |
366 | 3fc6c082 | bellard | |
367 | 76a66253 | j_mayer | /* 64 bits PowerPC specific SPRs */
|
368 | 76a66253 | j_mayer | /* ASR */
|
369 | 578bb252 | j_mayer | #if defined(TARGET_PPC64)
|
370 | 2adab7d6 | blueswir1 | static void spr_read_hior (void *opaque, int gprn, int sprn) |
371 | 2adab7d6 | blueswir1 | { |
372 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, excp_prefix)); |
373 | 2adab7d6 | blueswir1 | } |
374 | 2adab7d6 | blueswir1 | |
375 | 2adab7d6 | blueswir1 | static void spr_write_hior (void *opaque, int sprn, int gprn) |
376 | 2adab7d6 | blueswir1 | { |
377 | 2adab7d6 | blueswir1 | TCGv t0 = tcg_temp_new(); |
378 | 2adab7d6 | blueswir1 | tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0x3FFFFF00000ULL);
|
379 | 1328c2bf | Andreas Färber | tcg_gen_st_tl(t0, cpu_env, offsetof(CPUPPCState, excp_prefix)); |
380 | 2adab7d6 | blueswir1 | tcg_temp_free(t0); |
381 | 2adab7d6 | blueswir1 | } |
382 | 2adab7d6 | blueswir1 | |
383 | 45d827d2 | aurel32 | static void spr_read_asr (void *opaque, int gprn, int sprn) |
384 | 76a66253 | j_mayer | { |
385 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, asr)); |
386 | 76a66253 | j_mayer | } |
387 | 76a66253 | j_mayer | |
388 | 45d827d2 | aurel32 | static void spr_write_asr (void *opaque, int sprn, int gprn) |
389 | 76a66253 | j_mayer | { |
390 | d523dd00 | Blue Swirl | gen_helper_store_asr(cpu_env, cpu_gpr[gprn]); |
391 | 76a66253 | j_mayer | } |
392 | 76a66253 | j_mayer | #endif
|
393 | a750fc0b | j_mayer | #endif
|
394 | 76a66253 | j_mayer | |
395 | 76a66253 | j_mayer | /* PowerPC 601 specific registers */
|
396 | 76a66253 | j_mayer | /* RTC */
|
397 | 45d827d2 | aurel32 | static void spr_read_601_rtcl (void *opaque, int gprn, int sprn) |
398 | 76a66253 | j_mayer | { |
399 | d0f1562d | Blue Swirl | gen_helper_load_601_rtcl(cpu_gpr[gprn], cpu_env); |
400 | 76a66253 | j_mayer | } |
401 | 76a66253 | j_mayer | |
402 | 45d827d2 | aurel32 | static void spr_read_601_rtcu (void *opaque, int gprn, int sprn) |
403 | 76a66253 | j_mayer | { |
404 | d0f1562d | Blue Swirl | gen_helper_load_601_rtcu(cpu_gpr[gprn], cpu_env); |
405 | 76a66253 | j_mayer | } |
406 | 76a66253 | j_mayer | |
407 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
408 | 45d827d2 | aurel32 | static void spr_write_601_rtcu (void *opaque, int sprn, int gprn) |
409 | 76a66253 | j_mayer | { |
410 | d0f1562d | Blue Swirl | gen_helper_store_601_rtcu(cpu_env, cpu_gpr[gprn]); |
411 | 76a66253 | j_mayer | } |
412 | 76a66253 | j_mayer | |
413 | 45d827d2 | aurel32 | static void spr_write_601_rtcl (void *opaque, int sprn, int gprn) |
414 | 76a66253 | j_mayer | { |
415 | d0f1562d | Blue Swirl | gen_helper_store_601_rtcl(cpu_env, cpu_gpr[gprn]); |
416 | 76a66253 | j_mayer | } |
417 | 056401ea | j_mayer | |
418 | 45d827d2 | aurel32 | static void spr_write_hid0_601 (void *opaque, int sprn, int gprn) |
419 | 056401ea | j_mayer | { |
420 | 056401ea | j_mayer | DisasContext *ctx = opaque; |
421 | 056401ea | j_mayer | |
422 | d523dd00 | Blue Swirl | gen_helper_store_hid0_601(cpu_env, cpu_gpr[gprn]); |
423 | 056401ea | j_mayer | /* Must stop the translation as endianness may have changed */
|
424 | e06fcd75 | aurel32 | gen_stop_exception(ctx); |
425 | 056401ea | j_mayer | } |
426 | 76a66253 | j_mayer | #endif
|
427 | 76a66253 | j_mayer | |
428 | 76a66253 | j_mayer | /* Unified bats */
|
429 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
430 | 45d827d2 | aurel32 | static void spr_read_601_ubat (void *opaque, int gprn, int sprn) |
431 | 76a66253 | j_mayer | { |
432 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, IBAT[sprn & 1][(sprn - SPR_IBAT0U) / 2])); |
433 | 76a66253 | j_mayer | } |
434 | 76a66253 | j_mayer | |
435 | 45d827d2 | aurel32 | static void spr_write_601_ubatu (void *opaque, int sprn, int gprn) |
436 | 76a66253 | j_mayer | { |
437 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0U) / 2);
|
438 | c6c7cf05 | Blue Swirl | gen_helper_store_601_batl(cpu_env, t0, cpu_gpr[gprn]); |
439 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
440 | 76a66253 | j_mayer | } |
441 | 76a66253 | j_mayer | |
442 | 45d827d2 | aurel32 | static void spr_write_601_ubatl (void *opaque, int sprn, int gprn) |
443 | 76a66253 | j_mayer | { |
444 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32((sprn - SPR_IBAT0U) / 2);
|
445 | c6c7cf05 | Blue Swirl | gen_helper_store_601_batu(cpu_env, t0, cpu_gpr[gprn]); |
446 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
447 | 76a66253 | j_mayer | } |
448 | 76a66253 | j_mayer | #endif
|
449 | 76a66253 | j_mayer | |
450 | 76a66253 | j_mayer | /* PowerPC 40x specific registers */
|
451 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
452 | 45d827d2 | aurel32 | static void spr_read_40x_pit (void *opaque, int gprn, int sprn) |
453 | 76a66253 | j_mayer | { |
454 | d0f1562d | Blue Swirl | gen_helper_load_40x_pit(cpu_gpr[gprn], cpu_env); |
455 | 76a66253 | j_mayer | } |
456 | 76a66253 | j_mayer | |
457 | 45d827d2 | aurel32 | static void spr_write_40x_pit (void *opaque, int sprn, int gprn) |
458 | 76a66253 | j_mayer | { |
459 | d0f1562d | Blue Swirl | gen_helper_store_40x_pit(cpu_env, cpu_gpr[gprn]); |
460 | 76a66253 | j_mayer | } |
461 | 76a66253 | j_mayer | |
462 | 45d827d2 | aurel32 | static void spr_write_40x_dbcr0 (void *opaque, int sprn, int gprn) |
463 | 8ecc7913 | j_mayer | { |
464 | 8ecc7913 | j_mayer | DisasContext *ctx = opaque; |
465 | 8ecc7913 | j_mayer | |
466 | d523dd00 | Blue Swirl | gen_helper_store_40x_dbcr0(cpu_env, cpu_gpr[gprn]); |
467 | 8ecc7913 | j_mayer | /* We must stop translation as we may have rebooted */
|
468 | e06fcd75 | aurel32 | gen_stop_exception(ctx); |
469 | 8ecc7913 | j_mayer | } |
470 | 8ecc7913 | j_mayer | |
471 | 45d827d2 | aurel32 | static void spr_write_40x_sler (void *opaque, int sprn, int gprn) |
472 | c294fc58 | j_mayer | { |
473 | d523dd00 | Blue Swirl | gen_helper_store_40x_sler(cpu_env, cpu_gpr[gprn]); |
474 | c294fc58 | j_mayer | } |
475 | c294fc58 | j_mayer | |
476 | 45d827d2 | aurel32 | static void spr_write_booke_tcr (void *opaque, int sprn, int gprn) |
477 | 76a66253 | j_mayer | { |
478 | d0f1562d | Blue Swirl | gen_helper_store_booke_tcr(cpu_env, cpu_gpr[gprn]); |
479 | 76a66253 | j_mayer | } |
480 | 76a66253 | j_mayer | |
481 | 45d827d2 | aurel32 | static void spr_write_booke_tsr (void *opaque, int sprn, int gprn) |
482 | 76a66253 | j_mayer | { |
483 | d0f1562d | Blue Swirl | gen_helper_store_booke_tsr(cpu_env, cpu_gpr[gprn]); |
484 | 76a66253 | j_mayer | } |
485 | 76a66253 | j_mayer | #endif
|
486 | 76a66253 | j_mayer | |
487 | 76a66253 | j_mayer | /* PowerPC 403 specific registers */
|
488 | 76a66253 | j_mayer | /* PBL1 / PBU1 / PBL2 / PBU2 */
|
489 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
490 | 45d827d2 | aurel32 | static void spr_read_403_pbr (void *opaque, int gprn, int sprn) |
491 | 76a66253 | j_mayer | { |
492 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(cpu_gpr[gprn], cpu_env, offsetof(CPUPPCState, pb[sprn - SPR_403_PBL1])); |
493 | 76a66253 | j_mayer | } |
494 | 76a66253 | j_mayer | |
495 | 45d827d2 | aurel32 | static void spr_write_403_pbr (void *opaque, int sprn, int gprn) |
496 | 76a66253 | j_mayer | { |
497 | 45d827d2 | aurel32 | TCGv_i32 t0 = tcg_const_i32(sprn - SPR_403_PBL1); |
498 | d523dd00 | Blue Swirl | gen_helper_store_403_pbr(cpu_env, t0, cpu_gpr[gprn]); |
499 | 45d827d2 | aurel32 | tcg_temp_free_i32(t0); |
500 | 76a66253 | j_mayer | } |
501 | 76a66253 | j_mayer | |
502 | 45d827d2 | aurel32 | static void spr_write_pir (void *opaque, int sprn, int gprn) |
503 | 3fc6c082 | bellard | { |
504 | 45d827d2 | aurel32 | TCGv t0 = tcg_temp_new(); |
505 | 45d827d2 | aurel32 | tcg_gen_andi_tl(t0, cpu_gpr[gprn], 0xF);
|
506 | 45d827d2 | aurel32 | gen_store_spr(SPR_PIR, t0); |
507 | 45d827d2 | aurel32 | tcg_temp_free(t0); |
508 | 3fc6c082 | bellard | } |
509 | 76a66253 | j_mayer | #endif
|
510 | 3fc6c082 | bellard | |
511 | d34defbc | aurel32 | /* SPE specific registers */
|
512 | d34defbc | aurel32 | static void spr_read_spefscr (void *opaque, int gprn, int sprn) |
513 | d34defbc | aurel32 | { |
514 | d34defbc | aurel32 | TCGv_i32 t0 = tcg_temp_new_i32(); |
515 | 1328c2bf | Andreas Färber | tcg_gen_ld_i32(t0, cpu_env, offsetof(CPUPPCState, spe_fscr)); |
516 | d34defbc | aurel32 | tcg_gen_extu_i32_tl(cpu_gpr[gprn], t0); |
517 | d34defbc | aurel32 | tcg_temp_free_i32(t0); |
518 | d34defbc | aurel32 | } |
519 | d34defbc | aurel32 | |
520 | d34defbc | aurel32 | static void spr_write_spefscr (void *opaque, int sprn, int gprn) |
521 | d34defbc | aurel32 | { |
522 | d34defbc | aurel32 | TCGv_i32 t0 = tcg_temp_new_i32(); |
523 | d34defbc | aurel32 | tcg_gen_trunc_tl_i32(t0, cpu_gpr[gprn]); |
524 | 1328c2bf | Andreas Färber | tcg_gen_st_i32(t0, cpu_env, offsetof(CPUPPCState, spe_fscr)); |
525 | d34defbc | aurel32 | tcg_temp_free_i32(t0); |
526 | d34defbc | aurel32 | } |
527 | d34defbc | aurel32 | |
528 | 6f5d427d | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
529 | 6f5d427d | j_mayer | /* Callback used to write the exception vector base */
|
530 | 45d827d2 | aurel32 | static void spr_write_excp_prefix (void *opaque, int sprn, int gprn) |
531 | 6f5d427d | j_mayer | { |
532 | 45d827d2 | aurel32 | TCGv t0 = tcg_temp_new(); |
533 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUPPCState, ivpr_mask)); |
534 | 45d827d2 | aurel32 | tcg_gen_and_tl(t0, t0, cpu_gpr[gprn]); |
535 | 1328c2bf | Andreas Färber | tcg_gen_st_tl(t0, cpu_env, offsetof(CPUPPCState, excp_prefix)); |
536 | 45d827d2 | aurel32 | gen_store_spr(sprn, t0); |
537 | 69bd5820 | aurel32 | tcg_temp_free(t0); |
538 | 6f5d427d | j_mayer | } |
539 | 6f5d427d | j_mayer | |
540 | 45d827d2 | aurel32 | static void spr_write_excp_vector (void *opaque, int sprn, int gprn) |
541 | 6f5d427d | j_mayer | { |
542 | 6f5d427d | j_mayer | DisasContext *ctx = opaque; |
543 | e9205258 | Alexander Graf | int sprn_offs;
|
544 | 6f5d427d | j_mayer | |
545 | 6f5d427d | j_mayer | if (sprn >= SPR_BOOKE_IVOR0 && sprn <= SPR_BOOKE_IVOR15) {
|
546 | e9205258 | Alexander Graf | sprn_offs = sprn - SPR_BOOKE_IVOR0; |
547 | 6f5d427d | j_mayer | } else if (sprn >= SPR_BOOKE_IVOR32 && sprn <= SPR_BOOKE_IVOR37) { |
548 | e9205258 | Alexander Graf | sprn_offs = sprn - SPR_BOOKE_IVOR32 + 32;
|
549 | e9205258 | Alexander Graf | } else if (sprn >= SPR_BOOKE_IVOR38 && sprn <= SPR_BOOKE_IVOR42) { |
550 | e9205258 | Alexander Graf | sprn_offs = sprn - SPR_BOOKE_IVOR38 + 38;
|
551 | 6f5d427d | j_mayer | } else {
|
552 | 6f5d427d | j_mayer | printf("Trying to write an unknown exception vector %d %03x\n",
|
553 | 6f5d427d | j_mayer | sprn, sprn); |
554 | e06fcd75 | aurel32 | gen_inval_exception(ctx, POWERPC_EXCP_PRIV_REG); |
555 | e9205258 | Alexander Graf | return;
|
556 | 6f5d427d | j_mayer | } |
557 | e9205258 | Alexander Graf | |
558 | e9205258 | Alexander Graf | TCGv t0 = tcg_temp_new(); |
559 | 1328c2bf | Andreas Färber | tcg_gen_ld_tl(t0, cpu_env, offsetof(CPUPPCState, ivor_mask)); |
560 | e9205258 | Alexander Graf | tcg_gen_and_tl(t0, t0, cpu_gpr[gprn]); |
561 | 1328c2bf | Andreas Färber | tcg_gen_st_tl(t0, cpu_env, offsetof(CPUPPCState, excp_vectors[sprn_offs])); |
562 | e9205258 | Alexander Graf | gen_store_spr(sprn, t0); |
563 | e9205258 | Alexander Graf | tcg_temp_free(t0); |
564 | 6f5d427d | j_mayer | } |
565 | 6f5d427d | j_mayer | #endif
|
566 | 6f5d427d | j_mayer | |
567 | cf8358c8 | aurel32 | static inline void vscr_init (CPUPPCState *env, uint32_t val) |
568 | cf8358c8 | aurel32 | { |
569 | cf8358c8 | aurel32 | env->vscr = val; |
570 | cf8358c8 | aurel32 | /* Altivec always uses round-to-nearest */
|
571 | cf8358c8 | aurel32 | set_float_rounding_mode(float_round_nearest_even, &env->vec_status); |
572 | cf8358c8 | aurel32 | set_flush_to_zero(vscr_nj, &env->vec_status); |
573 | cf8358c8 | aurel32 | } |
574 | cf8358c8 | aurel32 | |
575 | 76a66253 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
576 | 76a66253 | j_mayer | #define spr_register(env, num, name, uea_read, uea_write, \
|
577 | 76a66253 | j_mayer | oea_read, oea_write, initial_value) \ |
578 | 76a66253 | j_mayer | do { \
|
579 | 76a66253 | j_mayer | _spr_register(env, num, name, uea_read, uea_write, initial_value); \ |
580 | 76a66253 | j_mayer | } while (0) |
581 | 76a66253 | j_mayer | static inline void _spr_register (CPUPPCState *env, int num, |
582 | b55266b5 | blueswir1 | const char *name, |
583 | 45d827d2 | aurel32 | void (*uea_read)(void *opaque, int gprn, int sprn), |
584 | 45d827d2 | aurel32 | void (*uea_write)(void *opaque, int sprn, int gprn), |
585 | 76a66253 | j_mayer | target_ulong initial_value) |
586 | 76a66253 | j_mayer | #else
|
587 | 3fc6c082 | bellard | static inline void spr_register (CPUPPCState *env, int num, |
588 | b55266b5 | blueswir1 | const char *name, |
589 | 45d827d2 | aurel32 | void (*uea_read)(void *opaque, int gprn, int sprn), |
590 | 45d827d2 | aurel32 | void (*uea_write)(void *opaque, int sprn, int gprn), |
591 | 45d827d2 | aurel32 | void (*oea_read)(void *opaque, int gprn, int sprn), |
592 | 45d827d2 | aurel32 | void (*oea_write)(void *opaque, int sprn, int gprn), |
593 | 3fc6c082 | bellard | target_ulong initial_value) |
594 | 76a66253 | j_mayer | #endif
|
595 | 3fc6c082 | bellard | { |
596 | c227f099 | Anthony Liguori | ppc_spr_t *spr; |
597 | 3fc6c082 | bellard | |
598 | 3fc6c082 | bellard | spr = &env->spr_cb[num]; |
599 | 3fc6c082 | bellard | if (spr->name != NULL ||env-> spr[num] != 0x00000000 || |
600 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
601 | 76a66253 | j_mayer | spr->oea_read != NULL || spr->oea_write != NULL || |
602 | 76a66253 | j_mayer | #endif
|
603 | 76a66253 | j_mayer | spr->uea_read != NULL || spr->uea_write != NULL) { |
604 | 3fc6c082 | bellard | printf("Error: Trying to register SPR %d (%03x) twice !\n", num, num);
|
605 | 3fc6c082 | bellard | exit(1);
|
606 | 3fc6c082 | bellard | } |
607 | 3fc6c082 | bellard | #if defined(PPC_DEBUG_SPR)
|
608 | 90e189ec | Blue Swirl | printf("*** register spr %d (%03x) %s val " TARGET_FMT_lx "\n", num, num, |
609 | 90e189ec | Blue Swirl | name, initial_value); |
610 | 3fc6c082 | bellard | #endif
|
611 | 3fc6c082 | bellard | spr->name = name; |
612 | 3fc6c082 | bellard | spr->uea_read = uea_read; |
613 | 3fc6c082 | bellard | spr->uea_write = uea_write; |
614 | 76a66253 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
615 | 3fc6c082 | bellard | spr->oea_read = oea_read; |
616 | 3fc6c082 | bellard | spr->oea_write = oea_write; |
617 | 76a66253 | j_mayer | #endif
|
618 | 3fc6c082 | bellard | env->spr[num] = initial_value; |
619 | 3fc6c082 | bellard | } |
620 | 3fc6c082 | bellard | |
621 | 3fc6c082 | bellard | /* Generic PowerPC SPRs */
|
622 | 3fc6c082 | bellard | static void gen_spr_generic (CPUPPCState *env) |
623 | 3fc6c082 | bellard | { |
624 | 3fc6c082 | bellard | /* Integer processing */
|
625 | 3fc6c082 | bellard | spr_register(env, SPR_XER, "XER",
|
626 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
627 | 3fc6c082 | bellard | &spr_read_xer, &spr_write_xer, |
628 | 3fc6c082 | bellard | 0x00000000);
|
629 | 3fc6c082 | bellard | /* Branch contol */
|
630 | 3fc6c082 | bellard | spr_register(env, SPR_LR, "LR",
|
631 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
632 | 3fc6c082 | bellard | &spr_read_lr, &spr_write_lr, |
633 | 3fc6c082 | bellard | 0x00000000);
|
634 | 3fc6c082 | bellard | spr_register(env, SPR_CTR, "CTR",
|
635 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
636 | 3fc6c082 | bellard | &spr_read_ctr, &spr_write_ctr, |
637 | 3fc6c082 | bellard | 0x00000000);
|
638 | 3fc6c082 | bellard | /* Interrupt processing */
|
639 | 3fc6c082 | bellard | spr_register(env, SPR_SRR0, "SRR0",
|
640 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
641 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
642 | 3fc6c082 | bellard | 0x00000000);
|
643 | 3fc6c082 | bellard | spr_register(env, SPR_SRR1, "SRR1",
|
644 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
645 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
646 | 3fc6c082 | bellard | 0x00000000);
|
647 | 3fc6c082 | bellard | /* Processor control */
|
648 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG0, "SPRG0",
|
649 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
650 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
651 | 3fc6c082 | bellard | 0x00000000);
|
652 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG1, "SPRG1",
|
653 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
654 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
655 | 3fc6c082 | bellard | 0x00000000);
|
656 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG2, "SPRG2",
|
657 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
658 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
659 | 3fc6c082 | bellard | 0x00000000);
|
660 | 3fc6c082 | bellard | spr_register(env, SPR_SPRG3, "SPRG3",
|
661 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
662 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
663 | 3fc6c082 | bellard | 0x00000000);
|
664 | 3fc6c082 | bellard | } |
665 | 3fc6c082 | bellard | |
666 | 3fc6c082 | bellard | /* SPR common to all non-embedded PowerPC, including 601 */
|
667 | 3fc6c082 | bellard | static void gen_spr_ne_601 (CPUPPCState *env) |
668 | 3fc6c082 | bellard | { |
669 | 3fc6c082 | bellard | /* Exception processing */
|
670 | 3fc6c082 | bellard | spr_register(env, SPR_DSISR, "DSISR",
|
671 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
672 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
673 | 3fc6c082 | bellard | 0x00000000);
|
674 | 3fc6c082 | bellard | spr_register(env, SPR_DAR, "DAR",
|
675 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
676 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
677 | 3fc6c082 | bellard | 0x00000000);
|
678 | 3fc6c082 | bellard | /* Timer */
|
679 | 3fc6c082 | bellard | spr_register(env, SPR_DECR, "DECR",
|
680 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
681 | 3fc6c082 | bellard | &spr_read_decr, &spr_write_decr, |
682 | 3fc6c082 | bellard | 0x00000000);
|
683 | 3fc6c082 | bellard | /* Memory management */
|
684 | 3fc6c082 | bellard | spr_register(env, SPR_SDR1, "SDR1",
|
685 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
686 | bb593904 | David Gibson | &spr_read_generic, &spr_write_sdr1, |
687 | 3fc6c082 | bellard | 0x00000000);
|
688 | 3fc6c082 | bellard | } |
689 | 3fc6c082 | bellard | |
690 | 3fc6c082 | bellard | /* BATs 0-3 */
|
691 | 3fc6c082 | bellard | static void gen_low_BATs (CPUPPCState *env) |
692 | 3fc6c082 | bellard | { |
693 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
694 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
695 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
696 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
697 | 3fc6c082 | bellard | 0x00000000);
|
698 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
699 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
700 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
701 | 3fc6c082 | bellard | 0x00000000);
|
702 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
703 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
704 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
705 | 3fc6c082 | bellard | 0x00000000);
|
706 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
707 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
708 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
709 | 3fc6c082 | bellard | 0x00000000);
|
710 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
711 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
712 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
713 | 3fc6c082 | bellard | 0x00000000);
|
714 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
715 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
716 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
717 | 3fc6c082 | bellard | 0x00000000);
|
718 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
719 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
720 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatu, |
721 | 3fc6c082 | bellard | 0x00000000);
|
722 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
723 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
724 | 3fc6c082 | bellard | &spr_read_ibat, &spr_write_ibatl, |
725 | 3fc6c082 | bellard | 0x00000000);
|
726 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0U, "DBAT0U",
|
727 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
728 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
729 | 3fc6c082 | bellard | 0x00000000);
|
730 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT0L, "DBAT0L",
|
731 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
732 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
733 | 3fc6c082 | bellard | 0x00000000);
|
734 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1U, "DBAT1U",
|
735 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
736 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
737 | 3fc6c082 | bellard | 0x00000000);
|
738 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT1L, "DBAT1L",
|
739 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
740 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
741 | 3fc6c082 | bellard | 0x00000000);
|
742 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2U, "DBAT2U",
|
743 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
744 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
745 | 3fc6c082 | bellard | 0x00000000);
|
746 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT2L, "DBAT2L",
|
747 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
748 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
749 | 3fc6c082 | bellard | 0x00000000);
|
750 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3U, "DBAT3U",
|
751 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
752 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatu, |
753 | 3fc6c082 | bellard | 0x00000000);
|
754 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT3L, "DBAT3L",
|
755 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
756 | 3fc6c082 | bellard | &spr_read_dbat, &spr_write_dbatl, |
757 | 3fc6c082 | bellard | 0x00000000);
|
758 | a750fc0b | j_mayer | env->nb_BATs += 4;
|
759 | f2e63a42 | j_mayer | #endif
|
760 | 3fc6c082 | bellard | } |
761 | 3fc6c082 | bellard | |
762 | 3fc6c082 | bellard | /* BATs 4-7 */
|
763 | 3fc6c082 | bellard | static void gen_high_BATs (CPUPPCState *env) |
764 | 3fc6c082 | bellard | { |
765 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
766 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4U, "IBAT4U",
|
767 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
768 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
769 | 3fc6c082 | bellard | 0x00000000);
|
770 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT4L, "IBAT4L",
|
771 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
772 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
773 | 3fc6c082 | bellard | 0x00000000);
|
774 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5U, "IBAT5U",
|
775 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
776 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
777 | 3fc6c082 | bellard | 0x00000000);
|
778 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT5L, "IBAT5L",
|
779 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
780 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
781 | 3fc6c082 | bellard | 0x00000000);
|
782 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6U, "IBAT6U",
|
783 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
784 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
785 | 3fc6c082 | bellard | 0x00000000);
|
786 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT6L, "IBAT6L",
|
787 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
788 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
789 | 3fc6c082 | bellard | 0x00000000);
|
790 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7U, "IBAT7U",
|
791 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
792 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatu_h, |
793 | 3fc6c082 | bellard | 0x00000000);
|
794 | 3fc6c082 | bellard | spr_register(env, SPR_IBAT7L, "IBAT7L",
|
795 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
796 | 3fc6c082 | bellard | &spr_read_ibat_h, &spr_write_ibatl_h, |
797 | 3fc6c082 | bellard | 0x00000000);
|
798 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4U, "DBAT4U",
|
799 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
800 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
801 | 3fc6c082 | bellard | 0x00000000);
|
802 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT4L, "DBAT4L",
|
803 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
804 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
805 | 3fc6c082 | bellard | 0x00000000);
|
806 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5U, "DBAT5U",
|
807 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
808 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
809 | 3fc6c082 | bellard | 0x00000000);
|
810 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT5L, "DBAT5L",
|
811 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
812 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
813 | 3fc6c082 | bellard | 0x00000000);
|
814 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6U, "DBAT6U",
|
815 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
816 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
817 | 3fc6c082 | bellard | 0x00000000);
|
818 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT6L, "DBAT6L",
|
819 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
820 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
821 | 3fc6c082 | bellard | 0x00000000);
|
822 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7U, "DBAT7U",
|
823 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
824 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatu_h, |
825 | 3fc6c082 | bellard | 0x00000000);
|
826 | 3fc6c082 | bellard | spr_register(env, SPR_DBAT7L, "DBAT7L",
|
827 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
828 | 3fc6c082 | bellard | &spr_read_dbat_h, &spr_write_dbatl_h, |
829 | 3fc6c082 | bellard | 0x00000000);
|
830 | a750fc0b | j_mayer | env->nb_BATs += 4;
|
831 | f2e63a42 | j_mayer | #endif
|
832 | 3fc6c082 | bellard | } |
833 | 3fc6c082 | bellard | |
834 | 3fc6c082 | bellard | /* Generic PowerPC time base */
|
835 | 3fc6c082 | bellard | static void gen_tbl (CPUPPCState *env) |
836 | 3fc6c082 | bellard | { |
837 | 3fc6c082 | bellard | spr_register(env, SPR_VTBL, "TBL",
|
838 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
839 | 3fc6c082 | bellard | &spr_read_tbl, SPR_NOACCESS, |
840 | 3fc6c082 | bellard | 0x00000000);
|
841 | 3fc6c082 | bellard | spr_register(env, SPR_TBL, "TBL",
|
842 | de6a1dec | Dmitry Ilyevsky | &spr_read_tbl, SPR_NOACCESS, |
843 | de6a1dec | Dmitry Ilyevsky | &spr_read_tbl, &spr_write_tbl, |
844 | 3fc6c082 | bellard | 0x00000000);
|
845 | 3fc6c082 | bellard | spr_register(env, SPR_VTBU, "TBU",
|
846 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
847 | 3fc6c082 | bellard | &spr_read_tbu, SPR_NOACCESS, |
848 | 3fc6c082 | bellard | 0x00000000);
|
849 | 3fc6c082 | bellard | spr_register(env, SPR_TBU, "TBU",
|
850 | de6a1dec | Dmitry Ilyevsky | &spr_read_tbu, SPR_NOACCESS, |
851 | de6a1dec | Dmitry Ilyevsky | &spr_read_tbu, &spr_write_tbu, |
852 | 3fc6c082 | bellard | 0x00000000);
|
853 | 3fc6c082 | bellard | } |
854 | 3fc6c082 | bellard | |
855 | 76a66253 | j_mayer | /* Softare table search registers */
|
856 | 76a66253 | j_mayer | static void gen_6xx_7xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways) |
857 | 76a66253 | j_mayer | { |
858 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
859 | 76a66253 | j_mayer | env->nb_tlb = nb_tlbs; |
860 | 76a66253 | j_mayer | env->nb_ways = nb_ways; |
861 | 76a66253 | j_mayer | env->id_tlbs = 1;
|
862 | 1c53accc | Alexander Graf | env->tlb_type = TLB_6XX; |
863 | 76a66253 | j_mayer | spr_register(env, SPR_DMISS, "DMISS",
|
864 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
865 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
866 | 76a66253 | j_mayer | 0x00000000);
|
867 | 76a66253 | j_mayer | spr_register(env, SPR_DCMP, "DCMP",
|
868 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
869 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
870 | 76a66253 | j_mayer | 0x00000000);
|
871 | 76a66253 | j_mayer | spr_register(env, SPR_HASH1, "HASH1",
|
872 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
873 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
874 | 76a66253 | j_mayer | 0x00000000);
|
875 | 76a66253 | j_mayer | spr_register(env, SPR_HASH2, "HASH2",
|
876 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
877 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
878 | 76a66253 | j_mayer | 0x00000000);
|
879 | 76a66253 | j_mayer | spr_register(env, SPR_IMISS, "IMISS",
|
880 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
881 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
882 | 76a66253 | j_mayer | 0x00000000);
|
883 | 76a66253 | j_mayer | spr_register(env, SPR_ICMP, "ICMP",
|
884 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
885 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
886 | 76a66253 | j_mayer | 0x00000000);
|
887 | 76a66253 | j_mayer | spr_register(env, SPR_RPA, "RPA",
|
888 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
889 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
890 | 76a66253 | j_mayer | 0x00000000);
|
891 | f2e63a42 | j_mayer | #endif
|
892 | 76a66253 | j_mayer | } |
893 | 76a66253 | j_mayer | |
894 | 76a66253 | j_mayer | /* SPR common to MPC755 and G2 */
|
895 | 76a66253 | j_mayer | static void gen_spr_G2_755 (CPUPPCState *env) |
896 | 76a66253 | j_mayer | { |
897 | 76a66253 | j_mayer | /* SGPRs */
|
898 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
899 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
900 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
901 | 76a66253 | j_mayer | 0x00000000);
|
902 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
903 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
904 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
905 | 76a66253 | j_mayer | 0x00000000);
|
906 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
907 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
908 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
909 | 76a66253 | j_mayer | 0x00000000);
|
910 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
911 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
912 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
913 | 76a66253 | j_mayer | 0x00000000);
|
914 | 76a66253 | j_mayer | } |
915 | 76a66253 | j_mayer | |
916 | 3fc6c082 | bellard | /* SPR common to all 7xx PowerPC implementations */
|
917 | 3fc6c082 | bellard | static void gen_spr_7xx (CPUPPCState *env) |
918 | 3fc6c082 | bellard | { |
919 | 3fc6c082 | bellard | /* Breakpoints */
|
920 | 3fc6c082 | bellard | /* XXX : not implemented */
|
921 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
922 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
923 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
924 | 3fc6c082 | bellard | 0x00000000);
|
925 | 3fc6c082 | bellard | /* XXX : not implemented */
|
926 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
927 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
928 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
929 | 3fc6c082 | bellard | 0x00000000);
|
930 | 3fc6c082 | bellard | /* Cache management */
|
931 | 3fc6c082 | bellard | /* XXX : not implemented */
|
932 | 3fc6c082 | bellard | spr_register(env, SPR_ICTC, "ICTC",
|
933 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
934 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
935 | 3fc6c082 | bellard | 0x00000000);
|
936 | 3fc6c082 | bellard | /* Performance monitors */
|
937 | 3fc6c082 | bellard | /* XXX : not implemented */
|
938 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
939 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
940 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
941 | 3fc6c082 | bellard | 0x00000000);
|
942 | 3fc6c082 | bellard | /* XXX : not implemented */
|
943 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR1, "MMCR1",
|
944 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
945 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
946 | 3fc6c082 | bellard | 0x00000000);
|
947 | 3fc6c082 | bellard | /* XXX : not implemented */
|
948 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
949 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
950 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
951 | 3fc6c082 | bellard | 0x00000000);
|
952 | 3fc6c082 | bellard | /* XXX : not implemented */
|
953 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
954 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
955 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
956 | 3fc6c082 | bellard | 0x00000000);
|
957 | 3fc6c082 | bellard | /* XXX : not implemented */
|
958 | 3fc6c082 | bellard | spr_register(env, SPR_PMC3, "PMC3",
|
959 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
960 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
961 | 3fc6c082 | bellard | 0x00000000);
|
962 | 3fc6c082 | bellard | /* XXX : not implemented */
|
963 | 3fc6c082 | bellard | spr_register(env, SPR_PMC4, "PMC4",
|
964 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
965 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
966 | 3fc6c082 | bellard | 0x00000000);
|
967 | 3fc6c082 | bellard | /* XXX : not implemented */
|
968 | a750fc0b | j_mayer | spr_register(env, SPR_SIAR, "SIAR",
|
969 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
970 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
971 | 3fc6c082 | bellard | 0x00000000);
|
972 | 578bb252 | j_mayer | /* XXX : not implemented */
|
973 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR0, "UMMCR0",
|
974 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
975 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
976 | 3fc6c082 | bellard | 0x00000000);
|
977 | 578bb252 | j_mayer | /* XXX : not implemented */
|
978 | 3fc6c082 | bellard | spr_register(env, SPR_UMMCR1, "UMMCR1",
|
979 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
980 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
981 | 3fc6c082 | bellard | 0x00000000);
|
982 | 578bb252 | j_mayer | /* XXX : not implemented */
|
983 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC1, "UPMC1",
|
984 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
985 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
986 | 3fc6c082 | bellard | 0x00000000);
|
987 | 578bb252 | j_mayer | /* XXX : not implemented */
|
988 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC2, "UPMC2",
|
989 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
990 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
991 | 3fc6c082 | bellard | 0x00000000);
|
992 | 578bb252 | j_mayer | /* XXX : not implemented */
|
993 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC3, "UPMC3",
|
994 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
995 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
996 | 3fc6c082 | bellard | 0x00000000);
|
997 | 578bb252 | j_mayer | /* XXX : not implemented */
|
998 | 3fc6c082 | bellard | spr_register(env, SPR_UPMC4, "UPMC4",
|
999 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
1000 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
1001 | 3fc6c082 | bellard | 0x00000000);
|
1002 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1003 | a750fc0b | j_mayer | spr_register(env, SPR_USIAR, "USIAR",
|
1004 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
1005 | 3fc6c082 | bellard | &spr_read_ureg, SPR_NOACCESS, |
1006 | 3fc6c082 | bellard | 0x00000000);
|
1007 | a750fc0b | j_mayer | /* External access control */
|
1008 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1009 | a750fc0b | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
1010 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1011 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1012 | 3fc6c082 | bellard | 0x00000000);
|
1013 | a750fc0b | j_mayer | } |
1014 | a750fc0b | j_mayer | |
1015 | a750fc0b | j_mayer | static void gen_spr_thrm (CPUPPCState *env) |
1016 | a750fc0b | j_mayer | { |
1017 | a750fc0b | j_mayer | /* Thermal management */
|
1018 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1019 | a750fc0b | j_mayer | spr_register(env, SPR_THRM1, "THRM1",
|
1020 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1021 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1022 | 3fc6c082 | bellard | 0x00000000);
|
1023 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1024 | a750fc0b | j_mayer | spr_register(env, SPR_THRM2, "THRM2",
|
1025 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1026 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1027 | 3fc6c082 | bellard | 0x00000000);
|
1028 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1029 | a750fc0b | j_mayer | spr_register(env, SPR_THRM3, "THRM3",
|
1030 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1031 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1032 | 3fc6c082 | bellard | 0x00000000);
|
1033 | 3fc6c082 | bellard | } |
1034 | 3fc6c082 | bellard | |
1035 | 3fc6c082 | bellard | /* SPR specific to PowerPC 604 implementation */
|
1036 | 3fc6c082 | bellard | static void gen_spr_604 (CPUPPCState *env) |
1037 | 3fc6c082 | bellard | { |
1038 | 3fc6c082 | bellard | /* Processor identification */
|
1039 | 3fc6c082 | bellard | spr_register(env, SPR_PIR, "PIR",
|
1040 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1041 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_pir, |
1042 | 3fc6c082 | bellard | 0x00000000);
|
1043 | 3fc6c082 | bellard | /* Breakpoints */
|
1044 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1045 | 3fc6c082 | bellard | spr_register(env, SPR_IABR, "IABR",
|
1046 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1047 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1048 | 3fc6c082 | bellard | 0x00000000);
|
1049 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1050 | 3fc6c082 | bellard | spr_register(env, SPR_DABR, "DABR",
|
1051 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1052 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1053 | 3fc6c082 | bellard | 0x00000000);
|
1054 | 3fc6c082 | bellard | /* Performance counters */
|
1055 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1056 | 3fc6c082 | bellard | spr_register(env, SPR_MMCR0, "MMCR0",
|
1057 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1058 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1059 | 3fc6c082 | bellard | 0x00000000);
|
1060 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1061 | 3fc6c082 | bellard | spr_register(env, SPR_PMC1, "PMC1",
|
1062 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1063 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1064 | 3fc6c082 | bellard | 0x00000000);
|
1065 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1066 | 3fc6c082 | bellard | spr_register(env, SPR_PMC2, "PMC2",
|
1067 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1068 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1069 | 3fc6c082 | bellard | 0x00000000);
|
1070 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1071 | a750fc0b | j_mayer | spr_register(env, SPR_SIAR, "SIAR",
|
1072 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1073 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
1074 | 3fc6c082 | bellard | 0x00000000);
|
1075 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1076 | 3fc6c082 | bellard | spr_register(env, SPR_SDA, "SDA",
|
1077 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1078 | 3fc6c082 | bellard | &spr_read_generic, SPR_NOACCESS, |
1079 | 3fc6c082 | bellard | 0x00000000);
|
1080 | 3fc6c082 | bellard | /* External access control */
|
1081 | 3fc6c082 | bellard | /* XXX : not implemented */
|
1082 | 3fc6c082 | bellard | spr_register(env, SPR_EAR, "EAR",
|
1083 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1084 | 3fc6c082 | bellard | &spr_read_generic, &spr_write_generic, |
1085 | 3fc6c082 | bellard | 0x00000000);
|
1086 | 3fc6c082 | bellard | } |
1087 | 3fc6c082 | bellard | |
1088 | 76a66253 | j_mayer | /* SPR specific to PowerPC 603 implementation */
|
1089 | 76a66253 | j_mayer | static void gen_spr_603 (CPUPPCState *env) |
1090 | 3fc6c082 | bellard | { |
1091 | 76a66253 | j_mayer | /* External access control */
|
1092 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1093 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
1094 | 3fc6c082 | bellard | SPR_NOACCESS, SPR_NOACCESS, |
1095 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1096 | 76a66253 | j_mayer | 0x00000000);
|
1097 | 3fc6c082 | bellard | } |
1098 | 3fc6c082 | bellard | |
1099 | 76a66253 | j_mayer | /* SPR specific to PowerPC G2 implementation */
|
1100 | 76a66253 | j_mayer | static void gen_spr_G2 (CPUPPCState *env) |
1101 | 3fc6c082 | bellard | { |
1102 | 76a66253 | j_mayer | /* Memory base address */
|
1103 | 76a66253 | j_mayer | /* MBAR */
|
1104 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1105 | 76a66253 | j_mayer | spr_register(env, SPR_MBAR, "MBAR",
|
1106 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1107 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1108 | 76a66253 | j_mayer | 0x00000000);
|
1109 | 76a66253 | j_mayer | /* Exception processing */
|
1110 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
1111 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1112 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1113 | 76a66253 | j_mayer | 0x00000000);
|
1114 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
|
1115 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1116 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1117 | 76a66253 | j_mayer | 0x00000000);
|
1118 | 76a66253 | j_mayer | /* Breakpoints */
|
1119 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1120 | 76a66253 | j_mayer | spr_register(env, SPR_DABR, "DABR",
|
1121 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1122 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1123 | 76a66253 | j_mayer | 0x00000000);
|
1124 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1125 | 76a66253 | j_mayer | spr_register(env, SPR_DABR2, "DABR2",
|
1126 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1127 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1128 | 76a66253 | j_mayer | 0x00000000);
|
1129 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1130 | 76a66253 | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
1131 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1132 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1133 | 76a66253 | j_mayer | 0x00000000);
|
1134 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1135 | 76a66253 | j_mayer | spr_register(env, SPR_IABR2, "IABR2",
|
1136 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1137 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1138 | 76a66253 | j_mayer | 0x00000000);
|
1139 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1140 | 76a66253 | j_mayer | spr_register(env, SPR_IBCR, "IBCR",
|
1141 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1142 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1143 | 76a66253 | j_mayer | 0x00000000);
|
1144 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1145 | 76a66253 | j_mayer | spr_register(env, SPR_DBCR, "DBCR",
|
1146 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1147 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1148 | 76a66253 | j_mayer | 0x00000000);
|
1149 | 76a66253 | j_mayer | } |
1150 | 76a66253 | j_mayer | |
1151 | 76a66253 | j_mayer | /* SPR specific to PowerPC 602 implementation */
|
1152 | 76a66253 | j_mayer | static void gen_spr_602 (CPUPPCState *env) |
1153 | 76a66253 | j_mayer | { |
1154 | 76a66253 | j_mayer | /* ESA registers */
|
1155 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1156 | 76a66253 | j_mayer | spr_register(env, SPR_SER, "SER",
|
1157 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1158 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1159 | 76a66253 | j_mayer | 0x00000000);
|
1160 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1161 | 76a66253 | j_mayer | spr_register(env, SPR_SEBR, "SEBR",
|
1162 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1163 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1164 | 76a66253 | j_mayer | 0x00000000);
|
1165 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1166 | a750fc0b | j_mayer | spr_register(env, SPR_ESASRR, "ESASRR",
|
1167 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1168 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1169 | 76a66253 | j_mayer | 0x00000000);
|
1170 | 76a66253 | j_mayer | /* Floating point status */
|
1171 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1172 | 76a66253 | j_mayer | spr_register(env, SPR_SP, "SP",
|
1173 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1174 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1175 | 76a66253 | j_mayer | 0x00000000);
|
1176 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1177 | 76a66253 | j_mayer | spr_register(env, SPR_LT, "LT",
|
1178 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1179 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1180 | 76a66253 | j_mayer | 0x00000000);
|
1181 | 76a66253 | j_mayer | /* Watchdog timer */
|
1182 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1183 | 76a66253 | j_mayer | spr_register(env, SPR_TCR, "TCR",
|
1184 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1185 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1186 | 76a66253 | j_mayer | 0x00000000);
|
1187 | 76a66253 | j_mayer | /* Interrupt base */
|
1188 | 76a66253 | j_mayer | spr_register(env, SPR_IBR, "IBR",
|
1189 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1190 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1191 | 76a66253 | j_mayer | 0x00000000);
|
1192 | a750fc0b | j_mayer | /* XXX : not implemented */
|
1193 | a750fc0b | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
1194 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1195 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1196 | a750fc0b | j_mayer | 0x00000000);
|
1197 | 76a66253 | j_mayer | } |
1198 | 76a66253 | j_mayer | |
1199 | 76a66253 | j_mayer | /* SPR specific to PowerPC 601 implementation */
|
1200 | 76a66253 | j_mayer | static void gen_spr_601 (CPUPPCState *env) |
1201 | 76a66253 | j_mayer | { |
1202 | 76a66253 | j_mayer | /* Multiplication/division register */
|
1203 | 76a66253 | j_mayer | /* MQ */
|
1204 | 76a66253 | j_mayer | spr_register(env, SPR_MQ, "MQ",
|
1205 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1206 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1207 | 76a66253 | j_mayer | 0x00000000);
|
1208 | 76a66253 | j_mayer | /* RTC registers */
|
1209 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCU, "RTCU",
|
1210 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1211 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcu, |
1212 | 76a66253 | j_mayer | 0x00000000);
|
1213 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCU, "RTCU",
|
1214 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
1215 | 76a66253 | j_mayer | &spr_read_601_rtcu, SPR_NOACCESS, |
1216 | 76a66253 | j_mayer | 0x00000000);
|
1217 | 76a66253 | j_mayer | spr_register(env, SPR_601_RTCL, "RTCL",
|
1218 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1219 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_601_rtcl, |
1220 | 76a66253 | j_mayer | 0x00000000);
|
1221 | 76a66253 | j_mayer | spr_register(env, SPR_601_VRTCL, "RTCL",
|
1222 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1223 | 76a66253 | j_mayer | &spr_read_601_rtcl, SPR_NOACCESS, |
1224 | 76a66253 | j_mayer | 0x00000000);
|
1225 | 76a66253 | j_mayer | /* Timer */
|
1226 | 76a66253 | j_mayer | #if 0 /* ? */
|
1227 | 76a66253 | j_mayer | spr_register(env, SPR_601_UDECR, "UDECR",
|
1228 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1229 | 76a66253 | j_mayer | &spr_read_decr, SPR_NOACCESS,
|
1230 | 76a66253 | j_mayer | 0x00000000);
|
1231 | 76a66253 | j_mayer | #endif
|
1232 | 76a66253 | j_mayer | /* External access control */
|
1233 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1234 | 76a66253 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
1235 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1236 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1237 | 76a66253 | j_mayer | 0x00000000);
|
1238 | 76a66253 | j_mayer | /* Memory management */
|
1239 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
1240 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0U, "IBAT0U",
|
1241 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1242 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1243 | 76a66253 | j_mayer | 0x00000000);
|
1244 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT0L, "IBAT0L",
|
1245 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1246 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1247 | 76a66253 | j_mayer | 0x00000000);
|
1248 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1U, "IBAT1U",
|
1249 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1250 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1251 | 76a66253 | j_mayer | 0x00000000);
|
1252 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT1L, "IBAT1L",
|
1253 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1254 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1255 | 76a66253 | j_mayer | 0x00000000);
|
1256 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2U, "IBAT2U",
|
1257 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1258 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1259 | 76a66253 | j_mayer | 0x00000000);
|
1260 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT2L, "IBAT2L",
|
1261 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1262 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1263 | 76a66253 | j_mayer | 0x00000000);
|
1264 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3U, "IBAT3U",
|
1265 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1266 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatu, |
1267 | 76a66253 | j_mayer | 0x00000000);
|
1268 | 76a66253 | j_mayer | spr_register(env, SPR_IBAT3L, "IBAT3L",
|
1269 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1270 | 76a66253 | j_mayer | &spr_read_601_ubat, &spr_write_601_ubatl, |
1271 | 76a66253 | j_mayer | 0x00000000);
|
1272 | a750fc0b | j_mayer | env->nb_BATs = 4;
|
1273 | f2e63a42 | j_mayer | #endif
|
1274 | a750fc0b | j_mayer | } |
1275 | a750fc0b | j_mayer | |
1276 | a750fc0b | j_mayer | static void gen_spr_74xx (CPUPPCState *env) |
1277 | a750fc0b | j_mayer | { |
1278 | a750fc0b | j_mayer | /* Processor identification */
|
1279 | a750fc0b | j_mayer | spr_register(env, SPR_PIR, "PIR",
|
1280 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1281 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_pir, |
1282 | a750fc0b | j_mayer | 0x00000000);
|
1283 | a750fc0b | j_mayer | /* XXX : not implemented */
|
1284 | a750fc0b | j_mayer | spr_register(env, SPR_MMCR2, "MMCR2",
|
1285 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1286 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1287 | a750fc0b | j_mayer | 0x00000000);
|
1288 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1289 | a750fc0b | j_mayer | spr_register(env, SPR_UMMCR2, "UMMCR2",
|
1290 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1291 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1292 | a750fc0b | j_mayer | 0x00000000);
|
1293 | a750fc0b | j_mayer | /* XXX: not implemented */
|
1294 | a750fc0b | j_mayer | spr_register(env, SPR_BAMR, "BAMR",
|
1295 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1296 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1297 | a750fc0b | j_mayer | 0x00000000);
|
1298 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1299 | a750fc0b | j_mayer | spr_register(env, SPR_MSSCR0, "MSSCR0",
|
1300 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1301 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1302 | a750fc0b | j_mayer | 0x00000000);
|
1303 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
1304 | a750fc0b | j_mayer | /* XXX : not implemented */
|
1305 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
1306 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1307 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1308 | a750fc0b | j_mayer | 0x00000000);
|
1309 | a750fc0b | j_mayer | /* XXX : not implemented */
|
1310 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
1311 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1312 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1313 | a750fc0b | j_mayer | 0x00000000);
|
1314 | a750fc0b | j_mayer | /* Altivec */
|
1315 | a750fc0b | j_mayer | spr_register(env, SPR_VRSAVE, "VRSAVE",
|
1316 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1317 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1318 | a750fc0b | j_mayer | 0x00000000);
|
1319 | bd928eba | j_mayer | /* XXX : not implemented */
|
1320 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
1321 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1322 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
1323 | bd928eba | j_mayer | 0x00000000);
|
1324 | cf8358c8 | aurel32 | /* Not strictly an SPR */
|
1325 | cf8358c8 | aurel32 | vscr_init(env, 0x00010000);
|
1326 | a750fc0b | j_mayer | } |
1327 | a750fc0b | j_mayer | |
1328 | a750fc0b | j_mayer | static void gen_l3_ctrl (CPUPPCState *env) |
1329 | a750fc0b | j_mayer | { |
1330 | a750fc0b | j_mayer | /* L3CR */
|
1331 | a750fc0b | j_mayer | /* XXX : not implemented */
|
1332 | a750fc0b | j_mayer | spr_register(env, SPR_L3CR, "L3CR",
|
1333 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1334 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1335 | a750fc0b | j_mayer | 0x00000000);
|
1336 | a750fc0b | j_mayer | /* L3ITCR0 */
|
1337 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1338 | a750fc0b | j_mayer | spr_register(env, SPR_L3ITCR0, "L3ITCR0",
|
1339 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1340 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1341 | a750fc0b | j_mayer | 0x00000000);
|
1342 | a750fc0b | j_mayer | /* L3PM */
|
1343 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1344 | a750fc0b | j_mayer | spr_register(env, SPR_L3PM, "L3PM",
|
1345 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1346 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1347 | a750fc0b | j_mayer | 0x00000000);
|
1348 | a750fc0b | j_mayer | } |
1349 | a750fc0b | j_mayer | |
1350 | 578bb252 | j_mayer | static void gen_74xx_soft_tlb (CPUPPCState *env, int nb_tlbs, int nb_ways) |
1351 | a750fc0b | j_mayer | { |
1352 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
1353 | 578bb252 | j_mayer | env->nb_tlb = nb_tlbs; |
1354 | 578bb252 | j_mayer | env->nb_ways = nb_ways; |
1355 | 578bb252 | j_mayer | env->id_tlbs = 1;
|
1356 | 1c53accc | Alexander Graf | env->tlb_type = TLB_6XX; |
1357 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1358 | a750fc0b | j_mayer | spr_register(env, SPR_PTEHI, "PTEHI",
|
1359 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1360 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1361 | a750fc0b | j_mayer | 0x00000000);
|
1362 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1363 | a750fc0b | j_mayer | spr_register(env, SPR_PTELO, "PTELO",
|
1364 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1365 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1366 | a750fc0b | j_mayer | 0x00000000);
|
1367 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1368 | a750fc0b | j_mayer | spr_register(env, SPR_TLBMISS, "TLBMISS",
|
1369 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1370 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
1371 | a750fc0b | j_mayer | 0x00000000);
|
1372 | f2e63a42 | j_mayer | #endif
|
1373 | 76a66253 | j_mayer | } |
1374 | 76a66253 | j_mayer | |
1375 | 01662f3e | Alexander Graf | #if !defined(CONFIG_USER_ONLY)
|
1376 | 01662f3e | Alexander Graf | static void spr_write_e500_l1csr0 (void *opaque, int sprn, int gprn) |
1377 | 01662f3e | Alexander Graf | { |
1378 | 01662f3e | Alexander Graf | TCGv t0 = tcg_temp_new(); |
1379 | 01662f3e | Alexander Graf | |
1380 | 01662f3e | Alexander Graf | tcg_gen_andi_tl(t0, cpu_gpr[gprn], ~256);
|
1381 | 01662f3e | Alexander Graf | gen_store_spr(sprn, t0); |
1382 | 01662f3e | Alexander Graf | tcg_temp_free(t0); |
1383 | 01662f3e | Alexander Graf | } |
1384 | 01662f3e | Alexander Graf | |
1385 | 01662f3e | Alexander Graf | static void spr_write_booke206_mmucsr0 (void *opaque, int sprn, int gprn) |
1386 | 01662f3e | Alexander Graf | { |
1387 | 1ff7854e | Stefan Weil | TCGv_i32 t0 = tcg_const_i32(sprn); |
1388 | c6c7cf05 | Blue Swirl | gen_helper_booke206_tlbflush(cpu_env, t0); |
1389 | 1ff7854e | Stefan Weil | tcg_temp_free_i32(t0); |
1390 | 01662f3e | Alexander Graf | } |
1391 | 01662f3e | Alexander Graf | |
1392 | 01662f3e | Alexander Graf | static void spr_write_booke_pid (void *opaque, int sprn, int gprn) |
1393 | 01662f3e | Alexander Graf | { |
1394 | 1ff7854e | Stefan Weil | TCGv_i32 t0 = tcg_const_i32(sprn); |
1395 | c6c7cf05 | Blue Swirl | gen_helper_booke_setpid(cpu_env, t0, cpu_gpr[gprn]); |
1396 | 1ff7854e | Stefan Weil | tcg_temp_free_i32(t0); |
1397 | 01662f3e | Alexander Graf | } |
1398 | 01662f3e | Alexander Graf | #endif
|
1399 | 01662f3e | Alexander Graf | |
1400 | 80d11f44 | j_mayer | static void gen_spr_usprgh (CPUPPCState *env) |
1401 | 76a66253 | j_mayer | { |
1402 | 80d11f44 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
1403 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1404 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1405 | 80d11f44 | j_mayer | 0x00000000);
|
1406 | 80d11f44 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
1407 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1408 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1409 | 80d11f44 | j_mayer | 0x00000000);
|
1410 | 80d11f44 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
1411 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1412 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1413 | 80d11f44 | j_mayer | 0x00000000);
|
1414 | 80d11f44 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
1415 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1416 | 80d11f44 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1417 | 76a66253 | j_mayer | 0x00000000);
|
1418 | 80d11f44 | j_mayer | } |
1419 | 80d11f44 | j_mayer | |
1420 | 80d11f44 | j_mayer | /* PowerPC BookE SPR */
|
1421 | 80d11f44 | j_mayer | static void gen_spr_BookE (CPUPPCState *env, uint64_t ivor_mask) |
1422 | 80d11f44 | j_mayer | { |
1423 | b55266b5 | blueswir1 | const char *ivor_names[64] = { |
1424 | 80d11f44 | j_mayer | "IVOR0", "IVOR1", "IVOR2", "IVOR3", |
1425 | 80d11f44 | j_mayer | "IVOR4", "IVOR5", "IVOR6", "IVOR7", |
1426 | 80d11f44 | j_mayer | "IVOR8", "IVOR9", "IVOR10", "IVOR11", |
1427 | 80d11f44 | j_mayer | "IVOR12", "IVOR13", "IVOR14", "IVOR15", |
1428 | 80d11f44 | j_mayer | "IVOR16", "IVOR17", "IVOR18", "IVOR19", |
1429 | 80d11f44 | j_mayer | "IVOR20", "IVOR21", "IVOR22", "IVOR23", |
1430 | 80d11f44 | j_mayer | "IVOR24", "IVOR25", "IVOR26", "IVOR27", |
1431 | 80d11f44 | j_mayer | "IVOR28", "IVOR29", "IVOR30", "IVOR31", |
1432 | 80d11f44 | j_mayer | "IVOR32", "IVOR33", "IVOR34", "IVOR35", |
1433 | 80d11f44 | j_mayer | "IVOR36", "IVOR37", "IVOR38", "IVOR39", |
1434 | 80d11f44 | j_mayer | "IVOR40", "IVOR41", "IVOR42", "IVOR43", |
1435 | 80d11f44 | j_mayer | "IVOR44", "IVOR45", "IVOR46", "IVOR47", |
1436 | 80d11f44 | j_mayer | "IVOR48", "IVOR49", "IVOR50", "IVOR51", |
1437 | 80d11f44 | j_mayer | "IVOR52", "IVOR53", "IVOR54", "IVOR55", |
1438 | 80d11f44 | j_mayer | "IVOR56", "IVOR57", "IVOR58", "IVOR59", |
1439 | 80d11f44 | j_mayer | "IVOR60", "IVOR61", "IVOR62", "IVOR63", |
1440 | 80d11f44 | j_mayer | }; |
1441 | 80d11f44 | j_mayer | #define SPR_BOOKE_IVORxx (-1) |
1442 | 80d11f44 | j_mayer | int ivor_sprn[64] = { |
1443 | 80d11f44 | j_mayer | SPR_BOOKE_IVOR0, SPR_BOOKE_IVOR1, SPR_BOOKE_IVOR2, SPR_BOOKE_IVOR3, |
1444 | 80d11f44 | j_mayer | SPR_BOOKE_IVOR4, SPR_BOOKE_IVOR5, SPR_BOOKE_IVOR6, SPR_BOOKE_IVOR7, |
1445 | 80d11f44 | j_mayer | SPR_BOOKE_IVOR8, SPR_BOOKE_IVOR9, SPR_BOOKE_IVOR10, SPR_BOOKE_IVOR11, |
1446 | 80d11f44 | j_mayer | SPR_BOOKE_IVOR12, SPR_BOOKE_IVOR13, SPR_BOOKE_IVOR14, SPR_BOOKE_IVOR15, |
1447 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1448 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1449 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1450 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1451 | 80d11f44 | j_mayer | SPR_BOOKE_IVOR32, SPR_BOOKE_IVOR33, SPR_BOOKE_IVOR34, SPR_BOOKE_IVOR35, |
1452 | e9205258 | Alexander Graf | SPR_BOOKE_IVOR36, SPR_BOOKE_IVOR37, SPR_BOOKE_IVOR38, SPR_BOOKE_IVOR39, |
1453 | e9205258 | Alexander Graf | SPR_BOOKE_IVOR40, SPR_BOOKE_IVOR41, SPR_BOOKE_IVOR42, SPR_BOOKE_IVORxx, |
1454 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1455 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1456 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1457 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1458 | 80d11f44 | j_mayer | SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, SPR_BOOKE_IVORxx, |
1459 | 80d11f44 | j_mayer | }; |
1460 | 80d11f44 | j_mayer | int i;
|
1461 | 80d11f44 | j_mayer | |
1462 | 76a66253 | j_mayer | /* Interrupt processing */
|
1463 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR0, "CSRR0",
|
1464 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1465 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1466 | 76a66253 | j_mayer | 0x00000000);
|
1467 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_CSRR1, "CSRR1",
|
1468 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1469 | 363be49c | j_mayer | &spr_read_generic, &spr_write_generic, |
1470 | 363be49c | j_mayer | 0x00000000);
|
1471 | 76a66253 | j_mayer | /* Debug */
|
1472 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1473 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC1, "IAC1",
|
1474 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1475 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1476 | 76a66253 | j_mayer | 0x00000000);
|
1477 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1478 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_IAC2, "IAC2",
|
1479 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1480 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1481 | 76a66253 | j_mayer | 0x00000000);
|
1482 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1483 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC1, "DAC1",
|
1484 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1485 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1486 | 76a66253 | j_mayer | 0x00000000);
|
1487 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1488 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DAC2, "DAC2",
|
1489 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1490 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1491 | 76a66253 | j_mayer | 0x00000000);
|
1492 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1493 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR0, "DBCR0",
|
1494 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1495 | e598a9c5 | Alexander Graf | &spr_read_generic, &spr_write_40x_dbcr0, |
1496 | 76a66253 | j_mayer | 0x00000000);
|
1497 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1498 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR1, "DBCR1",
|
1499 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1500 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1501 | 76a66253 | j_mayer | 0x00000000);
|
1502 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1503 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBCR2, "DBCR2",
|
1504 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1505 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1506 | 76a66253 | j_mayer | 0x00000000);
|
1507 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1508 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DBSR, "DBSR",
|
1509 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1510 | 8ecc7913 | j_mayer | &spr_read_generic, &spr_write_clear, |
1511 | 76a66253 | j_mayer | 0x00000000);
|
1512 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DEAR, "DEAR",
|
1513 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1514 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1515 | 76a66253 | j_mayer | 0x00000000);
|
1516 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_ESR, "ESR",
|
1517 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1518 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1519 | 76a66253 | j_mayer | 0x00000000);
|
1520 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_IVPR, "IVPR",
|
1521 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1522 | 6f5d427d | j_mayer | &spr_read_generic, &spr_write_excp_prefix, |
1523 | 363be49c | j_mayer | 0x00000000);
|
1524 | 363be49c | j_mayer | /* Exception vectors */
|
1525 | 80d11f44 | j_mayer | for (i = 0; i < 64; i++) { |
1526 | 80d11f44 | j_mayer | if (ivor_mask & (1ULL << i)) { |
1527 | 80d11f44 | j_mayer | if (ivor_sprn[i] == SPR_BOOKE_IVORxx) {
|
1528 | 80d11f44 | j_mayer | fprintf(stderr, "ERROR: IVOR %d SPR is not defined\n", i);
|
1529 | 80d11f44 | j_mayer | exit(1);
|
1530 | 80d11f44 | j_mayer | } |
1531 | 80d11f44 | j_mayer | spr_register(env, ivor_sprn[i], ivor_names[i], |
1532 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1533 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_excp_vector, |
1534 | 80d11f44 | j_mayer | 0x00000000);
|
1535 | 80d11f44 | j_mayer | } |
1536 | 80d11f44 | j_mayer | } |
1537 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_PID, "PID",
|
1538 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1539 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_booke_pid, |
1540 | 76a66253 | j_mayer | 0x00000000);
|
1541 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TCR, "TCR",
|
1542 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1543 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1544 | 76a66253 | j_mayer | 0x00000000);
|
1545 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_TSR, "TSR",
|
1546 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1547 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1548 | 76a66253 | j_mayer | 0x00000000);
|
1549 | 76a66253 | j_mayer | /* Timer */
|
1550 | 76a66253 | j_mayer | spr_register(env, SPR_DECR, "DECR",
|
1551 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1552 | 76a66253 | j_mayer | &spr_read_decr, &spr_write_decr, |
1553 | 76a66253 | j_mayer | 0x00000000);
|
1554 | 76a66253 | j_mayer | spr_register(env, SPR_BOOKE_DECAR, "DECAR",
|
1555 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1556 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
1557 | 76a66253 | j_mayer | 0x00000000);
|
1558 | 76a66253 | j_mayer | /* SPRGs */
|
1559 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1560 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1561 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1562 | 76a66253 | j_mayer | 0x00000000);
|
1563 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1564 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1565 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1566 | 76a66253 | j_mayer | 0x00000000);
|
1567 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1568 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1569 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1570 | 76a66253 | j_mayer | 0x00000000);
|
1571 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1572 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1573 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1574 | 76a66253 | j_mayer | 0x00000000);
|
1575 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1576 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1577 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1578 | 76a66253 | j_mayer | 0x00000000);
|
1579 | 76a66253 | j_mayer | } |
1580 | 76a66253 | j_mayer | |
1581 | 01662f3e | Alexander Graf | static inline uint32_t gen_tlbncfg(uint32_t assoc, uint32_t minsize, |
1582 | 01662f3e | Alexander Graf | uint32_t maxsize, uint32_t flags, |
1583 | 01662f3e | Alexander Graf | uint32_t nentries) |
1584 | 01662f3e | Alexander Graf | { |
1585 | 01662f3e | Alexander Graf | return (assoc << TLBnCFG_ASSOC_SHIFT) |
|
1586 | 01662f3e | Alexander Graf | (minsize << TLBnCFG_MINSIZE_SHIFT) | |
1587 | 01662f3e | Alexander Graf | (maxsize << TLBnCFG_MAXSIZE_SHIFT) | |
1588 | 01662f3e | Alexander Graf | flags | nentries; |
1589 | 01662f3e | Alexander Graf | } |
1590 | 01662f3e | Alexander Graf | |
1591 | 01662f3e | Alexander Graf | /* BookE 2.06 storage control registers */
|
1592 | 01662f3e | Alexander Graf | static void gen_spr_BookE206(CPUPPCState *env, uint32_t mas_mask, |
1593 | 01662f3e | Alexander Graf | uint32_t *tlbncfg) |
1594 | 363be49c | j_mayer | { |
1595 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
1596 | b55266b5 | blueswir1 | const char *mas_names[8] = { |
1597 | 80d11f44 | j_mayer | "MAS0", "MAS1", "MAS2", "MAS3", "MAS4", "MAS5", "MAS6", "MAS7", |
1598 | 80d11f44 | j_mayer | }; |
1599 | 80d11f44 | j_mayer | int mas_sprn[8] = { |
1600 | 80d11f44 | j_mayer | SPR_BOOKE_MAS0, SPR_BOOKE_MAS1, SPR_BOOKE_MAS2, SPR_BOOKE_MAS3, |
1601 | 80d11f44 | j_mayer | SPR_BOOKE_MAS4, SPR_BOOKE_MAS5, SPR_BOOKE_MAS6, SPR_BOOKE_MAS7, |
1602 | 80d11f44 | j_mayer | }; |
1603 | 80d11f44 | j_mayer | int i;
|
1604 | 80d11f44 | j_mayer | |
1605 | 363be49c | j_mayer | /* TLB assist registers */
|
1606 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1607 | 80d11f44 | j_mayer | for (i = 0; i < 8; i++) { |
1608 | ba38ab8d | Alexander Graf | void (*uea_write)(void *o, int sprn, int gprn) = &spr_write_generic32; |
1609 | ba38ab8d | Alexander Graf | if (i == 2 && (mas_mask & (1 << i)) && (env->insns_flags & PPC_64B)) { |
1610 | ba38ab8d | Alexander Graf | uea_write = &spr_write_generic; |
1611 | ba38ab8d | Alexander Graf | } |
1612 | 80d11f44 | j_mayer | if (mas_mask & (1 << i)) { |
1613 | 80d11f44 | j_mayer | spr_register(env, mas_sprn[i], mas_names[i], |
1614 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1615 | ba38ab8d | Alexander Graf | &spr_read_generic, uea_write, |
1616 | 80d11f44 | j_mayer | 0x00000000);
|
1617 | 80d11f44 | j_mayer | } |
1618 | 80d11f44 | j_mayer | } |
1619 | 363be49c | j_mayer | if (env->nb_pids > 1) { |
1620 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1621 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_PID1, "PID1",
|
1622 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1623 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_booke_pid, |
1624 | 363be49c | j_mayer | 0x00000000);
|
1625 | 363be49c | j_mayer | } |
1626 | 363be49c | j_mayer | if (env->nb_pids > 2) { |
1627 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1628 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_PID2, "PID2",
|
1629 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1630 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_booke_pid, |
1631 | 363be49c | j_mayer | 0x00000000);
|
1632 | 363be49c | j_mayer | } |
1633 | 578bb252 | j_mayer | /* XXX : not implemented */
|
1634 | 65f9ee8d | j_mayer | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
1635 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1636 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1637 | 363be49c | j_mayer | 0x00000000); /* TOFIX */ |
1638 | 363be49c | j_mayer | switch (env->nb_ways) {
|
1639 | 363be49c | j_mayer | case 4: |
1640 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB3CFG, "TLB3CFG",
|
1641 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1642 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1643 | 01662f3e | Alexander Graf | tlbncfg[3]);
|
1644 | 363be49c | j_mayer | /* Fallthru */
|
1645 | 363be49c | j_mayer | case 3: |
1646 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB2CFG, "TLB2CFG",
|
1647 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1648 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1649 | 01662f3e | Alexander Graf | tlbncfg[2]);
|
1650 | 363be49c | j_mayer | /* Fallthru */
|
1651 | 363be49c | j_mayer | case 2: |
1652 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
|
1653 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1654 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1655 | 01662f3e | Alexander Graf | tlbncfg[1]);
|
1656 | 363be49c | j_mayer | /* Fallthru */
|
1657 | 363be49c | j_mayer | case 1: |
1658 | 363be49c | j_mayer | spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
|
1659 | 363be49c | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1660 | 363be49c | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1661 | 01662f3e | Alexander Graf | tlbncfg[0]);
|
1662 | 363be49c | j_mayer | /* Fallthru */
|
1663 | 363be49c | j_mayer | case 0: |
1664 | 363be49c | j_mayer | default:
|
1665 | 363be49c | j_mayer | break;
|
1666 | 363be49c | j_mayer | } |
1667 | f2e63a42 | j_mayer | #endif
|
1668 | 01662f3e | Alexander Graf | |
1669 | 01662f3e | Alexander Graf | gen_spr_usprgh(env); |
1670 | 363be49c | j_mayer | } |
1671 | 363be49c | j_mayer | |
1672 | 76a66253 | j_mayer | /* SPR specific to PowerPC 440 implementation */
|
1673 | 76a66253 | j_mayer | static void gen_spr_440 (CPUPPCState *env) |
1674 | 76a66253 | j_mayer | { |
1675 | 76a66253 | j_mayer | /* Cache control */
|
1676 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1677 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV0, "DNV0",
|
1678 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1679 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1680 | 76a66253 | j_mayer | 0x00000000);
|
1681 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1682 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV1, "DNV1",
|
1683 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1684 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1685 | 76a66253 | j_mayer | 0x00000000);
|
1686 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1687 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV2, "DNV2",
|
1688 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1689 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1690 | 76a66253 | j_mayer | 0x00000000);
|
1691 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1692 | 76a66253 | j_mayer | spr_register(env, SPR_440_DNV3, "DNV3",
|
1693 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1694 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1695 | 76a66253 | j_mayer | 0x00000000);
|
1696 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1697 | 2662a059 | j_mayer | spr_register(env, SPR_440_DTV0, "DTV0",
|
1698 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1699 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1700 | 76a66253 | j_mayer | 0x00000000);
|
1701 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1702 | 2662a059 | j_mayer | spr_register(env, SPR_440_DTV1, "DTV1",
|
1703 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1704 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1705 | 76a66253 | j_mayer | 0x00000000);
|
1706 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1707 | 2662a059 | j_mayer | spr_register(env, SPR_440_DTV2, "DTV2",
|
1708 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1709 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1710 | 76a66253 | j_mayer | 0x00000000);
|
1711 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1712 | 2662a059 | j_mayer | spr_register(env, SPR_440_DTV3, "DTV3",
|
1713 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1714 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1715 | 76a66253 | j_mayer | 0x00000000);
|
1716 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1717 | 76a66253 | j_mayer | spr_register(env, SPR_440_DVLIM, "DVLIM",
|
1718 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1719 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1720 | 76a66253 | j_mayer | 0x00000000);
|
1721 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1722 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV0, "INV0",
|
1723 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1724 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1725 | 76a66253 | j_mayer | 0x00000000);
|
1726 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1727 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV1, "INV1",
|
1728 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1729 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1730 | 76a66253 | j_mayer | 0x00000000);
|
1731 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1732 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV2, "INV2",
|
1733 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1734 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1735 | 76a66253 | j_mayer | 0x00000000);
|
1736 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1737 | 76a66253 | j_mayer | spr_register(env, SPR_440_INV3, "INV3",
|
1738 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1739 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1740 | 76a66253 | j_mayer | 0x00000000);
|
1741 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1742 | 2662a059 | j_mayer | spr_register(env, SPR_440_ITV0, "ITV0",
|
1743 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1744 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1745 | 76a66253 | j_mayer | 0x00000000);
|
1746 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1747 | 2662a059 | j_mayer | spr_register(env, SPR_440_ITV1, "ITV1",
|
1748 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1749 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1750 | 76a66253 | j_mayer | 0x00000000);
|
1751 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1752 | 2662a059 | j_mayer | spr_register(env, SPR_440_ITV2, "ITV2",
|
1753 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1754 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1755 | 76a66253 | j_mayer | 0x00000000);
|
1756 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1757 | 2662a059 | j_mayer | spr_register(env, SPR_440_ITV3, "ITV3",
|
1758 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1759 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1760 | 76a66253 | j_mayer | 0x00000000);
|
1761 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1762 | 76a66253 | j_mayer | spr_register(env, SPR_440_IVLIM, "IVLIM",
|
1763 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1764 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1765 | 76a66253 | j_mayer | 0x00000000);
|
1766 | 76a66253 | j_mayer | /* Cache debug */
|
1767 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1768 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_DCDBTRH, "DCDBTRH",
|
1769 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1770 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1771 | 76a66253 | j_mayer | 0x00000000);
|
1772 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1773 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_DCDBTRL, "DCDBTRL",
|
1774 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1775 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1776 | 76a66253 | j_mayer | 0x00000000);
|
1777 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1778 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR",
|
1779 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1780 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1781 | 76a66253 | j_mayer | 0x00000000);
|
1782 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1783 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_ICDBTRH, "ICDBTRH",
|
1784 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1785 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1786 | 76a66253 | j_mayer | 0x00000000);
|
1787 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1788 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_ICDBTRL, "ICDBTRL",
|
1789 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1790 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1791 | 76a66253 | j_mayer | 0x00000000);
|
1792 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1793 | 76a66253 | j_mayer | spr_register(env, SPR_440_DBDR, "DBDR",
|
1794 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1795 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1796 | 76a66253 | j_mayer | 0x00000000);
|
1797 | 76a66253 | j_mayer | /* Processor control */
|
1798 | 76a66253 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1799 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1800 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1801 | 76a66253 | j_mayer | 0x00000000);
|
1802 | 76a66253 | j_mayer | spr_register(env, SPR_440_RSTCFG, "RSTCFG",
|
1803 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1804 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1805 | 76a66253 | j_mayer | 0x00000000);
|
1806 | 76a66253 | j_mayer | /* Storage control */
|
1807 | 76a66253 | j_mayer | spr_register(env, SPR_440_MMUCR, "MMUCR",
|
1808 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1809 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1810 | 76a66253 | j_mayer | 0x00000000);
|
1811 | 76a66253 | j_mayer | } |
1812 | 76a66253 | j_mayer | |
1813 | 76a66253 | j_mayer | /* SPR shared between PowerPC 40x implementations */
|
1814 | 76a66253 | j_mayer | static void gen_spr_40x (CPUPPCState *env) |
1815 | 76a66253 | j_mayer | { |
1816 | 76a66253 | j_mayer | /* Cache */
|
1817 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
1818 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DCCR, "DCCR",
|
1819 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1820 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1821 | 76a66253 | j_mayer | 0x00000000);
|
1822 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
1823 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ICCR, "ICCR",
|
1824 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1825 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1826 | 76a66253 | j_mayer | 0x00000000);
|
1827 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
1828 | 2662a059 | j_mayer | spr_register(env, SPR_BOOKE_ICDBDR, "ICDBDR",
|
1829 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1830 | 76a66253 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
1831 | 76a66253 | j_mayer | 0x00000000);
|
1832 | 76a66253 | j_mayer | /* Exception */
|
1833 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DEAR, "DEAR",
|
1834 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1835 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1836 | 76a66253 | j_mayer | 0x00000000);
|
1837 | 76a66253 | j_mayer | spr_register(env, SPR_40x_ESR, "ESR",
|
1838 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1839 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1840 | 76a66253 | j_mayer | 0x00000000);
|
1841 | 76a66253 | j_mayer | spr_register(env, SPR_40x_EVPR, "EVPR",
|
1842 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1843 | 6f5d427d | j_mayer | &spr_read_generic, &spr_write_excp_prefix, |
1844 | 76a66253 | j_mayer | 0x00000000);
|
1845 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR2, "SRR2",
|
1846 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1847 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1848 | 76a66253 | j_mayer | 0x00000000);
|
1849 | 76a66253 | j_mayer | spr_register(env, SPR_40x_SRR3, "SRR3",
|
1850 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1851 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1852 | 76a66253 | j_mayer | 0x00000000);
|
1853 | 76a66253 | j_mayer | /* Timers */
|
1854 | 76a66253 | j_mayer | spr_register(env, SPR_40x_PIT, "PIT",
|
1855 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1856 | 76a66253 | j_mayer | &spr_read_40x_pit, &spr_write_40x_pit, |
1857 | 76a66253 | j_mayer | 0x00000000);
|
1858 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TCR, "TCR",
|
1859 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1860 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tcr, |
1861 | 76a66253 | j_mayer | 0x00000000);
|
1862 | 76a66253 | j_mayer | spr_register(env, SPR_40x_TSR, "TSR",
|
1863 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1864 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_booke_tsr, |
1865 | 76a66253 | j_mayer | 0x00000000);
|
1866 | 2662a059 | j_mayer | } |
1867 | 2662a059 | j_mayer | |
1868 | 2662a059 | j_mayer | /* SPR specific to PowerPC 405 implementation */
|
1869 | 2662a059 | j_mayer | static void gen_spr_405 (CPUPPCState *env) |
1870 | 2662a059 | j_mayer | { |
1871 | 2662a059 | j_mayer | /* MMU */
|
1872 | 2662a059 | j_mayer | spr_register(env, SPR_40x_PID, "PID",
|
1873 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1874 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1875 | 76a66253 | j_mayer | 0x00000000);
|
1876 | 2662a059 | j_mayer | spr_register(env, SPR_4xx_CCR0, "CCR0",
|
1877 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1878 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1879 | 2662a059 | j_mayer | 0x00700000);
|
1880 | 2662a059 | j_mayer | /* Debug interface */
|
1881 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1882 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBCR0, "DBCR0",
|
1883 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1884 | 8ecc7913 | j_mayer | &spr_read_generic, &spr_write_40x_dbcr0, |
1885 | 76a66253 | j_mayer | 0x00000000);
|
1886 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1887 | 2662a059 | j_mayer | spr_register(env, SPR_405_DBCR1, "DBCR1",
|
1888 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1889 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
1890 | 2662a059 | j_mayer | 0x00000000);
|
1891 | 2662a059 | j_mayer | /* XXX : not implemented */
|
1892 | 76a66253 | j_mayer | spr_register(env, SPR_40x_DBSR, "DBSR",
|
1893 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1894 | 8ecc7913 | j_mayer | &spr_read_generic, &spr_write_clear, |
1895 | 8ecc7913 | j_mayer | /* Last reset was system reset */
|
1896 | 76a66253 | j_mayer | 0x00000300);
|
1897 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1898 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DAC1, "DAC1",
|
1899 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1900 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1901 | 76a66253 | j_mayer | 0x00000000);
|
1902 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
1903 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1904 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1905 | 76a66253 | j_mayer | 0x00000000);
|
1906 | 2662a059 | j_mayer | /* XXX : not implemented */
|
1907 | 2662a059 | j_mayer | spr_register(env, SPR_405_DVC1, "DVC1",
|
1908 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1909 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1910 | 2662a059 | j_mayer | 0x00000000);
|
1911 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1912 | 2662a059 | j_mayer | spr_register(env, SPR_405_DVC2, "DVC2",
|
1913 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1914 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1915 | 76a66253 | j_mayer | 0x00000000);
|
1916 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1917 | 2662a059 | j_mayer | spr_register(env, SPR_40x_IAC1, "IAC1",
|
1918 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1919 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1920 | 76a66253 | j_mayer | 0x00000000);
|
1921 | 2662a059 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
1922 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1923 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1924 | 76a66253 | j_mayer | 0x00000000);
|
1925 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1926 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC3, "IAC3",
|
1927 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1928 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1929 | 76a66253 | j_mayer | 0x00000000);
|
1930 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1931 | 76a66253 | j_mayer | spr_register(env, SPR_405_IAC4, "IAC4",
|
1932 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1933 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1934 | 76a66253 | j_mayer | 0x00000000);
|
1935 | 76a66253 | j_mayer | /* Storage control */
|
1936 | 035feb88 | j_mayer | /* XXX: TODO: not implemented */
|
1937 | 76a66253 | j_mayer | spr_register(env, SPR_405_SLER, "SLER",
|
1938 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1939 | c294fc58 | j_mayer | &spr_read_generic, &spr_write_40x_sler, |
1940 | 76a66253 | j_mayer | 0x00000000);
|
1941 | 2662a059 | j_mayer | spr_register(env, SPR_40x_ZPR, "ZPR",
|
1942 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1943 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
1944 | 2662a059 | j_mayer | 0x00000000);
|
1945 | 76a66253 | j_mayer | /* XXX : not implemented */
|
1946 | 76a66253 | j_mayer | spr_register(env, SPR_405_SU0R, "SU0R",
|
1947 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1948 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1949 | 76a66253 | j_mayer | 0x00000000);
|
1950 | 76a66253 | j_mayer | /* SPRG */
|
1951 | 76a66253 | j_mayer | spr_register(env, SPR_USPRG0, "USPRG0",
|
1952 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1953 | 76a66253 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
1954 | 76a66253 | j_mayer | 0x00000000);
|
1955 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
1956 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1957 | 04f20795 | j_mayer | &spr_read_generic, &spr_write_generic, |
1958 | 76a66253 | j_mayer | 0x00000000);
|
1959 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
1960 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1961 | 04f20795 | j_mayer | spr_read_generic, &spr_write_generic, |
1962 | 76a66253 | j_mayer | 0x00000000);
|
1963 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
1964 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1965 | 04f20795 | j_mayer | spr_read_generic, &spr_write_generic, |
1966 | 76a66253 | j_mayer | 0x00000000);
|
1967 | 76a66253 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
1968 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1969 | 04f20795 | j_mayer | spr_read_generic, &spr_write_generic, |
1970 | 76a66253 | j_mayer | 0x00000000);
|
1971 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
1972 | 76a66253 | j_mayer | } |
1973 | 76a66253 | j_mayer | |
1974 | 76a66253 | j_mayer | /* SPR shared between PowerPC 401 & 403 implementations */
|
1975 | 76a66253 | j_mayer | static void gen_spr_401_403 (CPUPPCState *env) |
1976 | 76a66253 | j_mayer | { |
1977 | 76a66253 | j_mayer | /* Time base */
|
1978 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBL, "TBL",
|
1979 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1980 | 76a66253 | j_mayer | &spr_read_tbl, SPR_NOACCESS, |
1981 | 76a66253 | j_mayer | 0x00000000);
|
1982 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBL, "TBL",
|
1983 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1984 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbl, |
1985 | 76a66253 | j_mayer | 0x00000000);
|
1986 | 76a66253 | j_mayer | spr_register(env, SPR_403_VTBU, "TBU",
|
1987 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1988 | 76a66253 | j_mayer | &spr_read_tbu, SPR_NOACCESS, |
1989 | 76a66253 | j_mayer | 0x00000000);
|
1990 | 76a66253 | j_mayer | spr_register(env, SPR_403_TBU, "TBU",
|
1991 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1992 | 76a66253 | j_mayer | SPR_NOACCESS, &spr_write_tbu, |
1993 | 76a66253 | j_mayer | 0x00000000);
|
1994 | 76a66253 | j_mayer | /* Debug */
|
1995 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
1996 | 76a66253 | j_mayer | spr_register(env, SPR_403_CDBCR, "CDBCR",
|
1997 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
1998 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
1999 | 76a66253 | j_mayer | 0x00000000);
|
2000 | 76a66253 | j_mayer | } |
2001 | 76a66253 | j_mayer | |
2002 | 2662a059 | j_mayer | /* SPR specific to PowerPC 401 implementation */
|
2003 | 2662a059 | j_mayer | static void gen_spr_401 (CPUPPCState *env) |
2004 | 2662a059 | j_mayer | { |
2005 | 2662a059 | j_mayer | /* Debug interface */
|
2006 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2007 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DBCR0, "DBCR",
|
2008 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2009 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_40x_dbcr0, |
2010 | 2662a059 | j_mayer | 0x00000000);
|
2011 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2012 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DBSR, "DBSR",
|
2013 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2014 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_clear, |
2015 | 2662a059 | j_mayer | /* Last reset was system reset */
|
2016 | 2662a059 | j_mayer | 0x00000300);
|
2017 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2018 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DAC1, "DAC",
|
2019 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2020 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2021 | 2662a059 | j_mayer | 0x00000000);
|
2022 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2023 | 2662a059 | j_mayer | spr_register(env, SPR_40x_IAC1, "IAC",
|
2024 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2025 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2026 | 2662a059 | j_mayer | 0x00000000);
|
2027 | 2662a059 | j_mayer | /* Storage control */
|
2028 | 035feb88 | j_mayer | /* XXX: TODO: not implemented */
|
2029 | 2662a059 | j_mayer | spr_register(env, SPR_405_SLER, "SLER",
|
2030 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2031 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_40x_sler, |
2032 | 2662a059 | j_mayer | 0x00000000);
|
2033 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU never does speculative access */
|
2034 | 035feb88 | j_mayer | spr_register(env, SPR_40x_SGR, "SGR",
|
2035 | 035feb88 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2036 | 035feb88 | j_mayer | &spr_read_generic, &spr_write_generic, |
2037 | 035feb88 | j_mayer | 0xFFFFFFFF);
|
2038 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
2039 | 035feb88 | j_mayer | spr_register(env, SPR_40x_DCWR, "DCWR",
|
2040 | 035feb88 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2041 | 035feb88 | j_mayer | &spr_read_generic, &spr_write_generic, |
2042 | 035feb88 | j_mayer | 0x00000000);
|
2043 | 2662a059 | j_mayer | } |
2044 | 2662a059 | j_mayer | |
2045 | a750fc0b | j_mayer | static void gen_spr_401x2 (CPUPPCState *env) |
2046 | a750fc0b | j_mayer | { |
2047 | a750fc0b | j_mayer | gen_spr_401(env); |
2048 | a750fc0b | j_mayer | spr_register(env, SPR_40x_PID, "PID",
|
2049 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2050 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
2051 | a750fc0b | j_mayer | 0x00000000);
|
2052 | a750fc0b | j_mayer | spr_register(env, SPR_40x_ZPR, "ZPR",
|
2053 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2054 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
2055 | a750fc0b | j_mayer | 0x00000000);
|
2056 | a750fc0b | j_mayer | } |
2057 | a750fc0b | j_mayer | |
2058 | 76a66253 | j_mayer | /* SPR specific to PowerPC 403 implementation */
|
2059 | 76a66253 | j_mayer | static void gen_spr_403 (CPUPPCState *env) |
2060 | 76a66253 | j_mayer | { |
2061 | 2662a059 | j_mayer | /* Debug interface */
|
2062 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2063 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DBCR0, "DBCR0",
|
2064 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2065 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_40x_dbcr0, |
2066 | 2662a059 | j_mayer | 0x00000000);
|
2067 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2068 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DBSR, "DBSR",
|
2069 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2070 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_clear, |
2071 | 2662a059 | j_mayer | /* Last reset was system reset */
|
2072 | 2662a059 | j_mayer | 0x00000300);
|
2073 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2074 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DAC1, "DAC1",
|
2075 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2076 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2077 | 2662a059 | j_mayer | 0x00000000);
|
2078 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2079 | 2662a059 | j_mayer | spr_register(env, SPR_40x_DAC2, "DAC2",
|
2080 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2081 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2082 | 2662a059 | j_mayer | 0x00000000);
|
2083 | 2662a059 | j_mayer | /* XXX : not implemented */
|
2084 | 2662a059 | j_mayer | spr_register(env, SPR_40x_IAC1, "IAC1",
|
2085 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2086 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2087 | 2662a059 | j_mayer | 0x00000000);
|
2088 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2089 | 2662a059 | j_mayer | spr_register(env, SPR_40x_IAC2, "IAC2",
|
2090 | 2662a059 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2091 | 2662a059 | j_mayer | &spr_read_generic, &spr_write_generic, |
2092 | 2662a059 | j_mayer | 0x00000000);
|
2093 | a750fc0b | j_mayer | } |
2094 | a750fc0b | j_mayer | |
2095 | a750fc0b | j_mayer | static void gen_spr_403_real (CPUPPCState *env) |
2096 | a750fc0b | j_mayer | { |
2097 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL1, "PBL1",
|
2098 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2099 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
2100 | 76a66253 | j_mayer | 0x00000000);
|
2101 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU1, "PBU1",
|
2102 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2103 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
2104 | 76a66253 | j_mayer | 0x00000000);
|
2105 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBL2, "PBL2",
|
2106 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2107 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
2108 | 76a66253 | j_mayer | 0x00000000);
|
2109 | 76a66253 | j_mayer | spr_register(env, SPR_403_PBU2, "PBU2",
|
2110 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2111 | 76a66253 | j_mayer | &spr_read_403_pbr, &spr_write_403_pbr, |
2112 | 76a66253 | j_mayer | 0x00000000);
|
2113 | a750fc0b | j_mayer | } |
2114 | a750fc0b | j_mayer | |
2115 | a750fc0b | j_mayer | static void gen_spr_403_mmu (CPUPPCState *env) |
2116 | a750fc0b | j_mayer | { |
2117 | a750fc0b | j_mayer | /* MMU */
|
2118 | a750fc0b | j_mayer | spr_register(env, SPR_40x_PID, "PID",
|
2119 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2120 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
2121 | a750fc0b | j_mayer | 0x00000000);
|
2122 | 2662a059 | j_mayer | spr_register(env, SPR_40x_ZPR, "ZPR",
|
2123 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2124 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2125 | 76a66253 | j_mayer | 0x00000000);
|
2126 | 76a66253 | j_mayer | } |
2127 | 76a66253 | j_mayer | |
2128 | 76a66253 | j_mayer | /* SPR specific to PowerPC compression coprocessor extension */
|
2129 | 76a66253 | j_mayer | static void gen_spr_compress (CPUPPCState *env) |
2130 | 76a66253 | j_mayer | { |
2131 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2132 | 76a66253 | j_mayer | spr_register(env, SPR_401_SKR, "SKR",
|
2133 | 76a66253 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2134 | 76a66253 | j_mayer | &spr_read_generic, &spr_write_generic, |
2135 | 76a66253 | j_mayer | 0x00000000);
|
2136 | 76a66253 | j_mayer | } |
2137 | a750fc0b | j_mayer | |
2138 | a750fc0b | j_mayer | #if defined (TARGET_PPC64)
|
2139 | a750fc0b | j_mayer | /* SPR specific to PowerPC 620 */
|
2140 | a750fc0b | j_mayer | static void gen_spr_620 (CPUPPCState *env) |
2141 | a750fc0b | j_mayer | { |
2142 | 082c6681 | j_mayer | /* Processor identification */
|
2143 | 082c6681 | j_mayer | spr_register(env, SPR_PIR, "PIR",
|
2144 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2145 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_pir, |
2146 | 082c6681 | j_mayer | 0x00000000);
|
2147 | 082c6681 | j_mayer | spr_register(env, SPR_ASR, "ASR",
|
2148 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2149 | 082c6681 | j_mayer | &spr_read_asr, &spr_write_asr, |
2150 | 082c6681 | j_mayer | 0x00000000);
|
2151 | 082c6681 | j_mayer | /* Breakpoints */
|
2152 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2153 | 082c6681 | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
2154 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2155 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
2156 | 082c6681 | j_mayer | 0x00000000);
|
2157 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2158 | 082c6681 | j_mayer | spr_register(env, SPR_DABR, "DABR",
|
2159 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2160 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
2161 | 082c6681 | j_mayer | 0x00000000);
|
2162 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2163 | 082c6681 | j_mayer | spr_register(env, SPR_SIAR, "SIAR",
|
2164 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2165 | 082c6681 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
2166 | 082c6681 | j_mayer | 0x00000000);
|
2167 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2168 | 082c6681 | j_mayer | spr_register(env, SPR_SDA, "SDA",
|
2169 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2170 | 082c6681 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
2171 | 082c6681 | j_mayer | 0x00000000);
|
2172 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2173 | 082c6681 | j_mayer | spr_register(env, SPR_620_PMC1R, "PMC1",
|
2174 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2175 | 082c6681 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
2176 | 082c6681 | j_mayer | 0x00000000);
|
2177 | 082c6681 | j_mayer | spr_register(env, SPR_620_PMC1W, "PMC1",
|
2178 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2179 | 082c6681 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
2180 | 082c6681 | j_mayer | 0x00000000);
|
2181 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2182 | 082c6681 | j_mayer | spr_register(env, SPR_620_PMC2R, "PMC2",
|
2183 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2184 | 082c6681 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
2185 | 082c6681 | j_mayer | 0x00000000);
|
2186 | 082c6681 | j_mayer | spr_register(env, SPR_620_PMC2W, "PMC2",
|
2187 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2188 | 082c6681 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
2189 | 082c6681 | j_mayer | 0x00000000);
|
2190 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2191 | 082c6681 | j_mayer | spr_register(env, SPR_620_MMCR0R, "MMCR0",
|
2192 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2193 | 082c6681 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
2194 | 082c6681 | j_mayer | 0x00000000);
|
2195 | 082c6681 | j_mayer | spr_register(env, SPR_620_MMCR0W, "MMCR0",
|
2196 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2197 | 082c6681 | j_mayer | SPR_NOACCESS, &spr_write_generic, |
2198 | 082c6681 | j_mayer | 0x00000000);
|
2199 | 082c6681 | j_mayer | /* External access control */
|
2200 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2201 | 082c6681 | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
2202 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2203 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
2204 | 082c6681 | j_mayer | 0x00000000);
|
2205 | 082c6681 | j_mayer | #if 0 // XXX: check this
|
2206 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2207 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR0, "PMR0",
|
2208 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2209 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2210 | a750fc0b | j_mayer | 0x00000000);
|
2211 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2212 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR1, "PMR1",
|
2213 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2214 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2215 | a750fc0b | j_mayer | 0x00000000);
|
2216 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2217 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR2, "PMR2",
|
2218 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2219 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2220 | a750fc0b | j_mayer | 0x00000000);
|
2221 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2222 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR3, "PMR3",
|
2223 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2224 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2225 | a750fc0b | j_mayer | 0x00000000);
|
2226 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2227 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR4, "PMR4",
|
2228 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2229 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2230 | a750fc0b | j_mayer | 0x00000000);
|
2231 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2232 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR5, "PMR5",
|
2233 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2234 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2235 | a750fc0b | j_mayer | 0x00000000);
|
2236 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2237 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR6, "PMR6",
|
2238 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2239 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2240 | a750fc0b | j_mayer | 0x00000000);
|
2241 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2242 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR7, "PMR7",
|
2243 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2244 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2245 | a750fc0b | j_mayer | 0x00000000);
|
2246 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2247 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR8, "PMR8",
|
2248 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2249 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2250 | a750fc0b | j_mayer | 0x00000000);
|
2251 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2252 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMR9, "PMR9",
|
2253 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2254 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2255 | a750fc0b | j_mayer | 0x00000000);
|
2256 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2257 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRA, "PMR10",
|
2258 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2259 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2260 | a750fc0b | j_mayer | 0x00000000);
|
2261 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2262 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRB, "PMR11",
|
2263 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2264 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2265 | a750fc0b | j_mayer | 0x00000000);
|
2266 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2267 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRC, "PMR12",
|
2268 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2269 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2270 | a750fc0b | j_mayer | 0x00000000);
|
2271 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2272 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRD, "PMR13",
|
2273 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2274 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2275 | a750fc0b | j_mayer | 0x00000000);
|
2276 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2277 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRE, "PMR14",
|
2278 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2279 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2280 | a750fc0b | j_mayer | 0x00000000);
|
2281 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2282 | a750fc0b | j_mayer | spr_register(env, SPR_620_PMRF, "PMR15",
|
2283 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS,
|
2284 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic,
|
2285 | a750fc0b | j_mayer | 0x00000000);
|
2286 | 082c6681 | j_mayer | #endif
|
2287 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2288 | 082c6681 | j_mayer | spr_register(env, SPR_620_BUSCSR, "BUSCSR",
|
2289 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2290 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
2291 | a750fc0b | j_mayer | 0x00000000);
|
2292 | 578bb252 | j_mayer | /* XXX : not implemented */
|
2293 | 082c6681 | j_mayer | spr_register(env, SPR_620_L2CR, "L2CR",
|
2294 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2295 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
2296 | 082c6681 | j_mayer | 0x00000000);
|
2297 | 082c6681 | j_mayer | /* XXX : not implemented */
|
2298 | 082c6681 | j_mayer | spr_register(env, SPR_620_L2SR, "L2SR",
|
2299 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2300 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
2301 | a750fc0b | j_mayer | 0x00000000);
|
2302 | a750fc0b | j_mayer | } |
2303 | a750fc0b | j_mayer | #endif /* defined (TARGET_PPC64) */ |
2304 | 76a66253 | j_mayer | |
2305 | 80d11f44 | j_mayer | static void gen_spr_5xx_8xx (CPUPPCState *env) |
2306 | e1833e1f | j_mayer | { |
2307 | 80d11f44 | j_mayer | /* Exception processing */
|
2308 | 80d11f44 | j_mayer | spr_register(env, SPR_DSISR, "DSISR",
|
2309 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2310 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2311 | 80d11f44 | j_mayer | 0x00000000);
|
2312 | 80d11f44 | j_mayer | spr_register(env, SPR_DAR, "DAR",
|
2313 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2314 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2315 | 80d11f44 | j_mayer | 0x00000000);
|
2316 | 80d11f44 | j_mayer | /* Timer */
|
2317 | 80d11f44 | j_mayer | spr_register(env, SPR_DECR, "DECR",
|
2318 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2319 | 80d11f44 | j_mayer | &spr_read_decr, &spr_write_decr, |
2320 | 80d11f44 | j_mayer | 0x00000000);
|
2321 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2322 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_EIE, "EIE",
|
2323 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2324 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2325 | 80d11f44 | j_mayer | 0x00000000);
|
2326 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2327 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_EID, "EID",
|
2328 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2329 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2330 | 80d11f44 | j_mayer | 0x00000000);
|
2331 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2332 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_NRI, "NRI",
|
2333 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2334 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2335 | 80d11f44 | j_mayer | 0x00000000);
|
2336 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2337 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPA, "CMPA",
|
2338 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2339 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2340 | 80d11f44 | j_mayer | 0x00000000);
|
2341 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2342 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPB, "CMPB",
|
2343 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2344 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2345 | 80d11f44 | j_mayer | 0x00000000);
|
2346 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2347 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPC, "CMPC",
|
2348 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2349 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2350 | 80d11f44 | j_mayer | 0x00000000);
|
2351 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2352 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPD, "CMPD",
|
2353 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2354 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2355 | 80d11f44 | j_mayer | 0x00000000);
|
2356 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2357 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_ECR, "ECR",
|
2358 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2359 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2360 | 80d11f44 | j_mayer | 0x00000000);
|
2361 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2362 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_DER, "DER",
|
2363 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2364 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2365 | 80d11f44 | j_mayer | 0x00000000);
|
2366 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2367 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_COUNTA, "COUNTA",
|
2368 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2369 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2370 | 80d11f44 | j_mayer | 0x00000000);
|
2371 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2372 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_COUNTB, "COUNTB",
|
2373 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2374 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2375 | 80d11f44 | j_mayer | 0x00000000);
|
2376 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2377 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPE, "CMPE",
|
2378 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2379 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2380 | 80d11f44 | j_mayer | 0x00000000);
|
2381 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2382 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPF, "CMPF",
|
2383 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2384 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2385 | 80d11f44 | j_mayer | 0x00000000);
|
2386 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2387 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPG, "CMPG",
|
2388 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2389 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2390 | 80d11f44 | j_mayer | 0x00000000);
|
2391 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2392 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_CMPH, "CMPH",
|
2393 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2394 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2395 | 80d11f44 | j_mayer | 0x00000000);
|
2396 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2397 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_LCTRL1, "LCTRL1",
|
2398 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2399 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2400 | 80d11f44 | j_mayer | 0x00000000);
|
2401 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2402 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_LCTRL2, "LCTRL2",
|
2403 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2404 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2405 | 80d11f44 | j_mayer | 0x00000000);
|
2406 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2407 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_BAR, "BAR",
|
2408 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2409 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2410 | 80d11f44 | j_mayer | 0x00000000);
|
2411 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2412 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_DPDR, "DPDR",
|
2413 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2414 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2415 | 80d11f44 | j_mayer | 0x00000000);
|
2416 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2417 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_IMMR, "IMMR",
|
2418 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2419 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2420 | 80d11f44 | j_mayer | 0x00000000);
|
2421 | 80d11f44 | j_mayer | } |
2422 | 80d11f44 | j_mayer | |
2423 | 80d11f44 | j_mayer | static void gen_spr_5xx (CPUPPCState *env) |
2424 | 80d11f44 | j_mayer | { |
2425 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2426 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_GRA, "MI_GRA",
|
2427 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2428 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2429 | 80d11f44 | j_mayer | 0x00000000);
|
2430 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2431 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_GRA, "L2U_GRA",
|
2432 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2433 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2434 | 80d11f44 | j_mayer | 0x00000000);
|
2435 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2436 | 80d11f44 | j_mayer | spr_register(env, SPR_RPCU_BBCMCR, "L2U_BBCMCR",
|
2437 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2438 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2439 | 80d11f44 | j_mayer | 0x00000000);
|
2440 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2441 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_MCR, "L2U_MCR",
|
2442 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2443 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2444 | 80d11f44 | j_mayer | 0x00000000);
|
2445 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2446 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RBA0, "MI_RBA0",
|
2447 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2448 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2449 | 80d11f44 | j_mayer | 0x00000000);
|
2450 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2451 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RBA1, "MI_RBA1",
|
2452 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2453 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2454 | 80d11f44 | j_mayer | 0x00000000);
|
2455 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2456 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RBA2, "MI_RBA2",
|
2457 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2458 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2459 | 80d11f44 | j_mayer | 0x00000000);
|
2460 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2461 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RBA3, "MI_RBA3",
|
2462 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2463 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2464 | 80d11f44 | j_mayer | 0x00000000);
|
2465 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2466 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RBA0, "L2U_RBA0",
|
2467 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2468 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2469 | 80d11f44 | j_mayer | 0x00000000);
|
2470 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2471 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RBA1, "L2U_RBA1",
|
2472 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2473 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2474 | 80d11f44 | j_mayer | 0x00000000);
|
2475 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2476 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RBA2, "L2U_RBA2",
|
2477 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2478 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2479 | 80d11f44 | j_mayer | 0x00000000);
|
2480 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2481 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RBA3, "L2U_RBA3",
|
2482 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2483 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2484 | 80d11f44 | j_mayer | 0x00000000);
|
2485 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2486 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RA0, "MI_RA0",
|
2487 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2488 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2489 | 80d11f44 | j_mayer | 0x00000000);
|
2490 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2491 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RA1, "MI_RA1",
|
2492 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2493 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2494 | 80d11f44 | j_mayer | 0x00000000);
|
2495 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2496 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RA2, "MI_RA2",
|
2497 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2498 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2499 | 80d11f44 | j_mayer | 0x00000000);
|
2500 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2501 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_MI_RA3, "MI_RA3",
|
2502 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2503 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2504 | 80d11f44 | j_mayer | 0x00000000);
|
2505 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2506 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RA0, "L2U_RA0",
|
2507 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2508 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2509 | 80d11f44 | j_mayer | 0x00000000);
|
2510 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2511 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RA1, "L2U_RA1",
|
2512 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2513 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2514 | 80d11f44 | j_mayer | 0x00000000);
|
2515 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2516 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RA2, "L2U_RA2",
|
2517 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2518 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2519 | 80d11f44 | j_mayer | 0x00000000);
|
2520 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2521 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_L2U_RA3, "L2U_RA3",
|
2522 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2523 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2524 | 80d11f44 | j_mayer | 0x00000000);
|
2525 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2526 | 80d11f44 | j_mayer | spr_register(env, SPR_RCPU_FPECR, "FPECR",
|
2527 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2528 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2529 | 80d11f44 | j_mayer | 0x00000000);
|
2530 | 80d11f44 | j_mayer | } |
2531 | 80d11f44 | j_mayer | |
2532 | 80d11f44 | j_mayer | static void gen_spr_8xx (CPUPPCState *env) |
2533 | 80d11f44 | j_mayer | { |
2534 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2535 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_IC_CST, "IC_CST",
|
2536 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2537 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2538 | 80d11f44 | j_mayer | 0x00000000);
|
2539 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2540 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_IC_ADR, "IC_ADR",
|
2541 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2542 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2543 | 80d11f44 | j_mayer | 0x00000000);
|
2544 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2545 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_IC_DAT, "IC_DAT",
|
2546 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2547 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2548 | 80d11f44 | j_mayer | 0x00000000);
|
2549 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2550 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_DC_CST, "DC_CST",
|
2551 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2552 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2553 | 80d11f44 | j_mayer | 0x00000000);
|
2554 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2555 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_DC_ADR, "DC_ADR",
|
2556 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2557 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2558 | 80d11f44 | j_mayer | 0x00000000);
|
2559 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2560 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_DC_DAT, "DC_DAT",
|
2561 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2562 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2563 | 80d11f44 | j_mayer | 0x00000000);
|
2564 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2565 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_CTR, "MI_CTR",
|
2566 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2567 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2568 | 80d11f44 | j_mayer | 0x00000000);
|
2569 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2570 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_AP, "MI_AP",
|
2571 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2572 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2573 | 80d11f44 | j_mayer | 0x00000000);
|
2574 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2575 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_EPN, "MI_EPN",
|
2576 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2577 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2578 | 80d11f44 | j_mayer | 0x00000000);
|
2579 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2580 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_TWC, "MI_TWC",
|
2581 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2582 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2583 | 80d11f44 | j_mayer | 0x00000000);
|
2584 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2585 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_RPN, "MI_RPN",
|
2586 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2587 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2588 | 80d11f44 | j_mayer | 0x00000000);
|
2589 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2590 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_DBCAM, "MI_DBCAM",
|
2591 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2592 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2593 | 80d11f44 | j_mayer | 0x00000000);
|
2594 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2595 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_DBRAM0, "MI_DBRAM0",
|
2596 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2597 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2598 | 80d11f44 | j_mayer | 0x00000000);
|
2599 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2600 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MI_DBRAM1, "MI_DBRAM1",
|
2601 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2602 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2603 | 80d11f44 | j_mayer | 0x00000000);
|
2604 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2605 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_CTR, "MD_CTR",
|
2606 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2607 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2608 | 80d11f44 | j_mayer | 0x00000000);
|
2609 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2610 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_CASID, "MD_CASID",
|
2611 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2612 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2613 | 80d11f44 | j_mayer | 0x00000000);
|
2614 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2615 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_AP, "MD_AP",
|
2616 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2617 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2618 | 80d11f44 | j_mayer | 0x00000000);
|
2619 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2620 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_EPN, "MD_EPN",
|
2621 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2622 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2623 | 80d11f44 | j_mayer | 0x00000000);
|
2624 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2625 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_TWB, "MD_TWB",
|
2626 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2627 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2628 | 80d11f44 | j_mayer | 0x00000000);
|
2629 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2630 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_TWC, "MD_TWC",
|
2631 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2632 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2633 | 80d11f44 | j_mayer | 0x00000000);
|
2634 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2635 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_RPN, "MD_RPN",
|
2636 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2637 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2638 | 80d11f44 | j_mayer | 0x00000000);
|
2639 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2640 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_TW, "MD_TW",
|
2641 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2642 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2643 | 80d11f44 | j_mayer | 0x00000000);
|
2644 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2645 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_DBCAM, "MD_DBCAM",
|
2646 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2647 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2648 | 80d11f44 | j_mayer | 0x00000000);
|
2649 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2650 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_DBRAM0, "MD_DBRAM0",
|
2651 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2652 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2653 | 80d11f44 | j_mayer | 0x00000000);
|
2654 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
2655 | 80d11f44 | j_mayer | spr_register(env, SPR_MPC_MD_DBRAM1, "MD_DBRAM1",
|
2656 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
2657 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
2658 | 80d11f44 | j_mayer | 0x00000000);
|
2659 | 80d11f44 | j_mayer | } |
2660 | 80d11f44 | j_mayer | |
2661 | 80d11f44 | j_mayer | // XXX: TODO
|
2662 | 80d11f44 | j_mayer | /*
|
2663 | 80d11f44 | j_mayer | * AMR => SPR 29 (Power 2.04)
|
2664 | 80d11f44 | j_mayer | * CTRL => SPR 136 (Power 2.04)
|
2665 | 80d11f44 | j_mayer | * CTRL => SPR 152 (Power 2.04)
|
2666 | 80d11f44 | j_mayer | * SCOMC => SPR 276 (64 bits ?)
|
2667 | 80d11f44 | j_mayer | * SCOMD => SPR 277 (64 bits ?)
|
2668 | 80d11f44 | j_mayer | * TBU40 => SPR 286 (Power 2.04 hypv)
|
2669 | 80d11f44 | j_mayer | * HSPRG0 => SPR 304 (Power 2.04 hypv)
|
2670 | 80d11f44 | j_mayer | * HSPRG1 => SPR 305 (Power 2.04 hypv)
|
2671 | 80d11f44 | j_mayer | * HDSISR => SPR 306 (Power 2.04 hypv)
|
2672 | 80d11f44 | j_mayer | * HDAR => SPR 307 (Power 2.04 hypv)
|
2673 | 80d11f44 | j_mayer | * PURR => SPR 309 (Power 2.04 hypv)
|
2674 | 80d11f44 | j_mayer | * HDEC => SPR 310 (Power 2.04 hypv)
|
2675 | 80d11f44 | j_mayer | * HIOR => SPR 311 (hypv)
|
2676 | 80d11f44 | j_mayer | * RMOR => SPR 312 (970)
|
2677 | 80d11f44 | j_mayer | * HRMOR => SPR 313 (Power 2.04 hypv)
|
2678 | 80d11f44 | j_mayer | * HSRR0 => SPR 314 (Power 2.04 hypv)
|
2679 | 80d11f44 | j_mayer | * HSRR1 => SPR 315 (Power 2.04 hypv)
|
2680 | 80d11f44 | j_mayer | * LPCR => SPR 316 (970)
|
2681 | 80d11f44 | j_mayer | * LPIDR => SPR 317 (970)
|
2682 | 80d11f44 | j_mayer | * EPR => SPR 702 (Power 2.04 emb)
|
2683 | 80d11f44 | j_mayer | * perf => 768-783 (Power 2.04)
|
2684 | 80d11f44 | j_mayer | * perf => 784-799 (Power 2.04)
|
2685 | 80d11f44 | j_mayer | * PPR => SPR 896 (Power 2.04)
|
2686 | 80d11f44 | j_mayer | * EPLC => SPR 947 (Power 2.04 emb)
|
2687 | 80d11f44 | j_mayer | * EPSC => SPR 948 (Power 2.04 emb)
|
2688 | 80d11f44 | j_mayer | * DABRX => 1015 (Power 2.04 hypv)
|
2689 | 80d11f44 | j_mayer | * FPECR => SPR 1022 (?)
|
2690 | 80d11f44 | j_mayer | * ... and more (thermal management, performance counters, ...)
|
2691 | 80d11f44 | j_mayer | */
|
2692 | 80d11f44 | j_mayer | |
2693 | 80d11f44 | j_mayer | /*****************************************************************************/
|
2694 | 80d11f44 | j_mayer | /* Exception vectors models */
|
2695 | 80d11f44 | j_mayer | static void init_excp_4xx_real (CPUPPCState *env) |
2696 | 80d11f44 | j_mayer | { |
2697 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2698 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000100;
|
2699 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2700 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2701 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2702 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2703 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2704 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PIT] = 0x00001000;
|
2705 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010;
|
2706 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020;
|
2707 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000;
|
2708 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2709 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFF0UL;
|
2710 | faadf50e | j_mayer | env->ivpr_mask = 0xFFFF0000UL;
|
2711 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2712 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2713 | e1833e1f | j_mayer | #endif
|
2714 | e1833e1f | j_mayer | } |
2715 | e1833e1f | j_mayer | |
2716 | 80d11f44 | j_mayer | static void init_excp_4xx_softmmu (CPUPPCState *env) |
2717 | 80d11f44 | j_mayer | { |
2718 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2719 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000100;
|
2720 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2721 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2722 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2723 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2724 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2725 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2726 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2727 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PIT] = 0x00001000;
|
2728 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FIT] = 0x00001010;
|
2729 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001020;
|
2730 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001100;
|
2731 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001200;
|
2732 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00002000;
|
2733 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2734 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFF0UL;
|
2735 | 80d11f44 | j_mayer | env->ivpr_mask = 0xFFFF0000UL;
|
2736 | 80d11f44 | j_mayer | /* Hardware reset vector */
|
2737 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2738 | 80d11f44 | j_mayer | #endif
|
2739 | 80d11f44 | j_mayer | } |
2740 | 80d11f44 | j_mayer | |
2741 | 80d11f44 | j_mayer | static void init_excp_MPC5xx (CPUPPCState *env) |
2742 | 80d11f44 | j_mayer | { |
2743 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2744 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2745 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2746 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2747 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2748 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2749 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
|
2750 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2751 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2752 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2753 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPA] = 0x00000E00;
|
2754 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001000;
|
2755 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DABR] = 0x00001C00;
|
2756 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00;
|
2757 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00;
|
2758 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00;
|
2759 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2760 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFF0UL;
|
2761 | 80d11f44 | j_mayer | env->ivpr_mask = 0xFFFF0000UL;
|
2762 | 80d11f44 | j_mayer | /* Hardware reset vector */
|
2763 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2764 | 80d11f44 | j_mayer | #endif
|
2765 | 80d11f44 | j_mayer | } |
2766 | 80d11f44 | j_mayer | |
2767 | 80d11f44 | j_mayer | static void init_excp_MPC8xx (CPUPPCState *env) |
2768 | e1833e1f | j_mayer | { |
2769 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2770 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2771 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2772 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2773 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2774 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2775 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2776 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2777 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000900;
|
2778 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2779 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2780 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2781 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPA] = 0x00000E00;
|
2782 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001000;
|
2783 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00001100;
|
2784 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00001200;
|
2785 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ITLBE] = 0x00001300;
|
2786 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DTLBE] = 0x00001400;
|
2787 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DABR] = 0x00001C00;
|
2788 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001C00;
|
2789 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MEXTBR] = 0x00001E00;
|
2790 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_NMEXTBR] = 0x00001F00;
|
2791 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2792 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFF0UL;
|
2793 | 80d11f44 | j_mayer | env->ivpr_mask = 0xFFFF0000UL;
|
2794 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2795 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2796 | e1833e1f | j_mayer | #endif
|
2797 | e1833e1f | j_mayer | } |
2798 | e1833e1f | j_mayer | |
2799 | 80d11f44 | j_mayer | static void init_excp_G2 (CPUPPCState *env) |
2800 | e1833e1f | j_mayer | { |
2801 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2802 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2803 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2804 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2805 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2806 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2807 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2808 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2809 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2810 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2811 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000A00;
|
2812 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2813 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2814 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
|
2815 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
|
2816 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
|
2817 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
2818 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
2819 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2820 | 80d11f44 | j_mayer | /* Hardware reset vector */
|
2821 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2822 | 80d11f44 | j_mayer | #endif
|
2823 | 80d11f44 | j_mayer | } |
2824 | 80d11f44 | j_mayer | |
2825 | e9cd84b9 | Alexander Graf | static void init_excp_e200(CPUPPCState *env, target_ulong ivpr_mask) |
2826 | 80d11f44 | j_mayer | { |
2827 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2828 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000FFC;
|
2829 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000000;
|
2830 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000000;
|
2831 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000000;
|
2832 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000000;
|
2833 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000000;
|
2834 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000000;
|
2835 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000000;
|
2836 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000000;
|
2837 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000000;
|
2838 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_APU] = 0x00000000;
|
2839 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000000;
|
2840 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FIT] = 0x00000000;
|
2841 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00000000;
|
2842 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000;
|
2843 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000;
|
2844 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000;
|
2845 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SPEU] = 0x00000000;
|
2846 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EFPDI] = 0x00000000;
|
2847 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EFPRI] = 0x00000000;
|
2848 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2849 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFF7UL;
|
2850 | e9cd84b9 | Alexander Graf | env->ivpr_mask = ivpr_mask; |
2851 | 80d11f44 | j_mayer | /* Hardware reset vector */
|
2852 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2853 | 80d11f44 | j_mayer | #endif
|
2854 | 80d11f44 | j_mayer | } |
2855 | 80d11f44 | j_mayer | |
2856 | 80d11f44 | j_mayer | static void init_excp_BookE (CPUPPCState *env) |
2857 | 80d11f44 | j_mayer | { |
2858 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2859 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_CRITICAL] = 0x00000000;
|
2860 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000000;
|
2861 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000000;
|
2862 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000000;
|
2863 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000000;
|
2864 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000000;
|
2865 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000000;
|
2866 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000000;
|
2867 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000000;
|
2868 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_APU] = 0x00000000;
|
2869 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000000;
|
2870 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FIT] = 0x00000000;
|
2871 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00000000;
|
2872 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DTLB] = 0x00000000;
|
2873 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ITLB] = 0x00000000;
|
2874 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DEBUG] = 0x00000000;
|
2875 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2876 | 80d11f44 | j_mayer | env->ivor_mask = 0x0000FFE0UL;
|
2877 | 80d11f44 | j_mayer | env->ivpr_mask = 0xFFFF0000UL;
|
2878 | 80d11f44 | j_mayer | /* Hardware reset vector */
|
2879 | 80d11f44 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2880 | 80d11f44 | j_mayer | #endif
|
2881 | 80d11f44 | j_mayer | } |
2882 | 80d11f44 | j_mayer | |
2883 | 80d11f44 | j_mayer | static void init_excp_601 (CPUPPCState *env) |
2884 | 80d11f44 | j_mayer | { |
2885 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2886 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2887 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2888 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2889 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2890 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2891 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2892 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2893 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2894 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2895 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_IO] = 0x00000A00;
|
2896 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2897 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_RUNM] = 0x00002000;
|
2898 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0xFFF00000UL;
|
2899 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2900 | 80d11f44 | j_mayer | env->hreset_vector = 0x00000100UL;
|
2901 | e1833e1f | j_mayer | #endif
|
2902 | e1833e1f | j_mayer | } |
2903 | e1833e1f | j_mayer | |
2904 | 80d11f44 | j_mayer | static void init_excp_602 (CPUPPCState *env) |
2905 | e1833e1f | j_mayer | { |
2906 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2907 | 082c6681 | j_mayer | /* XXX: exception prefix has a special behavior on 602 */
|
2908 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2909 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2910 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2911 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2912 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2913 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2914 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2915 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2916 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2917 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2918 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2919 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
|
2920 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
|
2921 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
|
2922 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
2923 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
2924 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_WDT] = 0x00001500;
|
2925 | 80d11f44 | j_mayer | env->excp_vectors[POWERPC_EXCP_EMUL] = 0x00001600;
|
2926 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0xFFF00000UL;
|
2927 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2928 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2929 | e1833e1f | j_mayer | #endif
|
2930 | e1833e1f | j_mayer | } |
2931 | e1833e1f | j_mayer | |
2932 | 80d11f44 | j_mayer | static void init_excp_603 (CPUPPCState *env) |
2933 | e1833e1f | j_mayer | { |
2934 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2935 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2936 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2937 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2938 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2939 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2940 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2941 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2942 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2943 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2944 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2945 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2946 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
|
2947 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
|
2948 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
|
2949 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
2950 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
2951 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
2952 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2953 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
2954 | e1833e1f | j_mayer | #endif
|
2955 | e1833e1f | j_mayer | } |
2956 | e1833e1f | j_mayer | |
2957 | e1833e1f | j_mayer | static void init_excp_604 (CPUPPCState *env) |
2958 | e1833e1f | j_mayer | { |
2959 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2960 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2961 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2962 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2963 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2964 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2965 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2966 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2967 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2968 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2969 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2970 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2971 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
2972 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
2973 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
2974 | 2d3eb7bf | Tristan Gingold | env->hreset_excp_prefix = 0xFFF00000UL;
|
2975 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
2976 | 2d3eb7bf | Tristan Gingold | env->hreset_vector = 0x00000100UL;
|
2977 | e1833e1f | j_mayer | #endif
|
2978 | e1833e1f | j_mayer | } |
2979 | e1833e1f | j_mayer | |
2980 | 578bb252 | j_mayer | #if defined(TARGET_PPC64)
|
2981 | e1833e1f | j_mayer | static void init_excp_620 (CPUPPCState *env) |
2982 | e1833e1f | j_mayer | { |
2983 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
2984 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
2985 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
2986 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
2987 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
2988 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
2989 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
2990 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
2991 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
2992 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
2993 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
2994 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
2995 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
2996 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
2997 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
2998 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0xFFF00000UL;
|
2999 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3000 | faadf50e | j_mayer | env->hreset_vector = 0x0000000000000100ULL;
|
3001 | e1833e1f | j_mayer | #endif
|
3002 | e1833e1f | j_mayer | } |
3003 | 578bb252 | j_mayer | #endif /* defined(TARGET_PPC64) */ |
3004 | e1833e1f | j_mayer | |
3005 | e1833e1f | j_mayer | static void init_excp_7x0 (CPUPPCState *env) |
3006 | e1833e1f | j_mayer | { |
3007 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3008 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3009 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3010 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3011 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3012 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3013 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3014 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3015 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3016 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3017 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3018 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3019 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3020 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3021 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
3022 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
|
3023 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3024 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3025 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3026 | e1833e1f | j_mayer | #endif
|
3027 | e1833e1f | j_mayer | } |
3028 | e1833e1f | j_mayer | |
3029 | bd928eba | j_mayer | static void init_excp_750cl (CPUPPCState *env) |
3030 | e1833e1f | j_mayer | { |
3031 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3032 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3033 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3034 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3035 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3036 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3037 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3038 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3039 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3040 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3041 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3042 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3043 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3044 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3045 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
3046 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3047 | bd928eba | j_mayer | /* Hardware reset vector */
|
3048 | bd928eba | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3049 | bd928eba | j_mayer | #endif
|
3050 | bd928eba | j_mayer | } |
3051 | bd928eba | j_mayer | |
3052 | bd928eba | j_mayer | static void init_excp_750cx (CPUPPCState *env) |
3053 | bd928eba | j_mayer | { |
3054 | bd928eba | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3055 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3056 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3057 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3058 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3059 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3060 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3061 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3062 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3063 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3064 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3065 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3066 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3067 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3068 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
|
3069 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3070 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3071 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3072 | e1833e1f | j_mayer | #endif
|
3073 | e1833e1f | j_mayer | } |
3074 | e1833e1f | j_mayer | |
3075 | 7a3a6927 | j_mayer | /* XXX: Check if this is correct */
|
3076 | 7a3a6927 | j_mayer | static void init_excp_7x5 (CPUPPCState *env) |
3077 | 7a3a6927 | j_mayer | { |
3078 | 7a3a6927 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3079 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3080 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3081 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3082 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3083 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3084 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3085 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3086 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3087 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3088 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3089 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3090 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3091 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
|
3092 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
|
3093 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
|
3094 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3095 | 7a3a6927 | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
3096 | bd928eba | j_mayer | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
|
3097 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3098 | 7a3a6927 | j_mayer | /* Hardware reset vector */
|
3099 | 7a3a6927 | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3100 | 7a3a6927 | j_mayer | #endif
|
3101 | 7a3a6927 | j_mayer | } |
3102 | 7a3a6927 | j_mayer | |
3103 | e1833e1f | j_mayer | static void init_excp_7400 (CPUPPCState *env) |
3104 | e1833e1f | j_mayer | { |
3105 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3106 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3107 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3108 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3109 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3110 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3111 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3112 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3113 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3114 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3115 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3116 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3117 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3118 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
|
3119 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3120 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
3121 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600;
|
3122 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001700;
|
3123 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3124 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3125 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3126 | e1833e1f | j_mayer | #endif
|
3127 | e1833e1f | j_mayer | } |
3128 | e1833e1f | j_mayer | |
3129 | e1833e1f | j_mayer | static void init_excp_7450 (CPUPPCState *env) |
3130 | e1833e1f | j_mayer | { |
3131 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3132 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3133 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3134 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3135 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3136 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3137 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3138 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3139 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3140 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3141 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3142 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3143 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3144 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
|
3145 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IFTLB] = 0x00001000;
|
3146 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DLTLB] = 0x00001100;
|
3147 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSTLB] = 0x00001200;
|
3148 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3149 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SMI] = 0x00001400;
|
3150 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001600;
|
3151 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000UL;
|
3152 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3153 | 1c27f8fb | j_mayer | env->hreset_vector = 0xFFFFFFFCUL;
|
3154 | e1833e1f | j_mayer | #endif
|
3155 | e1833e1f | j_mayer | } |
3156 | e1833e1f | j_mayer | |
3157 | e1833e1f | j_mayer | #if defined (TARGET_PPC64)
|
3158 | e1833e1f | j_mayer | static void init_excp_970 (CPUPPCState *env) |
3159 | e1833e1f | j_mayer | { |
3160 | e1833e1f | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3161 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3162 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3163 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3164 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DSEG] = 0x00000380;
|
3165 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3166 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ISEG] = 0x00000480;
|
3167 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3168 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3169 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3170 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3171 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3172 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_HDECR] = 0x00000980;
|
3173 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3174 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3175 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3176 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
|
3177 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3178 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600;
|
3179 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700;
|
3180 | e1833e1f | j_mayer | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800;
|
3181 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000FFF00000ULL;
|
3182 | 1c27f8fb | j_mayer | /* Hardware reset vector */
|
3183 | 1c27f8fb | j_mayer | env->hreset_vector = 0x0000000000000100ULL;
|
3184 | e1833e1f | j_mayer | #endif
|
3185 | e1833e1f | j_mayer | } |
3186 | 9d52e907 | David Gibson | |
3187 | 9d52e907 | David Gibson | static void init_excp_POWER7 (CPUPPCState *env) |
3188 | 9d52e907 | David Gibson | { |
3189 | 9d52e907 | David Gibson | #if !defined(CONFIG_USER_ONLY)
|
3190 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_RESET] = 0x00000100;
|
3191 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_MCHECK] = 0x00000200;
|
3192 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_DSI] = 0x00000300;
|
3193 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_DSEG] = 0x00000380;
|
3194 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_ISI] = 0x00000400;
|
3195 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_ISEG] = 0x00000480;
|
3196 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_EXTERNAL] = 0x00000500;
|
3197 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_ALIGN] = 0x00000600;
|
3198 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_PROGRAM] = 0x00000700;
|
3199 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_FPU] = 0x00000800;
|
3200 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_DECR] = 0x00000900;
|
3201 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_HDECR] = 0x00000980;
|
3202 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_SYSCALL] = 0x00000C00;
|
3203 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_TRACE] = 0x00000D00;
|
3204 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_PERFM] = 0x00000F00;
|
3205 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_VPU] = 0x00000F20;
|
3206 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_IABR] = 0x00001300;
|
3207 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_MAINT] = 0x00001600;
|
3208 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_VPUA] = 0x00001700;
|
3209 | 9d52e907 | David Gibson | env->excp_vectors[POWERPC_EXCP_THERM] = 0x00001800;
|
3210 | 9d52e907 | David Gibson | env->hreset_excp_prefix = 0;
|
3211 | 9d52e907 | David Gibson | /* Hardware reset vector */
|
3212 | 9d52e907 | David Gibson | env->hreset_vector = 0x0000000000000100ULL;
|
3213 | 9d52e907 | David Gibson | #endif
|
3214 | 9d52e907 | David Gibson | } |
3215 | e1833e1f | j_mayer | #endif
|
3216 | e1833e1f | j_mayer | |
3217 | e1833e1f | j_mayer | /*****************************************************************************/
|
3218 | 2f462816 | j_mayer | /* Power management enable checks */
|
3219 | 2f462816 | j_mayer | static int check_pow_none (CPUPPCState *env) |
3220 | 2f462816 | j_mayer | { |
3221 | 2f462816 | j_mayer | return 0; |
3222 | 2f462816 | j_mayer | } |
3223 | 2f462816 | j_mayer | |
3224 | 2f462816 | j_mayer | static int check_pow_nocheck (CPUPPCState *env) |
3225 | 2f462816 | j_mayer | { |
3226 | 2f462816 | j_mayer | return 1; |
3227 | 2f462816 | j_mayer | } |
3228 | 2f462816 | j_mayer | |
3229 | 2f462816 | j_mayer | static int check_pow_hid0 (CPUPPCState *env) |
3230 | 2f462816 | j_mayer | { |
3231 | 2f462816 | j_mayer | if (env->spr[SPR_HID0] & 0x00E00000) |
3232 | 2f462816 | j_mayer | return 1; |
3233 | 2f462816 | j_mayer | |
3234 | 2f462816 | j_mayer | return 0; |
3235 | 2f462816 | j_mayer | } |
3236 | 2f462816 | j_mayer | |
3237 | 4e777442 | j_mayer | static int check_pow_hid0_74xx (CPUPPCState *env) |
3238 | 4e777442 | j_mayer | { |
3239 | 4e777442 | j_mayer | if (env->spr[SPR_HID0] & 0x00600000) |
3240 | 4e777442 | j_mayer | return 1; |
3241 | 4e777442 | j_mayer | |
3242 | 4e777442 | j_mayer | return 0; |
3243 | 4e777442 | j_mayer | } |
3244 | 4e777442 | j_mayer | |
3245 | 2f462816 | j_mayer | /*****************************************************************************/
|
3246 | a750fc0b | j_mayer | /* PowerPC implementations definitions */
|
3247 | 76a66253 | j_mayer | |
3248 | 7856e3a4 | Andreas Färber | #define POWERPC_FAMILY(_name) \
|
3249 | 7856e3a4 | Andreas Färber | static void \ |
3250 | 7856e3a4 | Andreas Färber | glue(glue(ppc_, _name), _cpu_family_class_init)(ObjectClass *, void *); \
|
3251 | 7856e3a4 | Andreas Färber | \ |
3252 | 7856e3a4 | Andreas Färber | static const TypeInfo \ |
3253 | 7856e3a4 | Andreas Färber | glue(glue(ppc_, _name), _cpu_family_type_info) = { \ |
3254 | 7856e3a4 | Andreas Färber | .name = stringify(_name) "-family-" TYPE_POWERPC_CPU, \
|
3255 | 7856e3a4 | Andreas Färber | .parent = TYPE_POWERPC_CPU, \ |
3256 | 7856e3a4 | Andreas Färber | .abstract = true, \
|
3257 | 7856e3a4 | Andreas Färber | .class_init = glue(glue(ppc_, _name), _cpu_family_class_init), \ |
3258 | 7856e3a4 | Andreas Färber | }; \ |
3259 | 7856e3a4 | Andreas Färber | \ |
3260 | 7856e3a4 | Andreas Färber | static void glue(glue(ppc_, _name), _cpu_family_register_types)(void) \ |
3261 | 7856e3a4 | Andreas Färber | { \ |
3262 | 7856e3a4 | Andreas Färber | type_register_static( \ |
3263 | 7856e3a4 | Andreas Färber | &glue(glue(ppc_, _name), _cpu_family_type_info)); \ |
3264 | 7856e3a4 | Andreas Färber | } \ |
3265 | 7856e3a4 | Andreas Färber | \ |
3266 | 7856e3a4 | Andreas Färber | type_init(glue(glue(ppc_, _name), _cpu_family_register_types)) \ |
3267 | 7856e3a4 | Andreas Färber | \ |
3268 | 7856e3a4 | Andreas Färber | static void glue(glue(ppc_, _name), _cpu_family_class_init) |
3269 | 7856e3a4 | Andreas Färber | |
3270 | a750fc0b | j_mayer | static void init_proc_401 (CPUPPCState *env) |
3271 | a750fc0b | j_mayer | { |
3272 | a750fc0b | j_mayer | gen_spr_40x(env); |
3273 | a750fc0b | j_mayer | gen_spr_401_403(env); |
3274 | a750fc0b | j_mayer | gen_spr_401(env); |
3275 | e1833e1f | j_mayer | init_excp_4xx_real(env); |
3276 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3277 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3278 | 4e290a0b | j_mayer | /* Allocate hardware IRQ controller */
|
3279 | 4e290a0b | j_mayer | ppc40x_irq_init(env); |
3280 | ddd1055b | Fabien Chouteau | |
3281 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3282 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3283 | a750fc0b | j_mayer | } |
3284 | 76a66253 | j_mayer | |
3285 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(401)(ObjectClass *oc, void *data) |
3286 | 7856e3a4 | Andreas Färber | { |
3287 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3288 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3289 | 7856e3a4 | Andreas Färber | |
3290 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 401";
|
3291 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_401; |
3292 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3293 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3294 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_DCR | |
3295 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3296 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | |
3297 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3298 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3299 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3300 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x00000000000FD201ULL;
|
3301 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_REAL; |
3302 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3303 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3304 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3305 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
3306 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3307 | 7856e3a4 | Andreas Färber | } |
3308 | 7856e3a4 | Andreas Färber | |
3309 | a750fc0b | j_mayer | static void init_proc_401x2 (CPUPPCState *env) |
3310 | a750fc0b | j_mayer | { |
3311 | a750fc0b | j_mayer | gen_spr_40x(env); |
3312 | a750fc0b | j_mayer | gen_spr_401_403(env); |
3313 | a750fc0b | j_mayer | gen_spr_401x2(env); |
3314 | a750fc0b | j_mayer | gen_spr_compress(env); |
3315 | a750fc0b | j_mayer | /* Memory management */
|
3316 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3317 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
3318 | a750fc0b | j_mayer | env->nb_ways = 1;
|
3319 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
3320 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3321 | f2e63a42 | j_mayer | #endif
|
3322 | e1833e1f | j_mayer | init_excp_4xx_softmmu(env); |
3323 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3324 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3325 | 4e290a0b | j_mayer | /* Allocate hardware IRQ controller */
|
3326 | 4e290a0b | j_mayer | ppc40x_irq_init(env); |
3327 | ddd1055b | Fabien Chouteau | |
3328 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3329 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3330 | 76a66253 | j_mayer | } |
3331 | 76a66253 | j_mayer | |
3332 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(401x2)(ObjectClass *oc, void *data) |
3333 | 7856e3a4 | Andreas Färber | { |
3334 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3335 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3336 | 7856e3a4 | Andreas Färber | |
3337 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 401x2";
|
3338 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_401x2; |
3339 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3340 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
3341 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3342 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3343 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3344 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3345 | 53116ebf | Andreas Färber | PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | |
3346 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3347 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3348 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x00000000001FD231ULL;
|
3349 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_4xx_Z; |
3350 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3351 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3352 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3353 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
3354 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3355 | 7856e3a4 | Andreas Färber | } |
3356 | 7856e3a4 | Andreas Färber | |
3357 | e1833e1f | j_mayer | static void init_proc_401x3 (CPUPPCState *env) |
3358 | 76a66253 | j_mayer | { |
3359 | 4e290a0b | j_mayer | gen_spr_40x(env); |
3360 | 4e290a0b | j_mayer | gen_spr_401_403(env); |
3361 | 4e290a0b | j_mayer | gen_spr_401(env); |
3362 | 4e290a0b | j_mayer | gen_spr_401x2(env); |
3363 | 4e290a0b | j_mayer | gen_spr_compress(env); |
3364 | e1833e1f | j_mayer | init_excp_4xx_softmmu(env); |
3365 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3366 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3367 | 4e290a0b | j_mayer | /* Allocate hardware IRQ controller */
|
3368 | 4e290a0b | j_mayer | ppc40x_irq_init(env); |
3369 | ddd1055b | Fabien Chouteau | |
3370 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3371 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3372 | 3fc6c082 | bellard | } |
3373 | a750fc0b | j_mayer | |
3374 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(401x3)(ObjectClass *oc, void *data) |
3375 | 7856e3a4 | Andreas Färber | { |
3376 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3377 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3378 | 7856e3a4 | Andreas Färber | |
3379 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 401x3";
|
3380 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_401x3; |
3381 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3382 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
3383 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3384 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3385 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3386 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3387 | 53116ebf | Andreas Färber | PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | |
3388 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3389 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3390 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x00000000001FD631ULL;
|
3391 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_4xx_Z; |
3392 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3393 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3394 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3395 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
3396 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3397 | 7856e3a4 | Andreas Färber | } |
3398 | 7856e3a4 | Andreas Färber | |
3399 | a750fc0b | j_mayer | static void init_proc_IOP480 (CPUPPCState *env) |
3400 | 3fc6c082 | bellard | { |
3401 | a750fc0b | j_mayer | gen_spr_40x(env); |
3402 | a750fc0b | j_mayer | gen_spr_401_403(env); |
3403 | a750fc0b | j_mayer | gen_spr_401x2(env); |
3404 | a750fc0b | j_mayer | gen_spr_compress(env); |
3405 | a750fc0b | j_mayer | /* Memory management */
|
3406 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3407 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
3408 | a750fc0b | j_mayer | env->nb_ways = 1;
|
3409 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
3410 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3411 | f2e63a42 | j_mayer | #endif
|
3412 | e1833e1f | j_mayer | init_excp_4xx_softmmu(env); |
3413 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3414 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3415 | 4e290a0b | j_mayer | /* Allocate hardware IRQ controller */
|
3416 | 4e290a0b | j_mayer | ppc40x_irq_init(env); |
3417 | ddd1055b | Fabien Chouteau | |
3418 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(8, 12, 16, 20); |
3419 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3420 | 3fc6c082 | bellard | } |
3421 | 3fc6c082 | bellard | |
3422 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(IOP480)(ObjectClass *oc, void *data)
|
3423 | 7856e3a4 | Andreas Färber | { |
3424 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3425 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3426 | 7856e3a4 | Andreas Färber | |
3427 | ca5dff0a | Andreas Färber | dc->desc = "IOP480";
|
3428 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_IOP480; |
3429 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3430 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3431 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3432 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3433 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3434 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3435 | 53116ebf | Andreas Färber | PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | |
3436 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3437 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3438 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x00000000001FD231ULL;
|
3439 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_4xx_Z; |
3440 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3441 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3442 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3443 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
3444 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3445 | 7856e3a4 | Andreas Färber | } |
3446 | 7856e3a4 | Andreas Färber | |
3447 | a750fc0b | j_mayer | static void init_proc_403 (CPUPPCState *env) |
3448 | 3fc6c082 | bellard | { |
3449 | a750fc0b | j_mayer | gen_spr_40x(env); |
3450 | a750fc0b | j_mayer | gen_spr_401_403(env); |
3451 | a750fc0b | j_mayer | gen_spr_403(env); |
3452 | a750fc0b | j_mayer | gen_spr_403_real(env); |
3453 | e1833e1f | j_mayer | init_excp_4xx_real(env); |
3454 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3455 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3456 | 4e290a0b | j_mayer | /* Allocate hardware IRQ controller */
|
3457 | 4e290a0b | j_mayer | ppc40x_irq_init(env); |
3458 | ddd1055b | Fabien Chouteau | |
3459 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(8, 12, 16, 20); |
3460 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3461 | 3fc6c082 | bellard | } |
3462 | 3fc6c082 | bellard | |
3463 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(403)(ObjectClass *oc, void *data) |
3464 | 7856e3a4 | Andreas Färber | { |
3465 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3466 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3467 | 7856e3a4 | Andreas Färber | |
3468 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 403";
|
3469 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_403; |
3470 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3471 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3472 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3473 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3474 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | |
3475 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3476 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3477 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3478 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007D00DULL;
|
3479 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_REAL; |
3480 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3481 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3482 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3483 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_PX | |
3484 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3485 | 7856e3a4 | Andreas Färber | } |
3486 | 7856e3a4 | Andreas Färber | |
3487 | a750fc0b | j_mayer | static void init_proc_403GCX (CPUPPCState *env) |
3488 | 3fc6c082 | bellard | { |
3489 | a750fc0b | j_mayer | gen_spr_40x(env); |
3490 | a750fc0b | j_mayer | gen_spr_401_403(env); |
3491 | a750fc0b | j_mayer | gen_spr_403(env); |
3492 | a750fc0b | j_mayer | gen_spr_403_real(env); |
3493 | a750fc0b | j_mayer | gen_spr_403_mmu(env); |
3494 | a750fc0b | j_mayer | /* Bus access control */
|
3495 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU never does speculative access */
|
3496 | a750fc0b | j_mayer | spr_register(env, SPR_40x_SGR, "SGR",
|
3497 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3498 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3499 | a750fc0b | j_mayer | 0xFFFFFFFF);
|
3500 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
3501 | a750fc0b | j_mayer | spr_register(env, SPR_40x_DCWR, "DCWR",
|
3502 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3503 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3504 | a750fc0b | j_mayer | 0x00000000);
|
3505 | a750fc0b | j_mayer | /* Memory management */
|
3506 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3507 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
3508 | a750fc0b | j_mayer | env->nb_ways = 1;
|
3509 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
3510 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3511 | f2e63a42 | j_mayer | #endif
|
3512 | 80d11f44 | j_mayer | init_excp_4xx_softmmu(env); |
3513 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
3514 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
3515 | 80d11f44 | j_mayer | /* Allocate hardware IRQ controller */
|
3516 | 80d11f44 | j_mayer | ppc40x_irq_init(env); |
3517 | ddd1055b | Fabien Chouteau | |
3518 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(8, 12, 16, 20); |
3519 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3520 | 80d11f44 | j_mayer | } |
3521 | 80d11f44 | j_mayer | |
3522 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(403GCX)(ObjectClass *oc, void *data) |
3523 | 7856e3a4 | Andreas Färber | { |
3524 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3525 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3526 | 7856e3a4 | Andreas Färber | |
3527 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 403 GCX";
|
3528 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_403GCX; |
3529 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3530 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3531 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3532 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3533 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | |
3534 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3535 | 53116ebf | Andreas Färber | PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | |
3536 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_40x_EXCP; |
3537 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3538 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007D00DULL;
|
3539 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_4xx_Z; |
3540 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3541 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_401; |
3542 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3543 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_PX | |
3544 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
3545 | 7856e3a4 | Andreas Färber | } |
3546 | 7856e3a4 | Andreas Färber | |
3547 | 80d11f44 | j_mayer | static void init_proc_405 (CPUPPCState *env) |
3548 | 80d11f44 | j_mayer | { |
3549 | 80d11f44 | j_mayer | /* Time base */
|
3550 | 80d11f44 | j_mayer | gen_tbl(env); |
3551 | 80d11f44 | j_mayer | gen_spr_40x(env); |
3552 | 80d11f44 | j_mayer | gen_spr_405(env); |
3553 | 80d11f44 | j_mayer | /* Bus access control */
|
3554 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU never does speculative access */
|
3555 | 80d11f44 | j_mayer | spr_register(env, SPR_40x_SGR, "SGR",
|
3556 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3557 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3558 | 80d11f44 | j_mayer | 0xFFFFFFFF);
|
3559 | 5cbdb3a3 | Stefan Weil | /* not emulated, as QEMU do not emulate caches */
|
3560 | 80d11f44 | j_mayer | spr_register(env, SPR_40x_DCWR, "DCWR",
|
3561 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3562 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3563 | 80d11f44 | j_mayer | 0x00000000);
|
3564 | 80d11f44 | j_mayer | /* Memory management */
|
3565 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3566 | 80d11f44 | j_mayer | env->nb_tlb = 64;
|
3567 | 80d11f44 | j_mayer | env->nb_ways = 1;
|
3568 | 80d11f44 | j_mayer | env->id_tlbs = 0;
|
3569 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3570 | 80d11f44 | j_mayer | #endif
|
3571 | 80d11f44 | j_mayer | init_excp_4xx_softmmu(env); |
3572 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
3573 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
3574 | 80d11f44 | j_mayer | /* Allocate hardware IRQ controller */
|
3575 | 80d11f44 | j_mayer | ppc40x_irq_init(env); |
3576 | ddd1055b | Fabien Chouteau | |
3577 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(8, 12, 16, 20); |
3578 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(16, 20, 24, 28); |
3579 | 80d11f44 | j_mayer | } |
3580 | 80d11f44 | j_mayer | |
3581 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(405)(ObjectClass *oc, void *data) |
3582 | 7856e3a4 | Andreas Färber | { |
3583 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3584 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3585 | 7856e3a4 | Andreas Färber | |
3586 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 405";
|
3587 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_405; |
3588 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3589 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
3590 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3591 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_40x_ICBT | |
3592 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3593 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
3594 | 53116ebf | Andreas Färber | PPC_40x_TLB | PPC_MEM_TLBIA | PPC_MEM_TLBSYNC | |
3595 | 53116ebf | Andreas Färber | PPC_4xx_COMMON | PPC_405_MAC | PPC_40x_EXCP; |
3596 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3597 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006E630ULL;
|
3598 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_4xx; |
3599 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_40x; |
3600 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_405; |
3601 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3602 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
3603 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
3604 | 7856e3a4 | Andreas Färber | } |
3605 | 7856e3a4 | Andreas Färber | |
3606 | 80d11f44 | j_mayer | static void init_proc_440EP (CPUPPCState *env) |
3607 | 80d11f44 | j_mayer | { |
3608 | 80d11f44 | j_mayer | /* Time base */
|
3609 | 80d11f44 | j_mayer | gen_tbl(env); |
3610 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
3611 | 80d11f44 | j_mayer | gen_spr_440(env); |
3612 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
3613 | 80d11f44 | j_mayer | /* Processor identification */
|
3614 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
3615 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3616 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
3617 | 80d11f44 | j_mayer | 0x00000000);
|
3618 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3619 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
3620 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3621 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3622 | 80d11f44 | j_mayer | 0x00000000);
|
3623 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3624 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
3625 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3626 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3627 | 80d11f44 | j_mayer | 0x00000000);
|
3628 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3629 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
3630 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3631 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3632 | 80d11f44 | j_mayer | 0x00000000);
|
3633 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3634 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
3635 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3636 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3637 | 80d11f44 | j_mayer | 0x00000000);
|
3638 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3639 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSR, "MCSR",
|
3640 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3641 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3642 | 80d11f44 | j_mayer | 0x00000000);
|
3643 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
3644 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3645 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3646 | 80d11f44 | j_mayer | 0x00000000);
|
3647 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
3648 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3649 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3650 | 80d11f44 | j_mayer | 0x00000000);
|
3651 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3652 | 80d11f44 | j_mayer | spr_register(env, SPR_440_CCR1, "CCR1",
|
3653 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3654 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3655 | 80d11f44 | j_mayer | 0x00000000);
|
3656 | 80d11f44 | j_mayer | /* Memory management */
|
3657 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3658 | 80d11f44 | j_mayer | env->nb_tlb = 64;
|
3659 | 80d11f44 | j_mayer | env->nb_ways = 1;
|
3660 | 80d11f44 | j_mayer | env->id_tlbs = 0;
|
3661 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3662 | 80d11f44 | j_mayer | #endif
|
3663 | 80d11f44 | j_mayer | init_excp_BookE(env); |
3664 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
3665 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
3666 | c0a7e81a | Alexander Graf | ppc40x_irq_init(env); |
3667 | ddd1055b | Fabien Chouteau | |
3668 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3669 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
3670 | 80d11f44 | j_mayer | } |
3671 | 80d11f44 | j_mayer | |
3672 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(440EP)(ObjectClass *oc, void *data) |
3673 | 7856e3a4 | Andreas Färber | { |
3674 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3675 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3676 | 7856e3a4 | Andreas Färber | |
3677 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 440 EP";
|
3678 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_440EP; |
3679 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3680 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3681 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | |
3682 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
3683 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
3684 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | PPC_RFMCI | |
3685 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
3686 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3687 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_MFTB | |
3688 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
3689 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
3690 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3691 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
3692 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
3693 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
3694 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
3695 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3696 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
3697 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
3698 | 7856e3a4 | Andreas Färber | } |
3699 | 7856e3a4 | Andreas Färber | |
3700 | 80d11f44 | j_mayer | static void init_proc_440GP (CPUPPCState *env) |
3701 | 80d11f44 | j_mayer | { |
3702 | 80d11f44 | j_mayer | /* Time base */
|
3703 | 80d11f44 | j_mayer | gen_tbl(env); |
3704 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
3705 | 80d11f44 | j_mayer | gen_spr_440(env); |
3706 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
3707 | 80d11f44 | j_mayer | /* Processor identification */
|
3708 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
3709 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3710 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
3711 | 80d11f44 | j_mayer | 0x00000000);
|
3712 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3713 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
3714 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3715 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3716 | 80d11f44 | j_mayer | 0x00000000);
|
3717 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3718 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
3719 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3720 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3721 | 80d11f44 | j_mayer | 0x00000000);
|
3722 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3723 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
3724 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3725 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3726 | 80d11f44 | j_mayer | 0x00000000);
|
3727 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3728 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
3729 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3730 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3731 | 80d11f44 | j_mayer | 0x00000000);
|
3732 | 80d11f44 | j_mayer | /* Memory management */
|
3733 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3734 | 80d11f44 | j_mayer | env->nb_tlb = 64;
|
3735 | 80d11f44 | j_mayer | env->nb_ways = 1;
|
3736 | 80d11f44 | j_mayer | env->id_tlbs = 0;
|
3737 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3738 | 80d11f44 | j_mayer | #endif
|
3739 | 80d11f44 | j_mayer | init_excp_BookE(env); |
3740 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
3741 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
3742 | 80d11f44 | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
3743 | ddd1055b | Fabien Chouteau | |
3744 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3745 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
3746 | 80d11f44 | j_mayer | } |
3747 | 80d11f44 | j_mayer | |
3748 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(440GP)(ObjectClass *oc, void *data) |
3749 | 7856e3a4 | Andreas Färber | { |
3750 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3751 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3752 | 7856e3a4 | Andreas Färber | |
3753 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 440 GP";
|
3754 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_440GP; |
3755 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3756 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3757 | 53116ebf | Andreas Färber | PPC_DCR | PPC_DCRX | PPC_WRTEE | PPC_MFAPIDI | |
3758 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
3759 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3760 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVA | PPC_MFTB | |
3761 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
3762 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
3763 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3764 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
3765 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
3766 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
3767 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
3768 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3769 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
3770 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
3771 | 7856e3a4 | Andreas Färber | } |
3772 | 7856e3a4 | Andreas Färber | |
3773 | 80d11f44 | j_mayer | static void init_proc_440x4 (CPUPPCState *env) |
3774 | 80d11f44 | j_mayer | { |
3775 | 80d11f44 | j_mayer | /* Time base */
|
3776 | 80d11f44 | j_mayer | gen_tbl(env); |
3777 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
3778 | 80d11f44 | j_mayer | gen_spr_440(env); |
3779 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
3780 | 80d11f44 | j_mayer | /* Processor identification */
|
3781 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
3782 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3783 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
3784 | 80d11f44 | j_mayer | 0x00000000);
|
3785 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3786 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
3787 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3788 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3789 | 80d11f44 | j_mayer | 0x00000000);
|
3790 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3791 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
3792 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3793 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3794 | 80d11f44 | j_mayer | 0x00000000);
|
3795 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3796 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
3797 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3798 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3799 | 80d11f44 | j_mayer | 0x00000000);
|
3800 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3801 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
3802 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3803 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3804 | 80d11f44 | j_mayer | 0x00000000);
|
3805 | 80d11f44 | j_mayer | /* Memory management */
|
3806 | 80d11f44 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3807 | 80d11f44 | j_mayer | env->nb_tlb = 64;
|
3808 | 80d11f44 | j_mayer | env->nb_ways = 1;
|
3809 | 80d11f44 | j_mayer | env->id_tlbs = 0;
|
3810 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3811 | 80d11f44 | j_mayer | #endif
|
3812 | 80d11f44 | j_mayer | init_excp_BookE(env); |
3813 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3814 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3815 | 80d11f44 | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
3816 | ddd1055b | Fabien Chouteau | |
3817 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3818 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
3819 | 3fc6c082 | bellard | } |
3820 | 3fc6c082 | bellard | |
3821 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(440x4)(ObjectClass *oc, void *data) |
3822 | 7856e3a4 | Andreas Färber | { |
3823 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3824 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3825 | 7856e3a4 | Andreas Färber | |
3826 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 440x4";
|
3827 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_440x4; |
3828 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3829 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3830 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | |
3831 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
3832 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3833 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_MFTB | |
3834 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
3835 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
3836 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3837 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
3838 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
3839 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
3840 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
3841 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3842 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
3843 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
3844 | 7856e3a4 | Andreas Färber | } |
3845 | 7856e3a4 | Andreas Färber | |
3846 | 80d11f44 | j_mayer | static void init_proc_440x5 (CPUPPCState *env) |
3847 | 3fc6c082 | bellard | { |
3848 | a750fc0b | j_mayer | /* Time base */
|
3849 | a750fc0b | j_mayer | gen_tbl(env); |
3850 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
3851 | 80d11f44 | j_mayer | gen_spr_440(env); |
3852 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
3853 | 80d11f44 | j_mayer | /* Processor identification */
|
3854 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
3855 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3856 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
3857 | 80d11f44 | j_mayer | 0x00000000);
|
3858 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3859 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
3860 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3861 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3862 | 80d11f44 | j_mayer | 0x00000000);
|
3863 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3864 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
3865 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3866 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3867 | 80d11f44 | j_mayer | 0x00000000);
|
3868 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3869 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
3870 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3871 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3872 | 80d11f44 | j_mayer | 0x00000000);
|
3873 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3874 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
3875 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3876 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3877 | 80d11f44 | j_mayer | 0x00000000);
|
3878 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3879 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSR, "MCSR",
|
3880 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3881 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3882 | 80d11f44 | j_mayer | 0x00000000);
|
3883 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
3884 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3885 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3886 | 80d11f44 | j_mayer | 0x00000000);
|
3887 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
3888 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3889 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3890 | 80d11f44 | j_mayer | 0x00000000);
|
3891 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3892 | 80d11f44 | j_mayer | spr_register(env, SPR_440_CCR1, "CCR1",
|
3893 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3894 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3895 | a750fc0b | j_mayer | 0x00000000);
|
3896 | a750fc0b | j_mayer | /* Memory management */
|
3897 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3898 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
3899 | a750fc0b | j_mayer | env->nb_ways = 1;
|
3900 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
3901 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3902 | f2e63a42 | j_mayer | #endif
|
3903 | 80d11f44 | j_mayer | init_excp_BookE(env); |
3904 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
3905 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
3906 | 95070372 | Edgar E. Iglesias | ppc40x_irq_init(env); |
3907 | ddd1055b | Fabien Chouteau | |
3908 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
3909 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
3910 | 3fc6c082 | bellard | } |
3911 | 3fc6c082 | bellard | |
3912 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(440x5)(ObjectClass *oc, void *data) |
3913 | 7856e3a4 | Andreas Färber | { |
3914 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
3915 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
3916 | 7856e3a4 | Andreas Färber | |
3917 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 440x5";
|
3918 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_440x5; |
3919 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
3920 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
3921 | 53116ebf | Andreas Färber | PPC_DCR | PPC_WRTEE | PPC_RFMCI | |
3922 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
3923 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
3924 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_MFTB | |
3925 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
3926 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
3927 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
3928 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
3929 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
3930 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
3931 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
3932 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
3933 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
3934 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
3935 | 7856e3a4 | Andreas Färber | } |
3936 | 7856e3a4 | Andreas Färber | |
3937 | 80d11f44 | j_mayer | static void init_proc_460 (CPUPPCState *env) |
3938 | 3fc6c082 | bellard | { |
3939 | a750fc0b | j_mayer | /* Time base */
|
3940 | a750fc0b | j_mayer | gen_tbl(env); |
3941 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
3942 | a750fc0b | j_mayer | gen_spr_440(env); |
3943 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
3944 | 80d11f44 | j_mayer | /* Processor identification */
|
3945 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
3946 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3947 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
3948 | 80d11f44 | j_mayer | 0x00000000);
|
3949 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3950 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
3951 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3952 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3953 | 80d11f44 | j_mayer | 0x00000000);
|
3954 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3955 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
3956 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3957 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3958 | 80d11f44 | j_mayer | 0x00000000);
|
3959 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3960 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
3961 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3962 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3963 | 80d11f44 | j_mayer | 0x00000000);
|
3964 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3965 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
3966 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3967 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3968 | 80d11f44 | j_mayer | 0x00000000);
|
3969 | 578bb252 | j_mayer | /* XXX : not implemented */
|
3970 | a750fc0b | j_mayer | spr_register(env, SPR_BOOKE_MCSR, "MCSR",
|
3971 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3972 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3973 | a750fc0b | j_mayer | 0x00000000);
|
3974 | a750fc0b | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
3975 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3976 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3977 | a750fc0b | j_mayer | 0x00000000);
|
3978 | a750fc0b | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
3979 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3980 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3981 | a750fc0b | j_mayer | 0x00000000);
|
3982 | 578bb252 | j_mayer | /* XXX : not implemented */
|
3983 | a750fc0b | j_mayer | spr_register(env, SPR_440_CCR1, "CCR1",
|
3984 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
3985 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
3986 | a750fc0b | j_mayer | 0x00000000);
|
3987 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
3988 | 80d11f44 | j_mayer | spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
|
3989 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3990 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
3991 | 80d11f44 | j_mayer | 0x00000000);
|
3992 | a750fc0b | j_mayer | /* Memory management */
|
3993 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
3994 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
3995 | a750fc0b | j_mayer | env->nb_ways = 1;
|
3996 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
3997 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
3998 | f2e63a42 | j_mayer | #endif
|
3999 | e1833e1f | j_mayer | init_excp_BookE(env); |
4000 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
4001 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
4002 | a750fc0b | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
4003 | ddd1055b | Fabien Chouteau | |
4004 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
4005 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
4006 | 3fc6c082 | bellard | } |
4007 | 3fc6c082 | bellard | |
4008 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(460)(ObjectClass *oc, void *data) |
4009 | 7856e3a4 | Andreas Färber | { |
4010 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4011 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4012 | 7856e3a4 | Andreas Färber | |
4013 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 460 (guessed)";
|
4014 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_460; |
4015 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
4016 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
4017 | 53116ebf | Andreas Färber | PPC_DCR | PPC_DCRX | PPC_DCRUX | |
4018 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_MFAPIDI | PPC_MFTB | |
4019 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
4020 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4021 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVA | |
4022 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
4023 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
4024 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4025 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
4026 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
4027 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4028 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4029 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
4030 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
4031 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
4032 | 7856e3a4 | Andreas Färber | } |
4033 | 7856e3a4 | Andreas Färber | |
4034 | 80d11f44 | j_mayer | static void init_proc_460F (CPUPPCState *env) |
4035 | 3fc6c082 | bellard | { |
4036 | a750fc0b | j_mayer | /* Time base */
|
4037 | a750fc0b | j_mayer | gen_tbl(env); |
4038 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000000000FFFFULL);
|
4039 | a750fc0b | j_mayer | gen_spr_440(env); |
4040 | 80d11f44 | j_mayer | gen_spr_usprgh(env); |
4041 | 80d11f44 | j_mayer | /* Processor identification */
|
4042 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
4043 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4044 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
4045 | 80d11f44 | j_mayer | 0x00000000);
|
4046 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4047 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
4048 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4049 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4050 | 80d11f44 | j_mayer | 0x00000000);
|
4051 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4052 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
4053 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4054 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4055 | 80d11f44 | j_mayer | 0x00000000);
|
4056 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4057 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC1, "DVC1",
|
4058 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4059 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4060 | 80d11f44 | j_mayer | 0x00000000);
|
4061 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4062 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DVC2, "DVC2",
|
4063 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4064 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4065 | 80d11f44 | j_mayer | 0x00000000);
|
4066 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4067 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSR, "MCSR",
|
4068 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4069 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4070 | 80d11f44 | j_mayer | 0x00000000);
|
4071 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
4072 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4073 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4074 | 80d11f44 | j_mayer | 0x00000000);
|
4075 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
4076 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4077 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4078 | 80d11f44 | j_mayer | 0x00000000);
|
4079 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4080 | 80d11f44 | j_mayer | spr_register(env, SPR_440_CCR1, "CCR1",
|
4081 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4082 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4083 | 80d11f44 | j_mayer | 0x00000000);
|
4084 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4085 | 80d11f44 | j_mayer | spr_register(env, SPR_DCRIPR, "SPR_DCRIPR",
|
4086 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4087 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4088 | 80d11f44 | j_mayer | 0x00000000);
|
4089 | a750fc0b | j_mayer | /* Memory management */
|
4090 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
4091 | a750fc0b | j_mayer | env->nb_tlb = 64;
|
4092 | a750fc0b | j_mayer | env->nb_ways = 1;
|
4093 | a750fc0b | j_mayer | env->id_tlbs = 0;
|
4094 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
4095 | f2e63a42 | j_mayer | #endif
|
4096 | e1833e1f | j_mayer | init_excp_BookE(env); |
4097 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
4098 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
4099 | a750fc0b | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
4100 | ddd1055b | Fabien Chouteau | |
4101 | ddd1055b | Fabien Chouteau | SET_FIT_PERIOD(12, 16, 20, 24); |
4102 | ddd1055b | Fabien Chouteau | SET_WDT_PERIOD(20, 24, 28, 32); |
4103 | 3fc6c082 | bellard | } |
4104 | 3fc6c082 | bellard | |
4105 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(460F)(ObjectClass *oc, void *data) |
4106 | 7856e3a4 | Andreas Färber | { |
4107 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4108 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4109 | 7856e3a4 | Andreas Färber | |
4110 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 460F (guessed)";
|
4111 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_460F; |
4112 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
4113 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
4114 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FRES | PPC_FLOAT_FSEL | |
4115 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
4116 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | PPC_MFTB | |
4117 | 53116ebf | Andreas Färber | PPC_DCR | PPC_DCRX | PPC_DCRUX | |
4118 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_MFAPIDI | |
4119 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
4120 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4121 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVA | |
4122 | 53116ebf | Andreas Färber | PPC_BOOKE | PPC_4xx_COMMON | PPC_405_MAC | |
4123 | 53116ebf | Andreas Färber | PPC_440_SPEC; |
4124 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4125 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FF30ULL;
|
4126 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE; |
4127 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4128 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4129 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_403; |
4130 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DWE | |
4131 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_DE | POWERPC_FLAG_BUS_CLK; |
4132 | 7856e3a4 | Andreas Färber | } |
4133 | 7856e3a4 | Andreas Färber | |
4134 | 80d11f44 | j_mayer | static void init_proc_MPC5xx (CPUPPCState *env) |
4135 | 80d11f44 | j_mayer | { |
4136 | 80d11f44 | j_mayer | /* Time base */
|
4137 | 80d11f44 | j_mayer | gen_tbl(env); |
4138 | 80d11f44 | j_mayer | gen_spr_5xx_8xx(env); |
4139 | 80d11f44 | j_mayer | gen_spr_5xx(env); |
4140 | 80d11f44 | j_mayer | init_excp_MPC5xx(env); |
4141 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
4142 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
4143 | 80d11f44 | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
4144 | 80d11f44 | j_mayer | } |
4145 | 80d11f44 | j_mayer | |
4146 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(MPC5xx)(ObjectClass *oc, void *data)
|
4147 | 7856e3a4 | Andreas Färber | { |
4148 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4149 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4150 | 7856e3a4 | Andreas Färber | |
4151 | ca5dff0a | Andreas Färber | dc->desc = "Freescale 5xx cores (aka RCPU)";
|
4152 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_MPC5xx; |
4153 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4154 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
4155 | 53116ebf | Andreas Färber | PPC_MEM_EIEIO | PPC_MEM_SYNC | |
4156 | 53116ebf | Andreas Färber | PPC_CACHE_ICBI | PPC_FLOAT | PPC_FLOAT_STFIWX | |
4157 | 53116ebf | Andreas Färber | PPC_MFTB; |
4158 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4159 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000001FF43ULL;
|
4160 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_REAL; |
4161 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_603; |
4162 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_RCPU; |
4163 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_505; |
4164 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
4165 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
4166 | 7856e3a4 | Andreas Färber | } |
4167 | 7856e3a4 | Andreas Färber | |
4168 | 80d11f44 | j_mayer | static void init_proc_MPC8xx (CPUPPCState *env) |
4169 | 80d11f44 | j_mayer | { |
4170 | 80d11f44 | j_mayer | /* Time base */
|
4171 | 80d11f44 | j_mayer | gen_tbl(env); |
4172 | 80d11f44 | j_mayer | gen_spr_5xx_8xx(env); |
4173 | 80d11f44 | j_mayer | gen_spr_8xx(env); |
4174 | 80d11f44 | j_mayer | init_excp_MPC8xx(env); |
4175 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
4176 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
4177 | 80d11f44 | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
4178 | 80d11f44 | j_mayer | } |
4179 | 80d11f44 | j_mayer | |
4180 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(MPC8xx)(ObjectClass *oc, void *data)
|
4181 | 7856e3a4 | Andreas Färber | { |
4182 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4183 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4184 | 7856e3a4 | Andreas Färber | |
4185 | ca5dff0a | Andreas Färber | dc->desc = "Freescale 8xx cores (aka PowerQUICC)";
|
4186 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_MPC8xx; |
4187 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4188 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | |
4189 | 53116ebf | Andreas Färber | PPC_MEM_EIEIO | PPC_MEM_SYNC | |
4190 | 53116ebf | Andreas Färber | PPC_CACHE_ICBI | PPC_MFTB; |
4191 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4192 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000001F673ULL;
|
4193 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_MPC8xx; |
4194 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_603; |
4195 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_RCPU; |
4196 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_860; |
4197 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
4198 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
4199 | 7856e3a4 | Andreas Färber | } |
4200 | 7856e3a4 | Andreas Färber | |
4201 | 80d11f44 | j_mayer | /* Freescale 82xx cores (aka PowerQUICC-II) */
|
4202 | ca5dff0a | Andreas Färber | |
4203 | 80d11f44 | j_mayer | static void init_proc_G2 (CPUPPCState *env) |
4204 | 3fc6c082 | bellard | { |
4205 | 80d11f44 | j_mayer | gen_spr_ne_601(env); |
4206 | 80d11f44 | j_mayer | gen_spr_G2_755(env); |
4207 | 80d11f44 | j_mayer | gen_spr_G2(env); |
4208 | a750fc0b | j_mayer | /* Time base */
|
4209 | a750fc0b | j_mayer | gen_tbl(env); |
4210 | bd928eba | j_mayer | /* External access control */
|
4211 | bd928eba | j_mayer | /* XXX : not implemented */
|
4212 | bd928eba | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
4213 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4214 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
4215 | bd928eba | j_mayer | 0x00000000);
|
4216 | 80d11f44 | j_mayer | /* Hardware implementation register */
|
4217 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4218 | 80d11f44 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4219 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4220 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4221 | 80d11f44 | j_mayer | 0x00000000);
|
4222 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4223 | 80d11f44 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4224 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4225 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4226 | 80d11f44 | j_mayer | 0x00000000);
|
4227 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4228 | 80d11f44 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
4229 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4230 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4231 | 80d11f44 | j_mayer | 0x00000000);
|
4232 | a750fc0b | j_mayer | /* Memory management */
|
4233 | 80d11f44 | j_mayer | gen_low_BATs(env); |
4234 | 80d11f44 | j_mayer | gen_high_BATs(env); |
4235 | 80d11f44 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
4236 | 80d11f44 | j_mayer | init_excp_G2(env); |
4237 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
4238 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
4239 | 80d11f44 | j_mayer | /* Allocate hardware IRQ controller */
|
4240 | 80d11f44 | j_mayer | ppc6xx_irq_init(env); |
4241 | 3fc6c082 | bellard | } |
4242 | a750fc0b | j_mayer | |
4243 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(G2)(ObjectClass *oc, void *data)
|
4244 | 7856e3a4 | Andreas Färber | { |
4245 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4246 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4247 | 7856e3a4 | Andreas Färber | |
4248 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC G2";
|
4249 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_G2; |
4250 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4251 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
4252 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
4253 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
4254 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
4255 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
4256 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
4257 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
4258 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4259 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000006FFF2ULL;
|
4260 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
4261 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_G2; |
4262 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
4263 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_ec603e; |
4264 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
4265 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
4266 | 7856e3a4 | Andreas Färber | } |
4267 | 7856e3a4 | Andreas Färber | |
4268 | 80d11f44 | j_mayer | static void init_proc_G2LE (CPUPPCState *env) |
4269 | 3fc6c082 | bellard | { |
4270 | 80d11f44 | j_mayer | gen_spr_ne_601(env); |
4271 | 80d11f44 | j_mayer | gen_spr_G2_755(env); |
4272 | 80d11f44 | j_mayer | gen_spr_G2(env); |
4273 | a750fc0b | j_mayer | /* Time base */
|
4274 | a750fc0b | j_mayer | gen_tbl(env); |
4275 | bd928eba | j_mayer | /* External access control */
|
4276 | bd928eba | j_mayer | /* XXX : not implemented */
|
4277 | bd928eba | j_mayer | spr_register(env, SPR_EAR, "EAR",
|
4278 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4279 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
4280 | bd928eba | j_mayer | 0x00000000);
|
4281 | 80d11f44 | j_mayer | /* Hardware implementation register */
|
4282 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4283 | 80d11f44 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4284 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4285 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4286 | a750fc0b | j_mayer | 0x00000000);
|
4287 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4288 | 80d11f44 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4289 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4290 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4291 | a750fc0b | j_mayer | 0x00000000);
|
4292 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4293 | 80d11f44 | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
4294 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4295 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4296 | a750fc0b | j_mayer | 0x00000000);
|
4297 | a750fc0b | j_mayer | /* Memory management */
|
4298 | 80d11f44 | j_mayer | gen_low_BATs(env); |
4299 | 80d11f44 | j_mayer | gen_high_BATs(env); |
4300 | 80d11f44 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
4301 | 80d11f44 | j_mayer | init_excp_G2(env); |
4302 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
4303 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
4304 | 80d11f44 | j_mayer | /* Allocate hardware IRQ controller */
|
4305 | 80d11f44 | j_mayer | ppc6xx_irq_init(env); |
4306 | 3fc6c082 | bellard | } |
4307 | 3fc6c082 | bellard | |
4308 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(G2LE)(ObjectClass *oc, void *data)
|
4309 | 7856e3a4 | Andreas Färber | { |
4310 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4311 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4312 | 7856e3a4 | Andreas Färber | |
4313 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC G2LE";
|
4314 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_G2LE; |
4315 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4316 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
4317 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
4318 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
4319 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
4320 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
4321 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
4322 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
4323 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4324 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007FFF3ULL;
|
4325 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
4326 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_G2; |
4327 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
4328 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_ec603e; |
4329 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
4330 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
4331 | 7856e3a4 | Andreas Färber | } |
4332 | 7856e3a4 | Andreas Färber | |
4333 | 80d11f44 | j_mayer | static void init_proc_e200 (CPUPPCState *env) |
4334 | 3fc6c082 | bellard | { |
4335 | e1833e1f | j_mayer | /* Time base */
|
4336 | e1833e1f | j_mayer | gen_tbl(env); |
4337 | 80d11f44 | j_mayer | gen_spr_BookE(env, 0x000000070000FFFFULL);
|
4338 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4339 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_SPEFSCR, "SPEFSCR",
|
4340 | d34defbc | aurel32 | &spr_read_spefscr, &spr_write_spefscr, |
4341 | d34defbc | aurel32 | &spr_read_spefscr, &spr_write_spefscr, |
4342 | e1833e1f | j_mayer | 0x00000000);
|
4343 | 80d11f44 | j_mayer | /* Memory management */
|
4344 | 01662f3e | Alexander Graf | gen_spr_BookE206(env, 0x0000005D, NULL); |
4345 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4346 | 80d11f44 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4347 | e1833e1f | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4348 | e1833e1f | j_mayer | &spr_read_generic, &spr_write_generic, |
4349 | e1833e1f | j_mayer | 0x00000000);
|
4350 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4351 | 80d11f44 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4352 | e1833e1f | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4353 | e1833e1f | j_mayer | &spr_read_generic, &spr_write_generic, |
4354 | e1833e1f | j_mayer | 0x00000000);
|
4355 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4356 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_ALTCTXCR, "ALTCTXCR",
|
4357 | e1833e1f | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4358 | e1833e1f | j_mayer | &spr_read_generic, &spr_write_generic, |
4359 | e1833e1f | j_mayer | 0x00000000);
|
4360 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4361 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_BUCSR, "BUCSR",
|
4362 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4363 | e1833e1f | j_mayer | &spr_read_generic, &spr_write_generic, |
4364 | 80d11f44 | j_mayer | 0x00000000);
|
4365 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4366 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_CTXCR, "CTXCR",
|
4367 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4368 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4369 | 80d11f44 | j_mayer | 0x00000000);
|
4370 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4371 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_DBCNT, "DBCNT",
|
4372 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4373 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4374 | 80d11f44 | j_mayer | 0x00000000);
|
4375 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4376 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_DBCR3, "DBCR3",
|
4377 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4378 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4379 | 80d11f44 | j_mayer | 0x00000000);
|
4380 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4381 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1CFG0, "L1CFG0",
|
4382 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4383 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4384 | 80d11f44 | j_mayer | 0x00000000);
|
4385 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4386 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
|
4387 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4388 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4389 | 80d11f44 | j_mayer | 0x00000000);
|
4390 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4391 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1FINV0, "L1FINV0",
|
4392 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4393 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4394 | 80d11f44 | j_mayer | 0x00000000);
|
4395 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4396 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_TLB0CFG, "TLB0CFG",
|
4397 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4398 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4399 | 80d11f44 | j_mayer | 0x00000000);
|
4400 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4401 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_TLB1CFG, "TLB1CFG",
|
4402 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4403 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4404 | 80d11f44 | j_mayer | 0x00000000);
|
4405 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4406 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC3, "IAC3",
|
4407 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4408 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4409 | 80d11f44 | j_mayer | 0x00000000);
|
4410 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4411 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_IAC4, "IAC4",
|
4412 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4413 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4414 | 80d11f44 | j_mayer | 0x00000000);
|
4415 | 01662f3e | Alexander Graf | /* XXX : not implemented */
|
4416 | 01662f3e | Alexander Graf | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
4417 | 01662f3e | Alexander Graf | SPR_NOACCESS, SPR_NOACCESS, |
4418 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_generic, |
4419 | 01662f3e | Alexander Graf | 0x00000000); /* TOFIX */ |
4420 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DSRR0, "DSRR0",
|
4421 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4422 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4423 | 80d11f44 | j_mayer | 0x00000000);
|
4424 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_DSRR1, "DSRR1",
|
4425 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4426 | e1833e1f | j_mayer | &spr_read_generic, &spr_write_generic, |
4427 | e1833e1f | j_mayer | 0x00000000);
|
4428 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
4429 | e1833e1f | j_mayer | env->nb_tlb = 64;
|
4430 | e1833e1f | j_mayer | env->nb_ways = 1;
|
4431 | e1833e1f | j_mayer | env->id_tlbs = 0;
|
4432 | 1c53accc | Alexander Graf | env->tlb_type = TLB_EMB; |
4433 | f2e63a42 | j_mayer | #endif
|
4434 | e9cd84b9 | Alexander Graf | init_excp_e200(env, 0xFFFF0000UL);
|
4435 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
4436 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
4437 | e1833e1f | j_mayer | /* XXX: TODO: allocate internal IRQ controller */
|
4438 | 3fc6c082 | bellard | } |
4439 | a750fc0b | j_mayer | |
4440 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e200)(ObjectClass *oc, void *data)
|
4441 | 7856e3a4 | Andreas Färber | { |
4442 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4443 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4444 | 7856e3a4 | Andreas Färber | |
4445 | ca5dff0a | Andreas Färber | dc->desc = "e200 core";
|
4446 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e200; |
4447 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4448 | 53116ebf | Andreas Färber | /* XXX: unimplemented instructions:
|
4449 | 53116ebf | Andreas Färber | * dcblc
|
4450 | 53116ebf | Andreas Färber | * dcbtlst
|
4451 | 53116ebf | Andreas Färber | * dcbtstls
|
4452 | 53116ebf | Andreas Färber | * icblc
|
4453 | 53116ebf | Andreas Färber | * icbtls
|
4454 | 53116ebf | Andreas Färber | * tlbivax
|
4455 | 53116ebf | Andreas Färber | * all SPE multiply-accumulate instructions
|
4456 | 53116ebf | Andreas Färber | */
|
4457 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | |
4458 | 53116ebf | Andreas Färber | PPC_SPE | PPC_SPE_SINGLE | |
4459 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_RFDI | |
4460 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | |
4461 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4462 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVAX | |
4463 | 53116ebf | Andreas Färber | PPC_BOOKE; |
4464 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4465 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000606FF30ULL;
|
4466 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE206; |
4467 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4468 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4469 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_860; |
4470 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SPE | POWERPC_FLAG_CE | |
4471 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_UBLE | POWERPC_FLAG_DE | |
4472 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
4473 | 7856e3a4 | Andreas Färber | } |
4474 | 7856e3a4 | Andreas Färber | |
4475 | 80d11f44 | j_mayer | static void init_proc_e300 (CPUPPCState *env) |
4476 | 3fc6c082 | bellard | { |
4477 | 80d11f44 | j_mayer | gen_spr_ne_601(env); |
4478 | 80d11f44 | j_mayer | gen_spr_603(env); |
4479 | a750fc0b | j_mayer | /* Time base */
|
4480 | a750fc0b | j_mayer | gen_tbl(env); |
4481 | 80d11f44 | j_mayer | /* hardware implementation registers */
|
4482 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4483 | 80d11f44 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4484 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4485 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4486 | 80d11f44 | j_mayer | 0x00000000);
|
4487 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4488 | 80d11f44 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4489 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4490 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4491 | 80d11f44 | j_mayer | 0x00000000);
|
4492 | 8daf1781 | Thomas Monjalon | /* XXX : not implemented */
|
4493 | 8daf1781 | Thomas Monjalon | spr_register(env, SPR_HID2, "HID2",
|
4494 | 8daf1781 | Thomas Monjalon | SPR_NOACCESS, SPR_NOACCESS, |
4495 | 8daf1781 | Thomas Monjalon | &spr_read_generic, &spr_write_generic, |
4496 | 8daf1781 | Thomas Monjalon | 0x00000000);
|
4497 | 80d11f44 | j_mayer | /* Memory management */
|
4498 | 80d11f44 | j_mayer | gen_low_BATs(env); |
4499 | 8daf1781 | Thomas Monjalon | gen_high_BATs(env); |
4500 | 80d11f44 | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
4501 | 80d11f44 | j_mayer | init_excp_603(env); |
4502 | 80d11f44 | j_mayer | env->dcache_line_size = 32;
|
4503 | 80d11f44 | j_mayer | env->icache_line_size = 32;
|
4504 | 80d11f44 | j_mayer | /* Allocate hardware IRQ controller */
|
4505 | 80d11f44 | j_mayer | ppc6xx_irq_init(env); |
4506 | 80d11f44 | j_mayer | } |
4507 | 80d11f44 | j_mayer | |
4508 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e300)(ObjectClass *oc, void *data)
|
4509 | 7856e3a4 | Andreas Färber | { |
4510 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4511 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4512 | 7856e3a4 | Andreas Färber | |
4513 | ca5dff0a | Andreas Färber | dc->desc = "e300 core";
|
4514 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e300; |
4515 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4516 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
4517 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
4518 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
4519 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
4520 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
4521 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
4522 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
4523 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4524 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007FFF3ULL;
|
4525 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
4526 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_603; |
4527 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
4528 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_603; |
4529 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
4530 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
4531 | 7856e3a4 | Andreas Färber | } |
4532 | 7856e3a4 | Andreas Färber | |
4533 | b81ccf8a | Alexander Graf | #if !defined(CONFIG_USER_ONLY)
|
4534 | b81ccf8a | Alexander Graf | static void spr_write_mas73(void *opaque, int sprn, int gprn) |
4535 | b81ccf8a | Alexander Graf | { |
4536 | b81ccf8a | Alexander Graf | TCGv val = tcg_temp_new(); |
4537 | b81ccf8a | Alexander Graf | tcg_gen_ext32u_tl(val, cpu_gpr[gprn]); |
4538 | b81ccf8a | Alexander Graf | gen_store_spr(SPR_BOOKE_MAS3, val); |
4539 | cfee0218 | Stefan Weil | tcg_gen_shri_tl(val, cpu_gpr[gprn], 32);
|
4540 | b81ccf8a | Alexander Graf | gen_store_spr(SPR_BOOKE_MAS7, val); |
4541 | b81ccf8a | Alexander Graf | tcg_temp_free(val); |
4542 | b81ccf8a | Alexander Graf | } |
4543 | b81ccf8a | Alexander Graf | |
4544 | b81ccf8a | Alexander Graf | static void spr_read_mas73(void *opaque, int gprn, int sprn) |
4545 | b81ccf8a | Alexander Graf | { |
4546 | b81ccf8a | Alexander Graf | TCGv mas7 = tcg_temp_new(); |
4547 | b81ccf8a | Alexander Graf | TCGv mas3 = tcg_temp_new(); |
4548 | b81ccf8a | Alexander Graf | gen_load_spr(mas7, SPR_BOOKE_MAS7); |
4549 | b81ccf8a | Alexander Graf | tcg_gen_shli_tl(mas7, mas7, 32);
|
4550 | b81ccf8a | Alexander Graf | gen_load_spr(mas3, SPR_BOOKE_MAS3); |
4551 | b81ccf8a | Alexander Graf | tcg_gen_or_tl(cpu_gpr[gprn], mas3, mas7); |
4552 | b81ccf8a | Alexander Graf | tcg_temp_free(mas3); |
4553 | b81ccf8a | Alexander Graf | tcg_temp_free(mas7); |
4554 | b81ccf8a | Alexander Graf | } |
4555 | b81ccf8a | Alexander Graf | |
4556 | b81ccf8a | Alexander Graf | #endif
|
4557 | b81ccf8a | Alexander Graf | |
4558 | f7aa5583 | Varun Sethi | enum fsl_e500_version {
|
4559 | f7aa5583 | Varun Sethi | fsl_e500v1, |
4560 | f7aa5583 | Varun Sethi | fsl_e500v2, |
4561 | f7aa5583 | Varun Sethi | fsl_e500mc, |
4562 | b81ccf8a | Alexander Graf | fsl_e5500, |
4563 | f7aa5583 | Varun Sethi | }; |
4564 | f7aa5583 | Varun Sethi | |
4565 | 01662f3e | Alexander Graf | static void init_proc_e500 (CPUPPCState *env, int version) |
4566 | 80d11f44 | j_mayer | { |
4567 | 01662f3e | Alexander Graf | uint32_t tlbncfg[2];
|
4568 | b81ccf8a | Alexander Graf | uint64_t ivor_mask; |
4569 | e9cd84b9 | Alexander Graf | uint64_t ivpr_mask = 0xFFFF0000ULL;
|
4570 | a496e8ee | Alexander Graf | uint32_t l1cfg0 = 0x3800 /* 8 ways */ |
4571 | a496e8ee | Alexander Graf | | 0x0020; /* 32 kb */ |
4572 | 01662f3e | Alexander Graf | #if !defined(CONFIG_USER_ONLY)
|
4573 | 01662f3e | Alexander Graf | int i;
|
4574 | 01662f3e | Alexander Graf | #endif
|
4575 | 01662f3e | Alexander Graf | |
4576 | 80d11f44 | j_mayer | /* Time base */
|
4577 | 80d11f44 | j_mayer | gen_tbl(env); |
4578 | 01662f3e | Alexander Graf | /*
|
4579 | 01662f3e | Alexander Graf | * XXX The e500 doesn't implement IVOR7 and IVOR9, but doesn't
|
4580 | 01662f3e | Alexander Graf | * complain when accessing them.
|
4581 | 01662f3e | Alexander Graf | * gen_spr_BookE(env, 0x0000000F0000FD7FULL);
|
4582 | 01662f3e | Alexander Graf | */
|
4583 | b81ccf8a | Alexander Graf | switch (version) {
|
4584 | b81ccf8a | Alexander Graf | case fsl_e500v1:
|
4585 | b81ccf8a | Alexander Graf | case fsl_e500v2:
|
4586 | b81ccf8a | Alexander Graf | default:
|
4587 | b81ccf8a | Alexander Graf | ivor_mask = 0x0000000F0000FFFFULL;
|
4588 | b81ccf8a | Alexander Graf | break;
|
4589 | b81ccf8a | Alexander Graf | case fsl_e500mc:
|
4590 | b81ccf8a | Alexander Graf | case fsl_e5500:
|
4591 | b81ccf8a | Alexander Graf | ivor_mask = 0x000003FE0000FFFFULL;
|
4592 | b81ccf8a | Alexander Graf | break;
|
4593 | 2c9732db | Alexander Graf | } |
4594 | 2c9732db | Alexander Graf | gen_spr_BookE(env, ivor_mask); |
4595 | 80d11f44 | j_mayer | /* Processor identification */
|
4596 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_PIR, "PIR",
|
4597 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4598 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_pir, |
4599 | 80d11f44 | j_mayer | 0x00000000);
|
4600 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4601 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_SPEFSCR, "SPEFSCR",
|
4602 | d34defbc | aurel32 | &spr_read_spefscr, &spr_write_spefscr, |
4603 | d34defbc | aurel32 | &spr_read_spefscr, &spr_write_spefscr, |
4604 | 80d11f44 | j_mayer | 0x00000000);
|
4605 | 892c587f | Alexander Graf | #if !defined(CONFIG_USER_ONLY)
|
4606 | 80d11f44 | j_mayer | /* Memory management */
|
4607 | 80d11f44 | j_mayer | env->nb_pids = 3;
|
4608 | 01662f3e | Alexander Graf | env->nb_ways = 2;
|
4609 | 01662f3e | Alexander Graf | env->id_tlbs = 0;
|
4610 | 01662f3e | Alexander Graf | switch (version) {
|
4611 | f7aa5583 | Varun Sethi | case fsl_e500v1:
|
4612 | 01662f3e | Alexander Graf | tlbncfg[0] = gen_tlbncfg(2, 1, 1, 0, 256); |
4613 | 01662f3e | Alexander Graf | tlbncfg[1] = gen_tlbncfg(16, 1, 9, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); |
4614 | 01662f3e | Alexander Graf | break;
|
4615 | f7aa5583 | Varun Sethi | case fsl_e500v2:
|
4616 | 01662f3e | Alexander Graf | tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); |
4617 | 01662f3e | Alexander Graf | tlbncfg[1] = gen_tlbncfg(16, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 16); |
4618 | f7aa5583 | Varun Sethi | break;
|
4619 | f7aa5583 | Varun Sethi | case fsl_e500mc:
|
4620 | b81ccf8a | Alexander Graf | case fsl_e5500:
|
4621 | f7aa5583 | Varun Sethi | tlbncfg[0] = gen_tlbncfg(4, 1, 1, 0, 512); |
4622 | f7aa5583 | Varun Sethi | tlbncfg[1] = gen_tlbncfg(64, 1, 12, TLBnCFG_AVAIL | TLBnCFG_IPROT, 64); |
4623 | 892c587f | Alexander Graf | break;
|
4624 | 892c587f | Alexander Graf | default:
|
4625 | 892c587f | Alexander Graf | cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); |
4626 | 892c587f | Alexander Graf | } |
4627 | 892c587f | Alexander Graf | #endif
|
4628 | 892c587f | Alexander Graf | /* Cache sizes */
|
4629 | 892c587f | Alexander Graf | switch (version) {
|
4630 | 892c587f | Alexander Graf | case fsl_e500v1:
|
4631 | 892c587f | Alexander Graf | case fsl_e500v2:
|
4632 | 892c587f | Alexander Graf | env->dcache_line_size = 32;
|
4633 | 892c587f | Alexander Graf | env->icache_line_size = 32;
|
4634 | 892c587f | Alexander Graf | break;
|
4635 | 892c587f | Alexander Graf | case fsl_e500mc:
|
4636 | b81ccf8a | Alexander Graf | case fsl_e5500:
|
4637 | f7aa5583 | Varun Sethi | env->dcache_line_size = 64;
|
4638 | f7aa5583 | Varun Sethi | env->icache_line_size = 64;
|
4639 | a496e8ee | Alexander Graf | l1cfg0 |= 0x1000000; /* 64 byte cache block size */ |
4640 | 01662f3e | Alexander Graf | break;
|
4641 | 01662f3e | Alexander Graf | default:
|
4642 | 01662f3e | Alexander Graf | cpu_abort(env, "Unknown CPU: " TARGET_FMT_lx "\n", env->spr[SPR_PVR]); |
4643 | 01662f3e | Alexander Graf | } |
4644 | 01662f3e | Alexander Graf | gen_spr_BookE206(env, 0x000000DF, tlbncfg);
|
4645 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4646 | 80d11f44 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4647 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4648 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4649 | 80d11f44 | j_mayer | 0x00000000);
|
4650 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4651 | 80d11f44 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4652 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4653 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4654 | 80d11f44 | j_mayer | 0x00000000);
|
4655 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4656 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_BBEAR, "BBEAR",
|
4657 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4658 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4659 | 80d11f44 | j_mayer | 0x00000000);
|
4660 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4661 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_BBTAR, "BBTAR",
|
4662 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4663 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4664 | 80d11f44 | j_mayer | 0x00000000);
|
4665 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4666 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_MCAR, "MCAR",
|
4667 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4668 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4669 | 80d11f44 | j_mayer | 0x00000000);
|
4670 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4671 | a750fc0b | j_mayer | spr_register(env, SPR_BOOKE_MCSR, "MCSR",
|
4672 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4673 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4674 | a750fc0b | j_mayer | 0x00000000);
|
4675 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4676 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_NPIDR, "NPIDR",
|
4677 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4678 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4679 | a750fc0b | j_mayer | 0x00000000);
|
4680 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4681 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_BUCSR, "BUCSR",
|
4682 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4683 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4684 | a750fc0b | j_mayer | 0x00000000);
|
4685 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4686 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1CFG0, "L1CFG0",
|
4687 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4688 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4689 | a496e8ee | Alexander Graf | l1cfg0); |
4690 | 578bb252 | j_mayer | /* XXX : not implemented */
|
4691 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1CSR0, "L1CSR0",
|
4692 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4693 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_e500_l1csr0, |
4694 | 80d11f44 | j_mayer | 0x00000000);
|
4695 | 80d11f44 | j_mayer | /* XXX : not implemented */
|
4696 | 80d11f44 | j_mayer | spr_register(env, SPR_Exxx_L1CSR1, "L1CSR1",
|
4697 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4698 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4699 | 80d11f44 | j_mayer | 0x00000000);
|
4700 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR0, "MCSRR0",
|
4701 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4702 | 80d11f44 | j_mayer | &spr_read_generic, &spr_write_generic, |
4703 | 80d11f44 | j_mayer | 0x00000000);
|
4704 | 80d11f44 | j_mayer | spr_register(env, SPR_BOOKE_MCSRR1, "MCSRR1",
|
4705 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4706 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4707 | a750fc0b | j_mayer | 0x00000000);
|
4708 | 01662f3e | Alexander Graf | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
4709 | 01662f3e | Alexander Graf | SPR_NOACCESS, SPR_NOACCESS, |
4710 | 01662f3e | Alexander Graf | &spr_read_generic, &spr_write_booke206_mmucsr0, |
4711 | 01662f3e | Alexander Graf | 0x00000000);
|
4712 | b81ccf8a | Alexander Graf | spr_register(env, SPR_BOOKE_EPR, "EPR",
|
4713 | b81ccf8a | Alexander Graf | SPR_NOACCESS, SPR_NOACCESS, |
4714 | 68c2dd70 | Alexander Graf | &spr_read_generic, SPR_NOACCESS, |
4715 | b81ccf8a | Alexander Graf | 0x00000000);
|
4716 | b81ccf8a | Alexander Graf | /* XXX better abstract into Emb.xxx features */
|
4717 | b81ccf8a | Alexander Graf | if (version == fsl_e5500) {
|
4718 | b81ccf8a | Alexander Graf | spr_register(env, SPR_BOOKE_EPCR, "EPCR",
|
4719 | b81ccf8a | Alexander Graf | SPR_NOACCESS, SPR_NOACCESS, |
4720 | b81ccf8a | Alexander Graf | &spr_read_generic, &spr_write_generic, |
4721 | b81ccf8a | Alexander Graf | 0x00000000);
|
4722 | b81ccf8a | Alexander Graf | spr_register(env, SPR_BOOKE_MAS7_MAS3, "MAS7_MAS3",
|
4723 | b81ccf8a | Alexander Graf | SPR_NOACCESS, SPR_NOACCESS, |
4724 | b81ccf8a | Alexander Graf | &spr_read_mas73, &spr_write_mas73, |
4725 | b81ccf8a | Alexander Graf | 0x00000000);
|
4726 | b81ccf8a | Alexander Graf | ivpr_mask = (target_ulong)~0xFFFFULL;
|
4727 | b81ccf8a | Alexander Graf | } |
4728 | 01662f3e | Alexander Graf | |
4729 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
4730 | 01662f3e | Alexander Graf | env->nb_tlb = 0;
|
4731 | 1c53accc | Alexander Graf | env->tlb_type = TLB_MAS; |
4732 | 01662f3e | Alexander Graf | for (i = 0; i < BOOKE206_MAX_TLBN; i++) { |
4733 | 01662f3e | Alexander Graf | env->nb_tlb += booke206_tlb_size(env, i); |
4734 | 01662f3e | Alexander Graf | } |
4735 | f2e63a42 | j_mayer | #endif
|
4736 | 01662f3e | Alexander Graf | |
4737 | e9cd84b9 | Alexander Graf | init_excp_e200(env, ivpr_mask); |
4738 | 9fdc60bf | aurel32 | /* Allocate hardware IRQ controller */
|
4739 | 9fdc60bf | aurel32 | ppce500_irq_init(env); |
4740 | 3fc6c082 | bellard | } |
4741 | a750fc0b | j_mayer | |
4742 | 01662f3e | Alexander Graf | static void init_proc_e500v1(CPUPPCState *env) |
4743 | 01662f3e | Alexander Graf | { |
4744 | f7aa5583 | Varun Sethi | init_proc_e500(env, fsl_e500v1); |
4745 | 01662f3e | Alexander Graf | } |
4746 | 01662f3e | Alexander Graf | |
4747 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e500v1)(ObjectClass *oc, void *data)
|
4748 | 7856e3a4 | Andreas Färber | { |
4749 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4750 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4751 | 7856e3a4 | Andreas Färber | |
4752 | ca5dff0a | Andreas Färber | dc->desc = "e500v1 core";
|
4753 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e500v1; |
4754 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4755 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | |
4756 | 53116ebf | Andreas Färber | PPC_SPE | PPC_SPE_SINGLE | |
4757 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_RFDI | |
4758 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | |
4759 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4760 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC; |
4761 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC2_BOOKE206; |
4762 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000606FF30ULL;
|
4763 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE206; |
4764 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4765 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4766 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_860; |
4767 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SPE | POWERPC_FLAG_CE | |
4768 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_UBLE | POWERPC_FLAG_DE | |
4769 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
4770 | 7856e3a4 | Andreas Färber | } |
4771 | 7856e3a4 | Andreas Färber | |
4772 | 01662f3e | Alexander Graf | static void init_proc_e500v2(CPUPPCState *env) |
4773 | 01662f3e | Alexander Graf | { |
4774 | f7aa5583 | Varun Sethi | init_proc_e500(env, fsl_e500v2); |
4775 | f7aa5583 | Varun Sethi | } |
4776 | f7aa5583 | Varun Sethi | |
4777 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e500v2)(ObjectClass *oc, void *data)
|
4778 | 7856e3a4 | Andreas Färber | { |
4779 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4780 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4781 | 7856e3a4 | Andreas Färber | |
4782 | ca5dff0a | Andreas Färber | dc->desc = "e500v2 core";
|
4783 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e500v2; |
4784 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
4785 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | |
4786 | 53116ebf | Andreas Färber | PPC_SPE | PPC_SPE_SINGLE | PPC_SPE_DOUBLE | |
4787 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_RFDI | |
4788 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | |
4789 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4790 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC; |
4791 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC2_BOOKE206; |
4792 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000606FF30ULL;
|
4793 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE206; |
4794 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4795 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4796 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_860; |
4797 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SPE | POWERPC_FLAG_CE | |
4798 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_UBLE | POWERPC_FLAG_DE | |
4799 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
4800 | 7856e3a4 | Andreas Färber | } |
4801 | 7856e3a4 | Andreas Färber | |
4802 | f7aa5583 | Varun Sethi | static void init_proc_e500mc(CPUPPCState *env) |
4803 | f7aa5583 | Varun Sethi | { |
4804 | f7aa5583 | Varun Sethi | init_proc_e500(env, fsl_e500mc); |
4805 | 01662f3e | Alexander Graf | } |
4806 | 01662f3e | Alexander Graf | |
4807 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e500mc)(ObjectClass *oc, void *data)
|
4808 | 7856e3a4 | Andreas Färber | { |
4809 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4810 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4811 | 7856e3a4 | Andreas Färber | |
4812 | ca5dff0a | Andreas Färber | dc->desc = "e500mc core";
|
4813 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e500mc; |
4814 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4815 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | |
4816 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_RFDI | PPC_RFMCI | |
4817 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | |
4818 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4819 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FRES | |
4820 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_FSEL | |
4821 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | PPC_WAIT | |
4822 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC; |
4823 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL; |
4824 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000001402FB36ULL;
|
4825 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE206; |
4826 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4827 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4828 | ba9fd9f1 | Andreas Färber | /* FIXME: figure out the correct flag for e500mc */
|
4829 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_e500; |
4830 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
4831 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
4832 | 7856e3a4 | Andreas Färber | } |
4833 | 7856e3a4 | Andreas Färber | |
4834 | b81ccf8a | Alexander Graf | #ifdef TARGET_PPC64
|
4835 | b81ccf8a | Alexander Graf | static void init_proc_e5500(CPUPPCState *env) |
4836 | b81ccf8a | Alexander Graf | { |
4837 | b81ccf8a | Alexander Graf | init_proc_e500(env, fsl_e5500); |
4838 | b81ccf8a | Alexander Graf | } |
4839 | 7856e3a4 | Andreas Färber | |
4840 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(e5500)(ObjectClass *oc, void *data)
|
4841 | 7856e3a4 | Andreas Färber | { |
4842 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4843 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4844 | 7856e3a4 | Andreas Färber | |
4845 | ca5dff0a | Andreas Färber | dc->desc = "e5500 core";
|
4846 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_e5500; |
4847 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4848 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | |
4849 | 53116ebf | Andreas Färber | PPC_WRTEE | PPC_RFDI | PPC_RFMCI | |
4850 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_LOCK | PPC_CACHE_ICBI | |
4851 | 53116ebf | Andreas Färber | PPC_CACHE_DCBZ | PPC_CACHE_DCBA | |
4852 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FRES | |
4853 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_FSEL | |
4854 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | PPC_WAIT | |
4855 | 53116ebf | Andreas Färber | PPC_MEM_TLBSYNC | PPC_TLBIVAX | PPC_MEM_SYNC | |
4856 | 53116ebf | Andreas Färber | PPC_64B | PPC_POPCNTB | PPC_POPCNTWD; |
4857 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC2_BOOKE206 | PPC2_PRCNTL; |
4858 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000009402FB36ULL;
|
4859 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_BOOKE206; |
4860 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_BOOKE; |
4861 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_BookE; |
4862 | ba9fd9f1 | Andreas Färber | /* FIXME: figure out the correct flag for e5500 */
|
4863 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_e500; |
4864 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_CE | POWERPC_FLAG_DE | |
4865 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
4866 | 7856e3a4 | Andreas Färber | } |
4867 | b81ccf8a | Alexander Graf | #endif
|
4868 | b81ccf8a | Alexander Graf | |
4869 | a750fc0b | j_mayer | /* Non-embedded PowerPC */
|
4870 | a750fc0b | j_mayer | |
4871 | a750fc0b | j_mayer | /* POWER : same as 601, without mfmsr, mfsr */
|
4872 | 53116ebf | Andreas Färber | POWERPC_FAMILY(POWER)(ObjectClass *oc, void *data)
|
4873 | 53116ebf | Andreas Färber | { |
4874 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4875 | 53116ebf | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4876 | 53116ebf | Andreas Färber | |
4877 | ca5dff0a | Andreas Färber | dc->desc = "POWER";
|
4878 | 953af181 | Andreas Färber | /* pcc->insns_flags = XXX_TODO; */
|
4879 | ba9fd9f1 | Andreas Färber | /* POWER RSC (from RAD6000) */
|
4880 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x00000000FEF0ULL;
|
4881 | 53116ebf | Andreas Färber | } |
4882 | a750fc0b | j_mayer | |
4883 | 082c6681 | j_mayer | #define POWERPC_MSRR_601 (0x0000000000001040ULL) |
4884 | a750fc0b | j_mayer | |
4885 | a750fc0b | j_mayer | static void init_proc_601 (CPUPPCState *env) |
4886 | 3fc6c082 | bellard | { |
4887 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
4888 | a750fc0b | j_mayer | gen_spr_601(env); |
4889 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
4890 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4891 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4892 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4893 | 056401ea | j_mayer | &spr_read_generic, &spr_write_hid0_601, |
4894 | faadf50e | j_mayer | 0x80010080);
|
4895 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4896 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4897 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4898 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4899 | a750fc0b | j_mayer | 0x00000000);
|
4900 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4901 | a750fc0b | j_mayer | spr_register(env, SPR_601_HID2, "HID2",
|
4902 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4903 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4904 | a750fc0b | j_mayer | 0x00000000);
|
4905 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4906 | a750fc0b | j_mayer | spr_register(env, SPR_601_HID5, "HID5",
|
4907 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4908 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4909 | a750fc0b | j_mayer | 0x00000000);
|
4910 | a750fc0b | j_mayer | /* Memory management */
|
4911 | e1833e1f | j_mayer | init_excp_601(env); |
4912 | 082c6681 | j_mayer | /* XXX: beware that dcache line size is 64
|
4913 | 082c6681 | j_mayer | * but dcbz uses 32 bytes "sectors"
|
4914 | 082c6681 | j_mayer | * XXX: this breaks clcs instruction !
|
4915 | 082c6681 | j_mayer | */
|
4916 | 082c6681 | j_mayer | env->dcache_line_size = 32;
|
4917 | d63001d1 | j_mayer | env->icache_line_size = 64;
|
4918 | faadf50e | j_mayer | /* Allocate hardware IRQ controller */
|
4919 | faadf50e | j_mayer | ppc6xx_irq_init(env); |
4920 | 3fc6c082 | bellard | } |
4921 | 3fc6c082 | bellard | |
4922 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(601)(ObjectClass *oc, void *data) |
4923 | 7856e3a4 | Andreas Färber | { |
4924 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4925 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4926 | 7856e3a4 | Andreas Färber | |
4927 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 601";
|
4928 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_601; |
4929 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4930 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_POWER_BR | |
4931 | 53116ebf | Andreas Färber | PPC_FLOAT | |
4932 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
4933 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | |
4934 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
4935 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4936 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000000FD70ULL;
|
4937 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_601; |
4938 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_601; |
4939 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
4940 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_601; |
4941 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK; |
4942 | 7856e3a4 | Andreas Färber | } |
4943 | 7856e3a4 | Andreas Färber | |
4944 | 082c6681 | j_mayer | #define POWERPC_MSRR_601v (0x0000000000001040ULL) |
4945 | 082c6681 | j_mayer | |
4946 | 082c6681 | j_mayer | static void init_proc_601v (CPUPPCState *env) |
4947 | 082c6681 | j_mayer | { |
4948 | 082c6681 | j_mayer | init_proc_601(env); |
4949 | 082c6681 | j_mayer | /* XXX : not implemented */
|
4950 | 082c6681 | j_mayer | spr_register(env, SPR_601_HID15, "HID15",
|
4951 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4952 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
4953 | 082c6681 | j_mayer | 0x00000000);
|
4954 | 082c6681 | j_mayer | } |
4955 | 082c6681 | j_mayer | |
4956 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(601v)(ObjectClass *oc, void *data) |
4957 | 7856e3a4 | Andreas Färber | { |
4958 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
4959 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
4960 | 7856e3a4 | Andreas Färber | |
4961 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 601v";
|
4962 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_601v; |
4963 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_none; |
4964 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_POWER_BR | |
4965 | 53116ebf | Andreas Färber | PPC_FLOAT | |
4966 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
4967 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | PPC_MEM_TLBIE | |
4968 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
4969 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
4970 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000000FD70ULL;
|
4971 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_601; |
4972 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_601; |
4973 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
4974 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_601; |
4975 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_RTC_CLK; |
4976 | 7856e3a4 | Andreas Färber | } |
4977 | 7856e3a4 | Andreas Färber | |
4978 | a750fc0b | j_mayer | static void init_proc_602 (CPUPPCState *env) |
4979 | 3fc6c082 | bellard | { |
4980 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
4981 | a750fc0b | j_mayer | gen_spr_602(env); |
4982 | a750fc0b | j_mayer | /* Time base */
|
4983 | a750fc0b | j_mayer | gen_tbl(env); |
4984 | a750fc0b | j_mayer | /* hardware implementation registers */
|
4985 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4986 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
4987 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4988 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4989 | a750fc0b | j_mayer | 0x00000000);
|
4990 | a750fc0b | j_mayer | /* XXX : not implemented */
|
4991 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
4992 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
4993 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
4994 | a750fc0b | j_mayer | 0x00000000);
|
4995 | a750fc0b | j_mayer | /* Memory management */
|
4996 | a750fc0b | j_mayer | gen_low_BATs(env); |
4997 | a750fc0b | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
4998 | e1833e1f | j_mayer | init_excp_602(env); |
4999 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5000 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5001 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5002 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5003 | a750fc0b | j_mayer | } |
5004 | 3fc6c082 | bellard | |
5005 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(602)(ObjectClass *oc, void *data) |
5006 | 7856e3a4 | Andreas Färber | { |
5007 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5008 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5009 | 7856e3a4 | Andreas Färber | |
5010 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 602";
|
5011 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_602; |
5012 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5013 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5014 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5015 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5016 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5017 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5018 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_6xx_TLB | PPC_MEM_TLBSYNC | |
5019 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_602_SPEC; |
5020 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5021 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x0000000000C7FF73ULL;
|
5022 | ba9fd9f1 | Andreas Färber | /* XXX: 602 MMU is quite specific. Should add a special case */
|
5023 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
5024 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_602; |
5025 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5026 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_602; |
5027 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
5028 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
5029 | 7856e3a4 | Andreas Färber | } |
5030 | 7856e3a4 | Andreas Färber | |
5031 | a750fc0b | j_mayer | static void init_proc_603 (CPUPPCState *env) |
5032 | a750fc0b | j_mayer | { |
5033 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5034 | a750fc0b | j_mayer | gen_spr_603(env); |
5035 | a750fc0b | j_mayer | /* Time base */
|
5036 | a750fc0b | j_mayer | gen_tbl(env); |
5037 | a750fc0b | j_mayer | /* hardware implementation registers */
|
5038 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5039 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5040 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5041 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5042 | a750fc0b | j_mayer | 0x00000000);
|
5043 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5044 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5045 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5046 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5047 | a750fc0b | j_mayer | 0x00000000);
|
5048 | a750fc0b | j_mayer | /* Memory management */
|
5049 | a750fc0b | j_mayer | gen_low_BATs(env); |
5050 | a750fc0b | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
5051 | e1833e1f | j_mayer | init_excp_603(env); |
5052 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5053 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5054 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5055 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5056 | 3fc6c082 | bellard | } |
5057 | 3fc6c082 | bellard | |
5058 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(603)(ObjectClass *oc, void *data) |
5059 | 7856e3a4 | Andreas Färber | { |
5060 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5061 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5062 | 7856e3a4 | Andreas Färber | |
5063 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 603";
|
5064 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_603; |
5065 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5066 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5067 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5068 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5069 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5070 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5071 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
5072 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5073 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5074 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007FF73ULL;
|
5075 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
5076 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_603; |
5077 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5078 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_603; |
5079 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
5080 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
5081 | 7856e3a4 | Andreas Färber | } |
5082 | 7856e3a4 | Andreas Färber | |
5083 | a750fc0b | j_mayer | static void init_proc_603E (CPUPPCState *env) |
5084 | a750fc0b | j_mayer | { |
5085 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5086 | a750fc0b | j_mayer | gen_spr_603(env); |
5087 | a750fc0b | j_mayer | /* Time base */
|
5088 | a750fc0b | j_mayer | gen_tbl(env); |
5089 | a750fc0b | j_mayer | /* hardware implementation registers */
|
5090 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5091 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5092 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5093 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5094 | a750fc0b | j_mayer | 0x00000000);
|
5095 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5096 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5097 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5098 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5099 | a750fc0b | j_mayer | 0x00000000);
|
5100 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5101 | a750fc0b | j_mayer | spr_register(env, SPR_IABR, "IABR",
|
5102 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5103 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5104 | a750fc0b | j_mayer | 0x00000000);
|
5105 | a750fc0b | j_mayer | /* Memory management */
|
5106 | a750fc0b | j_mayer | gen_low_BATs(env); |
5107 | a750fc0b | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
5108 | e1833e1f | j_mayer | init_excp_603(env); |
5109 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5110 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5111 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5112 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5113 | a750fc0b | j_mayer | } |
5114 | a750fc0b | j_mayer | |
5115 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(603E)(ObjectClass *oc, void *data) |
5116 | 7856e3a4 | Andreas Färber | { |
5117 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5118 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5119 | 7856e3a4 | Andreas Färber | |
5120 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 603e";
|
5121 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_603E; |
5122 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5123 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5124 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5125 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5126 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5127 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5128 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
5129 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5130 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5131 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000007FF73ULL;
|
5132 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
5133 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_603E; |
5134 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5135 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_ec603e; |
5136 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_TGPR | POWERPC_FLAG_SE | |
5137 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_BUS_CLK; |
5138 | 7856e3a4 | Andreas Färber | } |
5139 | 7856e3a4 | Andreas Färber | |
5140 | a750fc0b | j_mayer | static void init_proc_604 (CPUPPCState *env) |
5141 | a750fc0b | j_mayer | { |
5142 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5143 | a750fc0b | j_mayer | gen_spr_604(env); |
5144 | a750fc0b | j_mayer | /* Time base */
|
5145 | a750fc0b | j_mayer | gen_tbl(env); |
5146 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
5147 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5148 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5149 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5150 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5151 | a750fc0b | j_mayer | 0x00000000);
|
5152 | 082c6681 | j_mayer | /* Memory management */
|
5153 | 082c6681 | j_mayer | gen_low_BATs(env); |
5154 | 082c6681 | j_mayer | init_excp_604(env); |
5155 | 082c6681 | j_mayer | env->dcache_line_size = 32;
|
5156 | 082c6681 | j_mayer | env->icache_line_size = 32;
|
5157 | 082c6681 | j_mayer | /* Allocate hardware IRQ controller */
|
5158 | 082c6681 | j_mayer | ppc6xx_irq_init(env); |
5159 | 082c6681 | j_mayer | } |
5160 | 082c6681 | j_mayer | |
5161 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(604)(ObjectClass *oc, void *data) |
5162 | 7856e3a4 | Andreas Färber | { |
5163 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5164 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5165 | 7856e3a4 | Andreas Färber | |
5166 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 604";
|
5167 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_604; |
5168 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
5169 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5170 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5171 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5172 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5173 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5174 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5175 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5176 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5177 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5178 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5179 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_604; |
5180 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5181 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_604; |
5182 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5183 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5184 | 7856e3a4 | Andreas Färber | } |
5185 | 7856e3a4 | Andreas Färber | |
5186 | 082c6681 | j_mayer | static void init_proc_604E (CPUPPCState *env) |
5187 | 082c6681 | j_mayer | { |
5188 | 082c6681 | j_mayer | gen_spr_ne_601(env); |
5189 | 082c6681 | j_mayer | gen_spr_604(env); |
5190 | 082c6681 | j_mayer | /* XXX : not implemented */
|
5191 | 082c6681 | j_mayer | spr_register(env, SPR_MMCR1, "MMCR1",
|
5192 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5193 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
5194 | 082c6681 | j_mayer | 0x00000000);
|
5195 | 082c6681 | j_mayer | /* XXX : not implemented */
|
5196 | 082c6681 | j_mayer | spr_register(env, SPR_PMC3, "PMC3",
|
5197 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5198 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
5199 | 082c6681 | j_mayer | 0x00000000);
|
5200 | 082c6681 | j_mayer | /* XXX : not implemented */
|
5201 | 082c6681 | j_mayer | spr_register(env, SPR_PMC4, "PMC4",
|
5202 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5203 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
5204 | 082c6681 | j_mayer | 0x00000000);
|
5205 | 082c6681 | j_mayer | /* Time base */
|
5206 | 082c6681 | j_mayer | gen_tbl(env); |
5207 | 082c6681 | j_mayer | /* Hardware implementation registers */
|
5208 | 082c6681 | j_mayer | /* XXX : not implemented */
|
5209 | 082c6681 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5210 | 082c6681 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5211 | 082c6681 | j_mayer | &spr_read_generic, &spr_write_generic, |
5212 | 082c6681 | j_mayer | 0x00000000);
|
5213 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5214 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5215 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5216 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5217 | a750fc0b | j_mayer | 0x00000000);
|
5218 | a750fc0b | j_mayer | /* Memory management */
|
5219 | a750fc0b | j_mayer | gen_low_BATs(env); |
5220 | e1833e1f | j_mayer | init_excp_604(env); |
5221 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5222 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5223 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5224 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5225 | a750fc0b | j_mayer | } |
5226 | a750fc0b | j_mayer | |
5227 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(604E)(ObjectClass *oc, void *data) |
5228 | 7856e3a4 | Andreas Färber | { |
5229 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5230 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5231 | 7856e3a4 | Andreas Färber | |
5232 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 604E";
|
5233 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_604E; |
5234 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
5235 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5236 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5237 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5238 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5239 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5240 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5241 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5242 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5243 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5244 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5245 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_604; |
5246 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5247 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_604; |
5248 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5249 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5250 | 7856e3a4 | Andreas Färber | } |
5251 | 7856e3a4 | Andreas Färber | |
5252 | bd928eba | j_mayer | static void init_proc_740 (CPUPPCState *env) |
5253 | a750fc0b | j_mayer | { |
5254 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5255 | a750fc0b | j_mayer | gen_spr_7xx(env); |
5256 | a750fc0b | j_mayer | /* Time base */
|
5257 | a750fc0b | j_mayer | gen_tbl(env); |
5258 | a750fc0b | j_mayer | /* Thermal management */
|
5259 | a750fc0b | j_mayer | gen_spr_thrm(env); |
5260 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
5261 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5262 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5263 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5264 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5265 | a750fc0b | j_mayer | 0x00000000);
|
5266 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5267 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5268 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5269 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5270 | a750fc0b | j_mayer | 0x00000000);
|
5271 | a750fc0b | j_mayer | /* Memory management */
|
5272 | a750fc0b | j_mayer | gen_low_BATs(env); |
5273 | e1833e1f | j_mayer | init_excp_7x0(env); |
5274 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5275 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5276 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5277 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5278 | a750fc0b | j_mayer | } |
5279 | a750fc0b | j_mayer | |
5280 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(740)(ObjectClass *oc, void *data) |
5281 | 7856e3a4 | Andreas Färber | { |
5282 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5283 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5284 | 7856e3a4 | Andreas Färber | |
5285 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 740";
|
5286 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_740; |
5287 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5288 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5289 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5290 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5291 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5292 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5293 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5294 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5295 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5296 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5297 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5298 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5299 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5300 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5301 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5302 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5303 | 7856e3a4 | Andreas Färber | } |
5304 | 7856e3a4 | Andreas Färber | |
5305 | bd928eba | j_mayer | static void init_proc_750 (CPUPPCState *env) |
5306 | bd928eba | j_mayer | { |
5307 | bd928eba | j_mayer | gen_spr_ne_601(env); |
5308 | bd928eba | j_mayer | gen_spr_7xx(env); |
5309 | bd928eba | j_mayer | /* XXX : not implemented */
|
5310 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5311 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5312 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5313 | bd928eba | j_mayer | 0x00000000);
|
5314 | bd928eba | j_mayer | /* Time base */
|
5315 | bd928eba | j_mayer | gen_tbl(env); |
5316 | bd928eba | j_mayer | /* Thermal management */
|
5317 | bd928eba | j_mayer | gen_spr_thrm(env); |
5318 | bd928eba | j_mayer | /* Hardware implementation registers */
|
5319 | bd928eba | j_mayer | /* XXX : not implemented */
|
5320 | bd928eba | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5321 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5322 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5323 | bd928eba | j_mayer | 0x00000000);
|
5324 | bd928eba | j_mayer | /* XXX : not implemented */
|
5325 | bd928eba | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5326 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5327 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5328 | bd928eba | j_mayer | 0x00000000);
|
5329 | bd928eba | j_mayer | /* Memory management */
|
5330 | bd928eba | j_mayer | gen_low_BATs(env); |
5331 | bd928eba | j_mayer | /* XXX: high BATs are also present but are known to be bugged on
|
5332 | bd928eba | j_mayer | * die version 1.x
|
5333 | bd928eba | j_mayer | */
|
5334 | bd928eba | j_mayer | init_excp_7x0(env); |
5335 | bd928eba | j_mayer | env->dcache_line_size = 32;
|
5336 | bd928eba | j_mayer | env->icache_line_size = 32;
|
5337 | bd928eba | j_mayer | /* Allocate hardware IRQ controller */
|
5338 | bd928eba | j_mayer | ppc6xx_irq_init(env); |
5339 | bd928eba | j_mayer | } |
5340 | bd928eba | j_mayer | |
5341 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(750)(ObjectClass *oc, void *data) |
5342 | 7856e3a4 | Andreas Färber | { |
5343 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5344 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5345 | 7856e3a4 | Andreas Färber | |
5346 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 750";
|
5347 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_750; |
5348 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5349 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5350 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5351 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5352 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5353 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5354 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5355 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5356 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5357 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5358 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5359 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5360 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5361 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5362 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5363 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5364 | 7856e3a4 | Andreas Färber | } |
5365 | 7856e3a4 | Andreas Färber | |
5366 | bd928eba | j_mayer | static void init_proc_750cl (CPUPPCState *env) |
5367 | bd928eba | j_mayer | { |
5368 | bd928eba | j_mayer | gen_spr_ne_601(env); |
5369 | bd928eba | j_mayer | gen_spr_7xx(env); |
5370 | bd928eba | j_mayer | /* XXX : not implemented */
|
5371 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5372 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5373 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5374 | bd928eba | j_mayer | 0x00000000);
|
5375 | bd928eba | j_mayer | /* Time base */
|
5376 | bd928eba | j_mayer | gen_tbl(env); |
5377 | bd928eba | j_mayer | /* Thermal management */
|
5378 | bd928eba | j_mayer | /* Those registers are fake on 750CL */
|
5379 | bd928eba | j_mayer | spr_register(env, SPR_THRM1, "THRM1",
|
5380 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5381 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5382 | bd928eba | j_mayer | 0x00000000);
|
5383 | bd928eba | j_mayer | spr_register(env, SPR_THRM2, "THRM2",
|
5384 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5385 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5386 | bd928eba | j_mayer | 0x00000000);
|
5387 | bd928eba | j_mayer | spr_register(env, SPR_THRM3, "THRM3",
|
5388 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5389 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5390 | bd928eba | j_mayer | 0x00000000);
|
5391 | bd928eba | j_mayer | /* XXX: not implemented */
|
5392 | bd928eba | j_mayer | spr_register(env, SPR_750_TDCL, "TDCL",
|
5393 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5394 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5395 | bd928eba | j_mayer | 0x00000000);
|
5396 | bd928eba | j_mayer | spr_register(env, SPR_750_TDCH, "TDCH",
|
5397 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5398 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5399 | bd928eba | j_mayer | 0x00000000);
|
5400 | bd928eba | j_mayer | /* DMA */
|
5401 | bd928eba | j_mayer | /* XXX : not implemented */
|
5402 | bd928eba | j_mayer | spr_register(env, SPR_750_WPAR, "WPAR",
|
5403 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5404 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5405 | bd928eba | j_mayer | 0x00000000);
|
5406 | bd928eba | j_mayer | spr_register(env, SPR_750_DMAL, "DMAL",
|
5407 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5408 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5409 | bd928eba | j_mayer | 0x00000000);
|
5410 | bd928eba | j_mayer | spr_register(env, SPR_750_DMAU, "DMAU",
|
5411 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5412 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5413 | bd928eba | j_mayer | 0x00000000);
|
5414 | bd928eba | j_mayer | /* Hardware implementation registers */
|
5415 | bd928eba | j_mayer | /* XXX : not implemented */
|
5416 | bd928eba | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5417 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5418 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5419 | bd928eba | j_mayer | 0x00000000);
|
5420 | bd928eba | j_mayer | /* XXX : not implemented */
|
5421 | bd928eba | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5422 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5423 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5424 | bd928eba | j_mayer | 0x00000000);
|
5425 | bd928eba | j_mayer | /* XXX : not implemented */
|
5426 | bd928eba | j_mayer | spr_register(env, SPR_750CL_HID2, "HID2",
|
5427 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5428 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5429 | bd928eba | j_mayer | 0x00000000);
|
5430 | bd928eba | j_mayer | /* XXX : not implemented */
|
5431 | bd928eba | j_mayer | spr_register(env, SPR_750CL_HID4, "HID4",
|
5432 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5433 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5434 | bd928eba | j_mayer | 0x00000000);
|
5435 | bd928eba | j_mayer | /* Quantization registers */
|
5436 | bd928eba | j_mayer | /* XXX : not implemented */
|
5437 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR0, "GQR0",
|
5438 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5439 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5440 | bd928eba | j_mayer | 0x00000000);
|
5441 | bd928eba | j_mayer | /* XXX : not implemented */
|
5442 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR1, "GQR1",
|
5443 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5444 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5445 | bd928eba | j_mayer | 0x00000000);
|
5446 | bd928eba | j_mayer | /* XXX : not implemented */
|
5447 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR2, "GQR2",
|
5448 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5449 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5450 | bd928eba | j_mayer | 0x00000000);
|
5451 | bd928eba | j_mayer | /* XXX : not implemented */
|
5452 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR3, "GQR3",
|
5453 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5454 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5455 | bd928eba | j_mayer | 0x00000000);
|
5456 | bd928eba | j_mayer | /* XXX : not implemented */
|
5457 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR4, "GQR4",
|
5458 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5459 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5460 | bd928eba | j_mayer | 0x00000000);
|
5461 | bd928eba | j_mayer | /* XXX : not implemented */
|
5462 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR5, "GQR5",
|
5463 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5464 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5465 | bd928eba | j_mayer | 0x00000000);
|
5466 | bd928eba | j_mayer | /* XXX : not implemented */
|
5467 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR6, "GQR6",
|
5468 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5469 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5470 | bd928eba | j_mayer | 0x00000000);
|
5471 | bd928eba | j_mayer | /* XXX : not implemented */
|
5472 | bd928eba | j_mayer | spr_register(env, SPR_750_GQR7, "GQR7",
|
5473 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5474 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5475 | bd928eba | j_mayer | 0x00000000);
|
5476 | bd928eba | j_mayer | /* Memory management */
|
5477 | bd928eba | j_mayer | gen_low_BATs(env); |
5478 | bd928eba | j_mayer | /* PowerPC 750cl has 8 DBATs and 8 IBATs */
|
5479 | bd928eba | j_mayer | gen_high_BATs(env); |
5480 | bd928eba | j_mayer | init_excp_750cl(env); |
5481 | bd928eba | j_mayer | env->dcache_line_size = 32;
|
5482 | bd928eba | j_mayer | env->icache_line_size = 32;
|
5483 | bd928eba | j_mayer | /* Allocate hardware IRQ controller */
|
5484 | bd928eba | j_mayer | ppc6xx_irq_init(env); |
5485 | bd928eba | j_mayer | } |
5486 | bd928eba | j_mayer | |
5487 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(750cl)(ObjectClass *oc, void *data) |
5488 | 7856e3a4 | Andreas Färber | { |
5489 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5490 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5491 | 7856e3a4 | Andreas Färber | |
5492 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 750 CL";
|
5493 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_750cl; |
5494 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5495 | 53116ebf | Andreas Färber | /* XXX: not implemented:
|
5496 | 53116ebf | Andreas Färber | * cache lock instructions:
|
5497 | 53116ebf | Andreas Färber | * dcbz_l
|
5498 | 53116ebf | Andreas Färber | * floating point paired instructions
|
5499 | 53116ebf | Andreas Färber | * psq_lux
|
5500 | 53116ebf | Andreas Färber | * psq_lx
|
5501 | 53116ebf | Andreas Färber | * psq_stux
|
5502 | 53116ebf | Andreas Färber | * psq_stx
|
5503 | 53116ebf | Andreas Färber | * ps_abs
|
5504 | 53116ebf | Andreas Färber | * ps_add
|
5505 | 53116ebf | Andreas Färber | * ps_cmpo0
|
5506 | 53116ebf | Andreas Färber | * ps_cmpo1
|
5507 | 53116ebf | Andreas Färber | * ps_cmpu0
|
5508 | 53116ebf | Andreas Färber | * ps_cmpu1
|
5509 | 53116ebf | Andreas Färber | * ps_div
|
5510 | 53116ebf | Andreas Färber | * ps_madd
|
5511 | 53116ebf | Andreas Färber | * ps_madds0
|
5512 | 53116ebf | Andreas Färber | * ps_madds1
|
5513 | 53116ebf | Andreas Färber | * ps_merge00
|
5514 | 53116ebf | Andreas Färber | * ps_merge01
|
5515 | 53116ebf | Andreas Färber | * ps_merge10
|
5516 | 53116ebf | Andreas Färber | * ps_merge11
|
5517 | 53116ebf | Andreas Färber | * ps_mr
|
5518 | 53116ebf | Andreas Färber | * ps_msub
|
5519 | 53116ebf | Andreas Färber | * ps_mul
|
5520 | 53116ebf | Andreas Färber | * ps_muls0
|
5521 | 53116ebf | Andreas Färber | * ps_muls1
|
5522 | 53116ebf | Andreas Färber | * ps_nabs
|
5523 | 53116ebf | Andreas Färber | * ps_neg
|
5524 | 53116ebf | Andreas Färber | * ps_nmadd
|
5525 | 53116ebf | Andreas Färber | * ps_nmsub
|
5526 | 53116ebf | Andreas Färber | * ps_res
|
5527 | 53116ebf | Andreas Färber | * ps_rsqrte
|
5528 | 53116ebf | Andreas Färber | * ps_sel
|
5529 | 53116ebf | Andreas Färber | * ps_sub
|
5530 | 53116ebf | Andreas Färber | * ps_sum0
|
5531 | 53116ebf | Andreas Färber | * ps_sum1
|
5532 | 53116ebf | Andreas Färber | */
|
5533 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5534 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5535 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5536 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5537 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5538 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5539 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5540 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5541 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5542 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5543 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5544 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5545 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5546 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5547 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5548 | 7856e3a4 | Andreas Färber | } |
5549 | 7856e3a4 | Andreas Färber | |
5550 | bd928eba | j_mayer | static void init_proc_750cx (CPUPPCState *env) |
5551 | bd928eba | j_mayer | { |
5552 | bd928eba | j_mayer | gen_spr_ne_601(env); |
5553 | bd928eba | j_mayer | gen_spr_7xx(env); |
5554 | bd928eba | j_mayer | /* XXX : not implemented */
|
5555 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5556 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5557 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5558 | bd928eba | j_mayer | 0x00000000);
|
5559 | bd928eba | j_mayer | /* Time base */
|
5560 | bd928eba | j_mayer | gen_tbl(env); |
5561 | bd928eba | j_mayer | /* Thermal management */
|
5562 | bd928eba | j_mayer | gen_spr_thrm(env); |
5563 | bd928eba | j_mayer | /* This register is not implemented but is present for compatibility */
|
5564 | bd928eba | j_mayer | spr_register(env, SPR_SDA, "SDA",
|
5565 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5566 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5567 | bd928eba | j_mayer | 0x00000000);
|
5568 | bd928eba | j_mayer | /* Hardware implementation registers */
|
5569 | bd928eba | j_mayer | /* XXX : not implemented */
|
5570 | bd928eba | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5571 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5572 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5573 | bd928eba | j_mayer | 0x00000000);
|
5574 | bd928eba | j_mayer | /* XXX : not implemented */
|
5575 | bd928eba | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5576 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5577 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5578 | bd928eba | j_mayer | 0x00000000);
|
5579 | bd928eba | j_mayer | /* Memory management */
|
5580 | bd928eba | j_mayer | gen_low_BATs(env); |
5581 | 4e777442 | j_mayer | /* PowerPC 750cx has 8 DBATs and 8 IBATs */
|
5582 | 4e777442 | j_mayer | gen_high_BATs(env); |
5583 | bd928eba | j_mayer | init_excp_750cx(env); |
5584 | bd928eba | j_mayer | env->dcache_line_size = 32;
|
5585 | bd928eba | j_mayer | env->icache_line_size = 32;
|
5586 | bd928eba | j_mayer | /* Allocate hardware IRQ controller */
|
5587 | bd928eba | j_mayer | ppc6xx_irq_init(env); |
5588 | bd928eba | j_mayer | } |
5589 | bd928eba | j_mayer | |
5590 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(750cx)(ObjectClass *oc, void *data) |
5591 | 7856e3a4 | Andreas Färber | { |
5592 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5593 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5594 | 7856e3a4 | Andreas Färber | |
5595 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 750CX";
|
5596 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_750cx; |
5597 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5598 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5599 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5600 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5601 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5602 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5603 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5604 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5605 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5606 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5607 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5608 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5609 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5610 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5611 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5612 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5613 | 7856e3a4 | Andreas Färber | } |
5614 | 7856e3a4 | Andreas Färber | |
5615 | a750fc0b | j_mayer | static void init_proc_750fx (CPUPPCState *env) |
5616 | a750fc0b | j_mayer | { |
5617 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5618 | a750fc0b | j_mayer | gen_spr_7xx(env); |
5619 | bd928eba | j_mayer | /* XXX : not implemented */
|
5620 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5621 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5622 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5623 | bd928eba | j_mayer | 0x00000000);
|
5624 | a750fc0b | j_mayer | /* Time base */
|
5625 | a750fc0b | j_mayer | gen_tbl(env); |
5626 | a750fc0b | j_mayer | /* Thermal management */
|
5627 | a750fc0b | j_mayer | gen_spr_thrm(env); |
5628 | bd928eba | j_mayer | /* XXX : not implemented */
|
5629 | bd928eba | j_mayer | spr_register(env, SPR_750_THRM4, "THRM4",
|
5630 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5631 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5632 | bd928eba | j_mayer | 0x00000000);
|
5633 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
5634 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5635 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5636 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5637 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5638 | a750fc0b | j_mayer | 0x00000000);
|
5639 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5640 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5641 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5642 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5643 | a750fc0b | j_mayer | 0x00000000);
|
5644 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5645 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
5646 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5647 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5648 | a750fc0b | j_mayer | 0x00000000);
|
5649 | a750fc0b | j_mayer | /* Memory management */
|
5650 | a750fc0b | j_mayer | gen_low_BATs(env); |
5651 | a750fc0b | j_mayer | /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
|
5652 | a750fc0b | j_mayer | gen_high_BATs(env); |
5653 | bd928eba | j_mayer | init_excp_7x0(env); |
5654 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5655 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5656 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5657 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5658 | a750fc0b | j_mayer | } |
5659 | a750fc0b | j_mayer | |
5660 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(750fx)(ObjectClass *oc, void *data) |
5661 | 7856e3a4 | Andreas Färber | { |
5662 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5663 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5664 | 7856e3a4 | Andreas Färber | |
5665 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 750FX";
|
5666 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_750fx; |
5667 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5668 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5669 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5670 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5671 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5672 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5673 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5674 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5675 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5676 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5677 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5678 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5679 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5680 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5681 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5682 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5683 | 7856e3a4 | Andreas Färber | } |
5684 | 7856e3a4 | Andreas Färber | |
5685 | bd928eba | j_mayer | static void init_proc_750gx (CPUPPCState *env) |
5686 | bd928eba | j_mayer | { |
5687 | bd928eba | j_mayer | gen_spr_ne_601(env); |
5688 | bd928eba | j_mayer | gen_spr_7xx(env); |
5689 | bd928eba | j_mayer | /* XXX : not implemented (XXX: different from 750fx) */
|
5690 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5691 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5692 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5693 | bd928eba | j_mayer | 0x00000000);
|
5694 | bd928eba | j_mayer | /* Time base */
|
5695 | bd928eba | j_mayer | gen_tbl(env); |
5696 | bd928eba | j_mayer | /* Thermal management */
|
5697 | bd928eba | j_mayer | gen_spr_thrm(env); |
5698 | bd928eba | j_mayer | /* XXX : not implemented */
|
5699 | bd928eba | j_mayer | spr_register(env, SPR_750_THRM4, "THRM4",
|
5700 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5701 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5702 | bd928eba | j_mayer | 0x00000000);
|
5703 | bd928eba | j_mayer | /* Hardware implementation registers */
|
5704 | bd928eba | j_mayer | /* XXX : not implemented (XXX: different from 750fx) */
|
5705 | bd928eba | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5706 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5707 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5708 | bd928eba | j_mayer | 0x00000000);
|
5709 | bd928eba | j_mayer | /* XXX : not implemented */
|
5710 | bd928eba | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5711 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5712 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5713 | bd928eba | j_mayer | 0x00000000);
|
5714 | bd928eba | j_mayer | /* XXX : not implemented (XXX: different from 750fx) */
|
5715 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
5716 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5717 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5718 | bd928eba | j_mayer | 0x00000000);
|
5719 | bd928eba | j_mayer | /* Memory management */
|
5720 | bd928eba | j_mayer | gen_low_BATs(env); |
5721 | bd928eba | j_mayer | /* PowerPC 750fx & 750gx has 8 DBATs and 8 IBATs */
|
5722 | bd928eba | j_mayer | gen_high_BATs(env); |
5723 | bd928eba | j_mayer | init_excp_7x0(env); |
5724 | bd928eba | j_mayer | env->dcache_line_size = 32;
|
5725 | bd928eba | j_mayer | env->icache_line_size = 32;
|
5726 | bd928eba | j_mayer | /* Allocate hardware IRQ controller */
|
5727 | bd928eba | j_mayer | ppc6xx_irq_init(env); |
5728 | bd928eba | j_mayer | } |
5729 | bd928eba | j_mayer | |
5730 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(750gx)(ObjectClass *oc, void *data) |
5731 | 7856e3a4 | Andreas Färber | { |
5732 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5733 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5734 | 7856e3a4 | Andreas Färber | |
5735 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 750GX";
|
5736 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_750gx; |
5737 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5738 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5739 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5740 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5741 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5742 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5743 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5744 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5745 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5746 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5747 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5748 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x0; |
5749 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5750 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5751 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5752 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5753 | 7856e3a4 | Andreas Färber | } |
5754 | 7856e3a4 | Andreas Färber | |
5755 | bd928eba | j_mayer | static void init_proc_745 (CPUPPCState *env) |
5756 | bd928eba | j_mayer | { |
5757 | bd928eba | j_mayer | gen_spr_ne_601(env); |
5758 | bd928eba | j_mayer | gen_spr_7xx(env); |
5759 | bd928eba | j_mayer | gen_spr_G2_755(env); |
5760 | bd928eba | j_mayer | /* Time base */
|
5761 | bd928eba | j_mayer | gen_tbl(env); |
5762 | bd928eba | j_mayer | /* Thermal management */
|
5763 | bd928eba | j_mayer | gen_spr_thrm(env); |
5764 | bd928eba | j_mayer | /* Hardware implementation registers */
|
5765 | bd928eba | j_mayer | /* XXX : not implemented */
|
5766 | bd928eba | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5767 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5768 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5769 | bd928eba | j_mayer | 0x00000000);
|
5770 | bd928eba | j_mayer | /* XXX : not implemented */
|
5771 | bd928eba | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5772 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5773 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5774 | bd928eba | j_mayer | 0x00000000);
|
5775 | bd928eba | j_mayer | /* XXX : not implemented */
|
5776 | bd928eba | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
5777 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5778 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
5779 | bd928eba | j_mayer | 0x00000000);
|
5780 | bd928eba | j_mayer | /* Memory management */
|
5781 | bd928eba | j_mayer | gen_low_BATs(env); |
5782 | bd928eba | j_mayer | gen_high_BATs(env); |
5783 | bd928eba | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
5784 | bd928eba | j_mayer | init_excp_7x5(env); |
5785 | bd928eba | j_mayer | env->dcache_line_size = 32;
|
5786 | bd928eba | j_mayer | env->icache_line_size = 32;
|
5787 | bd928eba | j_mayer | /* Allocate hardware IRQ controller */
|
5788 | bd928eba | j_mayer | ppc6xx_irq_init(env); |
5789 | bd928eba | j_mayer | } |
5790 | bd928eba | j_mayer | |
5791 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(745)(ObjectClass *oc, void *data) |
5792 | 7856e3a4 | Andreas Färber | { |
5793 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5794 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5795 | 7856e3a4 | Andreas Färber | |
5796 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 745";
|
5797 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_745; |
5798 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5799 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5800 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5801 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5802 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5803 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5804 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
5805 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5806 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5807 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5808 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
5809 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x5; |
5810 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5811 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5812 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5813 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5814 | 7856e3a4 | Andreas Färber | } |
5815 | 7856e3a4 | Andreas Färber | |
5816 | bd928eba | j_mayer | static void init_proc_755 (CPUPPCState *env) |
5817 | a750fc0b | j_mayer | { |
5818 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5819 | bd928eba | j_mayer | gen_spr_7xx(env); |
5820 | a750fc0b | j_mayer | gen_spr_G2_755(env); |
5821 | a750fc0b | j_mayer | /* Time base */
|
5822 | a750fc0b | j_mayer | gen_tbl(env); |
5823 | a750fc0b | j_mayer | /* L2 cache control */
|
5824 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5825 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
5826 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5827 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5828 | a750fc0b | j_mayer | 0x00000000);
|
5829 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5830 | a750fc0b | j_mayer | spr_register(env, SPR_L2PMCR, "L2PMCR",
|
5831 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5832 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5833 | a750fc0b | j_mayer | 0x00000000);
|
5834 | bd928eba | j_mayer | /* Thermal management */
|
5835 | bd928eba | j_mayer | gen_spr_thrm(env); |
5836 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
5837 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5838 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
5839 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5840 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5841 | a750fc0b | j_mayer | 0x00000000);
|
5842 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5843 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
5844 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5845 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5846 | a750fc0b | j_mayer | 0x00000000);
|
5847 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5848 | a750fc0b | j_mayer | spr_register(env, SPR_HID2, "HID2",
|
5849 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5850 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5851 | a750fc0b | j_mayer | 0x00000000);
|
5852 | a750fc0b | j_mayer | /* Memory management */
|
5853 | a750fc0b | j_mayer | gen_low_BATs(env); |
5854 | a750fc0b | j_mayer | gen_high_BATs(env); |
5855 | a750fc0b | j_mayer | gen_6xx_7xx_soft_tlb(env, 64, 2); |
5856 | 7a3a6927 | j_mayer | init_excp_7x5(env); |
5857 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5858 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5859 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5860 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5861 | a750fc0b | j_mayer | } |
5862 | a750fc0b | j_mayer | |
5863 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(755)(ObjectClass *oc, void *data) |
5864 | 7856e3a4 | Andreas Färber | { |
5865 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5866 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5867 | 7856e3a4 | Andreas Färber | |
5868 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 755";
|
5869 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_755; |
5870 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5871 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5872 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5873 | 53116ebf | Andreas Färber | PPC_FLOAT_FRSQRTE | PPC_FLOAT_STFIWX | |
5874 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
5875 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5876 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | PPC_6xx_TLB | |
5877 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN; |
5878 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5879 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000005FF77ULL;
|
5880 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_6xx; |
5881 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_7x5; |
5882 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5883 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_750; |
5884 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
5885 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
5886 | 7856e3a4 | Andreas Färber | } |
5887 | 7856e3a4 | Andreas Färber | |
5888 | a750fc0b | j_mayer | static void init_proc_7400 (CPUPPCState *env) |
5889 | a750fc0b | j_mayer | { |
5890 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5891 | a750fc0b | j_mayer | gen_spr_7xx(env); |
5892 | a750fc0b | j_mayer | /* Time base */
|
5893 | a750fc0b | j_mayer | gen_tbl(env); |
5894 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
5895 | a750fc0b | j_mayer | gen_spr_74xx(env); |
5896 | 4e777442 | j_mayer | /* XXX : not implemented */
|
5897 | 4e777442 | j_mayer | spr_register(env, SPR_UBAMR, "UBAMR",
|
5898 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
5899 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
5900 | 4e777442 | j_mayer | 0x00000000);
|
5901 | 4e777442 | j_mayer | /* XXX: this seems not implemented on all revisions. */
|
5902 | 4e777442 | j_mayer | /* XXX : not implemented */
|
5903 | 4e777442 | j_mayer | spr_register(env, SPR_MSSCR1, "MSSCR1",
|
5904 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5905 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
5906 | 4e777442 | j_mayer | 0x00000000);
|
5907 | a750fc0b | j_mayer | /* Thermal management */
|
5908 | a750fc0b | j_mayer | gen_spr_thrm(env); |
5909 | a750fc0b | j_mayer | /* Memory management */
|
5910 | a750fc0b | j_mayer | gen_low_BATs(env); |
5911 | e1833e1f | j_mayer | init_excp_7400(env); |
5912 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5913 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5914 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5915 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5916 | a750fc0b | j_mayer | } |
5917 | a750fc0b | j_mayer | |
5918 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7400)(ObjectClass *oc, void *data) |
5919 | 7856e3a4 | Andreas Färber | { |
5920 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5921 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5922 | 7856e3a4 | Andreas Färber | |
5923 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7400 (aka G4)";
|
5924 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7400; |
5925 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5926 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5927 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5928 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
5929 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
5930 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
5931 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
5932 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5933 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
5934 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | |
5935 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
5936 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
5937 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
5938 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
5939 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
5940 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
5941 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
5942 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
5943 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
5944 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
5945 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
5946 | 7856e3a4 | Andreas Färber | } |
5947 | 7856e3a4 | Andreas Färber | |
5948 | a750fc0b | j_mayer | static void init_proc_7410 (CPUPPCState *env) |
5949 | a750fc0b | j_mayer | { |
5950 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
5951 | a750fc0b | j_mayer | gen_spr_7xx(env); |
5952 | a750fc0b | j_mayer | /* Time base */
|
5953 | a750fc0b | j_mayer | gen_tbl(env); |
5954 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
5955 | a750fc0b | j_mayer | gen_spr_74xx(env); |
5956 | 4e777442 | j_mayer | /* XXX : not implemented */
|
5957 | 4e777442 | j_mayer | spr_register(env, SPR_UBAMR, "UBAMR",
|
5958 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
5959 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
5960 | 4e777442 | j_mayer | 0x00000000);
|
5961 | a750fc0b | j_mayer | /* Thermal management */
|
5962 | a750fc0b | j_mayer | gen_spr_thrm(env); |
5963 | a750fc0b | j_mayer | /* L2PMCR */
|
5964 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5965 | a750fc0b | j_mayer | spr_register(env, SPR_L2PMCR, "L2PMCR",
|
5966 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5967 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5968 | a750fc0b | j_mayer | 0x00000000);
|
5969 | a750fc0b | j_mayer | /* LDSTDB */
|
5970 | a750fc0b | j_mayer | /* XXX : not implemented */
|
5971 | a750fc0b | j_mayer | spr_register(env, SPR_LDSTDB, "LDSTDB",
|
5972 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
5973 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
5974 | a750fc0b | j_mayer | 0x00000000);
|
5975 | a750fc0b | j_mayer | /* Memory management */
|
5976 | a750fc0b | j_mayer | gen_low_BATs(env); |
5977 | e1833e1f | j_mayer | init_excp_7400(env); |
5978 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
5979 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
5980 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
5981 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
5982 | a750fc0b | j_mayer | } |
5983 | a750fc0b | j_mayer | |
5984 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7410)(ObjectClass *oc, void *data) |
5985 | 7856e3a4 | Andreas Färber | { |
5986 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
5987 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
5988 | 7856e3a4 | Andreas Färber | |
5989 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7410 (aka G4)";
|
5990 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7410; |
5991 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0; |
5992 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
5993 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
5994 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
5995 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
5996 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
5997 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
5998 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
5999 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6000 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | |
6001 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6002 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6003 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6004 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6005 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_32B; |
6006 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6007 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6008 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6009 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6010 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6011 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6012 | 7856e3a4 | Andreas Färber | } |
6013 | 7856e3a4 | Andreas Färber | |
6014 | a750fc0b | j_mayer | static void init_proc_7440 (CPUPPCState *env) |
6015 | a750fc0b | j_mayer | { |
6016 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6017 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6018 | a750fc0b | j_mayer | /* Time base */
|
6019 | a750fc0b | j_mayer | gen_tbl(env); |
6020 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
6021 | a750fc0b | j_mayer | gen_spr_74xx(env); |
6022 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6023 | 4e777442 | j_mayer | spr_register(env, SPR_UBAMR, "UBAMR",
|
6024 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6025 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6026 | 4e777442 | j_mayer | 0x00000000);
|
6027 | a750fc0b | j_mayer | /* LDSTCR */
|
6028 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6029 | a750fc0b | j_mayer | spr_register(env, SPR_LDSTCR, "LDSTCR",
|
6030 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6031 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6032 | a750fc0b | j_mayer | 0x00000000);
|
6033 | a750fc0b | j_mayer | /* ICTRL */
|
6034 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6035 | a750fc0b | j_mayer | spr_register(env, SPR_ICTRL, "ICTRL",
|
6036 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6037 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6038 | a750fc0b | j_mayer | 0x00000000);
|
6039 | a750fc0b | j_mayer | /* MSSSR0 */
|
6040 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6041 | a750fc0b | j_mayer | spr_register(env, SPR_MSSSR0, "MSSSR0",
|
6042 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6043 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6044 | a750fc0b | j_mayer | 0x00000000);
|
6045 | a750fc0b | j_mayer | /* PMC */
|
6046 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6047 | a750fc0b | j_mayer | spr_register(env, SPR_PMC5, "PMC5",
|
6048 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6049 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6050 | a750fc0b | j_mayer | 0x00000000);
|
6051 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6052 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC5, "UPMC5",
|
6053 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6054 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6055 | a750fc0b | j_mayer | 0x00000000);
|
6056 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6057 | a750fc0b | j_mayer | spr_register(env, SPR_PMC6, "PMC6",
|
6058 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6059 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6060 | a750fc0b | j_mayer | 0x00000000);
|
6061 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6062 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC6, "UPMC6",
|
6063 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6064 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6065 | a750fc0b | j_mayer | 0x00000000);
|
6066 | a750fc0b | j_mayer | /* Memory management */
|
6067 | a750fc0b | j_mayer | gen_low_BATs(env); |
6068 | 578bb252 | j_mayer | gen_74xx_soft_tlb(env, 128, 2); |
6069 | 1c27f8fb | j_mayer | init_excp_7450(env); |
6070 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
6071 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
6072 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6073 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
6074 | a750fc0b | j_mayer | } |
6075 | a750fc0b | j_mayer | |
6076 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7440)(ObjectClass *oc, void *data) |
6077 | 7856e3a4 | Andreas Färber | { |
6078 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6079 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6080 | 7856e3a4 | Andreas Färber | |
6081 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7440 (aka G4)";
|
6082 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7440; |
6083 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0_74xx; |
6084 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6085 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6086 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6087 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6088 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
6089 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
6090 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6091 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6092 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | PPC_74xx_TLB | |
6093 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6094 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6095 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6096 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6097 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_74xx; |
6098 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6099 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6100 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6101 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6102 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6103 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6104 | 7856e3a4 | Andreas Färber | } |
6105 | 7856e3a4 | Andreas Färber | |
6106 | a750fc0b | j_mayer | static void init_proc_7450 (CPUPPCState *env) |
6107 | a750fc0b | j_mayer | { |
6108 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6109 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6110 | a750fc0b | j_mayer | /* Time base */
|
6111 | a750fc0b | j_mayer | gen_tbl(env); |
6112 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
6113 | a750fc0b | j_mayer | gen_spr_74xx(env); |
6114 | a750fc0b | j_mayer | /* Level 3 cache control */
|
6115 | a750fc0b | j_mayer | gen_l3_ctrl(env); |
6116 | 4e777442 | j_mayer | /* L3ITCR1 */
|
6117 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6118 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR1, "L3ITCR1",
|
6119 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6120 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6121 | 4e777442 | j_mayer | 0x00000000);
|
6122 | 4e777442 | j_mayer | /* L3ITCR2 */
|
6123 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6124 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR2, "L3ITCR2",
|
6125 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6126 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6127 | 4e777442 | j_mayer | 0x00000000);
|
6128 | 4e777442 | j_mayer | /* L3ITCR3 */
|
6129 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6130 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR3, "L3ITCR3",
|
6131 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6132 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6133 | 4e777442 | j_mayer | 0x00000000);
|
6134 | 4e777442 | j_mayer | /* L3OHCR */
|
6135 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6136 | 4e777442 | j_mayer | spr_register(env, SPR_L3OHCR, "L3OHCR",
|
6137 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6138 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6139 | 4e777442 | j_mayer | 0x00000000);
|
6140 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6141 | 4e777442 | j_mayer | spr_register(env, SPR_UBAMR, "UBAMR",
|
6142 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6143 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6144 | 4e777442 | j_mayer | 0x00000000);
|
6145 | a750fc0b | j_mayer | /* LDSTCR */
|
6146 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6147 | a750fc0b | j_mayer | spr_register(env, SPR_LDSTCR, "LDSTCR",
|
6148 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6149 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6150 | a750fc0b | j_mayer | 0x00000000);
|
6151 | a750fc0b | j_mayer | /* ICTRL */
|
6152 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6153 | a750fc0b | j_mayer | spr_register(env, SPR_ICTRL, "ICTRL",
|
6154 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6155 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6156 | a750fc0b | j_mayer | 0x00000000);
|
6157 | a750fc0b | j_mayer | /* MSSSR0 */
|
6158 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6159 | a750fc0b | j_mayer | spr_register(env, SPR_MSSSR0, "MSSSR0",
|
6160 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6161 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6162 | a750fc0b | j_mayer | 0x00000000);
|
6163 | a750fc0b | j_mayer | /* PMC */
|
6164 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6165 | a750fc0b | j_mayer | spr_register(env, SPR_PMC5, "PMC5",
|
6166 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6167 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6168 | a750fc0b | j_mayer | 0x00000000);
|
6169 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6170 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC5, "UPMC5",
|
6171 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6172 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6173 | a750fc0b | j_mayer | 0x00000000);
|
6174 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6175 | a750fc0b | j_mayer | spr_register(env, SPR_PMC6, "PMC6",
|
6176 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6177 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6178 | a750fc0b | j_mayer | 0x00000000);
|
6179 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6180 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC6, "UPMC6",
|
6181 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6182 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6183 | a750fc0b | j_mayer | 0x00000000);
|
6184 | a750fc0b | j_mayer | /* Memory management */
|
6185 | a750fc0b | j_mayer | gen_low_BATs(env); |
6186 | 578bb252 | j_mayer | gen_74xx_soft_tlb(env, 128, 2); |
6187 | e1833e1f | j_mayer | init_excp_7450(env); |
6188 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
6189 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
6190 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6191 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
6192 | a750fc0b | j_mayer | } |
6193 | a750fc0b | j_mayer | |
6194 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7450)(ObjectClass *oc, void *data) |
6195 | 7856e3a4 | Andreas Färber | { |
6196 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6197 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6198 | 7856e3a4 | Andreas Färber | |
6199 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7450 (aka G4)";
|
6200 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7450; |
6201 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0_74xx; |
6202 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6203 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6204 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6205 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6206 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
6207 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
6208 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6209 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6210 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | PPC_74xx_TLB | |
6211 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6212 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6213 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6214 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6215 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_74xx; |
6216 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6217 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6218 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6219 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6220 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6221 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6222 | 7856e3a4 | Andreas Färber | } |
6223 | 7856e3a4 | Andreas Färber | |
6224 | a750fc0b | j_mayer | static void init_proc_7445 (CPUPPCState *env) |
6225 | a750fc0b | j_mayer | { |
6226 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6227 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6228 | a750fc0b | j_mayer | /* Time base */
|
6229 | a750fc0b | j_mayer | gen_tbl(env); |
6230 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
6231 | a750fc0b | j_mayer | gen_spr_74xx(env); |
6232 | a750fc0b | j_mayer | /* LDSTCR */
|
6233 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6234 | a750fc0b | j_mayer | spr_register(env, SPR_LDSTCR, "LDSTCR",
|
6235 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6236 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6237 | a750fc0b | j_mayer | 0x00000000);
|
6238 | a750fc0b | j_mayer | /* ICTRL */
|
6239 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6240 | a750fc0b | j_mayer | spr_register(env, SPR_ICTRL, "ICTRL",
|
6241 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6242 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6243 | a750fc0b | j_mayer | 0x00000000);
|
6244 | a750fc0b | j_mayer | /* MSSSR0 */
|
6245 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6246 | a750fc0b | j_mayer | spr_register(env, SPR_MSSSR0, "MSSSR0",
|
6247 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6248 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6249 | a750fc0b | j_mayer | 0x00000000);
|
6250 | a750fc0b | j_mayer | /* PMC */
|
6251 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6252 | a750fc0b | j_mayer | spr_register(env, SPR_PMC5, "PMC5",
|
6253 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6254 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6255 | a750fc0b | j_mayer | 0x00000000);
|
6256 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6257 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC5, "UPMC5",
|
6258 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6259 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6260 | a750fc0b | j_mayer | 0x00000000);
|
6261 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6262 | a750fc0b | j_mayer | spr_register(env, SPR_PMC6, "PMC6",
|
6263 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6264 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6265 | a750fc0b | j_mayer | 0x00000000);
|
6266 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6267 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC6, "UPMC6",
|
6268 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6269 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6270 | a750fc0b | j_mayer | 0x00000000);
|
6271 | a750fc0b | j_mayer | /* SPRGs */
|
6272 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
6273 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6274 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6275 | a750fc0b | j_mayer | 0x00000000);
|
6276 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
6277 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6278 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6279 | a750fc0b | j_mayer | 0x00000000);
|
6280 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
6281 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6282 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6283 | a750fc0b | j_mayer | 0x00000000);
|
6284 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
6285 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6286 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6287 | a750fc0b | j_mayer | 0x00000000);
|
6288 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
6289 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6290 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6291 | a750fc0b | j_mayer | 0x00000000);
|
6292 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
6293 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6294 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6295 | a750fc0b | j_mayer | 0x00000000);
|
6296 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
6297 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6298 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6299 | a750fc0b | j_mayer | 0x00000000);
|
6300 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
6301 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6302 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6303 | a750fc0b | j_mayer | 0x00000000);
|
6304 | a750fc0b | j_mayer | /* Memory management */
|
6305 | a750fc0b | j_mayer | gen_low_BATs(env); |
6306 | a750fc0b | j_mayer | gen_high_BATs(env); |
6307 | 578bb252 | j_mayer | gen_74xx_soft_tlb(env, 128, 2); |
6308 | e1833e1f | j_mayer | init_excp_7450(env); |
6309 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
6310 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
6311 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6312 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
6313 | a750fc0b | j_mayer | } |
6314 | a750fc0b | j_mayer | |
6315 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7445)(ObjectClass *oc, void *data) |
6316 | 7856e3a4 | Andreas Färber | { |
6317 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6318 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6319 | 7856e3a4 | Andreas Färber | |
6320 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7445 (aka G4)";
|
6321 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7445; |
6322 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0_74xx; |
6323 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6324 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6325 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6326 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6327 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
6328 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
6329 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6330 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6331 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | PPC_74xx_TLB | |
6332 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6333 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6334 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6335 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6336 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_74xx; |
6337 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6338 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6339 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6340 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6341 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6342 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6343 | 7856e3a4 | Andreas Färber | } |
6344 | 7856e3a4 | Andreas Färber | |
6345 | a750fc0b | j_mayer | static void init_proc_7455 (CPUPPCState *env) |
6346 | a750fc0b | j_mayer | { |
6347 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6348 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6349 | a750fc0b | j_mayer | /* Time base */
|
6350 | a750fc0b | j_mayer | gen_tbl(env); |
6351 | a750fc0b | j_mayer | /* 74xx specific SPR */
|
6352 | a750fc0b | j_mayer | gen_spr_74xx(env); |
6353 | a750fc0b | j_mayer | /* Level 3 cache control */
|
6354 | a750fc0b | j_mayer | gen_l3_ctrl(env); |
6355 | a750fc0b | j_mayer | /* LDSTCR */
|
6356 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6357 | a750fc0b | j_mayer | spr_register(env, SPR_LDSTCR, "LDSTCR",
|
6358 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6359 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6360 | a750fc0b | j_mayer | 0x00000000);
|
6361 | a750fc0b | j_mayer | /* ICTRL */
|
6362 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6363 | a750fc0b | j_mayer | spr_register(env, SPR_ICTRL, "ICTRL",
|
6364 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6365 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6366 | a750fc0b | j_mayer | 0x00000000);
|
6367 | a750fc0b | j_mayer | /* MSSSR0 */
|
6368 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6369 | a750fc0b | j_mayer | spr_register(env, SPR_MSSSR0, "MSSSR0",
|
6370 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6371 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6372 | a750fc0b | j_mayer | 0x00000000);
|
6373 | a750fc0b | j_mayer | /* PMC */
|
6374 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6375 | a750fc0b | j_mayer | spr_register(env, SPR_PMC5, "PMC5",
|
6376 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6377 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6378 | a750fc0b | j_mayer | 0x00000000);
|
6379 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6380 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC5, "UPMC5",
|
6381 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6382 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6383 | a750fc0b | j_mayer | 0x00000000);
|
6384 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6385 | a750fc0b | j_mayer | spr_register(env, SPR_PMC6, "PMC6",
|
6386 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6387 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6388 | a750fc0b | j_mayer | 0x00000000);
|
6389 | 578bb252 | j_mayer | /* XXX : not implemented */
|
6390 | a750fc0b | j_mayer | spr_register(env, SPR_UPMC6, "UPMC6",
|
6391 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6392 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6393 | a750fc0b | j_mayer | 0x00000000);
|
6394 | a750fc0b | j_mayer | /* SPRGs */
|
6395 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
6396 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6397 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6398 | a750fc0b | j_mayer | 0x00000000);
|
6399 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
6400 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6401 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6402 | a750fc0b | j_mayer | 0x00000000);
|
6403 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
6404 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6405 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6406 | a750fc0b | j_mayer | 0x00000000);
|
6407 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
6408 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6409 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6410 | a750fc0b | j_mayer | 0x00000000);
|
6411 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
6412 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6413 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6414 | a750fc0b | j_mayer | 0x00000000);
|
6415 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
6416 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6417 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6418 | a750fc0b | j_mayer | 0x00000000);
|
6419 | a750fc0b | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
6420 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6421 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6422 | a750fc0b | j_mayer | 0x00000000);
|
6423 | a750fc0b | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
6424 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6425 | a750fc0b | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6426 | a750fc0b | j_mayer | 0x00000000);
|
6427 | a750fc0b | j_mayer | /* Memory management */
|
6428 | a750fc0b | j_mayer | gen_low_BATs(env); |
6429 | a750fc0b | j_mayer | gen_high_BATs(env); |
6430 | 578bb252 | j_mayer | gen_74xx_soft_tlb(env, 128, 2); |
6431 | e1833e1f | j_mayer | init_excp_7450(env); |
6432 | d63001d1 | j_mayer | env->dcache_line_size = 32;
|
6433 | d63001d1 | j_mayer | env->icache_line_size = 32;
|
6434 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6435 | a750fc0b | j_mayer | ppc6xx_irq_init(env); |
6436 | a750fc0b | j_mayer | } |
6437 | a750fc0b | j_mayer | |
6438 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7455)(ObjectClass *oc, void *data) |
6439 | 7856e3a4 | Andreas Färber | { |
6440 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6441 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6442 | 7856e3a4 | Andreas Färber | |
6443 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7455 (aka G4)";
|
6444 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7455; |
6445 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0_74xx; |
6446 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6447 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6448 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6449 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6450 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
6451 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
6452 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6453 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6454 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | PPC_74xx_TLB | |
6455 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6456 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6457 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6458 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6459 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_74xx; |
6460 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6461 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6462 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6463 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6464 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6465 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6466 | 7856e3a4 | Andreas Färber | } |
6467 | 7856e3a4 | Andreas Färber | |
6468 | 4e777442 | j_mayer | static void init_proc_7457 (CPUPPCState *env) |
6469 | 4e777442 | j_mayer | { |
6470 | 4e777442 | j_mayer | gen_spr_ne_601(env); |
6471 | 4e777442 | j_mayer | gen_spr_7xx(env); |
6472 | 4e777442 | j_mayer | /* Time base */
|
6473 | 4e777442 | j_mayer | gen_tbl(env); |
6474 | 4e777442 | j_mayer | /* 74xx specific SPR */
|
6475 | 4e777442 | j_mayer | gen_spr_74xx(env); |
6476 | 4e777442 | j_mayer | /* Level 3 cache control */
|
6477 | 4e777442 | j_mayer | gen_l3_ctrl(env); |
6478 | 4e777442 | j_mayer | /* L3ITCR1 */
|
6479 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6480 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR1, "L3ITCR1",
|
6481 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6482 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6483 | 4e777442 | j_mayer | 0x00000000);
|
6484 | 4e777442 | j_mayer | /* L3ITCR2 */
|
6485 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6486 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR2, "L3ITCR2",
|
6487 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6488 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6489 | 4e777442 | j_mayer | 0x00000000);
|
6490 | 4e777442 | j_mayer | /* L3ITCR3 */
|
6491 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6492 | 4e777442 | j_mayer | spr_register(env, SPR_L3ITCR3, "L3ITCR3",
|
6493 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6494 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6495 | 4e777442 | j_mayer | 0x00000000);
|
6496 | 4e777442 | j_mayer | /* L3OHCR */
|
6497 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6498 | 4e777442 | j_mayer | spr_register(env, SPR_L3OHCR, "L3OHCR",
|
6499 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6500 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6501 | 4e777442 | j_mayer | 0x00000000);
|
6502 | 4e777442 | j_mayer | /* LDSTCR */
|
6503 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6504 | 4e777442 | j_mayer | spr_register(env, SPR_LDSTCR, "LDSTCR",
|
6505 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6506 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6507 | 4e777442 | j_mayer | 0x00000000);
|
6508 | 4e777442 | j_mayer | /* ICTRL */
|
6509 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6510 | 4e777442 | j_mayer | spr_register(env, SPR_ICTRL, "ICTRL",
|
6511 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6512 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6513 | 4e777442 | j_mayer | 0x00000000);
|
6514 | 4e777442 | j_mayer | /* MSSSR0 */
|
6515 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6516 | 4e777442 | j_mayer | spr_register(env, SPR_MSSSR0, "MSSSR0",
|
6517 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6518 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6519 | 4e777442 | j_mayer | 0x00000000);
|
6520 | 4e777442 | j_mayer | /* PMC */
|
6521 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6522 | 4e777442 | j_mayer | spr_register(env, SPR_PMC5, "PMC5",
|
6523 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6524 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6525 | 4e777442 | j_mayer | 0x00000000);
|
6526 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6527 | 4e777442 | j_mayer | spr_register(env, SPR_UPMC5, "UPMC5",
|
6528 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6529 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6530 | 4e777442 | j_mayer | 0x00000000);
|
6531 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6532 | 4e777442 | j_mayer | spr_register(env, SPR_PMC6, "PMC6",
|
6533 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6534 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6535 | 4e777442 | j_mayer | 0x00000000);
|
6536 | 4e777442 | j_mayer | /* XXX : not implemented */
|
6537 | 4e777442 | j_mayer | spr_register(env, SPR_UPMC6, "UPMC6",
|
6538 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6539 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6540 | 4e777442 | j_mayer | 0x00000000);
|
6541 | 4e777442 | j_mayer | /* SPRGs */
|
6542 | 4e777442 | j_mayer | spr_register(env, SPR_SPRG4, "SPRG4",
|
6543 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6544 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6545 | 4e777442 | j_mayer | 0x00000000);
|
6546 | 4e777442 | j_mayer | spr_register(env, SPR_USPRG4, "USPRG4",
|
6547 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6548 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6549 | 4e777442 | j_mayer | 0x00000000);
|
6550 | 4e777442 | j_mayer | spr_register(env, SPR_SPRG5, "SPRG5",
|
6551 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6552 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6553 | 4e777442 | j_mayer | 0x00000000);
|
6554 | 4e777442 | j_mayer | spr_register(env, SPR_USPRG5, "USPRG5",
|
6555 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6556 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6557 | 4e777442 | j_mayer | 0x00000000);
|
6558 | 4e777442 | j_mayer | spr_register(env, SPR_SPRG6, "SPRG6",
|
6559 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6560 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6561 | 4e777442 | j_mayer | 0x00000000);
|
6562 | 4e777442 | j_mayer | spr_register(env, SPR_USPRG6, "USPRG6",
|
6563 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6564 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6565 | 4e777442 | j_mayer | 0x00000000);
|
6566 | 4e777442 | j_mayer | spr_register(env, SPR_SPRG7, "SPRG7",
|
6567 | 4e777442 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6568 | 4e777442 | j_mayer | &spr_read_generic, &spr_write_generic, |
6569 | 4e777442 | j_mayer | 0x00000000);
|
6570 | 4e777442 | j_mayer | spr_register(env, SPR_USPRG7, "USPRG7",
|
6571 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6572 | 4e777442 | j_mayer | &spr_read_ureg, SPR_NOACCESS, |
6573 | 4e777442 | j_mayer | 0x00000000);
|
6574 | 4e777442 | j_mayer | /* Memory management */
|
6575 | 4e777442 | j_mayer | gen_low_BATs(env); |
6576 | 4e777442 | j_mayer | gen_high_BATs(env); |
6577 | 4e777442 | j_mayer | gen_74xx_soft_tlb(env, 128, 2); |
6578 | 4e777442 | j_mayer | init_excp_7450(env); |
6579 | 4e777442 | j_mayer | env->dcache_line_size = 32;
|
6580 | 4e777442 | j_mayer | env->icache_line_size = 32;
|
6581 | 4e777442 | j_mayer | /* Allocate hardware IRQ controller */
|
6582 | 4e777442 | j_mayer | ppc6xx_irq_init(env); |
6583 | 4e777442 | j_mayer | } |
6584 | 4e777442 | j_mayer | |
6585 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(7457)(ObjectClass *oc, void *data) |
6586 | 7856e3a4 | Andreas Färber | { |
6587 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6588 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6589 | 7856e3a4 | Andreas Färber | |
6590 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 7457 (aka G4)";
|
6591 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_7457; |
6592 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_hid0_74xx; |
6593 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6594 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6595 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6596 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6597 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | |
6598 | 53116ebf | Andreas Färber | PPC_CACHE_DCBA | PPC_CACHE_DCBZ | |
6599 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6600 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6601 | 53116ebf | Andreas Färber | PPC_MEM_TLBIA | PPC_74xx_TLB | |
6602 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
6603 | 53116ebf | Andreas Färber | PPC_ALTIVEC; |
6604 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6605 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x000000000205FF77ULL;
|
6606 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_SOFT_74xx; |
6607 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_74xx; |
6608 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
6609 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc_7400; |
6610 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6611 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6612 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6613 | 7856e3a4 | Andreas Färber | } |
6614 | 7856e3a4 | Andreas Färber | |
6615 | a750fc0b | j_mayer | #if defined (TARGET_PPC64)
|
6616 | 417bf010 | j_mayer | #if defined(CONFIG_USER_ONLY)
|
6617 | 417bf010 | j_mayer | #define POWERPC970_HID5_INIT 0x00000080 |
6618 | 417bf010 | j_mayer | #else
|
6619 | 417bf010 | j_mayer | #define POWERPC970_HID5_INIT 0x00000000 |
6620 | 417bf010 | j_mayer | #endif
|
6621 | 417bf010 | j_mayer | |
6622 | 2f462816 | j_mayer | static int check_pow_970 (CPUPPCState *env) |
6623 | 2f462816 | j_mayer | { |
6624 | 2f462816 | j_mayer | if (env->spr[SPR_HID0] & 0x00600000) |
6625 | 2f462816 | j_mayer | return 1; |
6626 | 2f462816 | j_mayer | |
6627 | 2f462816 | j_mayer | return 0; |
6628 | 2f462816 | j_mayer | } |
6629 | 2f462816 | j_mayer | |
6630 | a750fc0b | j_mayer | static void init_proc_970 (CPUPPCState *env) |
6631 | a750fc0b | j_mayer | { |
6632 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6633 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6634 | a750fc0b | j_mayer | /* Time base */
|
6635 | a750fc0b | j_mayer | gen_tbl(env); |
6636 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
6637 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6638 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
6639 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6640 | 06403421 | j_mayer | &spr_read_generic, &spr_write_clear, |
6641 | d63001d1 | j_mayer | 0x60000000);
|
6642 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6643 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
6644 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6645 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6646 | a750fc0b | j_mayer | 0x00000000);
|
6647 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6648 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
6649 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6650 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6651 | a750fc0b | j_mayer | 0x00000000);
|
6652 | e57448f1 | j_mayer | /* XXX : not implemented */
|
6653 | e57448f1 | j_mayer | spr_register(env, SPR_970_HID5, "HID5",
|
6654 | e57448f1 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6655 | e57448f1 | j_mayer | &spr_read_generic, &spr_write_generic, |
6656 | 417bf010 | j_mayer | POWERPC970_HID5_INIT); |
6657 | bd928eba | j_mayer | /* XXX : not implemented */
|
6658 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
6659 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6660 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
6661 | bd928eba | j_mayer | 0x00000000);
|
6662 | a750fc0b | j_mayer | /* Memory management */
|
6663 | a750fc0b | j_mayer | /* XXX: not correct */
|
6664 | a750fc0b | j_mayer | gen_low_BATs(env); |
6665 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6666 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
6667 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6668 | 12de9a39 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
6669 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6670 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6671 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
6672 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6673 | 12de9a39 | j_mayer | &spr_read_generic, &spr_write_generic, |
6674 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6675 | 12de9a39 | j_mayer | spr_register(env, SPR_HIOR, "SPR_HIOR",
|
6676 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6677 | 2adab7d6 | blueswir1 | &spr_read_hior, &spr_write_hior, |
6678 | 2adab7d6 | blueswir1 | 0x00000000);
|
6679 | 12de9a39 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
6680 | 12de9a39 | j_mayer | env->slb_nr = 32;
|
6681 | f2e63a42 | j_mayer | #endif
|
6682 | e1833e1f | j_mayer | init_excp_970(env); |
6683 | d63001d1 | j_mayer | env->dcache_line_size = 128;
|
6684 | d63001d1 | j_mayer | env->icache_line_size = 128;
|
6685 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6686 | a750fc0b | j_mayer | ppc970_irq_init(env); |
6687 | cf8358c8 | aurel32 | /* Can't find information on what this should be on reset. This
|
6688 | cf8358c8 | aurel32 | * value is the one used by 74xx processors. */
|
6689 | cf8358c8 | aurel32 | vscr_init(env, 0x00010000);
|
6690 | a750fc0b | j_mayer | } |
6691 | a750fc0b | j_mayer | |
6692 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(970)(ObjectClass *oc, void *data) |
6693 | 7856e3a4 | Andreas Färber | { |
6694 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6695 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6696 | 7856e3a4 | Andreas Färber | |
6697 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 970";
|
6698 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_970; |
6699 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_970; |
6700 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6701 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6702 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6703 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6704 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
6705 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6706 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6707 | 53116ebf | Andreas Färber | PPC_64B | PPC_ALTIVEC | |
6708 | 53116ebf | Andreas Färber | PPC_SEGMENT_64B | PPC_SLBI; |
6709 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6710 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x900000000204FF36ULL;
|
6711 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_64B; |
6712 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_970; |
6713 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_970; |
6714 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
6715 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6716 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6717 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6718 | 7856e3a4 | Andreas Färber | } |
6719 | 7856e3a4 | Andreas Färber | |
6720 | 2f462816 | j_mayer | static int check_pow_970FX (CPUPPCState *env) |
6721 | 2f462816 | j_mayer | { |
6722 | 2f462816 | j_mayer | if (env->spr[SPR_HID0] & 0x00600000) |
6723 | 2f462816 | j_mayer | return 1; |
6724 | 2f462816 | j_mayer | |
6725 | 2f462816 | j_mayer | return 0; |
6726 | 2f462816 | j_mayer | } |
6727 | 2f462816 | j_mayer | |
6728 | a750fc0b | j_mayer | static void init_proc_970FX (CPUPPCState *env) |
6729 | a750fc0b | j_mayer | { |
6730 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6731 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6732 | a750fc0b | j_mayer | /* Time base */
|
6733 | a750fc0b | j_mayer | gen_tbl(env); |
6734 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
6735 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6736 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
6737 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6738 | 06403421 | j_mayer | &spr_read_generic, &spr_write_clear, |
6739 | d63001d1 | j_mayer | 0x60000000);
|
6740 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6741 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
6742 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6743 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6744 | a750fc0b | j_mayer | 0x00000000);
|
6745 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6746 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
6747 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6748 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6749 | a750fc0b | j_mayer | 0x00000000);
|
6750 | d63001d1 | j_mayer | /* XXX : not implemented */
|
6751 | d63001d1 | j_mayer | spr_register(env, SPR_970_HID5, "HID5",
|
6752 | d63001d1 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6753 | d63001d1 | j_mayer | &spr_read_generic, &spr_write_generic, |
6754 | 417bf010 | j_mayer | POWERPC970_HID5_INIT); |
6755 | bd928eba | j_mayer | /* XXX : not implemented */
|
6756 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
6757 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6758 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
6759 | bd928eba | j_mayer | 0x00000000);
|
6760 | a750fc0b | j_mayer | /* Memory management */
|
6761 | a750fc0b | j_mayer | /* XXX: not correct */
|
6762 | a750fc0b | j_mayer | gen_low_BATs(env); |
6763 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6764 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
6765 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6766 | 12de9a39 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
6767 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6768 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6769 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
6770 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6771 | 12de9a39 | j_mayer | &spr_read_generic, &spr_write_generic, |
6772 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6773 | 12de9a39 | j_mayer | spr_register(env, SPR_HIOR, "SPR_HIOR",
|
6774 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6775 | 2adab7d6 | blueswir1 | &spr_read_hior, &spr_write_hior, |
6776 | 2adab7d6 | blueswir1 | 0x00000000);
|
6777 | 4e98d8cf | blueswir1 | spr_register(env, SPR_CTRL, "SPR_CTRL",
|
6778 | 4e98d8cf | blueswir1 | SPR_NOACCESS, SPR_NOACCESS, |
6779 | 4e98d8cf | blueswir1 | &spr_read_generic, &spr_write_generic, |
6780 | 4e98d8cf | blueswir1 | 0x00000000);
|
6781 | 4e98d8cf | blueswir1 | spr_register(env, SPR_UCTRL, "SPR_UCTRL",
|
6782 | 4e98d8cf | blueswir1 | SPR_NOACCESS, SPR_NOACCESS, |
6783 | 4e98d8cf | blueswir1 | &spr_read_generic, &spr_write_generic, |
6784 | 4e98d8cf | blueswir1 | 0x00000000);
|
6785 | 4e98d8cf | blueswir1 | spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
|
6786 | 4e98d8cf | blueswir1 | &spr_read_generic, &spr_write_generic, |
6787 | 4e98d8cf | blueswir1 | &spr_read_generic, &spr_write_generic, |
6788 | 4e98d8cf | blueswir1 | 0x00000000);
|
6789 | 12de9a39 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
6790 | 8eee0af9 | blueswir1 | env->slb_nr = 64;
|
6791 | f2e63a42 | j_mayer | #endif
|
6792 | e1833e1f | j_mayer | init_excp_970(env); |
6793 | d63001d1 | j_mayer | env->dcache_line_size = 128;
|
6794 | d63001d1 | j_mayer | env->icache_line_size = 128;
|
6795 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6796 | a750fc0b | j_mayer | ppc970_irq_init(env); |
6797 | cf8358c8 | aurel32 | /* Can't find information on what this should be on reset. This
|
6798 | cf8358c8 | aurel32 | * value is the one used by 74xx processors. */
|
6799 | cf8358c8 | aurel32 | vscr_init(env, 0x00010000);
|
6800 | a750fc0b | j_mayer | } |
6801 | a750fc0b | j_mayer | |
6802 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(970FX)(ObjectClass *oc, void *data) |
6803 | 7856e3a4 | Andreas Färber | { |
6804 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6805 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6806 | 7856e3a4 | Andreas Färber | |
6807 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 970FX (aka G5)";
|
6808 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_970FX; |
6809 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_970FX; |
6810 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6811 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6812 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6813 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6814 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
6815 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6816 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6817 | 53116ebf | Andreas Färber | PPC_64B | PPC_ALTIVEC | |
6818 | 53116ebf | Andreas Färber | PPC_SEGMENT_64B | PPC_SLBI; |
6819 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6820 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x800000000204FF36ULL;
|
6821 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_64B; |
6822 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_970; |
6823 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_970; |
6824 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
6825 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6826 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6827 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6828 | 7856e3a4 | Andreas Färber | } |
6829 | 7856e3a4 | Andreas Färber | |
6830 | 2f462816 | j_mayer | static int check_pow_970GX (CPUPPCState *env) |
6831 | 2f462816 | j_mayer | { |
6832 | 2f462816 | j_mayer | if (env->spr[SPR_HID0] & 0x00600000) |
6833 | 2f462816 | j_mayer | return 1; |
6834 | 2f462816 | j_mayer | |
6835 | 2f462816 | j_mayer | return 0; |
6836 | 2f462816 | j_mayer | } |
6837 | 2f462816 | j_mayer | |
6838 | a750fc0b | j_mayer | static void init_proc_970GX (CPUPPCState *env) |
6839 | a750fc0b | j_mayer | { |
6840 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
6841 | a750fc0b | j_mayer | gen_spr_7xx(env); |
6842 | a750fc0b | j_mayer | /* Time base */
|
6843 | a750fc0b | j_mayer | gen_tbl(env); |
6844 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
6845 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6846 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
6847 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6848 | 06403421 | j_mayer | &spr_read_generic, &spr_write_clear, |
6849 | d63001d1 | j_mayer | 0x60000000);
|
6850 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6851 | a750fc0b | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
6852 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6853 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6854 | a750fc0b | j_mayer | 0x00000000);
|
6855 | a750fc0b | j_mayer | /* XXX : not implemented */
|
6856 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
6857 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6858 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
6859 | a750fc0b | j_mayer | 0x00000000);
|
6860 | d63001d1 | j_mayer | /* XXX : not implemented */
|
6861 | d63001d1 | j_mayer | spr_register(env, SPR_970_HID5, "HID5",
|
6862 | d63001d1 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6863 | d63001d1 | j_mayer | &spr_read_generic, &spr_write_generic, |
6864 | 417bf010 | j_mayer | POWERPC970_HID5_INIT); |
6865 | bd928eba | j_mayer | /* XXX : not implemented */
|
6866 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
6867 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6868 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
6869 | bd928eba | j_mayer | 0x00000000);
|
6870 | a750fc0b | j_mayer | /* Memory management */
|
6871 | a750fc0b | j_mayer | /* XXX: not correct */
|
6872 | a750fc0b | j_mayer | gen_low_BATs(env); |
6873 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6874 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
6875 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6876 | 12de9a39 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
6877 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6878 | 12de9a39 | j_mayer | /* XXX : not implemented */
|
6879 | 12de9a39 | j_mayer | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
6880 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6881 | 12de9a39 | j_mayer | &spr_read_generic, &spr_write_generic, |
6882 | 12de9a39 | j_mayer | 0x00000000); /* TOFIX */ |
6883 | 12de9a39 | j_mayer | spr_register(env, SPR_HIOR, "SPR_HIOR",
|
6884 | 12de9a39 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6885 | 2adab7d6 | blueswir1 | &spr_read_hior, &spr_write_hior, |
6886 | 2adab7d6 | blueswir1 | 0x00000000);
|
6887 | 12de9a39 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
6888 | 12de9a39 | j_mayer | env->slb_nr = 32;
|
6889 | f2e63a42 | j_mayer | #endif
|
6890 | e1833e1f | j_mayer | init_excp_970(env); |
6891 | d63001d1 | j_mayer | env->dcache_line_size = 128;
|
6892 | d63001d1 | j_mayer | env->icache_line_size = 128;
|
6893 | a750fc0b | j_mayer | /* Allocate hardware IRQ controller */
|
6894 | a750fc0b | j_mayer | ppc970_irq_init(env); |
6895 | cf8358c8 | aurel32 | /* Can't find information on what this should be on reset. This
|
6896 | cf8358c8 | aurel32 | * value is the one used by 74xx processors. */
|
6897 | cf8358c8 | aurel32 | vscr_init(env, 0x00010000);
|
6898 | a750fc0b | j_mayer | } |
6899 | a750fc0b | j_mayer | |
6900 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(970GX)(ObjectClass *oc, void *data) |
6901 | 7856e3a4 | Andreas Färber | { |
6902 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
6903 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
6904 | 7856e3a4 | Andreas Färber | |
6905 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 970 GX";
|
6906 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_970GX; |
6907 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_970GX; |
6908 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
6909 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
6910 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
6911 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
6912 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
6913 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
6914 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
6915 | 53116ebf | Andreas Färber | PPC_64B | PPC_ALTIVEC | |
6916 | 53116ebf | Andreas Färber | PPC_SEGMENT_64B | PPC_SLBI; |
6917 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
6918 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x800000000204FF36ULL;
|
6919 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_64B; |
6920 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_970; |
6921 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_970; |
6922 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
6923 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
6924 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
6925 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
6926 | 7856e3a4 | Andreas Färber | } |
6927 | 7856e3a4 | Andreas Färber | |
6928 | 2f462816 | j_mayer | static int check_pow_970MP (CPUPPCState *env) |
6929 | 2f462816 | j_mayer | { |
6930 | 2f462816 | j_mayer | if (env->spr[SPR_HID0] & 0x01C00000) |
6931 | 2f462816 | j_mayer | return 1; |
6932 | 2f462816 | j_mayer | |
6933 | 2f462816 | j_mayer | return 0; |
6934 | 2f462816 | j_mayer | } |
6935 | 2f462816 | j_mayer | |
6936 | 2f462816 | j_mayer | static void init_proc_970MP (CPUPPCState *env) |
6937 | 2f462816 | j_mayer | { |
6938 | 2f462816 | j_mayer | gen_spr_ne_601(env); |
6939 | 2f462816 | j_mayer | gen_spr_7xx(env); |
6940 | 2f462816 | j_mayer | /* Time base */
|
6941 | 2f462816 | j_mayer | gen_tbl(env); |
6942 | 2f462816 | j_mayer | /* Hardware implementation registers */
|
6943 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6944 | 2f462816 | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
6945 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6946 | 2f462816 | j_mayer | &spr_read_generic, &spr_write_clear, |
6947 | 2f462816 | j_mayer | 0x60000000);
|
6948 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6949 | 2f462816 | j_mayer | spr_register(env, SPR_HID1, "HID1",
|
6950 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6951 | 2f462816 | j_mayer | &spr_read_generic, &spr_write_generic, |
6952 | 2f462816 | j_mayer | 0x00000000);
|
6953 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6954 | bd928eba | j_mayer | spr_register(env, SPR_750FX_HID2, "HID2",
|
6955 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6956 | 2f462816 | j_mayer | &spr_read_generic, &spr_write_generic, |
6957 | 2f462816 | j_mayer | 0x00000000);
|
6958 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6959 | 2f462816 | j_mayer | spr_register(env, SPR_970_HID5, "HID5",
|
6960 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6961 | 2f462816 | j_mayer | &spr_read_generic, &spr_write_generic, |
6962 | 2f462816 | j_mayer | POWERPC970_HID5_INIT); |
6963 | bd928eba | j_mayer | /* XXX : not implemented */
|
6964 | bd928eba | j_mayer | spr_register(env, SPR_L2CR, "L2CR",
|
6965 | bd928eba | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6966 | bd928eba | j_mayer | &spr_read_generic, &spr_write_generic, |
6967 | bd928eba | j_mayer | 0x00000000);
|
6968 | 2f462816 | j_mayer | /* Memory management */
|
6969 | 2f462816 | j_mayer | /* XXX: not correct */
|
6970 | 2f462816 | j_mayer | gen_low_BATs(env); |
6971 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6972 | 2f462816 | j_mayer | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
6973 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6974 | 2f462816 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
6975 | 2f462816 | j_mayer | 0x00000000); /* TOFIX */ |
6976 | 2f462816 | j_mayer | /* XXX : not implemented */
|
6977 | 2f462816 | j_mayer | spr_register(env, SPR_MMUCSR0, "MMUCSR0",
|
6978 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6979 | 2f462816 | j_mayer | &spr_read_generic, &spr_write_generic, |
6980 | 2f462816 | j_mayer | 0x00000000); /* TOFIX */ |
6981 | 2f462816 | j_mayer | spr_register(env, SPR_HIOR, "SPR_HIOR",
|
6982 | 2f462816 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
6983 | 2adab7d6 | blueswir1 | &spr_read_hior, &spr_write_hior, |
6984 | 2adab7d6 | blueswir1 | 0x00000000);
|
6985 | 2f462816 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
6986 | 2f462816 | j_mayer | env->slb_nr = 32;
|
6987 | 2f462816 | j_mayer | #endif
|
6988 | 2f462816 | j_mayer | init_excp_970(env); |
6989 | 2f462816 | j_mayer | env->dcache_line_size = 128;
|
6990 | 2f462816 | j_mayer | env->icache_line_size = 128;
|
6991 | 2f462816 | j_mayer | /* Allocate hardware IRQ controller */
|
6992 | 2f462816 | j_mayer | ppc970_irq_init(env); |
6993 | cf8358c8 | aurel32 | /* Can't find information on what this should be on reset. This
|
6994 | cf8358c8 | aurel32 | * value is the one used by 74xx processors. */
|
6995 | cf8358c8 | aurel32 | vscr_init(env, 0x00010000);
|
6996 | 2f462816 | j_mayer | } |
6997 | 2f462816 | j_mayer | |
6998 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(970MP)(ObjectClass *oc, void *data) |
6999 | 7856e3a4 | Andreas Färber | { |
7000 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
7001 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
7002 | 7856e3a4 | Andreas Färber | |
7003 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 970 MP";
|
7004 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_970MP; |
7005 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_970MP; |
7006 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
7007 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
7008 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
7009 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
7010 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
7011 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
7012 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
7013 | 53116ebf | Andreas Färber | PPC_64B | PPC_ALTIVEC | |
7014 | 53116ebf | Andreas Färber | PPC_SEGMENT_64B | PPC_SLBI; |
7015 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
7016 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x900000000204FF36ULL;
|
7017 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_64B; |
7018 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_970; |
7019 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_970; |
7020 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
7021 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
7022 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
7023 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK; |
7024 | 7856e3a4 | Andreas Färber | } |
7025 | 7856e3a4 | Andreas Färber | |
7026 | 9d52e907 | David Gibson | static void init_proc_POWER7 (CPUPPCState *env) |
7027 | 9d52e907 | David Gibson | { |
7028 | 9d52e907 | David Gibson | gen_spr_ne_601(env); |
7029 | 9d52e907 | David Gibson | gen_spr_7xx(env); |
7030 | 9d52e907 | David Gibson | /* Time base */
|
7031 | 9d52e907 | David Gibson | gen_tbl(env); |
7032 | 2e06214f | Nathan Whitehorn | /* Processor identification */
|
7033 | 2e06214f | Nathan Whitehorn | spr_register(env, SPR_PIR, "PIR",
|
7034 | 2e06214f | Nathan Whitehorn | SPR_NOACCESS, SPR_NOACCESS, |
7035 | 2e06214f | Nathan Whitehorn | &spr_read_generic, &spr_write_pir, |
7036 | 2e06214f | Nathan Whitehorn | 0x00000000);
|
7037 | 9d52e907 | David Gibson | #if !defined(CONFIG_USER_ONLY)
|
7038 | 9d52e907 | David Gibson | /* PURR & SPURR: Hack - treat these as aliases for the TB for now */
|
7039 | 9d52e907 | David Gibson | spr_register(env, SPR_PURR, "PURR",
|
7040 | 9d52e907 | David Gibson | &spr_read_purr, SPR_NOACCESS, |
7041 | 9d52e907 | David Gibson | &spr_read_purr, SPR_NOACCESS, |
7042 | 9d52e907 | David Gibson | 0x00000000);
|
7043 | 9d52e907 | David Gibson | spr_register(env, SPR_SPURR, "SPURR",
|
7044 | 9d52e907 | David Gibson | &spr_read_purr, SPR_NOACCESS, |
7045 | 9d52e907 | David Gibson | &spr_read_purr, SPR_NOACCESS, |
7046 | 9d52e907 | David Gibson | 0x00000000);
|
7047 | 697ab892 | David Gibson | spr_register(env, SPR_CFAR, "SPR_CFAR",
|
7048 | 697ab892 | David Gibson | SPR_NOACCESS, SPR_NOACCESS, |
7049 | 697ab892 | David Gibson | &spr_read_cfar, &spr_write_cfar, |
7050 | 697ab892 | David Gibson | 0x00000000);
|
7051 | 697ab892 | David Gibson | spr_register(env, SPR_DSCR, "SPR_DSCR",
|
7052 | 697ab892 | David Gibson | SPR_NOACCESS, SPR_NOACCESS, |
7053 | 697ab892 | David Gibson | &spr_read_generic, &spr_write_generic, |
7054 | 697ab892 | David Gibson | 0x00000000);
|
7055 | 9d52e907 | David Gibson | #endif /* !CONFIG_USER_ONLY */ |
7056 | 9d52e907 | David Gibson | /* Memory management */
|
7057 | 9d52e907 | David Gibson | /* XXX : not implemented */
|
7058 | 9d52e907 | David Gibson | spr_register(env, SPR_MMUCFG, "MMUCFG",
|
7059 | 9d52e907 | David Gibson | SPR_NOACCESS, SPR_NOACCESS, |
7060 | 9d52e907 | David Gibson | &spr_read_generic, SPR_NOACCESS, |
7061 | 9d52e907 | David Gibson | 0x00000000); /* TOFIX */ |
7062 | 9d52e907 | David Gibson | /* XXX : not implemented */
|
7063 | 9d52e907 | David Gibson | spr_register(env, SPR_CTRL, "SPR_CTRLT",
|
7064 | 9d52e907 | David Gibson | SPR_NOACCESS, SPR_NOACCESS, |
7065 | 9d52e907 | David Gibson | &spr_read_generic, &spr_write_generic, |
7066 | 9d52e907 | David Gibson | 0x80800000);
|
7067 | 9d52e907 | David Gibson | spr_register(env, SPR_UCTRL, "SPR_CTRLF",
|
7068 | 9d52e907 | David Gibson | SPR_NOACCESS, SPR_NOACCESS, |
7069 | 9d52e907 | David Gibson | &spr_read_generic, &spr_write_generic, |
7070 | 9d52e907 | David Gibson | 0x80800000);
|
7071 | 9d52e907 | David Gibson | spr_register(env, SPR_VRSAVE, "SPR_VRSAVE",
|
7072 | 9d52e907 | David Gibson | &spr_read_generic, &spr_write_generic, |
7073 | 9d52e907 | David Gibson | &spr_read_generic, &spr_write_generic, |
7074 | 9d52e907 | David Gibson | 0x00000000);
|
7075 | 9d52e907 | David Gibson | #if !defined(CONFIG_USER_ONLY)
|
7076 | 9d52e907 | David Gibson | env->slb_nr = 32;
|
7077 | 9d52e907 | David Gibson | #endif
|
7078 | 9d52e907 | David Gibson | init_excp_POWER7(env); |
7079 | 9d52e907 | David Gibson | env->dcache_line_size = 128;
|
7080 | 9d52e907 | David Gibson | env->icache_line_size = 128;
|
7081 | 9d52e907 | David Gibson | /* Allocate hardware IRQ controller */
|
7082 | 9d52e907 | David Gibson | ppcPOWER7_irq_init(env); |
7083 | 9d52e907 | David Gibson | /* Can't find information on what this should be on reset. This
|
7084 | 9d52e907 | David Gibson | * value is the one used by 74xx processors. */
|
7085 | 9d52e907 | David Gibson | vscr_init(env, 0x00010000);
|
7086 | 9d52e907 | David Gibson | } |
7087 | 9d52e907 | David Gibson | |
7088 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data)
|
7089 | 7856e3a4 | Andreas Färber | { |
7090 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
7091 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
7092 | 7856e3a4 | Andreas Färber | |
7093 | ca5dff0a | Andreas Färber | dc->desc = "POWER7";
|
7094 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_POWER7; |
7095 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; |
7096 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
7097 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
7098 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
7099 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
7100 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
7101 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
7102 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
7103 | 53116ebf | Andreas Färber | PPC_64B | PPC_ALTIVEC | |
7104 | 53116ebf | Andreas Färber | PPC_SEGMENT_64B | PPC_SLBI | |
7105 | 53116ebf | Andreas Färber | PPC_POPCNTB | PPC_POPCNTWD; |
7106 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC2_VSX | PPC2_DFP | PPC2_DBRX; |
7107 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x800000000204FF36ULL;
|
7108 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_2_06; |
7109 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_POWER7; |
7110 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_POWER7; |
7111 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
7112 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_VRE | POWERPC_FLAG_SE | |
7113 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BE | POWERPC_FLAG_PMM | |
7114 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_BUS_CLK | POWERPC_FLAG_CFAR; |
7115 | 7856e3a4 | Andreas Färber | } |
7116 | 7856e3a4 | Andreas Färber | |
7117 | a750fc0b | j_mayer | static void init_proc_620 (CPUPPCState *env) |
7118 | a750fc0b | j_mayer | { |
7119 | a750fc0b | j_mayer | gen_spr_ne_601(env); |
7120 | a750fc0b | j_mayer | gen_spr_620(env); |
7121 | a750fc0b | j_mayer | /* Time base */
|
7122 | a750fc0b | j_mayer | gen_tbl(env); |
7123 | a750fc0b | j_mayer | /* Hardware implementation registers */
|
7124 | a750fc0b | j_mayer | /* XXX : not implemented */
|
7125 | a750fc0b | j_mayer | spr_register(env, SPR_HID0, "HID0",
|
7126 | a750fc0b | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
7127 | a750fc0b | j_mayer | &spr_read_generic, &spr_write_generic, |
7128 | a750fc0b | j_mayer | 0x00000000);
|
7129 | a750fc0b | j_mayer | /* Memory management */
|
7130 | a750fc0b | j_mayer | gen_low_BATs(env); |
7131 | e1833e1f | j_mayer | init_excp_620(env); |
7132 | d63001d1 | j_mayer | env->dcache_line_size = 64;
|
7133 | d63001d1 | j_mayer | env->icache_line_size = 64;
|
7134 | faadf50e | j_mayer | /* Allocate hardware IRQ controller */
|
7135 | faadf50e | j_mayer | ppc6xx_irq_init(env); |
7136 | a750fc0b | j_mayer | } |
7137 | 7856e3a4 | Andreas Färber | |
7138 | 7856e3a4 | Andreas Färber | POWERPC_FAMILY(620)(ObjectClass *oc, void *data) |
7139 | 7856e3a4 | Andreas Färber | { |
7140 | ca5dff0a | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
7141 | 7856e3a4 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
7142 | 7856e3a4 | Andreas Färber | |
7143 | ca5dff0a | Andreas Färber | dc->desc = "PowerPC 620";
|
7144 | 7856e3a4 | Andreas Färber | pcc->init_proc = init_proc_620; |
7145 | 7856e3a4 | Andreas Färber | pcc->check_pow = check_pow_nocheck; /* Check this */
|
7146 | 53116ebf | Andreas Färber | pcc->insns_flags = PPC_INSNS_BASE | PPC_STRING | PPC_MFTB | |
7147 | 53116ebf | Andreas Färber | PPC_FLOAT | PPC_FLOAT_FSEL | PPC_FLOAT_FRES | |
7148 | 53116ebf | Andreas Färber | PPC_FLOAT_FSQRT | PPC_FLOAT_FRSQRTE | |
7149 | 53116ebf | Andreas Färber | PPC_FLOAT_STFIWX | |
7150 | 53116ebf | Andreas Färber | PPC_CACHE | PPC_CACHE_ICBI | PPC_CACHE_DCBZ | |
7151 | 53116ebf | Andreas Färber | PPC_MEM_SYNC | PPC_MEM_EIEIO | |
7152 | 53116ebf | Andreas Färber | PPC_MEM_TLBIE | PPC_MEM_TLBSYNC | |
7153 | 53116ebf | Andreas Färber | PPC_SEGMENT | PPC_EXTERN | |
7154 | 53116ebf | Andreas Färber | PPC_64B | PPC_SLBI; |
7155 | 53116ebf | Andreas Färber | pcc->insns_flags2 = PPC_NONE; |
7156 | ba9fd9f1 | Andreas Färber | pcc->msr_mask = 0x800000000005FF77ULL;
|
7157 | ba9fd9f1 | Andreas Färber | pcc->mmu_model = POWERPC_MMU_620; |
7158 | ba9fd9f1 | Andreas Färber | pcc->excp_model = POWERPC_EXCP_970; |
7159 | ba9fd9f1 | Andreas Färber | pcc->bus_model = PPC_FLAGS_INPUT_6xx; |
7160 | ba9fd9f1 | Andreas Färber | pcc->bfd_mach = bfd_mach_ppc64; |
7161 | ba9fd9f1 | Andreas Färber | pcc->flags = POWERPC_FLAG_SE | POWERPC_FLAG_BE | |
7162 | ba9fd9f1 | Andreas Färber | POWERPC_FLAG_PMM | POWERPC_FLAG_BUS_CLK; |
7163 | 7856e3a4 | Andreas Färber | } |
7164 | 7856e3a4 | Andreas Färber | |
7165 | a750fc0b | j_mayer | #endif /* defined (TARGET_PPC64) */ |
7166 | a750fc0b | j_mayer | |
7167 | fd5ed418 | Andreas Färber | |
7168 | fd5ed418 | Andreas Färber | typedef struct PowerPCCPUAlias { |
7169 | fd5ed418 | Andreas Färber | const char *alias; |
7170 | fd5ed418 | Andreas Färber | const char *model; |
7171 | fd5ed418 | Andreas Färber | } PowerPCCPUAlias; |
7172 | fd5ed418 | Andreas Färber | |
7173 | fd5ed418 | Andreas Färber | static const PowerPCCPUAlias ppc_cpu_aliases[] = { |
7174 | 8f43bc78 | Andreas Färber | { "403", "403GC" }, |
7175 | 8f43bc78 | Andreas Färber | { "405", "405D4" }, |
7176 | 8f43bc78 | Andreas Färber | { "405CR", "405CRc" }, |
7177 | 8f43bc78 | Andreas Färber | { "405GP", "405GPd" }, |
7178 | 4bdba7fd | Andreas Färber | { "405GPe", "405CRc" }, |
7179 | 8f43bc78 | Andreas Färber | { "x2vp7", "x2vp4" }, |
7180 | 8f43bc78 | Andreas Färber | { "x2vp50", "x2vp20" }, |
7181 | 8f43bc78 | Andreas Färber | |
7182 | 8c00a999 | Andreas Färber | { "440EP", "440EPb" }, |
7183 | 8c00a999 | Andreas Färber | { "440GP", "440GPc" }, |
7184 | 8c00a999 | Andreas Färber | { "440GR", "440GRa" }, |
7185 | 8c00a999 | Andreas Färber | { "440GX", "440GXf" }, |
7186 | 8c00a999 | Andreas Färber | |
7187 | fd5ed418 | Andreas Färber | { "RCPU", "MPC5xx" }, |
7188 | e0b9a74e | Andreas Färber | /* MPC5xx microcontrollers */
|
7189 | e0b9a74e | Andreas Färber | { "MGT560", "MPC5xx" }, |
7190 | e0b9a74e | Andreas Färber | { "MPC509", "MPC5xx" }, |
7191 | e0b9a74e | Andreas Färber | { "MPC533", "MPC5xx" }, |
7192 | e0b9a74e | Andreas Färber | { "MPC534", "MPC5xx" }, |
7193 | e0b9a74e | Andreas Färber | { "MPC555", "MPC5xx" }, |
7194 | e0b9a74e | Andreas Färber | { "MPC556", "MPC5xx" }, |
7195 | e0b9a74e | Andreas Färber | { "MPC560", "MPC5xx" }, |
7196 | e0b9a74e | Andreas Färber | { "MPC561", "MPC5xx" }, |
7197 | e0b9a74e | Andreas Färber | { "MPC562", "MPC5xx" }, |
7198 | e0b9a74e | Andreas Färber | { "MPC563", "MPC5xx" }, |
7199 | e0b9a74e | Andreas Färber | { "MPC564", "MPC5xx" }, |
7200 | e0b9a74e | Andreas Färber | { "MPC565", "MPC5xx" }, |
7201 | e0b9a74e | Andreas Färber | { "MPC566", "MPC5xx" }, |
7202 | e0b9a74e | Andreas Färber | |
7203 | fd5ed418 | Andreas Färber | { "PowerQUICC", "MPC8xx" }, |
7204 | 20267b6f | Andreas Färber | /* MPC8xx microcontrollers */
|
7205 | 20267b6f | Andreas Färber | { "MGT823", "MPC8xx" }, |
7206 | 20267b6f | Andreas Färber | { "MPC821", "MPC8xx" }, |
7207 | 20267b6f | Andreas Färber | { "MPC823", "MPC8xx" }, |
7208 | 20267b6f | Andreas Färber | { "MPC850", "MPC8xx" }, |
7209 | 20267b6f | Andreas Färber | { "MPC852T", "MPC8xx" }, |
7210 | 20267b6f | Andreas Färber | { "MPC855T", "MPC8xx" }, |
7211 | 20267b6f | Andreas Färber | { "MPC857", "MPC8xx" }, |
7212 | 20267b6f | Andreas Färber | { "MPC859", "MPC8xx" }, |
7213 | 20267b6f | Andreas Färber | { "MPC860", "MPC8xx" }, |
7214 | 20267b6f | Andreas Färber | { "MPC862", "MPC8xx" }, |
7215 | 20267b6f | Andreas Färber | { "MPC866", "MPC8xx" }, |
7216 | 20267b6f | Andreas Färber | { "MPC870", "MPC8xx" }, |
7217 | 20267b6f | Andreas Färber | { "MPC875", "MPC8xx" }, |
7218 | 20267b6f | Andreas Färber | { "MPC880", "MPC8xx" }, |
7219 | 20267b6f | Andreas Färber | { "MPC885", "MPC8xx" }, |
7220 | 20267b6f | Andreas Färber | |
7221 | 7b48a1ad | Andreas Färber | /* PowerPC MPC603 microcontrollers */
|
7222 | 7b48a1ad | Andreas Färber | { "MPC8240", "603" }, |
7223 | 7b48a1ad | Andreas Färber | |
7224 | cf9314cd | Andreas Färber | { "MPC52xx", "MPC5200" }, |
7225 | 236824f2 | Andreas Färber | { "MPC5200", "MPC5200_v12" }, |
7226 | 236824f2 | Andreas Färber | { "MPC5200B", "MPC5200B_v21" }, |
7227 | cf9314cd | Andreas Färber | |
7228 | 63499f21 | Andreas Färber | { "MPC82xx", "MPC8280" }, |
7229 | fd5ed418 | Andreas Färber | { "PowerQUICC-II", "MPC82xx" }, |
7230 | d329ceb2 | Andreas Färber | { "MPC8241", "G2HiP4" }, |
7231 | d329ceb2 | Andreas Färber | { "MPC8245", "G2HiP4" }, |
7232 | 4d55320f | Andreas Färber | { "MPC8247", "G2leGP3" }, |
7233 | 4d55320f | Andreas Färber | { "MPC8248", "G2leGP3" }, |
7234 | f172e4b9 | Andreas Färber | { "MPC8250", "MPC8250_HiP4" }, |
7235 | d329ceb2 | Andreas Färber | { "MPC8250_HiP3", "G2HiP3" }, |
7236 | d329ceb2 | Andreas Färber | { "MPC8250_HiP4", "G2HiP4" }, |
7237 | f172e4b9 | Andreas Färber | { "MPC8255", "MPC8255_HiP4" }, |
7238 | d329ceb2 | Andreas Färber | { "MPC8255_HiP3", "G2HiP3" }, |
7239 | d329ceb2 | Andreas Färber | { "MPC8255_HiP4", "G2HiP4" }, |
7240 | f172e4b9 | Andreas Färber | { "MPC8260", "MPC8260_HiP4" }, |
7241 | d329ceb2 | Andreas Färber | { "MPC8260_HiP3", "G2HiP3" }, |
7242 | d329ceb2 | Andreas Färber | { "MPC8260_HiP4", "G2HiP4" }, |
7243 | f172e4b9 | Andreas Färber | { "MPC8264", "MPC8264_HiP4" }, |
7244 | d329ceb2 | Andreas Färber | { "MPC8264_HiP3", "G2HiP3" }, |
7245 | d329ceb2 | Andreas Färber | { "MPC8264_HiP4", "G2HiP4" }, |
7246 | f172e4b9 | Andreas Färber | { "MPC8265", "MPC8265_HiP4" }, |
7247 | d329ceb2 | Andreas Färber | { "MPC8265_HiP3", "G2HiP3" }, |
7248 | d329ceb2 | Andreas Färber | { "MPC8265_HiP4", "G2HiP4" }, |
7249 | f172e4b9 | Andreas Färber | { "MPC8266", "MPC8266_HiP4" }, |
7250 | d329ceb2 | Andreas Färber | { "MPC8266_HiP3", "G2HiP3" }, |
7251 | d329ceb2 | Andreas Färber | { "MPC8266_HiP4", "G2HiP4" }, |
7252 | 4d55320f | Andreas Färber | { "MPC8270", "G2leGP3" }, |
7253 | 4d55320f | Andreas Färber | { "MPC8271", "G2leGP3" }, |
7254 | 4d55320f | Andreas Färber | { "MPC8272", "G2leGP3" }, |
7255 | 4d55320f | Andreas Färber | { "MPC8275", "G2leGP3" }, |
7256 | 4d55320f | Andreas Färber | { "MPC8280", "G2leGP3" }, |
7257 | 4475e98f | Andreas Färber | { "e200", "e200z6" }, |
7258 | 0683641c | Andreas Färber | { "e300", "e300c3" }, |
7259 | 9538de4f | Andreas Färber | { "MPC8347", "MPC8347T" }, |
7260 | 9538de4f | Andreas Färber | { "MPC8347A", "MPC8347AT" }, |
7261 | 9538de4f | Andreas Färber | { "MPC8347E", "MPC8347ET" }, |
7262 | 9538de4f | Andreas Färber | { "MPC8347EA", "MPC8347EAT" }, |
7263 | fd5ed418 | Andreas Färber | { "e500", "e500v2_v22" }, |
7264 | 6d4decb4 | Andreas Färber | { "e500v1", "e500_v20" }, |
7265 | 6d4decb4 | Andreas Färber | { "e500v2", "e500v2_v22" }, |
7266 | 52d80768 | Andreas Färber | { "MPC8533", "MPC8533_v11" }, |
7267 | 52d80768 | Andreas Färber | { "MPC8533E", "MPC8533E_v11" }, |
7268 | 52d80768 | Andreas Färber | { "MPC8540", "MPC8540_v21" }, |
7269 | 52d80768 | Andreas Färber | { "MPC8541", "MPC8541_v11" }, |
7270 | 52d80768 | Andreas Färber | { "MPC8541E", "MPC8541E_v11" }, |
7271 | 52d80768 | Andreas Färber | { "MPC8543", "MPC8543_v21" }, |
7272 | 52d80768 | Andreas Färber | { "MPC8543E", "MPC8543E_v21" }, |
7273 | 52d80768 | Andreas Färber | { "MPC8544", "MPC8544_v11" }, |
7274 | 52d80768 | Andreas Färber | { "MPC8544E", "MPC8544E_v11" }, |
7275 | 52d80768 | Andreas Färber | { "MPC8545", "MPC8545_v21" }, |
7276 | 52d80768 | Andreas Färber | { "MPC8545E", "MPC8545E_v21" }, |
7277 | 52d80768 | Andreas Färber | { "MPC8547E", "MPC8547E_v21" }, |
7278 | 52d80768 | Andreas Färber | { "MPC8548", "MPC8548_v21" }, |
7279 | 52d80768 | Andreas Färber | { "MPC8548E", "MPC8548E_v21" }, |
7280 | 52d80768 | Andreas Färber | { "MPC8555", "MPC8555_v11" }, |
7281 | 52d80768 | Andreas Färber | { "MPC8555E", "MPC8555E_v11" }, |
7282 | 52d80768 | Andreas Färber | { "MPC8560", "MPC8560_v21" }, |
7283 | 336c8632 | Andreas Färber | { "601", "601_v2" }, |
7284 | 336c8632 | Andreas Färber | { "601v", "601_v2" }, |
7285 | fd5ed418 | Andreas Färber | { "Vanilla", "603" }, |
7286 | 16a17733 | Andreas Färber | { "603e", "603e_v4.1" }, |
7287 | fd5ed418 | Andreas Färber | { "Stretch", "603e" }, |
7288 | fd5ed418 | Andreas Färber | { "Vaillant", "603e7v" }, |
7289 | 4ae0e9d8 | Andreas Färber | { "603r", "603e7t" }, |
7290 | fd5ed418 | Andreas Färber | { "Goldeneye", "603r" }, |
7291 | 91b5d028 | Andreas Färber | { "604e", "604e_v2.4" }, |
7292 | fd5ed418 | Andreas Färber | { "Sirocco", "604e" }, |
7293 | fd5ed418 | Andreas Färber | { "Mach5", "604r" }, |
7294 | 0446aecd | Andreas Färber | { "740", "740_v3.1" }, |
7295 | fd5ed418 | Andreas Färber | { "Arthur", "740" }, |
7296 | 0446aecd | Andreas Färber | { "750", "750_v3.1" }, |
7297 | fd5ed418 | Andreas Färber | { "Typhoon", "750" }, |
7298 | fd5ed418 | Andreas Färber | { "G3", "750" }, |
7299 | fd5ed418 | Andreas Färber | { "Conan/Doyle", "750p" }, |
7300 | 8fc82f9e | Andreas Färber | { "750cl", "750cl_v2.0" }, |
7301 | 8fc82f9e | Andreas Färber | { "750cx", "750cx_v2.2" }, |
7302 | 8fc82f9e | Andreas Färber | { "750cxe", "750cxe_v3.1b" }, |
7303 | 8fc82f9e | Andreas Färber | { "750fx", "750fx_v2.3" }, |
7304 | 8fc82f9e | Andreas Färber | { "750gx", "750gx_v1.2" }, |
7305 | 8fc82f9e | Andreas Färber | { "750l", "750l_v3.2" }, |
7306 | fd5ed418 | Andreas Färber | { "LoneStar", "750l" }, |
7307 | 80c7abd3 | Andreas Färber | { "745", "745_v2.8" }, |
7308 | 80c7abd3 | Andreas Färber | { "755", "755_v2.8" }, |
7309 | fd5ed418 | Andreas Färber | { "Goldfinger", "755" }, |
7310 | 06704e9c | Andreas Färber | { "7400", "7400_v2.9" }, |
7311 | fd5ed418 | Andreas Färber | { "Max", "7400" }, |
7312 | fd5ed418 | Andreas Färber | { "G4", "7400" }, |
7313 | 08546b91 | Andreas Färber | { "7410", "7410_v1.4" }, |
7314 | fd5ed418 | Andreas Färber | { "Nitro", "7410" }, |
7315 | df502ce8 | Andreas Färber | { "7448", "7448_v2.1" }, |
7316 | e9a7cf3b | Andreas Färber | { "7450", "7450_v2.1" }, |
7317 | fd5ed418 | Andreas Färber | { "Vger", "7450" }, |
7318 | 078840e1 | Andreas Färber | { "7441", "7441_v2.3" }, |
7319 | 078840e1 | Andreas Färber | { "7451", "7451_v2.3" }, |
7320 | d96c8a23 | Andreas Färber | { "7445", "7445_v3.2" }, |
7321 | d96c8a23 | Andreas Färber | { "7455", "7455_v3.2" }, |
7322 | fd5ed418 | Andreas Färber | { "Apollo6", "7455" }, |
7323 | 4c739207 | Andreas Färber | { "7447", "7447_v1.2" }, |
7324 | 4c739207 | Andreas Färber | { "7457", "7457_v1.2" }, |
7325 | fd5ed418 | Andreas Färber | { "Apollo7", "7457" }, |
7326 | 4c739207 | Andreas Färber | { "7447A", "7447A_v1.2" }, |
7327 | 4c739207 | Andreas Färber | { "7457A", "7457A_v1.2" }, |
7328 | fd5ed418 | Andreas Färber | { "Apollo7PM", "7457A_v1.0" }, |
7329 | fd5ed418 | Andreas Färber | #if defined(TARGET_PPC64)
|
7330 | fd5ed418 | Andreas Färber | { "Trident", "620" }, |
7331 | fd5ed418 | Andreas Färber | { "POWER3", "630" }, |
7332 | fd5ed418 | Andreas Färber | { "Boxer", "POWER3" }, |
7333 | fd5ed418 | Andreas Färber | { "Dino", "POWER3" }, |
7334 | fd5ed418 | Andreas Färber | { "POWER3+", "631" }, |
7335 | befa8af3 | Andreas Färber | { "POWER7", "POWER7_v2.3" }, |
7336 | df43f4b8 | Andreas Färber | { "970fx", "970fx_v3.1" }, |
7337 | df43f4b8 | Andreas Färber | { "970mp", "970mp_v1.1" }, |
7338 | fd5ed418 | Andreas Färber | { "Apache", "RS64" }, |
7339 | fd5ed418 | Andreas Färber | { "A35", "RS64" }, |
7340 | fd5ed418 | Andreas Färber | { "NorthStar", "RS64-II" }, |
7341 | fd5ed418 | Andreas Färber | { "A50", "RS64-II" }, |
7342 | fd5ed418 | Andreas Färber | { "Pulsar", "RS64-III" }, |
7343 | fd5ed418 | Andreas Färber | { "IceStar", "RS64-IV" }, |
7344 | fd5ed418 | Andreas Färber | { "IStar", "RS64-IV" }, |
7345 | fd5ed418 | Andreas Färber | { "SStar", "RS64-IV" }, |
7346 | fd5ed418 | Andreas Färber | #endif
|
7347 | fd5ed418 | Andreas Färber | { "RIOS", "POWER" }, |
7348 | fd5ed418 | Andreas Färber | { "RSC", "POWER" }, |
7349 | fd5ed418 | Andreas Färber | { "RSC3308", "POWER" }, |
7350 | fd5ed418 | Andreas Färber | { "RSC4608", "POWER" }, |
7351 | fd5ed418 | Andreas Färber | { "RSC2", "POWER2" }, |
7352 | fd5ed418 | Andreas Färber | { "P2SC", "POWER2" }, |
7353 | fd5ed418 | Andreas Färber | |
7354 | a7de06e1 | Andreas Färber | /* Generic PowerPCs */
|
7355 | a7de06e1 | Andreas Färber | #if defined(TARGET_PPC64)
|
7356 | a7de06e1 | Andreas Färber | { "ppc64", "970fx" }, |
7357 | a7de06e1 | Andreas Färber | #endif
|
7358 | a7de06e1 | Andreas Färber | { "ppc32", "604" }, |
7359 | f7851859 | Andreas Färber | { "ppc", "ppc32" }, |
7360 | fd5ed418 | Andreas Färber | { "default", "ppc" }, |
7361 | a750fc0b | j_mayer | }; |
7362 | a750fc0b | j_mayer | |
7363 | a750fc0b | j_mayer | /*****************************************************************************/
|
7364 | 60b14d95 | Stefan Weil | /* Generic CPU instantiation routine */
|
7365 | cfe34f44 | Andreas Färber | static void init_ppc_proc(PowerPCCPU *cpu) |
7366 | a750fc0b | j_mayer | { |
7367 | cfe34f44 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
7368 | cfe34f44 | Andreas Färber | CPUPPCState *env = &cpu->env; |
7369 | a750fc0b | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
7370 | e1833e1f | j_mayer | int i;
|
7371 | e1833e1f | j_mayer | |
7372 | a750fc0b | j_mayer | env->irq_inputs = NULL;
|
7373 | e1833e1f | j_mayer | /* Set all exception vectors to an invalid address */
|
7374 | e1833e1f | j_mayer | for (i = 0; i < POWERPC_EXCP_NB; i++) |
7375 | e1833e1f | j_mayer | env->excp_vectors[i] = (target_ulong)(-1ULL);
|
7376 | fc1c67bc | Blue Swirl | env->hreset_excp_prefix = 0x00000000;
|
7377 | e1833e1f | j_mayer | env->ivor_mask = 0x00000000;
|
7378 | e1833e1f | j_mayer | env->ivpr_mask = 0x00000000;
|
7379 | a750fc0b | j_mayer | /* Default MMU definitions */
|
7380 | a750fc0b | j_mayer | env->nb_BATs = 0;
|
7381 | a750fc0b | j_mayer | env->nb_tlb = 0;
|
7382 | a750fc0b | j_mayer | env->nb_ways = 0;
|
7383 | 1c53accc | Alexander Graf | env->tlb_type = TLB_NONE; |
7384 | f2e63a42 | j_mayer | #endif
|
7385 | a750fc0b | j_mayer | /* Register SPR common to all PowerPC implementations */
|
7386 | a750fc0b | j_mayer | gen_spr_generic(env); |
7387 | a750fc0b | j_mayer | spr_register(env, SPR_PVR, "PVR",
|
7388 | a139aa17 | Nathan Froyd | /* Linux permits userspace to read PVR */
|
7389 | a139aa17 | Nathan Froyd | #if defined(CONFIG_LINUX_USER)
|
7390 | a139aa17 | Nathan Froyd | &spr_read_generic, |
7391 | a139aa17 | Nathan Froyd | #else
|
7392 | a139aa17 | Nathan Froyd | SPR_NOACCESS, |
7393 | a139aa17 | Nathan Froyd | #endif
|
7394 | a139aa17 | Nathan Froyd | SPR_NOACCESS, |
7395 | a750fc0b | j_mayer | &spr_read_generic, SPR_NOACCESS, |
7396 | cfe34f44 | Andreas Färber | pcc->pvr); |
7397 | 80d11f44 | j_mayer | /* Register SVR if it's defined to anything else than POWERPC_SVR_NONE */
|
7398 | cfe34f44 | Andreas Färber | if (pcc->svr != POWERPC_SVR_NONE) {
|
7399 | cfe34f44 | Andreas Färber | if (pcc->svr & POWERPC_SVR_E500) {
|
7400 | 80d11f44 | j_mayer | spr_register(env, SPR_E500_SVR, "SVR",
|
7401 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
7402 | 80d11f44 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
7403 | cfe34f44 | Andreas Färber | pcc->svr & ~POWERPC_SVR_E500); |
7404 | 80d11f44 | j_mayer | } else {
|
7405 | 80d11f44 | j_mayer | spr_register(env, SPR_SVR, "SVR",
|
7406 | 80d11f44 | j_mayer | SPR_NOACCESS, SPR_NOACCESS, |
7407 | 80d11f44 | j_mayer | &spr_read_generic, SPR_NOACCESS, |
7408 | cfe34f44 | Andreas Färber | pcc->svr); |
7409 | 80d11f44 | j_mayer | } |
7410 | 80d11f44 | j_mayer | } |
7411 | a750fc0b | j_mayer | /* PowerPC implementation specific initialisations (SPRs, timers, ...) */
|
7412 | cfe34f44 | Andreas Färber | (*pcc->init_proc)(env); |
7413 | fc1c67bc | Blue Swirl | #if !defined(CONFIG_USER_ONLY)
|
7414 | fc1c67bc | Blue Swirl | env->excp_prefix = env->hreset_excp_prefix; |
7415 | fc1c67bc | Blue Swirl | #endif
|
7416 | 25ba3a68 | j_mayer | /* MSR bits & flags consistency checks */
|
7417 | 25ba3a68 | j_mayer | if (env->msr_mask & (1 << 25)) { |
7418 | 25ba3a68 | j_mayer | switch (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) {
|
7419 | 25ba3a68 | j_mayer | case POWERPC_FLAG_SPE:
|
7420 | 25ba3a68 | j_mayer | case POWERPC_FLAG_VRE:
|
7421 | 25ba3a68 | j_mayer | break;
|
7422 | 25ba3a68 | j_mayer | default:
|
7423 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7424 | 25ba3a68 | j_mayer | "Should define POWERPC_FLAG_SPE or POWERPC_FLAG_VRE\n");
|
7425 | 25ba3a68 | j_mayer | exit(1);
|
7426 | 25ba3a68 | j_mayer | } |
7427 | 25ba3a68 | j_mayer | } else if (env->flags & (POWERPC_FLAG_SPE | POWERPC_FLAG_VRE)) { |
7428 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7429 | 25ba3a68 | j_mayer | "Should not define POWERPC_FLAG_SPE nor POWERPC_FLAG_VRE\n");
|
7430 | 25ba3a68 | j_mayer | exit(1);
|
7431 | 25ba3a68 | j_mayer | } |
7432 | 25ba3a68 | j_mayer | if (env->msr_mask & (1 << 17)) { |
7433 | 25ba3a68 | j_mayer | switch (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) {
|
7434 | 25ba3a68 | j_mayer | case POWERPC_FLAG_TGPR:
|
7435 | 25ba3a68 | j_mayer | case POWERPC_FLAG_CE:
|
7436 | 25ba3a68 | j_mayer | break;
|
7437 | 25ba3a68 | j_mayer | default:
|
7438 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7439 | 25ba3a68 | j_mayer | "Should define POWERPC_FLAG_TGPR or POWERPC_FLAG_CE\n");
|
7440 | 25ba3a68 | j_mayer | exit(1);
|
7441 | 25ba3a68 | j_mayer | } |
7442 | 25ba3a68 | j_mayer | } else if (env->flags & (POWERPC_FLAG_TGPR | POWERPC_FLAG_CE)) { |
7443 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7444 | 25ba3a68 | j_mayer | "Should not define POWERPC_FLAG_TGPR nor POWERPC_FLAG_CE\n");
|
7445 | 25ba3a68 | j_mayer | exit(1);
|
7446 | 25ba3a68 | j_mayer | } |
7447 | 25ba3a68 | j_mayer | if (env->msr_mask & (1 << 10)) { |
7448 | 25ba3a68 | j_mayer | switch (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE |
|
7449 | 25ba3a68 | j_mayer | POWERPC_FLAG_UBLE)) { |
7450 | 25ba3a68 | j_mayer | case POWERPC_FLAG_SE:
|
7451 | 25ba3a68 | j_mayer | case POWERPC_FLAG_DWE:
|
7452 | 25ba3a68 | j_mayer | case POWERPC_FLAG_UBLE:
|
7453 | 25ba3a68 | j_mayer | break;
|
7454 | 25ba3a68 | j_mayer | default:
|
7455 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7456 | 25ba3a68 | j_mayer | "Should define POWERPC_FLAG_SE or POWERPC_FLAG_DWE or "
|
7457 | 25ba3a68 | j_mayer | "POWERPC_FLAG_UBLE\n");
|
7458 | 25ba3a68 | j_mayer | exit(1);
|
7459 | 25ba3a68 | j_mayer | } |
7460 | 25ba3a68 | j_mayer | } else if (env->flags & (POWERPC_FLAG_SE | POWERPC_FLAG_DWE | |
7461 | 25ba3a68 | j_mayer | POWERPC_FLAG_UBLE)) { |
7462 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7463 | 25ba3a68 | j_mayer | "Should not define POWERPC_FLAG_SE nor POWERPC_FLAG_DWE nor "
|
7464 | 25ba3a68 | j_mayer | "POWERPC_FLAG_UBLE\n");
|
7465 | 25ba3a68 | j_mayer | exit(1);
|
7466 | 25ba3a68 | j_mayer | } |
7467 | 25ba3a68 | j_mayer | if (env->msr_mask & (1 << 9)) { |
7468 | 25ba3a68 | j_mayer | switch (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) {
|
7469 | 25ba3a68 | j_mayer | case POWERPC_FLAG_BE:
|
7470 | 25ba3a68 | j_mayer | case POWERPC_FLAG_DE:
|
7471 | 25ba3a68 | j_mayer | break;
|
7472 | 25ba3a68 | j_mayer | default:
|
7473 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7474 | 25ba3a68 | j_mayer | "Should define POWERPC_FLAG_BE or POWERPC_FLAG_DE\n");
|
7475 | 25ba3a68 | j_mayer | exit(1);
|
7476 | 25ba3a68 | j_mayer | } |
7477 | 25ba3a68 | j_mayer | } else if (env->flags & (POWERPC_FLAG_BE | POWERPC_FLAG_DE)) { |
7478 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7479 | 25ba3a68 | j_mayer | "Should not define POWERPC_FLAG_BE nor POWERPC_FLAG_DE\n");
|
7480 | 25ba3a68 | j_mayer | exit(1);
|
7481 | 25ba3a68 | j_mayer | } |
7482 | 25ba3a68 | j_mayer | if (env->msr_mask & (1 << 2)) { |
7483 | 25ba3a68 | j_mayer | switch (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) {
|
7484 | 25ba3a68 | j_mayer | case POWERPC_FLAG_PX:
|
7485 | 25ba3a68 | j_mayer | case POWERPC_FLAG_PMM:
|
7486 | 25ba3a68 | j_mayer | break;
|
7487 | 25ba3a68 | j_mayer | default:
|
7488 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7489 | 25ba3a68 | j_mayer | "Should define POWERPC_FLAG_PX or POWERPC_FLAG_PMM\n");
|
7490 | 25ba3a68 | j_mayer | exit(1);
|
7491 | 25ba3a68 | j_mayer | } |
7492 | 25ba3a68 | j_mayer | } else if (env->flags & (POWERPC_FLAG_PX | POWERPC_FLAG_PMM)) { |
7493 | 25ba3a68 | j_mayer | fprintf(stderr, "PowerPC MSR definition inconsistency\n"
|
7494 | 25ba3a68 | j_mayer | "Should not define POWERPC_FLAG_PX nor POWERPC_FLAG_PMM\n");
|
7495 | 25ba3a68 | j_mayer | exit(1);
|
7496 | 25ba3a68 | j_mayer | } |
7497 | 4018bae9 | j_mayer | if ((env->flags & (POWERPC_FLAG_RTC_CLK | POWERPC_FLAG_BUS_CLK)) == 0) { |
7498 | 4018bae9 | j_mayer | fprintf(stderr, "PowerPC flags inconsistency\n"
|
7499 | 4018bae9 | j_mayer | "Should define the time-base and decrementer clock source\n");
|
7500 | 4018bae9 | j_mayer | exit(1);
|
7501 | 4018bae9 | j_mayer | } |
7502 | a750fc0b | j_mayer | /* Allocate TLBs buffer when needed */
|
7503 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
7504 | a750fc0b | j_mayer | if (env->nb_tlb != 0) { |
7505 | a750fc0b | j_mayer | int nb_tlb = env->nb_tlb;
|
7506 | a750fc0b | j_mayer | if (env->id_tlbs != 0) |
7507 | a750fc0b | j_mayer | nb_tlb *= 2;
|
7508 | 1c53accc | Alexander Graf | switch (env->tlb_type) {
|
7509 | 1c53accc | Alexander Graf | case TLB_6XX:
|
7510 | 7267c094 | Anthony Liguori | env->tlb.tlb6 = g_malloc0(nb_tlb * sizeof(ppc6xx_tlb_t));
|
7511 | 1c53accc | Alexander Graf | break;
|
7512 | 1c53accc | Alexander Graf | case TLB_EMB:
|
7513 | 7267c094 | Anthony Liguori | env->tlb.tlbe = g_malloc0(nb_tlb * sizeof(ppcemb_tlb_t));
|
7514 | 1c53accc | Alexander Graf | break;
|
7515 | 1c53accc | Alexander Graf | case TLB_MAS:
|
7516 | 7267c094 | Anthony Liguori | env->tlb.tlbm = g_malloc0(nb_tlb * sizeof(ppcmas_tlb_t));
|
7517 | 1c53accc | Alexander Graf | break;
|
7518 | 1c53accc | Alexander Graf | } |
7519 | a750fc0b | j_mayer | /* Pre-compute some useful values */
|
7520 | a750fc0b | j_mayer | env->tlb_per_way = env->nb_tlb / env->nb_ways; |
7521 | a750fc0b | j_mayer | } |
7522 | a750fc0b | j_mayer | if (env->irq_inputs == NULL) { |
7523 | a750fc0b | j_mayer | fprintf(stderr, "WARNING: no internal IRQ controller registered.\n"
|
7524 | 5cbdb3a3 | Stefan Weil | " Attempt QEMU to crash very soon !\n");
|
7525 | a750fc0b | j_mayer | } |
7526 | a750fc0b | j_mayer | #endif
|
7527 | 2f462816 | j_mayer | if (env->check_pow == NULL) { |
7528 | 2f462816 | j_mayer | fprintf(stderr, "WARNING: no power management check handler "
|
7529 | 2f462816 | j_mayer | "registered.\n"
|
7530 | 5cbdb3a3 | Stefan Weil | " Attempt QEMU to crash very soon !\n");
|
7531 | 2f462816 | j_mayer | } |
7532 | a750fc0b | j_mayer | } |
7533 | a750fc0b | j_mayer | |
7534 | a750fc0b | j_mayer | #if defined(PPC_DUMP_CPU)
|
7535 | a750fc0b | j_mayer | static void dump_ppc_sprs (CPUPPCState *env) |
7536 | a750fc0b | j_mayer | { |
7537 | a750fc0b | j_mayer | ppc_spr_t *spr; |
7538 | a750fc0b | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
7539 | a750fc0b | j_mayer | uint32_t sr, sw; |
7540 | a750fc0b | j_mayer | #endif
|
7541 | a750fc0b | j_mayer | uint32_t ur, uw; |
7542 | a750fc0b | j_mayer | int i, j, n;
|
7543 | a750fc0b | j_mayer | |
7544 | a750fc0b | j_mayer | printf("Special purpose registers:\n");
|
7545 | a750fc0b | j_mayer | for (i = 0; i < 32; i++) { |
7546 | a750fc0b | j_mayer | for (j = 0; j < 32; j++) { |
7547 | a750fc0b | j_mayer | n = (i << 5) | j;
|
7548 | a750fc0b | j_mayer | spr = &env->spr_cb[n]; |
7549 | a750fc0b | j_mayer | uw = spr->uea_write != NULL && spr->uea_write != SPR_NOACCESS;
|
7550 | a750fc0b | j_mayer | ur = spr->uea_read != NULL && spr->uea_read != SPR_NOACCESS;
|
7551 | a750fc0b | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
7552 | a750fc0b | j_mayer | sw = spr->oea_write != NULL && spr->oea_write != SPR_NOACCESS;
|
7553 | a750fc0b | j_mayer | sr = spr->oea_read != NULL && spr->oea_read != SPR_NOACCESS;
|
7554 | a750fc0b | j_mayer | if (sw || sr || uw || ur) {
|
7555 | a750fc0b | j_mayer | printf("SPR: %4d (%03x) %-8s s%c%c u%c%c\n",
|
7556 | a750fc0b | j_mayer | (i << 5) | j, (i << 5) | j, spr->name, |
7557 | a750fc0b | j_mayer | sw ? 'w' : '-', sr ? 'r' : '-', |
7558 | a750fc0b | j_mayer | uw ? 'w' : '-', ur ? 'r' : '-'); |
7559 | a750fc0b | j_mayer | } |
7560 | a750fc0b | j_mayer | #else
|
7561 | a750fc0b | j_mayer | if (uw || ur) {
|
7562 | a750fc0b | j_mayer | printf("SPR: %4d (%03x) %-8s u%c%c\n",
|
7563 | a750fc0b | j_mayer | (i << 5) | j, (i << 5) | j, spr->name, |
7564 | a750fc0b | j_mayer | uw ? 'w' : '-', ur ? 'r' : '-'); |
7565 | a750fc0b | j_mayer | } |
7566 | a750fc0b | j_mayer | #endif
|
7567 | a750fc0b | j_mayer | } |
7568 | a750fc0b | j_mayer | } |
7569 | a750fc0b | j_mayer | fflush(stdout); |
7570 | a750fc0b | j_mayer | fflush(stderr); |
7571 | a750fc0b | j_mayer | } |
7572 | a750fc0b | j_mayer | #endif
|
7573 | a750fc0b | j_mayer | |
7574 | a750fc0b | j_mayer | /*****************************************************************************/
|
7575 | a750fc0b | j_mayer | #include <stdlib.h> |
7576 | a750fc0b | j_mayer | #include <string.h> |
7577 | a750fc0b | j_mayer | |
7578 | a750fc0b | j_mayer | /* Opcode types */
|
7579 | a750fc0b | j_mayer | enum {
|
7580 | a750fc0b | j_mayer | PPC_DIRECT = 0, /* Opcode routine */ |
7581 | a750fc0b | j_mayer | PPC_INDIRECT = 1, /* Indirect opcode table */ |
7582 | a750fc0b | j_mayer | }; |
7583 | a750fc0b | j_mayer | |
7584 | a750fc0b | j_mayer | static inline int is_indirect_opcode (void *handler) |
7585 | a750fc0b | j_mayer | { |
7586 | 5724753e | Stefan Weil | return ((uintptr_t)handler & 0x03) == PPC_INDIRECT; |
7587 | a750fc0b | j_mayer | } |
7588 | a750fc0b | j_mayer | |
7589 | c227f099 | Anthony Liguori | static inline opc_handler_t **ind_table(void *handler) |
7590 | a750fc0b | j_mayer | { |
7591 | 5724753e | Stefan Weil | return (opc_handler_t **)((uintptr_t)handler & ~3); |
7592 | a750fc0b | j_mayer | } |
7593 | a750fc0b | j_mayer | |
7594 | a750fc0b | j_mayer | /* Instruction table creation */
|
7595 | a750fc0b | j_mayer | /* Opcodes tables creation */
|
7596 | c227f099 | Anthony Liguori | static void fill_new_table (opc_handler_t **table, int len) |
7597 | a750fc0b | j_mayer | { |
7598 | a750fc0b | j_mayer | int i;
|
7599 | a750fc0b | j_mayer | |
7600 | a750fc0b | j_mayer | for (i = 0; i < len; i++) |
7601 | a750fc0b | j_mayer | table[i] = &invalid_handler; |
7602 | a750fc0b | j_mayer | } |
7603 | a750fc0b | j_mayer | |
7604 | c227f099 | Anthony Liguori | static int create_new_table (opc_handler_t **table, unsigned char idx) |
7605 | a750fc0b | j_mayer | { |
7606 | c227f099 | Anthony Liguori | opc_handler_t **tmp; |
7607 | a750fc0b | j_mayer | |
7608 | c227f099 | Anthony Liguori | tmp = malloc(0x20 * sizeof(opc_handler_t)); |
7609 | a750fc0b | j_mayer | fill_new_table(tmp, 0x20);
|
7610 | 5724753e | Stefan Weil | table[idx] = (opc_handler_t *)((uintptr_t)tmp | PPC_INDIRECT); |
7611 | a750fc0b | j_mayer | |
7612 | a750fc0b | j_mayer | return 0; |
7613 | a750fc0b | j_mayer | } |
7614 | a750fc0b | j_mayer | |
7615 | c227f099 | Anthony Liguori | static int insert_in_table (opc_handler_t **table, unsigned char idx, |
7616 | c227f099 | Anthony Liguori | opc_handler_t *handler) |
7617 | a750fc0b | j_mayer | { |
7618 | a750fc0b | j_mayer | if (table[idx] != &invalid_handler)
|
7619 | a750fc0b | j_mayer | return -1; |
7620 | a750fc0b | j_mayer | table[idx] = handler; |
7621 | a750fc0b | j_mayer | |
7622 | a750fc0b | j_mayer | return 0; |
7623 | a750fc0b | j_mayer | } |
7624 | a750fc0b | j_mayer | |
7625 | c227f099 | Anthony Liguori | static int register_direct_insn (opc_handler_t **ppc_opcodes, |
7626 | c227f099 | Anthony Liguori | unsigned char idx, opc_handler_t *handler) |
7627 | a750fc0b | j_mayer | { |
7628 | a750fc0b | j_mayer | if (insert_in_table(ppc_opcodes, idx, handler) < 0) { |
7629 | a750fc0b | j_mayer | printf("*** ERROR: opcode %02x already assigned in main "
|
7630 | a750fc0b | j_mayer | "opcode table\n", idx);
|
7631 | 4c1b1bfe | j_mayer | #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
|
7632 | 4c1b1bfe | j_mayer | printf(" Registered handler '%s' - new handler '%s'\n",
|
7633 | 4c1b1bfe | j_mayer | ppc_opcodes[idx]->oname, handler->oname); |
7634 | 4c1b1bfe | j_mayer | #endif
|
7635 | a750fc0b | j_mayer | return -1; |
7636 | a750fc0b | j_mayer | } |
7637 | a750fc0b | j_mayer | |
7638 | a750fc0b | j_mayer | return 0; |
7639 | a750fc0b | j_mayer | } |
7640 | a750fc0b | j_mayer | |
7641 | c227f099 | Anthony Liguori | static int register_ind_in_table (opc_handler_t **table, |
7642 | a750fc0b | j_mayer | unsigned char idx1, unsigned char idx2, |
7643 | c227f099 | Anthony Liguori | opc_handler_t *handler) |
7644 | a750fc0b | j_mayer | { |
7645 | a750fc0b | j_mayer | if (table[idx1] == &invalid_handler) {
|
7646 | a750fc0b | j_mayer | if (create_new_table(table, idx1) < 0) { |
7647 | a750fc0b | j_mayer | printf("*** ERROR: unable to create indirect table "
|
7648 | a750fc0b | j_mayer | "idx=%02x\n", idx1);
|
7649 | a750fc0b | j_mayer | return -1; |
7650 | a750fc0b | j_mayer | } |
7651 | a750fc0b | j_mayer | } else {
|
7652 | a750fc0b | j_mayer | if (!is_indirect_opcode(table[idx1])) {
|
7653 | a750fc0b | j_mayer | printf("*** ERROR: idx %02x already assigned to a direct "
|
7654 | a750fc0b | j_mayer | "opcode\n", idx1);
|
7655 | 4c1b1bfe | j_mayer | #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
|
7656 | 4c1b1bfe | j_mayer | printf(" Registered handler '%s' - new handler '%s'\n",
|
7657 | 4c1b1bfe | j_mayer | ind_table(table[idx1])[idx2]->oname, handler->oname); |
7658 | 4c1b1bfe | j_mayer | #endif
|
7659 | a750fc0b | j_mayer | return -1; |
7660 | a750fc0b | j_mayer | } |
7661 | 3a607854 | j_mayer | } |
7662 | a750fc0b | j_mayer | if (handler != NULL && |
7663 | a750fc0b | j_mayer | insert_in_table(ind_table(table[idx1]), idx2, handler) < 0) {
|
7664 | a750fc0b | j_mayer | printf("*** ERROR: opcode %02x already assigned in "
|
7665 | a750fc0b | j_mayer | "opcode table %02x\n", idx2, idx1);
|
7666 | 4c1b1bfe | j_mayer | #if defined(DO_PPC_STATISTICS) || defined(PPC_DUMP_CPU)
|
7667 | 4c1b1bfe | j_mayer | printf(" Registered handler '%s' - new handler '%s'\n",
|
7668 | 4c1b1bfe | j_mayer | ind_table(table[idx1])[idx2]->oname, handler->oname); |
7669 | 4c1b1bfe | j_mayer | #endif
|
7670 | a750fc0b | j_mayer | return -1; |
7671 | 3a607854 | j_mayer | } |
7672 | a750fc0b | j_mayer | |
7673 | a750fc0b | j_mayer | return 0; |
7674 | a750fc0b | j_mayer | } |
7675 | a750fc0b | j_mayer | |
7676 | c227f099 | Anthony Liguori | static int register_ind_insn (opc_handler_t **ppc_opcodes, |
7677 | a750fc0b | j_mayer | unsigned char idx1, unsigned char idx2, |
7678 | c227f099 | Anthony Liguori | opc_handler_t *handler) |
7679 | a750fc0b | j_mayer | { |
7680 | a750fc0b | j_mayer | int ret;
|
7681 | a750fc0b | j_mayer | |
7682 | a750fc0b | j_mayer | ret = register_ind_in_table(ppc_opcodes, idx1, idx2, handler); |
7683 | a750fc0b | j_mayer | |
7684 | a750fc0b | j_mayer | return ret;
|
7685 | a750fc0b | j_mayer | } |
7686 | a750fc0b | j_mayer | |
7687 | c227f099 | Anthony Liguori | static int register_dblind_insn (opc_handler_t **ppc_opcodes, |
7688 | a750fc0b | j_mayer | unsigned char idx1, unsigned char idx2, |
7689 | c227f099 | Anthony Liguori | unsigned char idx3, opc_handler_t *handler) |
7690 | a750fc0b | j_mayer | { |
7691 | a750fc0b | j_mayer | if (register_ind_in_table(ppc_opcodes, idx1, idx2, NULL) < 0) { |
7692 | a750fc0b | j_mayer | printf("*** ERROR: unable to join indirect table idx "
|
7693 | a750fc0b | j_mayer | "[%02x-%02x]\n", idx1, idx2);
|
7694 | a750fc0b | j_mayer | return -1; |
7695 | a750fc0b | j_mayer | } |
7696 | a750fc0b | j_mayer | if (register_ind_in_table(ind_table(ppc_opcodes[idx1]), idx2, idx3,
|
7697 | a750fc0b | j_mayer | handler) < 0) {
|
7698 | a750fc0b | j_mayer | printf("*** ERROR: unable to insert opcode "
|
7699 | a750fc0b | j_mayer | "[%02x-%02x-%02x]\n", idx1, idx2, idx3);
|
7700 | a750fc0b | j_mayer | return -1; |
7701 | a750fc0b | j_mayer | } |
7702 | a750fc0b | j_mayer | |
7703 | a750fc0b | j_mayer | return 0; |
7704 | a750fc0b | j_mayer | } |
7705 | a750fc0b | j_mayer | |
7706 | c227f099 | Anthony Liguori | static int register_insn (opc_handler_t **ppc_opcodes, opcode_t *insn) |
7707 | a750fc0b | j_mayer | { |
7708 | a750fc0b | j_mayer | if (insn->opc2 != 0xFF) { |
7709 | a750fc0b | j_mayer | if (insn->opc3 != 0xFF) { |
7710 | a750fc0b | j_mayer | if (register_dblind_insn(ppc_opcodes, insn->opc1, insn->opc2,
|
7711 | a750fc0b | j_mayer | insn->opc3, &insn->handler) < 0)
|
7712 | a750fc0b | j_mayer | return -1; |
7713 | a750fc0b | j_mayer | } else {
|
7714 | a750fc0b | j_mayer | if (register_ind_insn(ppc_opcodes, insn->opc1,
|
7715 | a750fc0b | j_mayer | insn->opc2, &insn->handler) < 0)
|
7716 | a750fc0b | j_mayer | return -1; |
7717 | a750fc0b | j_mayer | } |
7718 | a750fc0b | j_mayer | } else {
|
7719 | a750fc0b | j_mayer | if (register_direct_insn(ppc_opcodes, insn->opc1, &insn->handler) < 0) |
7720 | a750fc0b | j_mayer | return -1; |
7721 | a750fc0b | j_mayer | } |
7722 | a750fc0b | j_mayer | |
7723 | a750fc0b | j_mayer | return 0; |
7724 | a750fc0b | j_mayer | } |
7725 | a750fc0b | j_mayer | |
7726 | c227f099 | Anthony Liguori | static int test_opcode_table (opc_handler_t **table, int len) |
7727 | a750fc0b | j_mayer | { |
7728 | a750fc0b | j_mayer | int i, count, tmp;
|
7729 | a750fc0b | j_mayer | |
7730 | a750fc0b | j_mayer | for (i = 0, count = 0; i < len; i++) { |
7731 | a750fc0b | j_mayer | /* Consistency fixup */
|
7732 | a750fc0b | j_mayer | if (table[i] == NULL) |
7733 | a750fc0b | j_mayer | table[i] = &invalid_handler; |
7734 | a750fc0b | j_mayer | if (table[i] != &invalid_handler) {
|
7735 | a750fc0b | j_mayer | if (is_indirect_opcode(table[i])) {
|
7736 | c227f099 | Anthony Liguori | tmp = test_opcode_table(ind_table(table[i]), 0x20);
|
7737 | a750fc0b | j_mayer | if (tmp == 0) { |
7738 | a750fc0b | j_mayer | free(table[i]); |
7739 | a750fc0b | j_mayer | table[i] = &invalid_handler; |
7740 | a750fc0b | j_mayer | } else {
|
7741 | a750fc0b | j_mayer | count++; |
7742 | a750fc0b | j_mayer | } |
7743 | a750fc0b | j_mayer | } else {
|
7744 | a750fc0b | j_mayer | count++; |
7745 | a750fc0b | j_mayer | } |
7746 | a750fc0b | j_mayer | } |
7747 | a750fc0b | j_mayer | } |
7748 | a750fc0b | j_mayer | |
7749 | a750fc0b | j_mayer | return count;
|
7750 | a750fc0b | j_mayer | } |
7751 | a750fc0b | j_mayer | |
7752 | c227f099 | Anthony Liguori | static void fix_opcode_tables (opc_handler_t **ppc_opcodes) |
7753 | a750fc0b | j_mayer | { |
7754 | c227f099 | Anthony Liguori | if (test_opcode_table(ppc_opcodes, 0x40) == 0) |
7755 | a750fc0b | j_mayer | printf("*** WARNING: no opcode defined !\n");
|
7756 | a750fc0b | j_mayer | } |
7757 | a750fc0b | j_mayer | |
7758 | a750fc0b | j_mayer | /*****************************************************************************/
|
7759 | 2985b86b | Andreas Färber | static void create_ppc_opcodes(PowerPCCPU *cpu, Error **errp) |
7760 | a750fc0b | j_mayer | { |
7761 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
7762 | 2985b86b | Andreas Färber | CPUPPCState *env = &cpu->env; |
7763 | c227f099 | Anthony Liguori | opcode_t *opc; |
7764 | a750fc0b | j_mayer | |
7765 | a750fc0b | j_mayer | fill_new_table(env->opcodes, 0x40);
|
7766 | 5c55ff99 | Blue Swirl | for (opc = opcodes; opc < &opcodes[ARRAY_SIZE(opcodes)]; opc++) {
|
7767 | cfe34f44 | Andreas Färber | if (((opc->handler.type & pcc->insns_flags) != 0) || |
7768 | cfe34f44 | Andreas Färber | ((opc->handler.type2 & pcc->insns_flags2) != 0)) {
|
7769 | a750fc0b | j_mayer | if (register_insn(env->opcodes, opc) < 0) { |
7770 | 2985b86b | Andreas Färber | error_setg(errp, "ERROR initializing PowerPC instruction "
|
7771 | 312fd5f2 | Markus Armbruster | "0x%02x 0x%02x 0x%02x", opc->opc1, opc->opc2,
|
7772 | 2985b86b | Andreas Färber | opc->opc3); |
7773 | 2985b86b | Andreas Färber | return;
|
7774 | a750fc0b | j_mayer | } |
7775 | a750fc0b | j_mayer | } |
7776 | a750fc0b | j_mayer | } |
7777 | c227f099 | Anthony Liguori | fix_opcode_tables(env->opcodes); |
7778 | a750fc0b | j_mayer | fflush(stdout); |
7779 | a750fc0b | j_mayer | fflush(stderr); |
7780 | a750fc0b | j_mayer | } |
7781 | a750fc0b | j_mayer | |
7782 | a750fc0b | j_mayer | #if defined(PPC_DUMP_CPU)
|
7783 | 25ba3a68 | j_mayer | static void dump_ppc_insns (CPUPPCState *env) |
7784 | a750fc0b | j_mayer | { |
7785 | c227f099 | Anthony Liguori | opc_handler_t **table, *handler; |
7786 | b55266b5 | blueswir1 | const char *p, *q; |
7787 | a750fc0b | j_mayer | uint8_t opc1, opc2, opc3; |
7788 | a750fc0b | j_mayer | |
7789 | a750fc0b | j_mayer | printf("Instructions set:\n");
|
7790 | a750fc0b | j_mayer | /* opc1 is 6 bits long */
|
7791 | a750fc0b | j_mayer | for (opc1 = 0x00; opc1 < 0x40; opc1++) { |
7792 | a750fc0b | j_mayer | table = env->opcodes; |
7793 | a750fc0b | j_mayer | handler = table[opc1]; |
7794 | a750fc0b | j_mayer | if (is_indirect_opcode(handler)) {
|
7795 | a750fc0b | j_mayer | /* opc2 is 5 bits long */
|
7796 | a750fc0b | j_mayer | for (opc2 = 0; opc2 < 0x20; opc2++) { |
7797 | a750fc0b | j_mayer | table = env->opcodes; |
7798 | a750fc0b | j_mayer | handler = env->opcodes[opc1]; |
7799 | a750fc0b | j_mayer | table = ind_table(handler); |
7800 | a750fc0b | j_mayer | handler = table[opc2]; |
7801 | a750fc0b | j_mayer | if (is_indirect_opcode(handler)) {
|
7802 | a750fc0b | j_mayer | table = ind_table(handler); |
7803 | a750fc0b | j_mayer | /* opc3 is 5 bits long */
|
7804 | a750fc0b | j_mayer | for (opc3 = 0; opc3 < 0x20; opc3++) { |
7805 | a750fc0b | j_mayer | handler = table[opc3]; |
7806 | a750fc0b | j_mayer | if (handler->handler != &gen_invalid) {
|
7807 | 4c1b1bfe | j_mayer | /* Special hack to properly dump SPE insns */
|
7808 | 4c1b1bfe | j_mayer | p = strchr(handler->oname, '_');
|
7809 | 4c1b1bfe | j_mayer | if (p == NULL) { |
7810 | 4c1b1bfe | j_mayer | printf("INSN: %02x %02x %02x (%02d %04d) : "
|
7811 | 4c1b1bfe | j_mayer | "%s\n",
|
7812 | 4c1b1bfe | j_mayer | opc1, opc2, opc3, opc1, |
7813 | 4c1b1bfe | j_mayer | (opc3 << 5) | opc2,
|
7814 | 4c1b1bfe | j_mayer | handler->oname); |
7815 | 4c1b1bfe | j_mayer | } else {
|
7816 | 4c1b1bfe | j_mayer | q = "speundef";
|
7817 | 4c1b1bfe | j_mayer | if ((p - handler->oname) != strlen(q) ||
|
7818 | 4c1b1bfe | j_mayer | memcmp(handler->oname, q, strlen(q)) != 0) {
|
7819 | 4c1b1bfe | j_mayer | /* First instruction */
|
7820 | 4c1b1bfe | j_mayer | printf("INSN: %02x %02x %02x (%02d %04d) : "
|
7821 | 4c1b1bfe | j_mayer | "%.*s\n",
|
7822 | 4c1b1bfe | j_mayer | opc1, opc2 << 1, opc3, opc1,
|
7823 | 4c1b1bfe | j_mayer | (opc3 << 6) | (opc2 << 1), |
7824 | 4c1b1bfe | j_mayer | (int)(p - handler->oname),
|
7825 | 4c1b1bfe | j_mayer | handler->oname); |
7826 | 4c1b1bfe | j_mayer | } |
7827 | 4c1b1bfe | j_mayer | if (strcmp(p + 1, q) != 0) { |
7828 | 4c1b1bfe | j_mayer | /* Second instruction */
|
7829 | 4c1b1bfe | j_mayer | printf("INSN: %02x %02x %02x (%02d %04d) : "
|
7830 | 4c1b1bfe | j_mayer | "%s\n",
|
7831 | 4c1b1bfe | j_mayer | opc1, (opc2 << 1) | 1, opc3, opc1, |
7832 | 4c1b1bfe | j_mayer | (opc3 << 6) | (opc2 << 1) | 1, |
7833 | 4c1b1bfe | j_mayer | p + 1);
|
7834 | 4c1b1bfe | j_mayer | } |
7835 | 4c1b1bfe | j_mayer | } |
7836 | a750fc0b | j_mayer | } |
7837 | a750fc0b | j_mayer | } |
7838 | a750fc0b | j_mayer | } else {
|
7839 | a750fc0b | j_mayer | if (handler->handler != &gen_invalid) {
|
7840 | a750fc0b | j_mayer | printf("INSN: %02x %02x -- (%02d %04d) : %s\n",
|
7841 | a750fc0b | j_mayer | opc1, opc2, opc1, opc2, handler->oname); |
7842 | a750fc0b | j_mayer | } |
7843 | a750fc0b | j_mayer | } |
7844 | a750fc0b | j_mayer | } |
7845 | a750fc0b | j_mayer | } else {
|
7846 | a750fc0b | j_mayer | if (handler->handler != &gen_invalid) {
|
7847 | a750fc0b | j_mayer | printf("INSN: %02x -- -- (%02d ----) : %s\n",
|
7848 | a750fc0b | j_mayer | opc1, opc1, handler->oname); |
7849 | a750fc0b | j_mayer | } |
7850 | a750fc0b | j_mayer | } |
7851 | a750fc0b | j_mayer | } |
7852 | a750fc0b | j_mayer | } |
7853 | 3a607854 | j_mayer | #endif
|
7854 | a750fc0b | j_mayer | |
7855 | 1328c2bf | Andreas Färber | static int gdb_get_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7856 | 24951522 | aurel32 | { |
7857 | 24951522 | aurel32 | if (n < 32) { |
7858 | 24951522 | aurel32 | stfq_p(mem_buf, env->fpr[n]); |
7859 | 24951522 | aurel32 | return 8; |
7860 | 24951522 | aurel32 | } |
7861 | 24951522 | aurel32 | if (n == 32) { |
7862 | 5a576fb3 | Fabien Chouteau | stl_p(mem_buf, env->fpscr); |
7863 | 24951522 | aurel32 | return 4; |
7864 | 24951522 | aurel32 | } |
7865 | 24951522 | aurel32 | return 0; |
7866 | 24951522 | aurel32 | } |
7867 | 24951522 | aurel32 | |
7868 | 1328c2bf | Andreas Färber | static int gdb_set_float_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7869 | 24951522 | aurel32 | { |
7870 | 24951522 | aurel32 | if (n < 32) { |
7871 | 24951522 | aurel32 | env->fpr[n] = ldfq_p(mem_buf); |
7872 | 24951522 | aurel32 | return 8; |
7873 | 24951522 | aurel32 | } |
7874 | 24951522 | aurel32 | if (n == 32) { |
7875 | 24951522 | aurel32 | /* FPSCR not implemented */
|
7876 | 24951522 | aurel32 | return 4; |
7877 | 24951522 | aurel32 | } |
7878 | 24951522 | aurel32 | return 0; |
7879 | 24951522 | aurel32 | } |
7880 | 24951522 | aurel32 | |
7881 | 1328c2bf | Andreas Färber | static int gdb_get_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7882 | b4f8d821 | aurel32 | { |
7883 | b4f8d821 | aurel32 | if (n < 32) { |
7884 | e2542fe2 | Juan Quintela | #ifdef HOST_WORDS_BIGENDIAN
|
7885 | b4f8d821 | aurel32 | stq_p(mem_buf, env->avr[n].u64[0]);
|
7886 | b4f8d821 | aurel32 | stq_p(mem_buf+8, env->avr[n].u64[1]); |
7887 | b4f8d821 | aurel32 | #else
|
7888 | b4f8d821 | aurel32 | stq_p(mem_buf, env->avr[n].u64[1]);
|
7889 | b4f8d821 | aurel32 | stq_p(mem_buf+8, env->avr[n].u64[0]); |
7890 | b4f8d821 | aurel32 | #endif
|
7891 | b4f8d821 | aurel32 | return 16; |
7892 | b4f8d821 | aurel32 | } |
7893 | 70976a79 | aurel32 | if (n == 32) { |
7894 | b4f8d821 | aurel32 | stl_p(mem_buf, env->vscr); |
7895 | b4f8d821 | aurel32 | return 4; |
7896 | b4f8d821 | aurel32 | } |
7897 | 70976a79 | aurel32 | if (n == 33) { |
7898 | b4f8d821 | aurel32 | stl_p(mem_buf, (uint32_t)env->spr[SPR_VRSAVE]); |
7899 | b4f8d821 | aurel32 | return 4; |
7900 | b4f8d821 | aurel32 | } |
7901 | b4f8d821 | aurel32 | return 0; |
7902 | b4f8d821 | aurel32 | } |
7903 | b4f8d821 | aurel32 | |
7904 | 1328c2bf | Andreas Färber | static int gdb_set_avr_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7905 | b4f8d821 | aurel32 | { |
7906 | b4f8d821 | aurel32 | if (n < 32) { |
7907 | e2542fe2 | Juan Quintela | #ifdef HOST_WORDS_BIGENDIAN
|
7908 | b4f8d821 | aurel32 | env->avr[n].u64[0] = ldq_p(mem_buf);
|
7909 | b4f8d821 | aurel32 | env->avr[n].u64[1] = ldq_p(mem_buf+8); |
7910 | b4f8d821 | aurel32 | #else
|
7911 | b4f8d821 | aurel32 | env->avr[n].u64[1] = ldq_p(mem_buf);
|
7912 | b4f8d821 | aurel32 | env->avr[n].u64[0] = ldq_p(mem_buf+8); |
7913 | b4f8d821 | aurel32 | #endif
|
7914 | b4f8d821 | aurel32 | return 16; |
7915 | b4f8d821 | aurel32 | } |
7916 | 70976a79 | aurel32 | if (n == 32) { |
7917 | b4f8d821 | aurel32 | env->vscr = ldl_p(mem_buf); |
7918 | b4f8d821 | aurel32 | return 4; |
7919 | b4f8d821 | aurel32 | } |
7920 | 70976a79 | aurel32 | if (n == 33) { |
7921 | b4f8d821 | aurel32 | env->spr[SPR_VRSAVE] = (target_ulong)ldl_p(mem_buf); |
7922 | b4f8d821 | aurel32 | return 4; |
7923 | b4f8d821 | aurel32 | } |
7924 | b4f8d821 | aurel32 | return 0; |
7925 | b4f8d821 | aurel32 | } |
7926 | b4f8d821 | aurel32 | |
7927 | 1328c2bf | Andreas Färber | static int gdb_get_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7928 | 688890f7 | aurel32 | { |
7929 | 688890f7 | aurel32 | if (n < 32) { |
7930 | 688890f7 | aurel32 | #if defined(TARGET_PPC64)
|
7931 | 688890f7 | aurel32 | stl_p(mem_buf, env->gpr[n] >> 32);
|
7932 | 688890f7 | aurel32 | #else
|
7933 | 688890f7 | aurel32 | stl_p(mem_buf, env->gprh[n]); |
7934 | 688890f7 | aurel32 | #endif
|
7935 | 688890f7 | aurel32 | return 4; |
7936 | 688890f7 | aurel32 | } |
7937 | 70976a79 | aurel32 | if (n == 32) { |
7938 | 688890f7 | aurel32 | stq_p(mem_buf, env->spe_acc); |
7939 | 688890f7 | aurel32 | return 8; |
7940 | 688890f7 | aurel32 | } |
7941 | 70976a79 | aurel32 | if (n == 33) { |
7942 | d34defbc | aurel32 | stl_p(mem_buf, env->spe_fscr); |
7943 | 688890f7 | aurel32 | return 4; |
7944 | 688890f7 | aurel32 | } |
7945 | 688890f7 | aurel32 | return 0; |
7946 | 688890f7 | aurel32 | } |
7947 | 688890f7 | aurel32 | |
7948 | 1328c2bf | Andreas Färber | static int gdb_set_spe_reg(CPUPPCState *env, uint8_t *mem_buf, int n) |
7949 | 688890f7 | aurel32 | { |
7950 | 688890f7 | aurel32 | if (n < 32) { |
7951 | 688890f7 | aurel32 | #if defined(TARGET_PPC64)
|
7952 | 688890f7 | aurel32 | target_ulong lo = (uint32_t)env->gpr[n]; |
7953 | 688890f7 | aurel32 | target_ulong hi = (target_ulong)ldl_p(mem_buf) << 32;
|
7954 | 688890f7 | aurel32 | env->gpr[n] = lo | hi; |
7955 | 688890f7 | aurel32 | #else
|
7956 | 688890f7 | aurel32 | env->gprh[n] = ldl_p(mem_buf); |
7957 | 688890f7 | aurel32 | #endif
|
7958 | 688890f7 | aurel32 | return 4; |
7959 | 688890f7 | aurel32 | } |
7960 | 70976a79 | aurel32 | if (n == 32) { |
7961 | 688890f7 | aurel32 | env->spe_acc = ldq_p(mem_buf); |
7962 | 688890f7 | aurel32 | return 8; |
7963 | 688890f7 | aurel32 | } |
7964 | 70976a79 | aurel32 | if (n == 33) { |
7965 | d34defbc | aurel32 | env->spe_fscr = ldl_p(mem_buf); |
7966 | 688890f7 | aurel32 | return 4; |
7967 | 688890f7 | aurel32 | } |
7968 | 688890f7 | aurel32 | return 0; |
7969 | 688890f7 | aurel32 | } |
7970 | 688890f7 | aurel32 | |
7971 | 55e5c285 | Andreas Färber | static int ppc_fixup_cpu(PowerPCCPU *cpu) |
7972 | 12b1143b | David Gibson | { |
7973 | 55e5c285 | Andreas Färber | CPUPPCState *env = &cpu->env; |
7974 | 55e5c285 | Andreas Färber | |
7975 | 12b1143b | David Gibson | /* TCG doesn't (yet) emulate some groups of instructions that
|
7976 | 12b1143b | David Gibson | * are implemented on some otherwise supported CPUs (e.g. VSX
|
7977 | 12b1143b | David Gibson | * and decimal floating point instructions on POWER7). We
|
7978 | 12b1143b | David Gibson | * remove unsupported instruction groups from the cpu state's
|
7979 | 12b1143b | David Gibson | * instruction masks and hope the guest can cope. For at
|
7980 | 12b1143b | David Gibson | * least the pseries machine, the unavailability of these
|
7981 | 12b1143b | David Gibson | * instructions can be advertised to the guest via the device
|
7982 | 12b1143b | David Gibson | * tree. */
|
7983 | 12b1143b | David Gibson | if ((env->insns_flags & ~PPC_TCG_INSNS)
|
7984 | 12b1143b | David Gibson | || (env->insns_flags2 & ~PPC_TCG_INSNS2)) { |
7985 | 12b1143b | David Gibson | fprintf(stderr, "Warning: Disabling some instructions which are not "
|
7986 | 12b1143b | David Gibson | "emulated by TCG (0x%" PRIx64 ", 0x%" PRIx64 ")\n", |
7987 | 12b1143b | David Gibson | env->insns_flags & ~PPC_TCG_INSNS, |
7988 | 12b1143b | David Gibson | env->insns_flags2 & ~PPC_TCG_INSNS2); |
7989 | 12b1143b | David Gibson | } |
7990 | 12b1143b | David Gibson | env->insns_flags &= PPC_TCG_INSNS; |
7991 | 12b1143b | David Gibson | env->insns_flags2 &= PPC_TCG_INSNS2; |
7992 | 12b1143b | David Gibson | return 0; |
7993 | 12b1143b | David Gibson | } |
7994 | 12b1143b | David Gibson | |
7995 | 4776ce60 | Andreas Färber | static void ppc_cpu_realizefn(DeviceState *dev, Error **errp) |
7996 | a750fc0b | j_mayer | { |
7997 | 4776ce60 | Andreas Färber | PowerPCCPU *cpu = POWERPC_CPU(dev); |
7998 | 2985b86b | Andreas Färber | CPUPPCState *env = &cpu->env; |
7999 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
8000 | 2985b86b | Andreas Färber | Error *local_err = NULL;
|
8001 | fe828a4d | Mike Qiu | #if !defined(CONFIG_USER_ONLY)
|
8002 | fe828a4d | Mike Qiu | int max_smt = kvm_enabled() ? kvmppc_smt_threads() : 1; |
8003 | fe828a4d | Mike Qiu | #endif
|
8004 | fe828a4d | Mike Qiu | |
8005 | fe828a4d | Mike Qiu | #if !defined(CONFIG_USER_ONLY)
|
8006 | fe828a4d | Mike Qiu | if (smp_threads > max_smt) {
|
8007 | 5e95acc8 | Andreas Färber | error_setg(errp, "Cannot support more than %d threads on PPC with %s",
|
8008 | 5e95acc8 | Andreas Färber | max_smt, kvm_enabled() ? "KVM" : "TCG"); |
8009 | 5e95acc8 | Andreas Färber | return;
|
8010 | fe828a4d | Mike Qiu | } |
8011 | fe828a4d | Mike Qiu | #endif
|
8012 | 4656e1f0 | Benjamin Herrenschmidt | |
8013 | 12b1143b | David Gibson | if (kvm_enabled()) {
|
8014 | 55e5c285 | Andreas Färber | if (kvmppc_fixup_cpu(cpu) != 0) { |
8015 | 2985b86b | Andreas Färber | error_setg(errp, "Unable to virtualize selected CPU with KVM");
|
8016 | 2985b86b | Andreas Färber | return;
|
8017 | 12b1143b | David Gibson | } |
8018 | 12b1143b | David Gibson | } else {
|
8019 | 55e5c285 | Andreas Färber | if (ppc_fixup_cpu(cpu) != 0) { |
8020 | 2985b86b | Andreas Färber | error_setg(errp, "Unable to emulate selected CPU with TCG");
|
8021 | 2985b86b | Andreas Färber | return;
|
8022 | 12b1143b | David Gibson | } |
8023 | 12b1143b | David Gibson | } |
8024 | 12b1143b | David Gibson | |
8025 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8026 | 4d7fb187 | Andreas Färber | if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
|
8027 | 4d7fb187 | Andreas Färber | error_setg(errp, "CPU does not possess a BookE MMU. "
|
8028 | 4d7fb187 | Andreas Färber | "Please use qemu-system-ppc or qemu-system-ppc64 instead "
|
8029 | 4d7fb187 | Andreas Färber | "or choose another CPU model.");
|
8030 | 4d7fb187 | Andreas Färber | return;
|
8031 | 4d7fb187 | Andreas Färber | } |
8032 | 4d7fb187 | Andreas Färber | #endif
|
8033 | 4d7fb187 | Andreas Färber | |
8034 | 2985b86b | Andreas Färber | create_ppc_opcodes(cpu, &local_err); |
8035 | 2985b86b | Andreas Färber | if (local_err != NULL) { |
8036 | 2985b86b | Andreas Färber | error_propagate(errp, local_err); |
8037 | 2985b86b | Andreas Färber | return;
|
8038 | 2985b86b | Andreas Färber | } |
8039 | cfe34f44 | Andreas Färber | init_ppc_proc(cpu); |
8040 | 24951522 | aurel32 | |
8041 | cfe34f44 | Andreas Färber | if (pcc->insns_flags & PPC_FLOAT) {
|
8042 | 24951522 | aurel32 | gdb_register_coprocessor(env, gdb_get_float_reg, gdb_set_float_reg, |
8043 | 24951522 | aurel32 | 33, "power-fpu.xml", 0); |
8044 | 24951522 | aurel32 | } |
8045 | cfe34f44 | Andreas Färber | if (pcc->insns_flags & PPC_ALTIVEC) {
|
8046 | b4f8d821 | aurel32 | gdb_register_coprocessor(env, gdb_get_avr_reg, gdb_set_avr_reg, |
8047 | b4f8d821 | aurel32 | 34, "power-altivec.xml", 0); |
8048 | b4f8d821 | aurel32 | } |
8049 | cfe34f44 | Andreas Färber | if (pcc->insns_flags & PPC_SPE) {
|
8050 | 688890f7 | aurel32 | gdb_register_coprocessor(env, gdb_get_spe_reg, gdb_set_spe_reg, |
8051 | 688890f7 | aurel32 | 34, "power-spe.xml", 0); |
8052 | 688890f7 | aurel32 | } |
8053 | 688890f7 | aurel32 | |
8054 | 2985b86b | Andreas Färber | qemu_init_vcpu(env); |
8055 | 2985b86b | Andreas Färber | |
8056 | 4776ce60 | Andreas Färber | pcc->parent_realize(dev, errp); |
8057 | 4776ce60 | Andreas Färber | |
8058 | a750fc0b | j_mayer | #if defined(PPC_DUMP_CPU)
|
8059 | 3a607854 | j_mayer | { |
8060 | b55266b5 | blueswir1 | const char *mmu_model, *excp_model, *bus_model; |
8061 | a750fc0b | j_mayer | switch (env->mmu_model) {
|
8062 | a750fc0b | j_mayer | case POWERPC_MMU_32B:
|
8063 | a750fc0b | j_mayer | mmu_model = "PowerPC 32";
|
8064 | a750fc0b | j_mayer | break;
|
8065 | a750fc0b | j_mayer | case POWERPC_MMU_SOFT_6xx:
|
8066 | a750fc0b | j_mayer | mmu_model = "PowerPC 6xx/7xx with software driven TLBs";
|
8067 | a750fc0b | j_mayer | break;
|
8068 | a750fc0b | j_mayer | case POWERPC_MMU_SOFT_74xx:
|
8069 | a750fc0b | j_mayer | mmu_model = "PowerPC 74xx with software driven TLBs";
|
8070 | a750fc0b | j_mayer | break;
|
8071 | a750fc0b | j_mayer | case POWERPC_MMU_SOFT_4xx:
|
8072 | a750fc0b | j_mayer | mmu_model = "PowerPC 4xx with software driven TLBs";
|
8073 | a750fc0b | j_mayer | break;
|
8074 | a750fc0b | j_mayer | case POWERPC_MMU_SOFT_4xx_Z:
|
8075 | a750fc0b | j_mayer | mmu_model = "PowerPC 4xx with software driven TLBs "
|
8076 | a750fc0b | j_mayer | "and zones protections";
|
8077 | a750fc0b | j_mayer | break;
|
8078 | b4095fed | j_mayer | case POWERPC_MMU_REAL:
|
8079 | b4095fed | j_mayer | mmu_model = "PowerPC real mode only";
|
8080 | b4095fed | j_mayer | break;
|
8081 | b4095fed | j_mayer | case POWERPC_MMU_MPC8xx:
|
8082 | b4095fed | j_mayer | mmu_model = "PowerPC MPC8xx";
|
8083 | a750fc0b | j_mayer | break;
|
8084 | a750fc0b | j_mayer | case POWERPC_MMU_BOOKE:
|
8085 | a750fc0b | j_mayer | mmu_model = "PowerPC BookE";
|
8086 | a750fc0b | j_mayer | break;
|
8087 | 01662f3e | Alexander Graf | case POWERPC_MMU_BOOKE206:
|
8088 | 01662f3e | Alexander Graf | mmu_model = "PowerPC BookE 2.06";
|
8089 | a750fc0b | j_mayer | break;
|
8090 | b4095fed | j_mayer | case POWERPC_MMU_601:
|
8091 | b4095fed | j_mayer | mmu_model = "PowerPC 601";
|
8092 | b4095fed | j_mayer | break;
|
8093 | 00af685f | j_mayer | #if defined (TARGET_PPC64)
|
8094 | 00af685f | j_mayer | case POWERPC_MMU_64B:
|
8095 | 00af685f | j_mayer | mmu_model = "PowerPC 64";
|
8096 | 00af685f | j_mayer | break;
|
8097 | add78955 | j_mayer | case POWERPC_MMU_620:
|
8098 | add78955 | j_mayer | mmu_model = "PowerPC 620";
|
8099 | add78955 | j_mayer | break;
|
8100 | 00af685f | j_mayer | #endif
|
8101 | a750fc0b | j_mayer | default:
|
8102 | a750fc0b | j_mayer | mmu_model = "Unknown or invalid";
|
8103 | a750fc0b | j_mayer | break;
|
8104 | a750fc0b | j_mayer | } |
8105 | a750fc0b | j_mayer | switch (env->excp_model) {
|
8106 | a750fc0b | j_mayer | case POWERPC_EXCP_STD:
|
8107 | a750fc0b | j_mayer | excp_model = "PowerPC";
|
8108 | a750fc0b | j_mayer | break;
|
8109 | a750fc0b | j_mayer | case POWERPC_EXCP_40x:
|
8110 | a750fc0b | j_mayer | excp_model = "PowerPC 40x";
|
8111 | a750fc0b | j_mayer | break;
|
8112 | a750fc0b | j_mayer | case POWERPC_EXCP_601:
|
8113 | a750fc0b | j_mayer | excp_model = "PowerPC 601";
|
8114 | a750fc0b | j_mayer | break;
|
8115 | a750fc0b | j_mayer | case POWERPC_EXCP_602:
|
8116 | a750fc0b | j_mayer | excp_model = "PowerPC 602";
|
8117 | a750fc0b | j_mayer | break;
|
8118 | a750fc0b | j_mayer | case POWERPC_EXCP_603:
|
8119 | a750fc0b | j_mayer | excp_model = "PowerPC 603";
|
8120 | a750fc0b | j_mayer | break;
|
8121 | a750fc0b | j_mayer | case POWERPC_EXCP_603E:
|
8122 | a750fc0b | j_mayer | excp_model = "PowerPC 603e";
|
8123 | a750fc0b | j_mayer | break;
|
8124 | a750fc0b | j_mayer | case POWERPC_EXCP_604:
|
8125 | a750fc0b | j_mayer | excp_model = "PowerPC 604";
|
8126 | a750fc0b | j_mayer | break;
|
8127 | a750fc0b | j_mayer | case POWERPC_EXCP_7x0:
|
8128 | a750fc0b | j_mayer | excp_model = "PowerPC 740/750";
|
8129 | a750fc0b | j_mayer | break;
|
8130 | a750fc0b | j_mayer | case POWERPC_EXCP_7x5:
|
8131 | a750fc0b | j_mayer | excp_model = "PowerPC 745/755";
|
8132 | a750fc0b | j_mayer | break;
|
8133 | a750fc0b | j_mayer | case POWERPC_EXCP_74xx:
|
8134 | a750fc0b | j_mayer | excp_model = "PowerPC 74xx";
|
8135 | a750fc0b | j_mayer | break;
|
8136 | a750fc0b | j_mayer | case POWERPC_EXCP_BOOKE:
|
8137 | a750fc0b | j_mayer | excp_model = "PowerPC BookE";
|
8138 | a750fc0b | j_mayer | break;
|
8139 | 00af685f | j_mayer | #if defined (TARGET_PPC64)
|
8140 | 00af685f | j_mayer | case POWERPC_EXCP_970:
|
8141 | 00af685f | j_mayer | excp_model = "PowerPC 970";
|
8142 | 00af685f | j_mayer | break;
|
8143 | 00af685f | j_mayer | #endif
|
8144 | a750fc0b | j_mayer | default:
|
8145 | a750fc0b | j_mayer | excp_model = "Unknown or invalid";
|
8146 | a750fc0b | j_mayer | break;
|
8147 | a750fc0b | j_mayer | } |
8148 | a750fc0b | j_mayer | switch (env->bus_model) {
|
8149 | a750fc0b | j_mayer | case PPC_FLAGS_INPUT_6xx:
|
8150 | a750fc0b | j_mayer | bus_model = "PowerPC 6xx";
|
8151 | a750fc0b | j_mayer | break;
|
8152 | a750fc0b | j_mayer | case PPC_FLAGS_INPUT_BookE:
|
8153 | a750fc0b | j_mayer | bus_model = "PowerPC BookE";
|
8154 | a750fc0b | j_mayer | break;
|
8155 | a750fc0b | j_mayer | case PPC_FLAGS_INPUT_405:
|
8156 | a750fc0b | j_mayer | bus_model = "PowerPC 405";
|
8157 | a750fc0b | j_mayer | break;
|
8158 | a750fc0b | j_mayer | case PPC_FLAGS_INPUT_401:
|
8159 | a750fc0b | j_mayer | bus_model = "PowerPC 401/403";
|
8160 | a750fc0b | j_mayer | break;
|
8161 | b4095fed | j_mayer | case PPC_FLAGS_INPUT_RCPU:
|
8162 | b4095fed | j_mayer | bus_model = "RCPU / MPC8xx";
|
8163 | b4095fed | j_mayer | break;
|
8164 | 00af685f | j_mayer | #if defined (TARGET_PPC64)
|
8165 | 00af685f | j_mayer | case PPC_FLAGS_INPUT_970:
|
8166 | 00af685f | j_mayer | bus_model = "PowerPC 970";
|
8167 | 00af685f | j_mayer | break;
|
8168 | 00af685f | j_mayer | #endif
|
8169 | a750fc0b | j_mayer | default:
|
8170 | a750fc0b | j_mayer | bus_model = "Unknown or invalid";
|
8171 | a750fc0b | j_mayer | break;
|
8172 | a750fc0b | j_mayer | } |
8173 | a750fc0b | j_mayer | printf("PowerPC %-12s : PVR %08x MSR %016" PRIx64 "\n" |
8174 | a750fc0b | j_mayer | " MMU model : %s\n",
|
8175 | cfe34f44 | Andreas Färber | pcc->name, pcc->pvr, pcc->msr_mask, mmu_model); |
8176 | f2e63a42 | j_mayer | #if !defined(CONFIG_USER_ONLY)
|
8177 | a750fc0b | j_mayer | if (env->tlb != NULL) { |
8178 | a750fc0b | j_mayer | printf(" %d %s TLB in %d ways\n",
|
8179 | a750fc0b | j_mayer | env->nb_tlb, env->id_tlbs ? "splitted" : "merged", |
8180 | a750fc0b | j_mayer | env->nb_ways); |
8181 | a750fc0b | j_mayer | } |
8182 | f2e63a42 | j_mayer | #endif
|
8183 | a750fc0b | j_mayer | printf(" Exceptions model : %s\n"
|
8184 | a750fc0b | j_mayer | " Bus model : %s\n",
|
8185 | a750fc0b | j_mayer | excp_model, bus_model); |
8186 | 25ba3a68 | j_mayer | printf(" MSR features :\n");
|
8187 | 25ba3a68 | j_mayer | if (env->flags & POWERPC_FLAG_SPE)
|
8188 | 25ba3a68 | j_mayer | printf(" signal processing engine enable"
|
8189 | 25ba3a68 | j_mayer | "\n");
|
8190 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_VRE) |
8191 | 25ba3a68 | j_mayer | printf(" vector processor enable\n");
|
8192 | 25ba3a68 | j_mayer | if (env->flags & POWERPC_FLAG_TGPR)
|
8193 | 25ba3a68 | j_mayer | printf(" temporary GPRs\n");
|
8194 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_CE) |
8195 | 25ba3a68 | j_mayer | printf(" critical input enable\n");
|
8196 | 25ba3a68 | j_mayer | if (env->flags & POWERPC_FLAG_SE)
|
8197 | 25ba3a68 | j_mayer | printf(" single-step trace mode\n");
|
8198 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_DWE) |
8199 | 25ba3a68 | j_mayer | printf(" debug wait enable\n");
|
8200 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_UBLE) |
8201 | 25ba3a68 | j_mayer | printf(" user BTB lock enable\n");
|
8202 | 25ba3a68 | j_mayer | if (env->flags & POWERPC_FLAG_BE)
|
8203 | 25ba3a68 | j_mayer | printf(" branch-step trace mode\n");
|
8204 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_DE) |
8205 | 25ba3a68 | j_mayer | printf(" debug interrupt enable\n");
|
8206 | 25ba3a68 | j_mayer | if (env->flags & POWERPC_FLAG_PX)
|
8207 | 25ba3a68 | j_mayer | printf(" inclusive protection\n");
|
8208 | 25ba3a68 | j_mayer | else if (env->flags & POWERPC_FLAG_PMM) |
8209 | 25ba3a68 | j_mayer | printf(" performance monitor mark\n");
|
8210 | 25ba3a68 | j_mayer | if (env->flags == POWERPC_FLAG_NONE)
|
8211 | 25ba3a68 | j_mayer | printf(" none\n");
|
8212 | 4018bae9 | j_mayer | printf(" Time-base/decrementer clock source: %s\n",
|
8213 | 4018bae9 | j_mayer | env->flags & POWERPC_FLAG_RTC_CLK ? "RTC clock" : "bus clock"); |
8214 | a750fc0b | j_mayer | } |
8215 | a750fc0b | j_mayer | dump_ppc_insns(env); |
8216 | a750fc0b | j_mayer | dump_ppc_sprs(env); |
8217 | a750fc0b | j_mayer | fflush(stdout); |
8218 | 3a607854 | j_mayer | #endif
|
8219 | a750fc0b | j_mayer | } |
8220 | 3fc6c082 | bellard | |
8221 | 2985b86b | Andreas Färber | static gint ppc_cpu_compare_class_pvr(gconstpointer a, gconstpointer b)
|
8222 | f0ad8c34 | Alexander Graf | { |
8223 | 2985b86b | Andreas Färber | ObjectClass *oc = (ObjectClass *)a; |
8224 | 2985b86b | Andreas Färber | uint32_t pvr = *(uint32_t *)b; |
8225 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = (PowerPCCPUClass *)a; |
8226 | 2985b86b | Andreas Färber | |
8227 | 2985b86b | Andreas Färber | /* -cpu host does a PVR lookup during construction */
|
8228 | 2985b86b | Andreas Färber | if (unlikely(strcmp(object_class_get_name(oc),
|
8229 | 2985b86b | Andreas Färber | TYPE_HOST_POWERPC_CPU) == 0)) {
|
8230 | 2985b86b | Andreas Färber | return -1; |
8231 | f0ad8c34 | Alexander Graf | } |
8232 | f0ad8c34 | Alexander Graf | |
8233 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8234 | 4d7fb187 | Andreas Färber | if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
|
8235 | 4d7fb187 | Andreas Färber | return -1; |
8236 | 4d7fb187 | Andreas Färber | } |
8237 | 4d7fb187 | Andreas Färber | #endif
|
8238 | 4d7fb187 | Andreas Färber | |
8239 | cfe34f44 | Andreas Färber | return pcc->pvr == pvr ? 0 : -1; |
8240 | f0ad8c34 | Alexander Graf | } |
8241 | f0ad8c34 | Alexander Graf | |
8242 | 2985b86b | Andreas Färber | PowerPCCPUClass *ppc_cpu_class_by_pvr(uint32_t pvr) |
8243 | 3fc6c082 | bellard | { |
8244 | 2985b86b | Andreas Färber | GSList *list, *item; |
8245 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = NULL;
|
8246 | be40edcd | David Gibson | |
8247 | 2985b86b | Andreas Färber | list = object_class_get_list(TYPE_POWERPC_CPU, false);
|
8248 | 2985b86b | Andreas Färber | item = g_slist_find_custom(list, &pvr, ppc_cpu_compare_class_pvr); |
8249 | 2985b86b | Andreas Färber | if (item != NULL) { |
8250 | 2985b86b | Andreas Färber | pcc = POWERPC_CPU_CLASS(item->data); |
8251 | 3fc6c082 | bellard | } |
8252 | 2985b86b | Andreas Färber | g_slist_free(list); |
8253 | 2985b86b | Andreas Färber | |
8254 | 2985b86b | Andreas Färber | return pcc;
|
8255 | 2985b86b | Andreas Färber | } |
8256 | 2985b86b | Andreas Färber | |
8257 | 2985b86b | Andreas Färber | static gint ppc_cpu_compare_class_name(gconstpointer a, gconstpointer b)
|
8258 | 2985b86b | Andreas Färber | { |
8259 | 2985b86b | Andreas Färber | ObjectClass *oc = (ObjectClass *)a; |
8260 | 2985b86b | Andreas Färber | const char *name = b; |
8261 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8262 | 4d7fb187 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
8263 | 4d7fb187 | Andreas Färber | #endif
|
8264 | ee4e83ed | j_mayer | |
8265 | 2985b86b | Andreas Färber | if (strncasecmp(name, object_class_get_name(oc), strlen(name)) == 0 && |
8266 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8267 | 4d7fb187 | Andreas Färber | pcc->mmu_model == POWERPC_MMU_BOOKE && |
8268 | 4d7fb187 | Andreas Färber | #endif
|
8269 | 2985b86b | Andreas Färber | strcmp(object_class_get_name(oc) + strlen(name), |
8270 | 2985b86b | Andreas Färber | "-" TYPE_POWERPC_CPU) == 0) { |
8271 | 2985b86b | Andreas Färber | return 0; |
8272 | 2985b86b | Andreas Färber | } |
8273 | 2985b86b | Andreas Färber | return -1; |
8274 | 3fc6c082 | bellard | } |
8275 | 3fc6c082 | bellard | |
8276 | ee4e83ed | j_mayer | #include <ctype.h> |
8277 | 3fc6c082 | bellard | |
8278 | 2985b86b | Andreas Färber | static ObjectClass *ppc_cpu_class_by_name(const char *name) |
8279 | ee4e83ed | j_mayer | { |
8280 | 2985b86b | Andreas Färber | GSList *list, *item; |
8281 | 2985b86b | Andreas Färber | ObjectClass *ret = NULL;
|
8282 | b55266b5 | blueswir1 | const char *p; |
8283 | 2985b86b | Andreas Färber | int i, len;
|
8284 | ee4e83ed | j_mayer | |
8285 | 2985b86b | Andreas Färber | if (strcasecmp(name, "host") == 0) { |
8286 | 2985b86b | Andreas Färber | if (kvm_enabled()) {
|
8287 | 2985b86b | Andreas Färber | ret = object_class_by_name(TYPE_HOST_POWERPC_CPU); |
8288 | 2985b86b | Andreas Färber | } |
8289 | 2985b86b | Andreas Färber | return ret;
|
8290 | a1e98583 | David Gibson | } |
8291 | a1e98583 | David Gibson | |
8292 | ee4e83ed | j_mayer | /* Check if the given name is a PVR */
|
8293 | ee4e83ed | j_mayer | len = strlen(name); |
8294 | ee4e83ed | j_mayer | if (len == 10 && name[0] == '0' && name[1] == 'x') { |
8295 | ee4e83ed | j_mayer | p = name + 2;
|
8296 | ee4e83ed | j_mayer | goto check_pvr;
|
8297 | ee4e83ed | j_mayer | } else if (len == 8) { |
8298 | ee4e83ed | j_mayer | p = name; |
8299 | ee4e83ed | j_mayer | check_pvr:
|
8300 | ee4e83ed | j_mayer | for (i = 0; i < 8; i++) { |
8301 | cd390083 | blueswir1 | if (!qemu_isxdigit(*p++))
|
8302 | ee4e83ed | j_mayer | break;
|
8303 | ee4e83ed | j_mayer | } |
8304 | 2985b86b | Andreas Färber | if (i == 8) { |
8305 | 2985b86b | Andreas Färber | ret = OBJECT_CLASS(ppc_cpu_class_by_pvr(strtoul(name, NULL, 16))); |
8306 | 2985b86b | Andreas Färber | return ret;
|
8307 | f0ad8c34 | Alexander Graf | } |
8308 | 2985b86b | Andreas Färber | } |
8309 | f0ad8c34 | Alexander Graf | |
8310 | fd5ed418 | Andreas Färber | for (i = 0; i < ARRAY_SIZE(ppc_cpu_aliases); i++) { |
8311 | fd5ed418 | Andreas Färber | if (strcmp(ppc_cpu_aliases[i].alias, name) == 0) { |
8312 | fd5ed418 | Andreas Färber | return ppc_cpu_class_by_name(ppc_cpu_aliases[i].model);
|
8313 | fd5ed418 | Andreas Färber | } |
8314 | fd5ed418 | Andreas Färber | } |
8315 | fd5ed418 | Andreas Färber | |
8316 | 2985b86b | Andreas Färber | list = object_class_get_list(TYPE_POWERPC_CPU, false);
|
8317 | 2985b86b | Andreas Färber | item = g_slist_find_custom(list, name, ppc_cpu_compare_class_name); |
8318 | 2985b86b | Andreas Färber | if (item != NULL) { |
8319 | 2985b86b | Andreas Färber | ret = OBJECT_CLASS(item->data); |
8320 | 3fc6c082 | bellard | } |
8321 | 2985b86b | Andreas Färber | g_slist_free(list); |
8322 | ee4e83ed | j_mayer | |
8323 | ee4e83ed | j_mayer | return ret;
|
8324 | 3fc6c082 | bellard | } |
8325 | 3fc6c082 | bellard | |
8326 | 2985b86b | Andreas Färber | PowerPCCPU *cpu_ppc_init(const char *cpu_model) |
8327 | 3fc6c082 | bellard | { |
8328 | 2985b86b | Andreas Färber | PowerPCCPU *cpu; |
8329 | 2985b86b | Andreas Färber | CPUPPCState *env; |
8330 | 2985b86b | Andreas Färber | ObjectClass *oc; |
8331 | 2985b86b | Andreas Färber | Error *err = NULL;
|
8332 | 3fc6c082 | bellard | |
8333 | 2985b86b | Andreas Färber | oc = ppc_cpu_class_by_name(cpu_model); |
8334 | 2985b86b | Andreas Färber | if (oc == NULL) { |
8335 | 2985b86b | Andreas Färber | return NULL; |
8336 | 2985b86b | Andreas Färber | } |
8337 | f0ad8c34 | Alexander Graf | |
8338 | 2985b86b | Andreas Färber | cpu = POWERPC_CPU(object_new(object_class_get_name(oc))); |
8339 | 2985b86b | Andreas Färber | env = &cpu->env; |
8340 | 2985b86b | Andreas Färber | env->cpu_model_str = cpu_model; |
8341 | 2985b86b | Andreas Färber | |
8342 | 4776ce60 | Andreas Färber | object_property_set_bool(OBJECT(cpu), true, "realized", &err); |
8343 | 2985b86b | Andreas Färber | if (err != NULL) { |
8344 | 2985b86b | Andreas Färber | fprintf(stderr, "%s\n", error_get_pretty(err));
|
8345 | 2985b86b | Andreas Färber | error_free(err); |
8346 | 5c099537 | Paolo Bonzini | object_unref(OBJECT(cpu)); |
8347 | 2985b86b | Andreas Färber | return NULL; |
8348 | 2985b86b | Andreas Färber | } |
8349 | 2985b86b | Andreas Färber | |
8350 | 2985b86b | Andreas Färber | return cpu;
|
8351 | 2985b86b | Andreas Färber | } |
8352 | 2985b86b | Andreas Färber | |
8353 | 2985b86b | Andreas Färber | /* Sort by PVR, ordering special case "host" last. */
|
8354 | 2985b86b | Andreas Färber | static gint ppc_cpu_list_compare(gconstpointer a, gconstpointer b)
|
8355 | 2985b86b | Andreas Färber | { |
8356 | 2985b86b | Andreas Färber | ObjectClass *oc_a = (ObjectClass *)a; |
8357 | 2985b86b | Andreas Färber | ObjectClass *oc_b = (ObjectClass *)b; |
8358 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc_a = POWERPC_CPU_CLASS(oc_a); |
8359 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc_b = POWERPC_CPU_CLASS(oc_b); |
8360 | 2985b86b | Andreas Färber | const char *name_a = object_class_get_name(oc_a); |
8361 | 2985b86b | Andreas Färber | const char *name_b = object_class_get_name(oc_b); |
8362 | 2985b86b | Andreas Färber | |
8363 | 2985b86b | Andreas Färber | if (strcmp(name_a, TYPE_HOST_POWERPC_CPU) == 0) { |
8364 | 2985b86b | Andreas Färber | return 1; |
8365 | 2985b86b | Andreas Färber | } else if (strcmp(name_b, TYPE_HOST_POWERPC_CPU) == 0) { |
8366 | 2985b86b | Andreas Färber | return -1; |
8367 | 2985b86b | Andreas Färber | } else {
|
8368 | 2985b86b | Andreas Färber | /* Avoid an integer overflow during subtraction */
|
8369 | cfe34f44 | Andreas Färber | if (pcc_a->pvr < pcc_b->pvr) {
|
8370 | 2985b86b | Andreas Färber | return -1; |
8371 | cfe34f44 | Andreas Färber | } else if (pcc_a->pvr > pcc_b->pvr) { |
8372 | 2985b86b | Andreas Färber | return 1; |
8373 | 2985b86b | Andreas Färber | } else {
|
8374 | 2985b86b | Andreas Färber | return 0; |
8375 | 2985b86b | Andreas Färber | } |
8376 | 2985b86b | Andreas Färber | } |
8377 | 2985b86b | Andreas Färber | } |
8378 | 2985b86b | Andreas Färber | |
8379 | 2985b86b | Andreas Färber | static void ppc_cpu_list_entry(gpointer data, gpointer user_data) |
8380 | 2985b86b | Andreas Färber | { |
8381 | 2985b86b | Andreas Färber | ObjectClass *oc = data; |
8382 | 2985b86b | Andreas Färber | CPUListState *s = user_data; |
8383 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
8384 | de400129 | Andreas Färber | const char *typename = object_class_get_name(oc); |
8385 | de400129 | Andreas Färber | char *name;
|
8386 | 2985b86b | Andreas Färber | |
8387 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8388 | 4d7fb187 | Andreas Färber | if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
|
8389 | 4d7fb187 | Andreas Färber | return;
|
8390 | 4d7fb187 | Andreas Färber | } |
8391 | 4d7fb187 | Andreas Färber | #endif
|
8392 | 4d7fb187 | Andreas Färber | |
8393 | de400129 | Andreas Färber | name = g_strndup(typename, |
8394 | de400129 | Andreas Färber | strlen(typename) - strlen("-" TYPE_POWERPC_CPU));
|
8395 | 2985b86b | Andreas Färber | (*s->cpu_fprintf)(s->file, "PowerPC %-16s PVR %08x\n",
|
8396 | cfe34f44 | Andreas Färber | name, pcc->pvr); |
8397 | de400129 | Andreas Färber | g_free(name); |
8398 | 2985b86b | Andreas Färber | } |
8399 | 2985b86b | Andreas Färber | |
8400 | 2985b86b | Andreas Färber | void ppc_cpu_list(FILE *f, fprintf_function cpu_fprintf)
|
8401 | 2985b86b | Andreas Färber | { |
8402 | 2985b86b | Andreas Färber | CPUListState s = { |
8403 | 2985b86b | Andreas Färber | .file = f, |
8404 | 2985b86b | Andreas Färber | .cpu_fprintf = cpu_fprintf, |
8405 | 2985b86b | Andreas Färber | }; |
8406 | 2985b86b | Andreas Färber | GSList *list; |
8407 | fd5ed418 | Andreas Färber | int i;
|
8408 | 2985b86b | Andreas Färber | |
8409 | 2985b86b | Andreas Färber | list = object_class_get_list(TYPE_POWERPC_CPU, false);
|
8410 | 2985b86b | Andreas Färber | list = g_slist_sort(list, ppc_cpu_list_compare); |
8411 | 2985b86b | Andreas Färber | g_slist_foreach(list, ppc_cpu_list_entry, &s); |
8412 | 2985b86b | Andreas Färber | g_slist_free(list); |
8413 | fd5ed418 | Andreas Färber | |
8414 | fd5ed418 | Andreas Färber | cpu_fprintf(f, "\n");
|
8415 | fd5ed418 | Andreas Färber | for (i = 0; i < ARRAY_SIZE(ppc_cpu_aliases); i++) { |
8416 | fd5ed418 | Andreas Färber | ObjectClass *oc = ppc_cpu_class_by_name(ppc_cpu_aliases[i].model); |
8417 | fd5ed418 | Andreas Färber | if (oc == NULL) { |
8418 | fd5ed418 | Andreas Färber | /* Hide aliases that point to a TODO or TODO_USER_ONLY model */
|
8419 | fd5ed418 | Andreas Färber | continue;
|
8420 | fd5ed418 | Andreas Färber | } |
8421 | fd5ed418 | Andreas Färber | cpu_fprintf(f, "PowerPC %-16s\n",
|
8422 | fd5ed418 | Andreas Färber | ppc_cpu_aliases[i].alias); |
8423 | fd5ed418 | Andreas Färber | } |
8424 | 2985b86b | Andreas Färber | } |
8425 | 2985b86b | Andreas Färber | |
8426 | 2985b86b | Andreas Färber | static void ppc_cpu_defs_entry(gpointer data, gpointer user_data) |
8427 | 2985b86b | Andreas Färber | { |
8428 | 2985b86b | Andreas Färber | ObjectClass *oc = data; |
8429 | 2985b86b | Andreas Färber | CpuDefinitionInfoList **first = user_data; |
8430 | de400129 | Andreas Färber | const char *typename; |
8431 | 2985b86b | Andreas Färber | CpuDefinitionInfoList *entry; |
8432 | 2985b86b | Andreas Färber | CpuDefinitionInfo *info; |
8433 | 4d7fb187 | Andreas Färber | #if defined(TARGET_PPCEMB)
|
8434 | 4d7fb187 | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
8435 | 4d7fb187 | Andreas Färber | |
8436 | 4d7fb187 | Andreas Färber | if (pcc->mmu_model != POWERPC_MMU_BOOKE) {
|
8437 | 4d7fb187 | Andreas Färber | return;
|
8438 | 4d7fb187 | Andreas Färber | } |
8439 | 4d7fb187 | Andreas Färber | #endif
|
8440 | 2985b86b | Andreas Färber | |
8441 | de400129 | Andreas Färber | typename = object_class_get_name(oc); |
8442 | 2985b86b | Andreas Färber | info = g_malloc0(sizeof(*info));
|
8443 | de400129 | Andreas Färber | info->name = g_strndup(typename, |
8444 | de400129 | Andreas Färber | strlen(typename) - strlen("-" TYPE_POWERPC_CPU));
|
8445 | 2985b86b | Andreas Färber | |
8446 | 2985b86b | Andreas Färber | entry = g_malloc0(sizeof(*entry));
|
8447 | 2985b86b | Andreas Färber | entry->value = info; |
8448 | 2985b86b | Andreas Färber | entry->next = *first; |
8449 | 2985b86b | Andreas Färber | *first = entry; |
8450 | 3fc6c082 | bellard | } |
8451 | 1d0cb67d | Andreas Färber | |
8452 | 76b64a7a | Anthony Liguori | CpuDefinitionInfoList *arch_query_cpu_definitions(Error **errp) |
8453 | 70b7660a | Anthony Liguori | { |
8454 | 70b7660a | Anthony Liguori | CpuDefinitionInfoList *cpu_list = NULL;
|
8455 | 2985b86b | Andreas Färber | GSList *list; |
8456 | 70b7660a | Anthony Liguori | |
8457 | 2985b86b | Andreas Färber | list = object_class_get_list(TYPE_POWERPC_CPU, false);
|
8458 | 2985b86b | Andreas Färber | g_slist_foreach(list, ppc_cpu_defs_entry, &cpu_list); |
8459 | 2985b86b | Andreas Färber | g_slist_free(list); |
8460 | 70b7660a | Anthony Liguori | |
8461 | 2985b86b | Andreas Färber | return cpu_list;
|
8462 | 2985b86b | Andreas Färber | } |
8463 | 70b7660a | Anthony Liguori | |
8464 | 1d0cb67d | Andreas Färber | /* CPUClass::reset() */
|
8465 | 1d0cb67d | Andreas Färber | static void ppc_cpu_reset(CPUState *s) |
8466 | 1d0cb67d | Andreas Färber | { |
8467 | 1d0cb67d | Andreas Färber | PowerPCCPU *cpu = POWERPC_CPU(s); |
8468 | 1d0cb67d | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
8469 | 1d0cb67d | Andreas Färber | CPUPPCState *env = &cpu->env; |
8470 | a1389542 | Andreas Färber | target_ulong msr; |
8471 | a1389542 | Andreas Färber | |
8472 | a1389542 | Andreas Färber | if (qemu_loglevel_mask(CPU_LOG_RESET)) {
|
8473 | 55e5c285 | Andreas Färber | qemu_log("CPU Reset (CPU %d)\n", s->cpu_index);
|
8474 | a1389542 | Andreas Färber | log_cpu_state(env, 0);
|
8475 | a1389542 | Andreas Färber | } |
8476 | 1d0cb67d | Andreas Färber | |
8477 | 1d0cb67d | Andreas Färber | pcc->parent_reset(s); |
8478 | 1d0cb67d | Andreas Färber | |
8479 | a1389542 | Andreas Färber | msr = (target_ulong)0;
|
8480 | a1389542 | Andreas Färber | if (0) { |
8481 | a1389542 | Andreas Färber | /* XXX: find a suitable condition to enable the hypervisor mode */
|
8482 | a1389542 | Andreas Färber | msr |= (target_ulong)MSR_HVB; |
8483 | a1389542 | Andreas Färber | } |
8484 | a1389542 | Andreas Färber | msr |= (target_ulong)0 << MSR_AP; /* TO BE CHECKED */ |
8485 | a1389542 | Andreas Färber | msr |= (target_ulong)0 << MSR_SA; /* TO BE CHECKED */ |
8486 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_EP;
|
8487 | a1389542 | Andreas Färber | #if defined(DO_SINGLE_STEP) && 0 |
8488 | a1389542 | Andreas Färber | /* Single step trace mode */
|
8489 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_SE;
|
8490 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_BE;
|
8491 | a1389542 | Andreas Färber | #endif
|
8492 | a1389542 | Andreas Färber | #if defined(CONFIG_USER_ONLY)
|
8493 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_FP; /* Allow floating point usage */ |
8494 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_VR; /* Allow altivec usage */ |
8495 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_SPE; /* Allow SPE usage */ |
8496 | a1389542 | Andreas Färber | msr |= (target_ulong)1 << MSR_PR;
|
8497 | a1389542 | Andreas Färber | #else
|
8498 | a1389542 | Andreas Färber | env->excp_prefix = env->hreset_excp_prefix; |
8499 | a1389542 | Andreas Färber | env->nip = env->hreset_vector | env->excp_prefix; |
8500 | a1389542 | Andreas Färber | if (env->mmu_model != POWERPC_MMU_REAL) {
|
8501 | a1389542 | Andreas Färber | ppc_tlb_invalidate_all(env); |
8502 | a1389542 | Andreas Färber | } |
8503 | a1389542 | Andreas Färber | #endif
|
8504 | a1389542 | Andreas Färber | env->msr = msr & env->msr_mask; |
8505 | a1389542 | Andreas Färber | #if defined(TARGET_PPC64)
|
8506 | a1389542 | Andreas Färber | if (env->mmu_model & POWERPC_MMU_64) {
|
8507 | a1389542 | Andreas Färber | env->msr |= (1ULL << MSR_SF);
|
8508 | a1389542 | Andreas Färber | } |
8509 | a1389542 | Andreas Färber | #endif
|
8510 | a1389542 | Andreas Färber | hreg_compute_hflags(env); |
8511 | a1389542 | Andreas Färber | env->reserve_addr = (target_ulong)-1ULL;
|
8512 | a1389542 | Andreas Färber | /* Be sure no exception or interrupt is pending */
|
8513 | a1389542 | Andreas Färber | env->pending_interrupts = 0;
|
8514 | a1389542 | Andreas Färber | env->exception_index = POWERPC_EXCP_NONE; |
8515 | a1389542 | Andreas Färber | env->error_code = 0;
|
8516 | 2b15811c | David Gibson | |
8517 | 2b15811c | David Gibson | #if defined(TARGET_PPC64) && !defined(CONFIG_USER_ONLY)
|
8518 | 1bfb37d1 | David Gibson | env->vpa_addr = 0;
|
8519 | 1bfb37d1 | David Gibson | env->slb_shadow_addr = 0;
|
8520 | 1bfb37d1 | David Gibson | env->slb_shadow_size = 0;
|
8521 | 1bfb37d1 | David Gibson | env->dtl_addr = 0;
|
8522 | 2b15811c | David Gibson | env->dtl_size = 0;
|
8523 | 2b15811c | David Gibson | #endif /* TARGET_PPC64 */ |
8524 | 2b15811c | David Gibson | |
8525 | a1389542 | Andreas Färber | /* Flush all TLBs */
|
8526 | a1389542 | Andreas Färber | tlb_flush(env, 1);
|
8527 | 1d0cb67d | Andreas Färber | } |
8528 | 1d0cb67d | Andreas Färber | |
8529 | 6cca7ad6 | Andreas Färber | static void ppc_cpu_initfn(Object *obj) |
8530 | 6cca7ad6 | Andreas Färber | { |
8531 | c05efcb1 | Andreas Färber | CPUState *cs = CPU(obj); |
8532 | 6cca7ad6 | Andreas Färber | PowerPCCPU *cpu = POWERPC_CPU(obj); |
8533 | 2985b86b | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_GET_CLASS(cpu); |
8534 | 6cca7ad6 | Andreas Färber | CPUPPCState *env = &cpu->env; |
8535 | 6cca7ad6 | Andreas Färber | |
8536 | c05efcb1 | Andreas Färber | cs->env_ptr = env; |
8537 | 6cca7ad6 | Andreas Färber | cpu_exec_init(env); |
8538 | 2985b86b | Andreas Färber | |
8539 | cfe34f44 | Andreas Färber | env->msr_mask = pcc->msr_mask; |
8540 | cfe34f44 | Andreas Färber | env->mmu_model = pcc->mmu_model; |
8541 | cfe34f44 | Andreas Färber | env->excp_model = pcc->excp_model; |
8542 | cfe34f44 | Andreas Färber | env->bus_model = pcc->bus_model; |
8543 | cfe34f44 | Andreas Färber | env->insns_flags = pcc->insns_flags; |
8544 | cfe34f44 | Andreas Färber | env->insns_flags2 = pcc->insns_flags2; |
8545 | cfe34f44 | Andreas Färber | env->flags = pcc->flags; |
8546 | cfe34f44 | Andreas Färber | env->bfd_mach = pcc->bfd_mach; |
8547 | cfe34f44 | Andreas Färber | env->check_pow = pcc->check_pow; |
8548 | 2985b86b | Andreas Färber | |
8549 | 2985b86b | Andreas Färber | #if defined(TARGET_PPC64)
|
8550 | cfe34f44 | Andreas Färber | if (pcc->sps) {
|
8551 | cfe34f44 | Andreas Färber | env->sps = *pcc->sps; |
8552 | 2985b86b | Andreas Färber | } else if (env->mmu_model & POWERPC_MMU_64) { |
8553 | 2985b86b | Andreas Färber | /* Use default sets of page sizes */
|
8554 | 2985b86b | Andreas Färber | static const struct ppc_segment_page_sizes defsps = { |
8555 | 2985b86b | Andreas Färber | .sps = { |
8556 | 2985b86b | Andreas Färber | { .page_shift = 12, /* 4K */ |
8557 | 2985b86b | Andreas Färber | .slb_enc = 0,
|
8558 | 2985b86b | Andreas Färber | .enc = { { .page_shift = 12, .pte_enc = 0 } } |
8559 | 2985b86b | Andreas Färber | }, |
8560 | 2985b86b | Andreas Färber | { .page_shift = 24, /* 16M */ |
8561 | 2985b86b | Andreas Färber | .slb_enc = 0x100,
|
8562 | 2985b86b | Andreas Färber | .enc = { { .page_shift = 24, .pte_enc = 0 } } |
8563 | 2985b86b | Andreas Färber | }, |
8564 | 2985b86b | Andreas Färber | }, |
8565 | 2985b86b | Andreas Färber | }; |
8566 | 2985b86b | Andreas Färber | env->sps = defsps; |
8567 | 2985b86b | Andreas Färber | } |
8568 | 2985b86b | Andreas Färber | #endif /* defined(TARGET_PPC64) */ |
8569 | 60925d26 | Andreas Färber | |
8570 | 60925d26 | Andreas Färber | if (tcg_enabled()) {
|
8571 | 60925d26 | Andreas Färber | ppc_translate_init(); |
8572 | 60925d26 | Andreas Färber | } |
8573 | 6cca7ad6 | Andreas Färber | } |
8574 | 6cca7ad6 | Andreas Färber | |
8575 | 1d0cb67d | Andreas Färber | static void ppc_cpu_class_init(ObjectClass *oc, void *data) |
8576 | 1d0cb67d | Andreas Färber | { |
8577 | 1d0cb67d | Andreas Färber | PowerPCCPUClass *pcc = POWERPC_CPU_CLASS(oc); |
8578 | 1d0cb67d | Andreas Färber | CPUClass *cc = CPU_CLASS(oc); |
8579 | 4776ce60 | Andreas Färber | DeviceClass *dc = DEVICE_CLASS(oc); |
8580 | 4776ce60 | Andreas Färber | |
8581 | 4776ce60 | Andreas Färber | pcc->parent_realize = dc->realize; |
8582 | 4776ce60 | Andreas Färber | dc->realize = ppc_cpu_realizefn; |
8583 | 1d0cb67d | Andreas Färber | |
8584 | 1d0cb67d | Andreas Färber | pcc->parent_reset = cc->reset; |
8585 | 1d0cb67d | Andreas Färber | cc->reset = ppc_cpu_reset; |
8586 | 2b8c2754 | Andreas Färber | |
8587 | 2b8c2754 | Andreas Färber | cc->class_by_name = ppc_cpu_class_by_name; |
8588 | 1d0cb67d | Andreas Färber | } |
8589 | 1d0cb67d | Andreas Färber | |
8590 | 1d0cb67d | Andreas Färber | static const TypeInfo ppc_cpu_type_info = { |
8591 | 1d0cb67d | Andreas Färber | .name = TYPE_POWERPC_CPU, |
8592 | 1d0cb67d | Andreas Färber | .parent = TYPE_CPU, |
8593 | 1d0cb67d | Andreas Färber | .instance_size = sizeof(PowerPCCPU),
|
8594 | 6cca7ad6 | Andreas Färber | .instance_init = ppc_cpu_initfn, |
8595 | 2985b86b | Andreas Färber | .abstract = true,
|
8596 | 1d0cb67d | Andreas Färber | .class_size = sizeof(PowerPCCPUClass),
|
8597 | 1d0cb67d | Andreas Färber | .class_init = ppc_cpu_class_init, |
8598 | 1d0cb67d | Andreas Färber | }; |
8599 | 1d0cb67d | Andreas Färber | |
8600 | 1d0cb67d | Andreas Färber | static void ppc_cpu_register_types(void) |
8601 | 1d0cb67d | Andreas Färber | { |
8602 | 1d0cb67d | Andreas Färber | type_register_static(&ppc_cpu_type_info); |
8603 | 1d0cb67d | Andreas Färber | } |
8604 | 1d0cb67d | Andreas Färber | |
8605 | 1d0cb67d | Andreas Färber | type_init(ppc_cpu_register_types) |