Large page TLB flush
QEMU uses a fixed page size for the CPU TLB. If the guest uses largepages then we effectively split these into multiple smaller pages, andpopulate the corresponding TLB entries on demand.
When the guest invalidates the TLB by virtual address we must invalidate...
Target specific usermode cleanup
Disable various target specific code that is only relevant to system emulation.
Signed-off-by: Paul Brook <paul@codesourcery.com>
Remove cpu_get_phys_page_debug from userspace emulation
cpu_get_phys_page_debug makes no sense for userspace emulation, so remove it.
Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.
Removes a set of ifdefs from exec.c.
Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets otherthan Alpha. This will be used for page_find_alloc, which issupposed to be using virtual addresses in the first place....
microblaze: Improve brk emulation.
brk insns while in user mode raise priv insn exceptions.This commit makes gdbserver work on linux guests.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@petalogix.com>
microblaze: Dont segfault when singlestepping first insn.
kill regs_to_env and env_to_regs
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
microblaze: Print content of EAR register
I need to see EAR register in output because I need to parse irqsoff problem.
Signed-off-by: Michal Simek <monstr@monstr.eu>Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Update debug logs.
Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Handle wdc flush and clear.
microblaze: Correct branch to registers.
microblaze: Restore env when raising unmapped bus access.
microblaze: Unbreak reset.
Initialize synthesis config registers at reset to cope with the newcpu_reset sequences.
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
gcc wants 1st static and then const
Signed-off-by: Juan Quintela <quintela@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Fix sys-queue.h conflict for good
Problem: Our file sys-queue.h is a copy of the BSD file, but there aresome additions and it's not entirely compatible. Because of that, there havebeen conflicts with system headers on BSD systems. Some hacks have beenintroduced in the commits 15cc9235840a22c289edbe064a9b3c19c5f49896,...
microblaze: Trap if QEMU finds an unknown insns.
If PVR settings enable illegal insn trap, trap when QEMU finds aninsn it knows nothing about.
microblaze: Correct prio between MMU and unaligned exceptions.
The microblaze gives MMU faults priority. For stores we stillhave a flaw that the value leaks to memory in the case of anunaligned exception.
microblaze: HW Exception fixes.
microblaze: Trap on illegal load/store sizes.
microblaze: Correct FPU decoding masks.
microblaze: Compute masks for alignment checks at translation time.
Thanks to Blue Swirl for reporting.Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
microblaze: Trap on bus accesses to unmapped areas.
microblaze: MMU shows more respect to synthesis config.
The microblaze MMU can be synthesized in different configurations.Have the MMU model show more respect to the chosen configuration.
microblaze: Trap on unaligned data accesses.
Untested...
microblaze: Trap on divizions by zero.
microblaze: Correct mfs into r0.
microblaze: Catch illegal insns and privilege violations.
Raise illegal instruction exceptions when executing instructions thatrequire units not available on the particulare microblaze configuration.
Also trap priviliege violations made by userspace.
microblaze: Add infrastructure for supporting hw exceptions.
microblaze: Clear exception in dslot ESR bit if not in dslot.
microblaze: Correct MMU debug log.
cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal
handle_cpu_signal is very nearly copy-paste code for each target, with afew minor variations. This patch sets up appropriate defaults for ageneric handle_cpu_signal and provides overrides for particular targets...
Update to a hopefully more future proof FSF address
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
microblaze: Make writes to MMU_ZPR flush the TLB.
microblaze: Correct typo.
microblaze: Add petalogix s3a1800dsp MMU linux ref-design.
This setup was designed by petalogix and is supported by upstream linux.The design targets a xilinx spartan-3a-1800 dsp board with MMU.
microblaze: Add MMU emulation.
microblaze: Add translation routines.