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Name Size
Makefile.objs 465 Bytes
arm-semi.c 17.2 kB
cpu-qom.h 5.9 kB
cpu.c 32.5 kB
cpu.h 41.8 kB
cpu64.c 3.5 kB
crypto_helper.c 13 kB
gdbstub.c 2.8 kB
gdbstub64.c 1.9 kB
helper-a64.c 7.5 kB
helper-a64.h 2 kB
helper.c 142.7 kB
helper.h 19 kB
iwmmxt_helper.c 24.8 kB
kvm-consts.h 4.4 kB
kvm-stub.c 437 Bytes
kvm.c 9.4 kB
kvm32.c 15.7 kB
kvm64.c 5.2 kB
kvm_arm.h 3.8 kB
machine.c 7.9 kB
neon_helper.c 53.2 kB
op_addsub.h 1.8 kB
op_helper.c 9 kB
translate-a64.c 283.3 kB
translate.c 378.5 kB
translate.h 1.9 kB

Latest revisions

# Date Author Comment
c10f7fc3 02/26/2014 07:19 pm Peter Maydell

target-arm: Load correct access bits from ARMv5 level 2 page table descriptors

In ARMv5 level 2 page table descriptors, each 4K or 64K page is split into
four subpages, each of which can have different access permission settings,
which are specified by four two-bit fields in the l2 descriptor. A...
775fda92 02/26/2014 07:19 pm Peter Maydell

target-arm: Fix incorrect arithmetic constructing short-form PAR for ATS ops

Correct some obviously nonsensical bit manipulation spotted by Coverity
when constructing the short-form PAR value for ATS operations.

Signed-off-by: Peter Maydell <>...
dfc15c7c 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement the wide 3-reg-different operations

Implement the wide three-reg-different operations:
SADDW, UADDW, SSUBW and USUBW.

Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
e4b998d4 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement narrowing three-reg-diff operations

Implement the narrowing three-reg-diff operations: ADDHN,
RADDHN, SUBHN and RSUBHN.

Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
60510aed 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement unprivileged load/store

Implement the unprivileged load and store instructions.

Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
d324b36a 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement store-exclusive for system mode

System mode store-exclusive use a different code path to usermode ones;
implement this missing code, in a similar way to the 32 bit version.

Signed-off-by: Peter Maydell <>...
13caf1fd 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Add opcode comments to disas_simd_three_reg_diff

The opcode switch in disas_simd_three_reg_diff() is missing the
customary comments indicating which cases correspond to which
instructions. Add them.

Signed-off-by: Peter Maydell <>...
70d7f984 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Add most remaining three-reg-diff widening ops

Add the remainder of the 64x64->128 operations in the three-reg-diff
category except for PMULL, PMULL2.

Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
59a1c327 02/20/2014 12:35 pm Peter Maydell

target-arm: Remove failure status return from read/write_raw_cp_reg

The read_raw_cp_reg and write_raw_cp_reg functions can now never
fail (in fact they should never have failed previously unless
there was a bug in a reginfo that meant no raw accessor was...
7900e9f1 02/20/2014 12:35 pm Peter Maydell

target-arm: Fix incorrect type for value argument to write_raw_cp_reg

The write_raw_cp_reg's value argument should be a uint64_t, since
that's what all its callers hand it and what all the functions it
calls take. A (harmless) typo meant we were accidentally declaring...

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