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Makefile.objs 1.3 kB

Latest revisions

# Date Author Comment
c1a1af87 12/23/2013 01:12 pm Igor Mammedov

ACPI: Q35 DSDT: fix CPU hotplug GPE0.2 handler

Fix bogus CPU hotplug GPE handler.
Make Q35 CPU hotplug GPE handler match PIIX4 one, since
CPU hotplug event is triggered by GPE0.2 register.

Signed-off-by: Igor Mammedov <>
Signed-off-by: Michael S. Tsirkin <>
bb43d383 12/23/2013 01:12 pm Gerd Hoffmann

piix: gigabyte alignment for ram

Map 3G (i440fx) of memory below 4G, so the RAM pieces
are nicely aligned to gigabyte borders.

Keep old memory layout for (a) old machine types and (b) in case all
memory fits below 4G and thus we don't have to split RAM into pieces...
ecdbfceb 12/23/2013 01:12 pm Michael S. Tsirkin

pc_piix: document gigabyte_align

Document the logic behind the below/above 4G split.

Signed-off-by: Michael S. Tsirkin <>
637a5acb 12/23/2013 01:12 pm Laszlo Ersek

hw/i386/pc_sysfw: support two flash drives

This patch allows the user to usefully specify

-drive file=img_1,if=pflash,format=raw,readonly \
  -drive file=img_2,if=pflash,format=raw

on the command line. The flash images will be mapped under 4G in their...
e4f308bb 12/23/2013 01:12 pm Igor Mammedov

acpi: piix4: remove not needed GPE0 mask

Hardcoded GPE0 mask isn't really needed. Since GPE0_STS initialized
with all bits cleared and only QEMU itself can set bits there (i.e.
guest can only clear bits in it). So guest can't triger SCI
by setting _STS & _EN bits and there is not reason to mask out not...
06313503 12/23/2013 01:12 pm Igor Mammedov

acpi: factor out common pm_update_sci() into acpi core

... and rename it into acpi_update_sci() since it changes
SCI on only on PM registers status.

Signed-off-by: Igor Mammedov <>
Signed-off-by: Michael S. Tsirkin <>
2c047956 12/23/2013 01:12 pm Igor Mammedov

acpi: ich9: allow guest to clear SCI rised by GPE

it fixes IRQ storm since guest isn't able to lower SCI IRQ
after it has been handled when it clears GPE event.

Signed-off-by: Igor Mammedov <>
Signed-off-by: Michael S. Tsirkin <>
5fe269b1 12/20/2013 02:58 am Paul Mackerras

spapr: limit numa memory regions by ram size

This makes sure that all NUMA memory blocks reside within RAM or
have zero length.

Reviewed-by: Thomas Huth <>
Signed-off-by: Alexey Kardashevskiy <>
Signed-off-by: Alexander Graf <>
c4177479 12/20/2013 02:58 am Alexey Kardashevskiy

spapr: make sure RMA is in first mode of first memory node

The SPAPR specification says that the RMA starts at the LPAR's logical
address 0 and is the first logical memory block reported in
the LPAR’s device tree.

So SLOF only maps the first block and that block needs to span...
5a4348d1 12/20/2013 02:58 am Peter Crosthwaite

device_tree: s/qemu_devtree/qemu_fdt globally

The qemu_devtree API is a wrapper around the fdt_ set of APIs.
Rename accordingly.

Signed-off-by: Peter Crosthwaite <>
[agraf: also convert hw/arm/virt.c]
Signed-off-by: Alexander Graf <>

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