target-sh4: define FPSCR constants
Define FPSCR constants for all field and use them instead of hardcodedvalues.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-sh4: implement flush-to-zero
When the FPSCR.DN bit is set, the SH4 FPU treat denormalized numbers aszero. Enable the corresponding softfloat option when this bit is set.
target-sh4: implement FPU exceptions
FPU exception support where not implemented on SH4. Implement them byclearing the softfloat exceptions flags before an FP instruction (theSH4 FPU also clear them before an instruction), and calling a functionto update the FPSCR register after an FP instruction. This function...
target-sh4: add fipr instruction
Add the fipr FVm,FVn instruction, which computes the inner products ofa 4-dimensional single precision floating-point vector.
target-sh4: add ftrv instruction
Add the ftrv XMTRX,FVn instruction, which computes the 4-row x 4-columnmatrix XMTRX by the 4-dimensional vector FVn.
target-sh4: optimize exceptions
As exception is not the normal path, don't bother saving PC, beforeraising one, instead rely on code retranslation to get the CPU state.
target-sh4: fix reset on r2d
target-sh4: simplify comparisons after a 'and' op
When a TCG variable is anded with a value and the compared with the samevalue, we can simply invert the comparison and compare it with 0. Thegenerated code is smaller.
target-sh4: log instructions start in TCG code
target-sh4: use setcond when possible
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