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# Date Author Comment
c6dc6f63 03/13/2010 05:50 pm Andre Przywara

x86/cpuid: move CPUID functions into separate file

about half of target-i386/helper.c consist of CPUID related functions.
Only one of them is a real TCG helper function. So move the whole
CPUID stuff out of this into a separate file to get better
maintainable parts....

52705890 03/12/2010 06:28 pm Richard Henderson

Move TARGET_PHYS_ADDR_SPACE_BITS to target-*/cpu.h.

Removes a set of ifdefs from exec.c.

Introduce TARGET_VIRT_ADDR_SPACE_BITS for all targets other
than Alpha. This will be used for page_find_alloc, which is
supposed to be using virtual addresses in the first place....

b5ec5ce0 02/23/2010 12:16 am john cooper

Add cpu model configuration support..

This is a reimplementation of prior versions which adds
the ability to define cpu models for contemporary processors.
The added models are likewise selected via -cpu <name>,
and are intended to displace the existing convention...

bb0300dc 01/14/2010 01:14 am Gleb Natapov

Add KVM paravirt cpuid leaf

Initialize KVM paravirt cpuid leaf and allow user to control guest
visible PV features through -cpu flag.

Signed-off-by: Gleb Natapov <>
Signed-off-by: Anthony Liguori <>

31827373 12/18/2009 07:26 pm Jan Kiszka

kvm: x86: Use separate exception_injected CPUState field

Marcelo correctly remarked that there are usage conflicts between QEMU
core code and KVM /wrt exception_index. So spend a separate field and
also save/restore it properly.

Signed-off-by: Jan Kiszka <>...

d46272c7 12/18/2009 07:26 pm Jan Kiszka

target-i386: Fix evaluation of DR7 register

hw_breakpoint_type and hw_breakpoint_len used the wrong index multiplier
to extract type and len.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

1a03675d 12/12/2009 03:59 pm Glauber Costa

v2: properly save kvm system time msr registers

Currently, the msrs involved in setting up pvclock are not saved over
migration and/or save/restore. This patch puts their value in special
fields in our CPUState, and deal with them using vmstate.

kvm also has to account for it, by including them in the msr list...

a0fb002c 12/03/2009 11:25 pm Jan Kiszka

kvm: x86: Add support for VCPU event states

This patch extends the qemu-kvm state sync logic with support for
KVM_GET/SET_VCPU_EVENTS, giving access to yet missing exception,
interrupt and NMI states.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

0e607a80 11/17/2009 04:49 pm Jan Kiszka

kvm: x86: Refactor use of interrupt_bitmap

Drop interrupt_bitmap from the cpustate and solely rely on the integer
interupt_injected. This prepares us for the new injected-interrupt
interface, which will deprecate the bitmap, while preserving

5a2d0e57 10/05/2009 11:41 pm Aurelien Jarno

target-i386: move recently added vmstate fields at the end of the structure

This reduce the impact on hosts that have addressing modes with limited
offsets. Suggested by Laurent Desnogues.

Signed-off-by: Aurelien Jarno <>

5f30fa18 10/05/2009 05:32 pm Jan Kiszka

gdbstub: x86: Switch 64/32 bit registers dynamically

Commit 56aebc891674cd2d07b3f64183415697be200084 changed gdbstub in way
that debugging 32 or 16-bit guest code is no longer possible with qemu
for x86_64 guest CPUs. Since that commit, qemu only provides registers...

acc68836 10/05/2009 05:32 pm Juan Quintela

x86: split FPReg union

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

c1a54d57 10/05/2009 05:32 pm Juan Quintela

x86: split MTRRVar union

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

60a902f1 10/05/2009 05:32 pm Juan Quintela

x86: add fpregs_format_vmstate

Don't even ask, being able to load/save between 64<->80bit floats should be forbidden

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

ac74d0f1 10/05/2009 05:32 pm Juan Quintela

x86: mce_banks always have the same size

mce_banks is always MCE_BANKS_DEF * 4 in size, value never change

CC: Huang Ying <>
Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

eb831623 10/05/2009 05:32 pm Juan Quintela

x86: fpuc is uint16_t not unsigned int

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

67b8f419 10/05/2009 05:32 pm Juan Quintela

x86: fpus is uint16_t not unsigned int

We save more that fpus on that 16 bits (fpstt), we need an additional field

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

cdc0c58f 10/05/2009 05:32 pm Juan Quintela

x86: add fptag_vmstate to the state

It is needed to store fptags

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

bfc179b6 10/05/2009 05:32 pm Juan Quintela

x86: add pending_irq_vmstate to the state

It is needed to save the interrupt_bitmap

Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

5ee0ffaa 10/05/2009 05:32 pm Juan Quintela

x86: make a20_mask int32_t

This makes the savevm code correct, and sign extensins gives us exactly
what we need (namely, sign extend to 64 bits when used with 64bit addresess.

Once there, change 0x100000 for 1 << 20, that maks all a20 use the same syntax....

1b050077 10/04/2009 03:46 pm Andre Przywara

target-i386: add RDTSCP support

RDTSCP reads the time stamp counter and atomically also the content
of a 32-bit MSR, which can be freely set by the OS. This allows CPU
local data to be queried by userspace.
Linux uses this to allow a fast implementation of the getcpu()...

0b5c1ce8 08/24/2009 04:21 pm Nathan Froyd

cleanup cpu-exec.c, part 0/N: consolidate handle_cpu_signal

handle_cpu_signal is very nearly copy-paste code for each target, with a
few minor variations. This patch sets up appropriate defaults for a
generic handle_cpu_signal and provides overrides for particular targets...

4a1418e0 08/24/2009 04:02 pm Anthony Liguori

Unbreak large mem support by removing kqemu

kqemu introduces a number of restrictions on the i386 target. The worst is that
it prevents large memory from working in the default build.

Furthermore, kqemu is fundamentally flawed in a number of ways. It relies on...

e2542fe2 07/27/2009 10:09 pm Juan Quintela


Signed-off-by: Juan Quintela <>
Signed-off-by: Anthony Liguori <>

8167ee88 07/16/2009 11:47 pm Blue Swirl

Update to a hopefully more future proof FSF address

Signed-off-by: Blue Swirl <>

84273177 07/16/2009 04:28 pm Jan Kiszka

gdbstub: x86: Support for setting segment registers

This allows to set segment registers via gdb also in system emulation
mode. Basic sanity checks are applied and nothing is changed if they
fail. But screwing up the target via this interface will never be...

e6a0575e 07/10/2009 09:41 pm Anthony Liguori

Make sure to mark MCE defines as ULL

Fixes build on 32-bit

Signed-off-by: Anthony Liguori <>

79c4f6b0 07/10/2009 12:04 am Huang Ying

QEMU: MCE: Add MCE simulation to qemu/tcg

- MCE features are initialized when VCPU is intialized according to CPUID.
- A monitor command "mce" is added to inject a MCE.
- A new interrupt mask: CPU_INTERRUPT_MCE is added to inject the MCE.

aliguori: fix build for linux-user...

6c0d7ee8 06/29/2009 09:52 pm Andre Przywara

preserve the hypervisor bit while KVM trims the CPUID bits

The KVM kernel will disable all bits in CPUID which are not present in
the host. As this is mostly true for the hypervisor bit (1.ecx),
preserve its value before the trim and restore it afterwards....

b09ea7d5 06/22/2009 06:15 pm Gleb Natapov

Handle init/sipi in a main cpu exec loop. (v2)

This should fix compilation problem in case of CONFIG_USER_ONLY.

Currently INIT/SIPI is handled in the context of CPU that sends IPI.
This patch changes this to handle them like all other events in a main
cpu exec loop. When KVM will gain thread per vcpu capability it will...

ef768138 06/16/2009 11:36 pm Andre Przywara

allow CPUID vendor override

KVM-enabled QEMU will always report the vendor ID of the physical CPU it is
running on. Allow to override this if explicitly requested on the
command line. It will not suffice to name a CPU type (like -cpu phenom),
but you have to explicitly set the vendor: -cpu phenom,vendor=AuthenticAMD...

a2397807 05/22/2009 06:50 pm Jan Kiszka

x86: Add support for resume flag

Signed-off-by: Jan Kiszka <>

f8d926e9 05/22/2009 06:50 pm Jan Kiszka

kvm: x86: Save/restore KVM-specific CPU states

Save and restore all so far neglected KVM-specific CPU states. Handling
the TSC stabilizes migration in KVM mode. The interrupt_bitmap and
mp_state are currently unused, but will become relevant for in-kernel...

640f42e4 04/19/2009 01:18 pm blueswir1

kqemu: merge CONFIG_KQEMU and USE_KQEMU

Basically a recursive ":%s/USE_KQEMU/CONFIG_KQEMU/g".

Signed-off-by: Paul Bolle <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a3867ed2 04/18/2009 06:36 pm aliguori

x86: Enhanced dump of segment registers (Jan Kiszka)

Parse the descriptor flags that segment registers refer to and show the
result in a more human-friendly format. The output of info registers eg.
then looks like this:

ES =007b 00000000 ffffffff 00cff300 DPL=3 DS [-WA]...

c2764719 03/07/2009 05:24 pm pbrook

The _exit syscall is used for both thread termination in NPTL applications,
and process termination in legacy applications. Try to guess which we want
based on the presence of multiple threads.

Also implement locking when modifying the CPU list.

Signed-off-by: Paul Brook <>...

e00b6f80 02/09/2009 05:50 pm aliguori

KVM: CPUID takes ecx as input value for some functions (Amit Shah)

The CPUID instruction takes the value of ECX as an input parameter
in addition to the value of EAX as the count for functions 4, 0xb
and 0xd. Make sure we pass the value to the instruction....

dd5e3b17 01/29/2009 07:02 pm aliguori

MTRR support on x86, part 2 (Carl-Daniel Hailfinger)

Load and save MTRR state together with machine state.

Add support for the MTRRcap MSR which is used by the latest Bochs BIOS
and some operating systems.

Fix a typo in ext2_feature_name.

With this patch, MTRR emulation should be good enough to not trigger any...

165d9b82 01/26/2009 07:53 pm aliguori

MTRR support on x86 (Carl-Daniel Hailfinger)

The current codebase ignores MTRR (Memory Type Range Register)
configuration writes and reads because Qemu does not implement caching.
All BIOS/firmware in know of for x86 do implement a mode called
Cache-as-RAM (CAR) which locks down the CPU cache lines and uses the CPU...

fad6cb1a 01/05/2009 12:05 am aurel32

Update FSF address in GPL/LGPL boilerplate

The attached patch updates the FSF address in the GPL/LGPL boilerplate
in most GPL/LGPLed files, and also in COPYING.LIB.

Signed-off-by: Stuart Brady <>
Signed-off-by: Aurelien Jarno <>...

d9957a8b 12/13/2008 01:49 pm blueswir1

x86 cleanup

Remove some unnecessary includes, add needed includes, move prototypes to
cpu.h to suppress missing prototype warnings.

Remove unused functions and prototypes (cpu_x86_flush_tlb, cpu_lock,
cpu_unlock, restore_native_fp_state, save_native_fp_state)....

01df040b 11/18/2008 11:08 pm aliguori

x86: Debug register emulation (Jan Kiszka)

Built on top of previously enhanced breakpoint/watchpoint support, this
patch adds full debug register emulation for the x86 architecture.

Many corner cases were considered, and the result was successfully
tested inside a Linux guest with gdb, but I won't be surprised if one...

6b917547 11/18/2008 09:46 pm aliguori

Refactor translation block CPU state handling (Jan Kiszka)

This patch refactors the way the CPU state is handled that is associated
with a TB. The basic motivation is to move more arch specific code out
of generic files. Specifically the long #ifdef clutter in tb_find_fast()...

622ed360 11/18/2008 09:36 pm aliguori

Convert CPU_PC_FROM_TB to static inline (Jan Kiszka)

as macros should be avoided when possible.

Signed-off-by: Jan Kiszka <>
Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a7812ae4 11/17/2008 04:43 pm pbrook

TCG variable type checking.

Signed-off-by: Paul Brook <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

7ba1e619 11/05/2008 06:04 pm aliguori

Add KVM support to QEMU

This patch adds very basic KVM support. KVM is a kernel module for Linux that
allows userspace programs to make use of hardware virtualization support. It
current supports x86 hardware virtualization using Intel VT-x or AMD-V. It...

6fd805e1 11/05/2008 05:34 pm aliguori

Split CPUID from op_helper

KVM needs to call CPUID from outside of the TCG code. This patch
splits out the CPUID logic into a separate helper that both the op
helper and KVM can call.

Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

0650f1ab 11/05/2008 05:28 pm aliguori

Add additional CPU flag definitions

Some x86 CPU definitions that KVM needs

Signed-off-by: Anthony Liguori <>

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

558fa836 09/29/2008 04:55 pm pbrook

My core2duo patch introduced a vague statement of "missing features" in
the CPUID specification. This patch addresses this by specifying exactly
what is missing.
While going along the missing CPUID entries I also stumbled across
invalid and missing CPUID #defines while comparing them to the Intel...

a876e289 09/27/2008 12:03 am balrog

Fix definition of EMX bit in cpuid (Jens Axboe).

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2436b61a 09/25/2008 09:16 pm balrog

SYSENTER/SYSEXIT IA-32e implementation (Alexander Graf).

On Intel CPUs, sysenter and sysexit are valid in 64-bit mode. This patch
makes both 64-bit aware and enables them for Intel CPUs.
Add cpu save/load for 64-bit wide sysenter variables.

Signed-off-by: Alexander Graf <>...

e737b32a 09/25/2008 09:11 pm balrog

Core 2 Duo specification (Alexander Graf).

This patch adds a Core 2 Duo CPU to the available CPU types. The CPU
definition tries to resemble a real CPU as good as possible, whilst not
exposing features qemu does not implement.
The patch also includes some minor additions that Core 2 Duo CPUs have:...

c5096daf 09/25/2008 09:08 pm balrog

Clean up vendor identification (Alexander Graf).

Right now CPU vendor identification contains a lot of magic numbers. The
patch cleans them up to defines, so we can identify the CPU later on
without copying magic numbers.

Signed-off-by: Alexander Graf <>...

9656f324 07/01/2008 11:01 pm pbrook

Move interrupt_request and user_mode_only to common cpu state.
Save and restore env->interrupt_request and env->halted.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

b3c7724c 06/30/2008 07:31 pm pbrook

Move CPU save/load registration to common code.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

2e70f6ef 06/29/2008 04:03 am pbrook

Add instruction counter.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

5cc1d1e6 06/04/2008 09:29 pm bellard

save more CPU state

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

33c263df 06/04/2008 08:39 pm bellard

SVM: added tsc_offset

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

db620f46 06/04/2008 08:02 pm bellard

reworked SVM interrupt handling logic - fixed vmrun EIP saved value - reworked cr8 handling - added CPUState.hflags2

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

5efc27bb 06/04/2008 04:35 pm bellard

EFER loading fixes, including SVME bit

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

1235fc06 06/03/2008 10:51 pm ths

Spelling fixes, by Stefan Weil.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

f8ed7070 05/30/2008 08:54 pm pbrook

Fix typo.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

6e68e076 05/30/2008 08:22 pm pbrook

Move clone() register setup to target specific code. Handle fork-like clone.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

9133e39b 05/29/2008 01:08 pm bellard

Push common interrupt variables to cpu-defs.h (Glauber Costa)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

ce5232c5 05/28/2008 08:14 pm bellard

moved halted field to CPU_COMMON

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

872929aa 05/28/2008 07:16 pm bellard

SVM rework

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

26a5f13b 05/28/2008 03:30 pm bellard

variable dynamic translation buffer size

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

1e4840bf 05/25/2008 08:26 pm bellard

transformed TN into temporaries - add local temporaries usage when needed - optimized fcmovX

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

b6abf97d 05/17/2008 03:44 pm bellard

converted condition code supprot to TCG - converted shift ops to TCG

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

dbd02bdf 05/13/2008 01:03 am bellard

removed unused code

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

0ba5f006 04/22/2008 11:37 pm aurel32

x86/x86-64 MMU PAE fixes

This patch fixes MMU emulation in PAE mode for > 4GB physical addresses:
- a20_mask should have the correct size to not clear the high part of
the addresses.
- PHYS_ADDR_MASK should not clear the high part of the addresses.
- pdpe, pde and pte could be located anywhere in memory on x86-64, but...

474ea849 04/13/2008 07:08 pm aurel32

x86: Introduce CPU_INTERRUPT_NMI

(Jan Kiszka)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a35f3ec7 04/08/2008 10:51 pm aurel32

3DNow! instruction set emulation

(Michael Tross)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

3d575329 02/03/2008 04:42 am balrog

Make SVM env->cr8 a valid register (patch from TeLeMan).

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

d2fd1af7 11/14/2007 08:08 pm bellard

x86_64 linux user emulation

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

6f12a2a6 11/12/2007 12:16 am bellard

consistent types for cpu_x86_fsave and cpu_x86_frstor

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

aaed909a 11/10/2007 05:15 pm bellard

added cpu_model parameter to cpu_init()

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

ec6338ba 11/08/2007 04:25 pm bellard

removed obsolete x86 code copy support

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a049de61 11/08/2007 03:28 pm bellard

added -cpu option for x86 (initial patch by Dan Kenigsberg)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

6ebbf390 10/14/2007 10:07 am j_mayer

Replace is_user variable with mmu_idx in softmmu core,
allowing support of more than 2 mmu access modes.
Add backward compatibility is_user variable in targets code when needed.
Implement per target cpu_mmu_index function, avoiding duplicated code
and #ifdef TARGET_xxx in softmmu core functions....

198a74de 09/27/2007 07:44 pm ths

Move get_sp_from_cpustate from cpu.h to target_signal.h.
Enable sigaltstack processing for more architectures.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a04e134a 09/27/2007 04:57 pm ths

linux-user sigaltstack() syscall, by Thayne Harbaugh.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

0573fbfc 09/23/2007 06:28 pm ths

SVM Support, by Alexander Graf.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

3b46e624 09/17/2007 11:09 am ths

find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

5fafdf24 09/17/2007 12:08 am ths

find -type f | xargs sed -i 's/[\t ]$//g' # on most files

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

aa1f17c1 07/12/2007 01:48 am ths

Spelling fixes, by Stefan Weil.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

9467d44c 06/04/2007 12:02 am ths

Move target-specific defines to the target directories.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

eae7629b 04/03/2007 07:38 pm ths

i386 return APIC ID with cpuid, by Bernhard Kauer.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

678dde13 03/31/2007 11:28 pm ths

Generate double and triple faults, by Bernhard Kauer.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

26a16623 02/06/2007 12:06 am bellard

darwin fix

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

5a7b542b 01/31/2007 02:16 pm ths

siginfo fix for Darwin/Mac OS X, by Pierre d'Herbemont.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

9042c0e2 12/23/2006 04:18 pm ths

Check ELF binaries for machine type and endianness.

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

8988ae89 09/27/2006 10:54 pm bellard

SMM fix for x86_64

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

3b21e03e 09/24/2006 09:41 pm bellard

added SMM support

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

465e9838 04/24/2006 12:54 am bellard

SSE3 support (Joachim Henke)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

f1c85677 02/09/2006 12:41 am bellard

added last_io_time field

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

5cf38396 11/28/2005 11:02 pm bellard

nx defines

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

d2ac63e0 11/23/2005 11:02 pm bellard

added HF_HALTED bit

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

a316d335 11/20/2005 12:32 pm bellard

added CPU_COMMON and CPUState.tb_jmp_cache[]

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162

8f091a59 07/23/2005 08:41 pm bellard

x86_64 fixes (initial patch by Filip Navara)

git-svn-id: svn:// c046a42c-6fe2-441c-8c8c-71466251a162