target-xtensa: implement relocatable vectors
See ISA, 4.4.3 for details.
Vector addresses recorded in core configuration are absolute values thatcorrespond to default VECBASE value.
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-xtensa: add gdb support
Specific xtensa processor overlay for GDB contains register map inthe gdb/xtensa-config.c. This description is used by the GDB to e.g.parse 'g' response packets and it may be reused in the qemu's gdbstub(only XTREG definitions for non-pseudoregisters are needed)....
target-xtensa: implement windowed registers
See ISA, 4.7.1 for details.
Physical registers and currently visible window are separate fields inCPUEnv. Only current window is accessible to TCG. On operations thatchange window base helpers copy current window to and from physical...
target-xtensa: implement loop option
See ISA, 4.3.2 for details.
Operations that change LEND SR value invalidate TBs at the old and atthe new LEND. LEND value at TB compilation time is considered constantand loop instruction is generated based on this value....
target-xtensa: implement extended L32R
See ISA, 4.3.3 for details.
TB flag XTENSA_TBFLAG_LITBASE is used to track enable bit of LITBASE SR.
target-xtensa: implement unaligned exception option
See ISA, 4.4.4 for details.
Correct (aligned as per ISA) address for unaligned access is generatedin case this option is not enabled.
target-xtensa: implement SIMCALL
Tensilica iss provides support for applications running in freestandingenvironment through SIMCALL command. It is used by Tensilica libc toaccess argc/argv, for file I/O, etc.
Note that simcalls that accept buffer addresses expect virtual addresses....
target-xtensa: implement interrupt option
See ISA, 4.4.6 (interrupt option), 4.4.7 (high priority interruptoption) and 4.4.8 (timer interrupt option) for details.
target-xtensa: implement accurate window check
See ISA, 4.7.1.3 for details.
Window check is inserted before commands that push "used registerwatermark" beyond its current level. Used register watermark is reset oninstructions that change WINDOW_BASE/WINDOW_START SRs....
target-xtensa: implement CPENABLE and PRID SRs
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