tcg-arm: Split out tcg_out_tlb_read
Share code between qemu_ld and qemu_st to process the tlb.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Implement deposit for armv7
We have BFI and BFC available for implementing it.
Signed-off-by: Richard Henderson <rth@twiddle.net>
tcg-arm: Implement division instructions
An armv7 extension implements division, present on Cortex A15.
tcg-arm: Use TCG_REG_TMP name for the tcg temporary
Don't hard-code R8.
tcg-arm: Use R12 for the tcg temporary
R12 is call clobbered, while R8 is call saved. This changegives tcg one more call saved register for real data.
tcg-arm: Cleanup multiply subroutines
Make the code more readable by only having one copy of the magicnumbers, swapping registers as needed prior to that. Speed thecompiler by not applying the rd == rn avoidance for v6 or later.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>...
tcg-arm: Cleanup most primitive load store subroutines
Use even more primitive helper functions to avoid lots of duplicated code.
tcg-arm: Use tcg_out_dat_rIN for compares
This allows us to emit CMN instructions.
tcg-arm: Handle constant arguments to add2/sub2
We get to re-use the _rIN and _rIK subroutines to handle the variouscombinations of add vs sub. Fold the << 21 into the opcode enum valuesso that we can explicitly add TO_CPSR as desired.
tcg-arm: Improve constant generation
Try fully rotated arguments to mov and mvn before trying movtor full decomposition. Begin decomposition with mvn when itlooks like it'll help. Examples include
: mov r9, #0x00000fa0: orr r9, r9, #0x000ee000...
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