monitor: use after free in do_wav_capture()
use after free in do_wav_capture() on the error path.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
mips_fulong: remove bogus HAS_AUDIO
remove bogus HAS_AUDIO according to 738012bec4c67e697e766edadab3f522c552a04d.
Cc: Blue Swirl <blauwirbel@gmail.com>Cc: Huacai Chen <zltjiangshi@gmail.com>Cc: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>...
audio: consolidate audio_init()
consolidate audio_init() and remove references to shoundhw.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>Acked-by: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-sh4: fix index of address read error exception
Exception index of address read error should be 0x0e0.
Signed-off-by: Alexandre Courbot <gnurou@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-sh4: fix TLB invalidation code
In cpu_sh4_invalidate_tlb, the UTLB was invalidated twice and theITLB left unchaged, probably because of some unfortunate copy/paste.
Merge remote branch 'kwolf/for-anthony' into staging
SPARC: Emulation of GRLIB IRQMP
This device exposes two parameters: - set_pil_in (ptr) : A function to set the pil_in of the SPARC CPU - set_pil_in_opaque (ptr) : Opaque argument of the set_pil_in function
Emulation of GrLib devices is base on the GRLIB IP Core User's Manual:...
SPARC: Emulation of GRLIB APB UART
This device exposes one parameter: - chardev (ptr) : Pointer to a qemu character device
Emulation of GrLib devices is base on the GRLIB IP Core User's Manual:http://www.gaisler.com/products/grlib/grip.pdf
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>...
SPARC: Emulation of Leon3
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (moreinformation on http://www.gaisler.com).
Leon3 is made of multiple components available in the GrLib VHDL library.Three devices are implemented: uart, timers and IRQ manager....
SPARC: Add asr17 register support
This register is activated by CPU_FEATURE_ASR17 in the feature field.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
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