Make it safe to use 64 bits GPR and/or 64 bits host registers.For "symetry", add 64 bits versions of all modified functions.As a side effect, add a lot of code provision for PowerPC 64 support.Move overflow and carry checks in common routines for simple cases....
ARM register index+writeback fix (Lauro Ramos Venancio).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2481 c046a42c-6fe2-441c-8c8c-71466251a162
Usermode recv syscall fix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2480 c046a42c-6fe2-441c-8c8c-71466251a162
Watchpoint support (previous commit got eaten by Savannah server crash).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2479 c046a42c-6fe2-441c-8c8c-71466251a162
Align stack when loading bFLT binaries.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2478 c046a42c-6fe2-441c-8c8c-71466251a162
SMP half-idle fix.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2477 c046a42c-6fe2-441c-8c8c-71466251a162
ARM reabbot support (orginal patch by Aurelien Jarno).
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2476 c046a42c-6fe2-441c-8c8c-71466251a162
Fix typo in help output.List ARM cpus.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2475 c046a42c-6fe2-441c-8c8c-71466251a162
Implement --cpu for ARM.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2474 c046a42c-6fe2-441c-8c8c-71466251a162
Great PowerPC emulation code resynchronisation and improvments:- Add status file to make regression tracking easier- Move all micro-operations helpers definitions into a separate header: should never be seen outside of op.c- Update copyrights- Add new / missing PowerPC CPU definitions...
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