root / hw / ppc_chrp.c @ e616a7e8
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1 | 64201201 | bellard | /*
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2 | 3cbee15b | j_mayer | * QEMU PowerPC CHRP (currently NewWorld PowerMac) hardware System Emulator
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3 | 5fafdf24 | ths | *
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4 | 47103572 | j_mayer | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 3cbee15b | j_mayer | * Copyright (c) 2007 Jocelyn Mayer
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6 | 5fafdf24 | ths | *
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7 | 64201201 | bellard | * Permission is hereby granted, free of charge, to any person obtaining a copy
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8 | 64201201 | bellard | * of this software and associated documentation files (the "Software"), to deal
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9 | 64201201 | bellard | * in the Software without restriction, including without limitation the rights
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10 | 64201201 | bellard | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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11 | 64201201 | bellard | * copies of the Software, and to permit persons to whom the Software is
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12 | 64201201 | bellard | * furnished to do so, subject to the following conditions:
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13 | 64201201 | bellard | *
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14 | 64201201 | bellard | * The above copyright notice and this permission notice shall be included in
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15 | 64201201 | bellard | * all copies or substantial portions of the Software.
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16 | 64201201 | bellard | *
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17 | 64201201 | bellard | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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18 | 64201201 | bellard | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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19 | 64201201 | bellard | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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20 | 64201201 | bellard | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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21 | 64201201 | bellard | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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22 | 64201201 | bellard | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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23 | 64201201 | bellard | * THE SOFTWARE.
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24 | 64201201 | bellard | */
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25 | 64201201 | bellard | #include "vl.h" |
26 | 3cbee15b | j_mayer | #include "ppc_mac.h" |
27 | 267002cd | bellard | |
28 | 0aa6a4a2 | bellard | /* UniN device */
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29 | 0aa6a4a2 | bellard | static void unin_writel (void *opaque, target_phys_addr_t addr, uint32_t value) |
30 | 0aa6a4a2 | bellard | { |
31 | 0aa6a4a2 | bellard | } |
32 | 0aa6a4a2 | bellard | |
33 | 0aa6a4a2 | bellard | static uint32_t unin_readl (void *opaque, target_phys_addr_t addr) |
34 | 0aa6a4a2 | bellard | { |
35 | 0aa6a4a2 | bellard | return 0; |
36 | 0aa6a4a2 | bellard | } |
37 | 0aa6a4a2 | bellard | |
38 | 0aa6a4a2 | bellard | static CPUWriteMemoryFunc *unin_write[] = {
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39 | 0aa6a4a2 | bellard | &unin_writel, |
40 | 0aa6a4a2 | bellard | &unin_writel, |
41 | 0aa6a4a2 | bellard | &unin_writel, |
42 | 0aa6a4a2 | bellard | }; |
43 | 0aa6a4a2 | bellard | |
44 | 0aa6a4a2 | bellard | static CPUReadMemoryFunc *unin_read[] = {
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45 | 0aa6a4a2 | bellard | &unin_readl, |
46 | 0aa6a4a2 | bellard | &unin_readl, |
47 | 0aa6a4a2 | bellard | &unin_readl, |
48 | 0aa6a4a2 | bellard | }; |
49 | 0aa6a4a2 | bellard | |
50 | 3cbee15b | j_mayer | /* PowerPC Mac99 hardware initialisation */
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51 | 6ac0e82d | balrog | static void ppc_core99_init (int ram_size, int vga_ram_size, |
52 | 6ac0e82d | balrog | const char *boot_device, DisplayState *ds, |
53 | 6ac0e82d | balrog | const char **fd_filename, int snapshot, |
54 | 3cbee15b | j_mayer | const char *kernel_filename, |
55 | 3cbee15b | j_mayer | const char *kernel_cmdline, |
56 | 3cbee15b | j_mayer | const char *initrd_filename, |
57 | 3cbee15b | j_mayer | const char *cpu_model) |
58 | 64201201 | bellard | { |
59 | e9df014c | j_mayer | CPUState *env, *envs[MAX_CPUS]; |
60 | 64201201 | bellard | char buf[1024]; |
61 | e9df014c | j_mayer | qemu_irq *pic, **openpic_irqs; |
62 | aef445bd | pbrook | int unin_memory;
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63 | d5295253 | bellard | int linux_boot, i;
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64 | d5295253 | bellard | unsigned long bios_offset, vga_bios_offset; |
65 | b6b8bd18 | bellard | uint32_t kernel_base, kernel_size, initrd_base, initrd_size; |
66 | 3fc6c082 | bellard | ppc_def_t *def; |
67 | 46e50e9d | bellard | PCIBus *pci_bus; |
68 | 3cbee15b | j_mayer | nvram_t nvram; |
69 | 3cbee15b | j_mayer | #if 0
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70 | 3cbee15b | j_mayer | MacIONVRAMState *nvr;
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71 | 3cbee15b | j_mayer | int nvram_mem_index;
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72 | 3cbee15b | j_mayer | #endif
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73 | 3cbee15b | j_mayer | m48t59_t *m48t59; |
74 | d5295253 | bellard | int vga_bios_size, bios_size;
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75 | d537cf6c | pbrook | qemu_irq *dummy_irq; |
76 | 3cbee15b | j_mayer | int pic_mem_index, dbdma_mem_index, cuda_mem_index;
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77 | 3cbee15b | j_mayer | int ide_mem_index[2]; |
78 | 6ac0e82d | balrog | int ppc_boot_device = boot_device[0]; |
79 | 46e50e9d | bellard | |
80 | 64201201 | bellard | linux_boot = (kernel_filename != NULL);
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81 | 64201201 | bellard | |
82 | c68ea704 | bellard | /* init CPUs */
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83 | c68ea704 | bellard | env = cpu_init(); |
84 | 94fc95cd | j_mayer | if (cpu_model == NULL) |
85 | d12f4c38 | j_mayer | cpu_model = "default";
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86 | 94fc95cd | j_mayer | ppc_find_by_name(cpu_model, &def); |
87 | c68ea704 | bellard | if (def == NULL) { |
88 | c68ea704 | bellard | cpu_abort(env, "Unable to find PowerPC CPU definition\n");
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89 | c68ea704 | bellard | } |
90 | e9df014c | j_mayer | for (i = 0; i < smp_cpus; i++) { |
91 | e9df014c | j_mayer | cpu_ppc_register(env, def); |
92 | fe33cc71 | j_mayer | cpu_ppc_reset(env); |
93 | e9df014c | j_mayer | /* Set time-base frequency to 100 Mhz */
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94 | e9df014c | j_mayer | cpu_ppc_tb_init(env, 100UL * 1000UL * 1000UL); |
95 | 3cbee15b | j_mayer | #if 0
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96 | e9df014c | j_mayer | env->osi_call = vga_osi_call;
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97 | 3cbee15b | j_mayer | #endif
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98 | fe33cc71 | j_mayer | qemu_register_reset(&cpu_ppc_reset, env); |
99 | fe33cc71 | j_mayer | register_savevm("cpu", 0, 3, cpu_save, cpu_load, env); |
100 | e9df014c | j_mayer | envs[i] = env; |
101 | e9df014c | j_mayer | } |
102 | 4c823cff | j_mayer | if (env->nip < 0xFFF80000) { |
103 | 4c823cff | j_mayer | /* Special test for PowerPC 601:
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104 | 4c823cff | j_mayer | * the boot vector is at 0xFFF00100, then we need a 1MB BIOS.
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105 | 4c823cff | j_mayer | * But the NVRAM is located at 0xFFF04000...
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106 | 4c823cff | j_mayer | */
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107 | 4c823cff | j_mayer | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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108 | 4c823cff | j_mayer | } |
109 | c68ea704 | bellard | |
110 | 64201201 | bellard | /* allocate RAM */
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111 | 64201201 | bellard | cpu_register_physical_memory(0, ram_size, IO_MEM_RAM);
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112 | 64201201 | bellard | |
113 | 64201201 | bellard | /* allocate and load BIOS */
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114 | 64201201 | bellard | bios_offset = ram_size + vga_ram_size; |
115 | 1192dad8 | j_mayer | if (bios_name == NULL) |
116 | 1192dad8 | j_mayer | bios_name = BIOS_FILENAME; |
117 | 1192dad8 | j_mayer | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, bios_name); |
118 | d5295253 | bellard | bios_size = load_image(buf, phys_ram_base + bios_offset); |
119 | d5295253 | bellard | if (bios_size < 0 || bios_size > BIOS_SIZE) { |
120 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load PowerPC bios '%s'\n", buf);
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121 | 64201201 | bellard | exit(1);
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122 | 64201201 | bellard | } |
123 | d5295253 | bellard | bios_size = (bios_size + 0xfff) & ~0xfff; |
124 | 4c823cff | j_mayer | if (bios_size > 0x00080000) { |
125 | 4c823cff | j_mayer | /* As the NVRAM is located at 0xFFF04000, we cannot use 1 MB BIOSes */
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126 | 4c823cff | j_mayer | cpu_abort(env, "Mac99 hardware can not handle 1 MB BIOS\n");
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127 | 4c823cff | j_mayer | } |
128 | 4a057712 | j_mayer | cpu_register_physical_memory((uint32_t)(-bios_size), |
129 | d5295253 | bellard | bios_size, bios_offset | IO_MEM_ROM); |
130 | 3b46e624 | ths | |
131 | d5295253 | bellard | /* allocate and load VGA BIOS */
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132 | d5295253 | bellard | vga_bios_offset = bios_offset + bios_size; |
133 | d5295253 | bellard | snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME); |
134 | d5295253 | bellard | vga_bios_size = load_image(buf, phys_ram_base + vga_bios_offset + 8);
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135 | d5295253 | bellard | if (vga_bios_size < 0) { |
136 | d5295253 | bellard | /* if no bios is present, we can still work */
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137 | d5295253 | bellard | fprintf(stderr, "qemu: warning: could not load VGA bios '%s'\n", buf);
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138 | d5295253 | bellard | vga_bios_size = 0;
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139 | d5295253 | bellard | } else {
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140 | d5295253 | bellard | /* set a specific header (XXX: find real Apple format for NDRV
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141 | d5295253 | bellard | drivers) */
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142 | d5295253 | bellard | phys_ram_base[vga_bios_offset] = 'N';
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143 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 1] = 'D'; |
144 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 2] = 'R'; |
145 | d5295253 | bellard | phys_ram_base[vga_bios_offset + 3] = 'V'; |
146 | 5fafdf24 | ths | cpu_to_be32w((uint32_t *)(phys_ram_base + vga_bios_offset + 4),
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147 | d5295253 | bellard | vga_bios_size); |
148 | d5295253 | bellard | vga_bios_size += 8;
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149 | d5295253 | bellard | } |
150 | d5295253 | bellard | vga_bios_size = (vga_bios_size + 0xfff) & ~0xfff; |
151 | 3b46e624 | ths | |
152 | b6b8bd18 | bellard | if (linux_boot) {
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153 | b6b8bd18 | bellard | kernel_base = KERNEL_LOAD_ADDR; |
154 | b6b8bd18 | bellard | /* now we can load the kernel */
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155 | b6b8bd18 | bellard | kernel_size = load_image(kernel_filename, phys_ram_base + kernel_base); |
156 | b6b8bd18 | bellard | if (kernel_size < 0) { |
157 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load kernel '%s'\n",
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158 | 4a057712 | j_mayer | kernel_filename); |
159 | b6b8bd18 | bellard | exit(1);
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160 | b6b8bd18 | bellard | } |
161 | b6b8bd18 | bellard | /* load initrd */
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162 | b6b8bd18 | bellard | if (initrd_filename) {
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163 | b6b8bd18 | bellard | initrd_base = INITRD_LOAD_ADDR; |
164 | b6b8bd18 | bellard | initrd_size = load_image(initrd_filename, |
165 | b6b8bd18 | bellard | phys_ram_base + initrd_base); |
166 | b6b8bd18 | bellard | if (initrd_size < 0) { |
167 | 4a057712 | j_mayer | cpu_abort(env, "qemu: could not load initial ram disk '%s'\n",
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168 | 4a057712 | j_mayer | initrd_filename); |
169 | b6b8bd18 | bellard | exit(1);
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170 | b6b8bd18 | bellard | } |
171 | b6b8bd18 | bellard | } else {
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172 | b6b8bd18 | bellard | initrd_base = 0;
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173 | b6b8bd18 | bellard | initrd_size = 0;
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174 | b6b8bd18 | bellard | } |
175 | 6ac0e82d | balrog | ppc_boot_device = 'm';
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176 | b6b8bd18 | bellard | } else {
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177 | b6b8bd18 | bellard | kernel_base = 0;
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178 | b6b8bd18 | bellard | kernel_size = 0;
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179 | b6b8bd18 | bellard | initrd_base = 0;
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180 | b6b8bd18 | bellard | initrd_size = 0;
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181 | b6b8bd18 | bellard | } |
182 | 0aa6a4a2 | bellard | |
183 | 3cbee15b | j_mayer | isa_mem_base = 0x80000000;
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184 | aef445bd | pbrook | |
185 | 3cbee15b | j_mayer | /* Register 8 MB of ISA IO space */
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186 | 3cbee15b | j_mayer | isa_mmio_init(0xf2000000, 0x00800000); |
187 | 3b46e624 | ths | |
188 | 3cbee15b | j_mayer | /* UniN init */
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189 | 3cbee15b | j_mayer | unin_memory = cpu_register_io_memory(0, unin_read, unin_write, NULL); |
190 | 3cbee15b | j_mayer | cpu_register_physical_memory(0xf8000000, 0x00001000, unin_memory); |
191 | 47103572 | j_mayer | |
192 | 3cbee15b | j_mayer | openpic_irqs = qemu_mallocz(smp_cpus * sizeof(qemu_irq *));
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193 | 3cbee15b | j_mayer | openpic_irqs[0] =
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194 | 3cbee15b | j_mayer | qemu_mallocz(smp_cpus * sizeof(qemu_irq) * OPENPIC_OUTPUT_NB);
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195 | 3cbee15b | j_mayer | for (i = 0; i < smp_cpus; i++) { |
196 | 3cbee15b | j_mayer | /* Mac99 IRQ connection between OpenPIC outputs pins
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197 | 3cbee15b | j_mayer | * and PowerPC input pins
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198 | 3cbee15b | j_mayer | */
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199 | 3cbee15b | j_mayer | switch (PPC_INPUT(env)) {
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200 | 3cbee15b | j_mayer | case PPC_FLAGS_INPUT_6xx:
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201 | 3cbee15b | j_mayer | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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202 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
203 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
204 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
205 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_INT]; |
206 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
207 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_MCP]; |
208 | 3cbee15b | j_mayer | /* Not connected ? */
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209 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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210 | 3cbee15b | j_mayer | /* Check this */
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211 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
212 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC6xx_INPUT_HRESET]; |
213 | 3cbee15b | j_mayer | break;
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214 | 00af685f | j_mayer | #if defined(TARGET_PPC64)
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215 | 3cbee15b | j_mayer | case PPC_FLAGS_INPUT_970:
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216 | 3cbee15b | j_mayer | openpic_irqs[i] = openpic_irqs[0] + (i * OPENPIC_OUTPUT_NB);
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217 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_INT] = |
218 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
219 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_CINT] = |
220 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_INT]; |
221 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_MCK] = |
222 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_MCP]; |
223 | 3cbee15b | j_mayer | /* Not connected ? */
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224 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_DEBUG] = NULL;
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225 | 3cbee15b | j_mayer | /* Check this */
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226 | 3cbee15b | j_mayer | openpic_irqs[i][OPENPIC_OUTPUT_RESET] = |
227 | 3cbee15b | j_mayer | ((qemu_irq *)env->irq_inputs)[PPC970_INPUT_HRESET]; |
228 | 3cbee15b | j_mayer | break;
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229 | 00af685f | j_mayer | #endif /* defined(TARGET_PPC64) */ |
230 | 3cbee15b | j_mayer | default:
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231 | 3cbee15b | j_mayer | cpu_abort(env, "Bus model not supported on mac99 machine\n");
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232 | 3cbee15b | j_mayer | exit(1);
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233 | 0aa6a4a2 | bellard | } |
234 | 3cbee15b | j_mayer | } |
235 | 3cbee15b | j_mayer | pic = openpic_init(NULL, &pic_mem_index, smp_cpus, openpic_irqs, NULL); |
236 | 3cbee15b | j_mayer | pci_bus = pci_pmac_init(pic); |
237 | 3cbee15b | j_mayer | /* init basic PC hardware */
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238 | 3cbee15b | j_mayer | pci_vga_init(pci_bus, ds, phys_ram_base + ram_size, |
239 | 3cbee15b | j_mayer | ram_size, vga_ram_size, |
240 | 3cbee15b | j_mayer | vga_bios_offset, vga_bios_size); |
241 | 3cbee15b | j_mayer | |
242 | 3cbee15b | j_mayer | /* XXX: suppress that */
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243 | 3cbee15b | j_mayer | dummy_irq = i8259_init(NULL);
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244 | 3cbee15b | j_mayer | |
245 | 3cbee15b | j_mayer | /* XXX: use Mac Serial port */
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246 | 3cbee15b | j_mayer | serial_init(0x3f8, dummy_irq[4], serial_hds[0]); |
247 | 3cbee15b | j_mayer | for(i = 0; i < nb_nics; i++) { |
248 | 3cbee15b | j_mayer | if (!nd_table[i].model)
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249 | 3cbee15b | j_mayer | nd_table[i].model = "ne2k_pci";
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250 | 3cbee15b | j_mayer | pci_nic_init(pci_bus, &nd_table[i], -1);
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251 | 3cbee15b | j_mayer | } |
252 | 0aa6a4a2 | bellard | #if 1 |
253 | 3cbee15b | j_mayer | ide_mem_index[0] = pmac_ide_init(&bs_table[0], pic[0x13]); |
254 | 3cbee15b | j_mayer | ide_mem_index[1] = pmac_ide_init(&bs_table[2], pic[0x14]); |
255 | 0aa6a4a2 | bellard | #else
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256 | 3cbee15b | j_mayer | pci_cmd646_ide_init(pci_bus, &bs_table[0], 0); |
257 | 0aa6a4a2 | bellard | #endif
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258 | 3cbee15b | j_mayer | /* cuda also initialize ADB */
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259 | 3cbee15b | j_mayer | cuda_init(&cuda_mem_index, pic[0x19]);
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260 | 3cbee15b | j_mayer | |
261 | 3cbee15b | j_mayer | adb_kbd_init(&adb_bus); |
262 | 3cbee15b | j_mayer | adb_mouse_init(&adb_bus); |
263 | 3b46e624 | ths | |
264 | 3cbee15b | j_mayer | dbdma_init(&dbdma_mem_index); |
265 | 3b46e624 | ths | |
266 | 3cbee15b | j_mayer | macio_init(pci_bus, 0x0022, 0, pic_mem_index, dbdma_mem_index, |
267 | 74e91155 | j_mayer | cuda_mem_index, NULL, 2, ide_mem_index); |
268 | 0d92ed30 | pbrook | |
269 | 0d92ed30 | pbrook | if (usb_enabled) {
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270 | e24ad6f1 | pbrook | usb_ohci_init_pci(pci_bus, 3, -1); |
271 | 0d92ed30 | pbrook | } |
272 | 0d92ed30 | pbrook | |
273 | b6b8bd18 | bellard | if (graphic_depth != 15 && graphic_depth != 32 && graphic_depth != 8) |
274 | b6b8bd18 | bellard | graphic_depth = 15;
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275 | 3cbee15b | j_mayer | #if 0 /* XXX: this is ugly but needed for now, or OHW won't boot */
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276 | 3cbee15b | j_mayer | /* The NewWorld NVRAM is not located in the MacIO device */
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277 | 74e91155 | j_mayer | nvr = macio_nvram_init(&nvram_mem_index, 0x2000);
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278 | 3cbee15b | j_mayer | pmac_format_nvram_partition(nvr, 0x2000);
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279 | 74e91155 | j_mayer | macio_nvram_map(nvr, 0xFFF04000);
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280 | 3cbee15b | j_mayer | nvram.opaque = nvr;
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281 | 3cbee15b | j_mayer | nvram.read_fn = &macio_nvram_read;
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282 | 3cbee15b | j_mayer | nvram.write_fn = &macio_nvram_write;
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283 | 3cbee15b | j_mayer | #else
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284 | 3cbee15b | j_mayer | m48t59 = m48t59_init(dummy_irq[8], 0xFFF04000, 0x0074, NVRAM_SIZE, 59); |
285 | 3cbee15b | j_mayer | nvram.opaque = m48t59; |
286 | 3cbee15b | j_mayer | nvram.read_fn = &m48t59_read; |
287 | 3cbee15b | j_mayer | nvram.write_fn = &m48t59_write; |
288 | 3cbee15b | j_mayer | #endif
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289 | 6ac0e82d | balrog | PPC_NVRAM_set_params(&nvram, NVRAM_SIZE, "MAC99", ram_size,
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290 | 6ac0e82d | balrog | ppc_boot_device, kernel_base, kernel_size, |
291 | b6b8bd18 | bellard | kernel_cmdline, |
292 | b6b8bd18 | bellard | initrd_base, initrd_size, |
293 | 64201201 | bellard | /* XXX: need an option to load a NVRAM image */
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294 | b6b8bd18 | bellard | 0,
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295 | b6b8bd18 | bellard | graphic_width, graphic_height, graphic_depth); |
296 | b6b8bd18 | bellard | /* No PCI init: the BIOS will do it */
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297 | 0aa6a4a2 | bellard | |
298 | 0aa6a4a2 | bellard | /* Special port to get debug messages from Open-Firmware */
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299 | 0aa6a4a2 | bellard | register_ioport_write(0x0F00, 4, 1, &PPC_debug_write, NULL); |
300 | 3cbee15b | j_mayer | } |
301 | 0aa6a4a2 | bellard | |
302 | 0aa6a4a2 | bellard | QEMUMachine core99_machine = { |
303 | 0289b2c1 | bellard | "mac99",
|
304 | 0289b2c1 | bellard | "Mac99 based PowerMAC",
|
305 | 0aa6a4a2 | bellard | ppc_core99_init, |
306 | 0aa6a4a2 | bellard | }; |