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Enable 64-bit FPU only for NewABI. Spotted by Vince Weaver.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4368 c046a42c-6fe2-441c-8c8c-71466251a162
Use TCG for MIPS GPR moves.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4356 c046a42c-6fe2-441c-8c8c-71466251a162
Set FCR0.F64 for MIPS64R2-generic, by Richard Sandiford.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3865 c046a42c-6fe2-441c-8c8c-71466251a162
Support for VR5432, and some of its special instructions. Original patchby Dirk Behme.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3859 c046a42c-6fe2-441c-8c8c-71466251a162
5K and 20K are Release 1 CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3858 c046a42c-6fe2-441c-8c8c-71466251a162
Improved PABITS handling, and config register fixes.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3855 c046a42c-6fe2-441c-8c8c-71466251a162
Fix CCRes value for 20Kc.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3849 c046a42c-6fe2-441c-8c8c-71466251a162
Add older 4Km variants.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3708 c046a42c-6fe2-441c-8c8c-71466251a162
Use a valid PRid.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3685 c046a42c-6fe2-441c-8c8c-71466251a162
Introduce 4KEm configuration with fixed MMU mapping. Delete bogus INSN_DSPflags.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3637 c046a42c-6fe2-441c-8c8c-71466251a162
added cpu_model parameter to cpu_init()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3562 c046a42c-6fe2-441c-8c8c-71466251a162
Clean out the N32 macros from target-mips, and introduce MIPS ABI specificdefines for linux-user.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3556 c046a42c-6fe2-441c-8c8c-71466251a162
Preliminary MIPS64R2 mode.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3479 c046a42c-6fe2-441c-8c8c-71466251a162
Use the standard ASE check for MIPS-3D and MT.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3427 c046a42c-6fe2-441c-8c8c-71466251a162
Code provision for n32/n64 mips userland emulation. Not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3284 c046a42c-6fe2-441c-8c8c-71466251a162
Supervisor mode implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3267 c046a42c-6fe2-441c-8c8c-71466251a162
Per-CPU instruction decoding implementation, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3228 c046a42c-6fe2-441c-8c8c-71466251a162
Fix mips usermode emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3212 c046a42c-6fe2-441c-8c8c-71466251a162
Partial support for 34K multithreading, not functional yet.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3156 c046a42c-6fe2-441c-8c8c-71466251a162
Disable 64-bit instructions on 32-bit CPU, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3146 c046a42c-6fe2-441c-8c8c-71466251a162
Fix MIPS cache configuration, by Aurelien Jarno.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3092 c046a42c-6fe2-441c-8c8c-71466251a162
Handle MIPS64 SEGBITS value correctly.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3011 c046a42c-6fe2-441c-8c8c-71466251a162
Allow emulation of 32bit targets in the MIPS64 capable qemu version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3007 c046a42c-6fe2-441c-8c8c-71466251a162
Change 20Kc PRID to a later version.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2980 c046a42c-6fe2-441c-8c8c-71466251a162
R5k has PX implemented.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2963 c046a42c-6fe2-441c-8c8c-71466251a162
Update some comments, 64bit FPU support is functional regardless offunny non-standard fcr0 bits on earlier CPUs.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2919 c046a42c-6fe2-441c-8c8c-71466251a162
Add support for 5Kc/5Kf/20Kc, based on a patch by Aurelien Jarno.Note that the F64 flag isn't usable on any of those (and the R4000),so all our 64bit FPU goodness goes out of the window until a shadowcapability flag is implemented. :-(
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2910 c046a42c-6fe2-441c-8c8c-71466251a162
Allow again FPU for usermode emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2905 c046a42c-6fe2-441c-8c8c-71466251a162
Fix CPU (re-)selection on reset.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2900 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS TLB style selection at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2809 c046a42c-6fe2-441c-8c8c-71466251a162
Fix missing status ro mask initialization, thanks Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2800 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS 64-bit FPU support, plus some collateral bugfixes in theconditional branch handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2779 c046a42c-6fe2-441c-8c8c-71466251a162
Choose number of TLBs at runtime, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2693 c046a42c-6fe2-441c-8c8c-71466251a162
Make SYNCI_Step and CCRes CPU-specific.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2651 c046a42c-6fe2-441c-8c8c-71466251a162
Actually enable 64bit configuration.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2565 c046a42c-6fe2-441c-8c8c-71466251a162
One more bit of mips CPU configuration, and support for early 4KEcwhich implemented only MIPS32R1. Thanks to Stefan Weil to insist he'sright on that. :-)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2533 c046a42c-6fe2-441c-8c8c-71466251a162
Move mips CPU specific initialization to translate_init.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2522 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS -cpu selection support, by Herve Poussineau.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2491 c046a42c-6fe2-441c-8c8c-71466251a162