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# Date Author Comment
057d5f62 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement remaining 3-same instructions

Implement the remaining instructions in the SIMD 3-reg-same
and scalar-3-reg-same groups: FMULX, FRECPS, FRSQRTS, FACGE,
FACGT, FMLA and FMLS.

Signed-off-by: Peter Maydell <>...
8908f4d1 02/20/2014 12:35 pm Alex Bennée

target-arm: A64: Implement SIMD FP compare and set insns

This adds all forms of the SIMD floating point and set instructions:

FCM(GT|GE|EQ|LE|LT)

Most of the heavy lifting is done by either the existing neon helpers or
some new helpers for the 64bit double cases. Most of the code paths are...
f5e51e7f 02/20/2014 12:35 pm Peter Maydell

target-arm: A64: Implement plain vector SIMD indexed element insns

Implement all the SIMD vector x indexed element instructions
in the subcategory which are not 'long' ops.

Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
7c51048f 01/31/2014 04:47 pm Michael Matz

target-arm: A64: Add SIMD TBL/TBLX

Add support for the SIMD TBL/TBLX instructions (group C3.6.2).

Signed-off-by: Michael Matz <>
[PMM: rewritten to do more of the decode in translate-a64.c,
and to do only one 64 bit pass at a time in the helper]...
da7dafe7 01/08/2014 09:07 pm Claudio Fontana

target-arm: A64: Add support for floating point compare

Add decoding support for C3.6.22 Floating-point compare.

Signed-off-by: Claudio Fontana <>
Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
8220e911 12/17/2013 10:12 pm Alexander Graf

target-arm: A64: add support for 2-src data processing and DIV

This patch adds support for decoding 2-src data processing insns,
and the first users, UDIV and SDIV.

Signed-off-by: Alexander Graf <>
[claudio: adapted to new decoder adding the 2-src decoding level,...
680ead21 12/17/2013 10:12 pm Claudio Fontana

target-arm: A64: add support for 1-src data processing and CLZ

This patch adds support for decoding 1-src data processing insns,
and the first user, C5.6.40 CLZ (count leading zeroes).

Signed-off-by: Claudio Fontana <>
Signed-off-by: Peter Maydell <>...
82e14b02 12/17/2013 10:12 pm Alexander Graf

target-arm: A64: add support for 1-src RBIT insn

This adds support for the C5.6.147 RBIT instruction.

Signed-off-by: Alexander Graf <>
[claudio: adapted to new decoder, use bswap64,
make RBIT part standalone from the rest of the patch,...
e80c5020 12/17/2013 10:12 pm Claudio Fontana

target-arm: A64: add support for 1-src CLS insn

this patch adds support for the CLS instruction.

Signed-off-by: Claudio Fontana <>
Signed-off-by: Peter Maydell <>
Reviewed-by: Richard Henderson <>
d3e35a1f 12/17/2013 09:42 pm Alexander Graf

target-arm: A64: add stubs for a64 specific helpers

We will need helpers that only make sense with AArch64. Add
helper-a64.{c,h} files as stubs that we can fill with these
helpers in the following patches.

Signed-off-by: Alexander Graf <>
Signed-off-by: Peter Maydell <>...