Revision ed396e2b
| ID | ed396e2b2d256c1628de7c11841b509455a76c03 |
hw/openrisc: Fix masking in openrisc_pic_cpu_handler()
Consider the masking of PICSR and PICMR:
((cpu->env.picsr && (1 << i)) && (cpu->env.picmr && (1 << i)))To correctly mask bits, we should use the bitwise AND "&" rather than
the logical AND "&&". Also, the loop is not necessary for masking.
Simply use (cpu->env.picsr & cpu->env.picmr).
Signed-off-by: Xi Wang <xi.wang@gmail.com>
Acked-by: Jia Liu <proljc@gmail.com>
Files
- added
- modified
- copied
- renamed
- deleted