PPC: fix dcbi instruction
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5495 c046a42c-6fe2-441c-8c8c-71466251a162
PPC: convert SPE logical instructions to TCG
(Nathan Froyd)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5494 c046a42c-6fe2-441c-8c8c-71466251a162
ppc: convert integer load/store to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5493 c046a42c-6fe2-441c-8c8c-71466251a162
target-ppc: fix a TCG local variable creation
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5492 c046a42c-6fe2-441c-8c8c-71466251a162
PPC: convert SPE effective address computation to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5491 c046a42c-6fe2-441c-8c8c-71466251a162
PPC: convert effective address computation to TCG
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5490 c046a42c-6fe2-441c-8c8c-71466251a162
gdbstub: remove unused local variable
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5489 c046a42c-6fe2-441c-8c8c-71466251a162
target-i386: Add Core Duo Definition
This patch adds a CPU definition for the Core Duo CPU. I tried toresemble the original as closely as possible and document what featuresare missing still. This patch enables the use of a recent CPU definitionon 32 bit platforms....
Fix previous commit (spotted by Robert Riebisch).
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5487 c046a42c-6fe2-441c-8c8c-71466251a162
Define O_DSYNC as O_SYNC if necessary.
O_DSYNC isn't available on OS X.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5486 c046a42c-6fe2-441c-8c8c-71466251a162
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