Statistics
| Branch: | Revision:

root / tcg @ eeacee4d

Name Size
  arm
  hppa
  i386
  ia64
  mips
  ppc
  ppc64
  s390
  sparc
  tci
LICENSE 146 Bytes
README 14.9 kB
TODO 394 Bytes
optimize.c 16.3 kB
tcg-op.h 78.1 kB
tcg-opc.h 9.5 kB
tcg-runtime.h 706 Bytes
tcg.c 75.7 kB
tcg.h 17.5 kB

Latest revisions

# Date Author Comment
eeacee4d 06/21/2012 09:45 pm Blue Swirl

qemu-log: cleanup

Don't use global variables directly but via accessor functions. Rename globals.

Convert macros to functions, add GCC format attributes.

Signed-off-by: Blue Swirl <>
24f50d7e 05/27/2012 08:52 pm Andreas Färber

tcg/ppc: Handle _CALL_DARWIN being undefined on Darwin

powerpc-apple-darwin9-gcc-4.2.1 (GCC) 4.2.1 (Apple Inc. build 5577)
does not define _CALL_DARWIN, leading to unexpected behavior w.r.t.
register clobbering and stack frame layout.

Since _CALL_DARWIN is a reserved identifier, define a custom...
c82e5848 05/14/2012 11:53 pm Andreas Färber

tcg/ppc64: Don't hardcode register numbers for qemu_ld/st

Facilitates using r3 for prepended AREG0.

Signed-off-by: Andreas F?rber <>
Signed-off-by: malc <>
f4f7d01a 05/14/2012 11:53 pm Andreas Färber

tcg/ppc64: Fix CONFIG_TCG_PASS_AREG0

In qemu_ld/st load the registers for the helper calls directly rather
than rotating them around afterwards for AREG0.

Also clobber the additional register.

Signed-off-by: Andreas F?rber <>
Signed-off-by: malc <>
d831fdb0 05/09/2012 09:59 pm Andreas Färber

tcg/ppc: Don't hardcode register numbers

Also assure i64 alignment where necessary.

Alignment code optimization suggested by malc.

Signed-off-by: Andreas Färber <>
Acked-by: Alexander Graf <>
Signed-off-by: Anthony Liguori <>
a082615b 05/09/2012 09:59 pm Andreas Färber

tcg/ppc: Clobber r5 for 64-bit qemu_ld

This accounts for the additional addr_reg2 register.

Signed-off-by: Andreas Färber <>
Acked-by: Alexander Graf <>
Signed-off-by: Anthony Liguori <>
1b3e76eb 05/09/2012 09:59 pm Andreas Färber

tcg/ppc: Fix CONFIG_TCG_PASS_AREG0 mode

Adjust the tcg_out_qemu_{ld,st}() slow paths to pass AREG0 in r3,
based on patches by malc.

Also adjust the registers clobbered, based on patch by Alex.

Signed-off-by: Andreas Färber <>
Acked-by: Alexander Graf <>...
c1696d94 05/09/2012 09:59 pm Andreas Färber

tcg/ppc: Do not overwrite lower address word on Darwin and AIX

For targets where TARGET_LONG_BITS != 32, i.e. 64-bit guests,
addr_reg is moved to r4. For hosts without TCG_TARGET_CALL_ALIGN_ARGS
either data_reg2 or data_reg or a masked version thereof would overwrite...
f05ae537 05/03/2012 02:48 pm malc

Bail out if CONFIG_TCG_PASS_AREG0 is defined

Signed-off-by: malc <>
f6af014e 05/03/2012 02:47 pm malc

Restore consistent formatting

Signed-off-by: malc <>

View revisions

Also available in: Atom