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# Date Author Comment
059ca2bf 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Mark struct fields as public/private

As per current QOM conventions.

Signed-off-by: Peter Crosthwaite <>
Message-id:
Signed-off-by: Peter Maydell <>

589bfb68 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Add missing uart_update_state

This should be rechecked on bus write accesses as such accesses may
change the underlying state that generates the interrupt. Particular
relevant for when the guest touches the interrupt status or mask.

Signed-off-by: Peter Crosthwaite <>...

823dd487 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Fix reset.

Don't reset the uart as an init step. Register the reset function as a
proper reset fn instead.

Signed-off-by: Peter Crosthwaite <>
Message-id: ...

1e77c91e 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: s/r_fifo/rx_fifo

Rename this field to match the many other uses of "rx". Xilinx
docmentation (UG585) also refers to this as "RxFIFO".

Signed-off-by: Peter Crosthwaite <>
Message-id: ...

676f4c09 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Simplify status generation

The status register bits are always pure functions of other device
state. Move the generation of these bits to the update_status()
function to simplify. Makes developing much easier as theres now no need
to recheck status bits on all the changes to rx/tx fifo state....

11a239a5 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Define Missing SR/ISR fields

Some (interrupt) status register bits relating to the TxFIFO path were
not defined. Define them. This prepares support for proper Tx data path
flow control.

Signed-off-by: Peter Crosthwaite <>...

2152e08a 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Remove TX timer & add TX FIFO state

This tx timer implementation is flawed. Despite the controller
attempting to time the guest visable assertion of the TX-empty status
bit (and corresponding interrupt) the controller is still transmitting...

d0ac820f 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Fix can_receive logic

The can_receive logic was only taking into account the RxFIFO
occupancy. RxFIFO population is only used for the echo and normal modes
however. Improve the logic to correctly return the true number of
receivable characters based on the current mode:...

86baecc3 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Use the TX fifo for transmission

Populate the TxFIFO with the Tx data before sending. Prepares
support for proper Tx flow control implementation.

Signed-off-by: Peter Crosthwaite <>
Message-id: ...

1e5d8cac 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Delete redundant rx rst logic

uart_rx_reset() called immediately above already does this. Remove.

Signed-off-by: Peter Crosthwaite <>
Message-id: ...

38acd64b 01/08/2014 09:07 pm Peter Crosthwaite

char/cadence_uart: Implement Tx flow control

If the UART back-end blocks, buffer in the Tx FIFO to try again later.
This stops the IO-thread busy waiting on char back-ends (which causes
all sorts of performance problems).

Signed-off-by: Peter Crosthwaite <>...

1246b259 12/02/2013 07:03 pm Stefan Weil

misc: Replace 'struct QEMUTimer' by 'QEMUTimer'

Most code already used QEMUTimer without the redundant 'struct' keyword.

Signed-off-by: Stefan Weil <>
Reviewed-by: Andreas Färber <>
Signed-off-by: Michael Tokarev <>

bc72ad67 08/22/2013 08:14 pm Alex Bligh

aio / timers: Switch entire codebase to the new timer API

This is an autogenerated patch using scripts/switch-timer-api.

Switch the entire code base to using the new timer API.

Note this patch may introduce some line length issues.

Signed-off-by: Alex Bligh <>...

534f6ff9 07/29/2013 10:06 pm Andreas Färber

cadence_uart: QOM cast cleanup

Signed-off-by: Andreas Färber <>

9121d02c 07/15/2013 02:28 pm Peter Crosthwaite

char/cadence_uart: Fix reset for unattached instances

commit 1db8b5efe0c2b5000e50691eea61264a615f43de introduced an issue
where QEMU would segfault if you have an unattached Cadence UART.

Fix by guarding the flush-on-reset logic on there being a qemu_chr...

300b1fc6 07/04/2013 06:42 pm Paolo Bonzini

hw/c*: pass owner to memory_region_init* functions

Signed-off-by: Paolo Bonzini <>

2c9b15ca 07/04/2013 06:42 pm Paolo Bonzini

memory: add owner argument to initialization functions

Signed-off-by: Paolo Bonzini <>

b52df465 06/24/2013 05:26 pm Edgar E. Iglesias

cadence_uart: Handle backend tx errors

Signed-off-by: Edgar E. Iglesias <>

dccfcd0e 04/15/2013 07:19 pm Paolo Bonzini

sysemu: avoid proliferation of include/ subdirectories

Signed-off-by: Paolo Bonzini <>

49ab747f 04/08/2013 07:13 pm Paolo Bonzini

hw: move target-independent files to subdirectories

This patch tackles all files that are compiled once, moving
them to subdirectories of hw/.

Signed-off-by: Paolo Bonzini <>