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Merge commit '1dd3a74d2ee2d873cde0b390b536e45420b3fe05' into HEAD
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
pci: update all users to look in pci/
update all users so we can remove the makefile hack.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
openpic: fix minor coding style issues
This patch removes all remaining occurences of spaces before functionparameter indicating parenthesis.
Signed-off-by: Alexander Graf <agraf@suse.de>
openpic: Accelerate pending irq search
When we're done with one interrupt, we need to search for the next pendinginterrupt in the queue. This search has grown quite big now that we havemore than 256 possible irq lines.
So let's memorize how many interrupts we have pending in our bitmaps, so...
openpic: unify memory api subregions
The only difference between the "openpic" and "mpic" memory api subregiondescriptors is the endianness. Unify them as openpic accessors with explicitendianness markers in their names.
openpic: remove unused type variable
The openpic source irqs are carrying around a type indicator thatis never accessed by anything. Remove it.
openpic: convert simple reg operations to builtin bitops
The openpic code has its own bitmap code to access bits inside of abitmap. However, that is overkill when we simply want to check for abit inside of a uint32_t.
So instead, let's use normal bit masks and C builtin shifts and ands....
openpic: rename openpic_t to OpenPICState
Rename the openpic_t struct to OpenPICState, so it adheres better tothe current coding style rules.
openpic: remove irq_out
The current openpic emulation contains half-ready code for bypass mode.Remove it, so that when someone wants to finish it they can start from aclean state.
openpic: convert to qdev
This patch converts the OpenPIC device to qdev. Along the way itrenames the "openpic" target to "raven" and the "mpic" target to"fsl_mpic_20", to better reflect the actual models they implement.
This way we have a generic OpenPIC device now that can handle...
openpic: make brr1 model specific
Now that we can properly distinguish between openpic model differences,let's move brr1 out of the raven code path.
openpic: add Shared MSI support
The OpenPIC allows MSI access through shared MSI registers. Implementthem for the MPC8544 MPIC, so we can support MSIs.
openpic: Remove unused code
The openpic code had a few WIP bits left that nobody reanimated withinthe last few years. Remove that code.
Signed-off-by: Alexander Graf <agraf@suse.de>Acked-by: Hervé Poussineau <hpoussin@reactos.org>
mpic: Unify numbering scheme
MPIC interrupt numbers in Linux (device tree) and in QEMU are different,because QEMU takes the sparseness of the IRQ number space into account.
Remove that cleverness and instead assume a flat number space. This makesthe code easier to understand, because we are actually aligned with Linux...
openpic: update to proper memory api
The openpic code was still using the old mmio memory api. Convert it tobe a generic memory api user and clean up some code that becomes redundantthat way.
openpic: combine mpic and openpic src handlers
The MPIC source irq handler suddenly became identical to the standardOpenPIC source irq handler. Combine them into the same function.
openpic: Convert subregions to memory api
The "openpic" controller is currently using one big region and doessubregion dispatching manually. Move this to the memory api.
openpic: combine mpic and openpic irq raise functions
The IRQ raise mechanisms of the OpenPIC and MPIC controllers is identical,just that the MPIC one can also raise critical interrupts.
Combine those two and check for critical raise capability during runtime....
openpic: merge mpic and openpic timer handling
The openpic and mpic timer handling code is basically the same.Merge them.
openpic: combine openpic and mpic reset functions
The openpic and mpic reset handlers are almost identical. Combinethem and extract the differences into state variables.
Rename target_phys_addr_t to hwaddr
target_phys_addr_t is unwieldly, violates the C standard (_t suffixes arereserved) and its purpose doesn't match the name (most target_phys_addr_taddresses are not target specific). Replace it with a finger-friendly,...
openpic: Added BRR1 register
Linux mpic driver uses (changes may be in pipeline to get upstreamed soon)BRR1. This patch adds the support to emulate readonly FSL BRR1 register.
Currently QEMU does not fully emulate any version on MPIC, so the MPICMajor number and Minor number are set to 0....
PPC: Fix openpic with relative memregions
After commit 5312bd8b3152 we got memory region relative offsets into our mmiocallbacks instead of page boundary based offsets.
This broke the OpenPIC emulation which expected offsets to be on page boundaryand substracted its region offset manually....
openpic: remove dead code to make a PCI device version
bus is always NULL so the code in this if clause is dead (and thereforeuntested).
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Merge remote-tracking branch 'upstream' into memory/batch
openpic: Unfold write_IRQreg
The helper function write_IRQreg was always called with a specific argument onthe type of register to access. Inside the function we were simply doing aswitch on that constant argument again. It's a lot easier to just unfold this...
openpic: Unfold read_IRQreg
The helper function read_IRQreg was always called with a specific argument onthe type of register to access. Inside the function we were simply doing aswitch on that constant argument again. It's a lot easier to just unfold this...
PPC: Add CPU local MMIO regions to MPIC
The MPIC exports a register set for each CPU connected to it. They can allbe accessed through specific registers or using a shadow page that is mappeddifferently depending on which CPU accesses it.
This patch implements the shadow map, making it possible for guests to access...
PPC: Extend MPIC MMIO range
The MPIC exports a page for each CPU that it controls. To support more thanone CPU, we need to also reserve the MMIO space according to the amount ofCPUs we want to support.
PPC: Fix IPI support in MPIC
The current IPI support in the MPIC code is incomplete and doesn't work. Thiscode adds proper support for IPIs in MPIC by using the IDE register to rememberwhich CPUs IPIs are still outstanding to. New triggers through the IPI trigger...
PPC: Set MPIC IDE for IPI to 0
We use the IDE register with IPIs as a mask to keep track which processorshave already acknowledged the respective interrupt. So we need to initializeit to 0 to make sure that it doesn't accidently fire an IPI on CPU0 when the...
PPC: MPIC: Remove read functionality for WO registers
The IPI dispatch registers are write only according to every MPICspec I have found. So instead of pretending you could read back somethingfrom them, better not handle them at all.
Reported-by: Elie Richa <richa@adacore.com>...
PPC: MPIC: Fix CI bit definitions
The bit definitions for critical interrupt routing are in PowerPC order(most significant bit is 0), while we end up shifting it with normal bitorder. Turn the numbers around so we actually end up fetching theright ones....
PPC: Bump MPIC up to 32 supported CPUs
The MPIC emulation is now capable of handling up to 32 CPUs. Reflect that inthe code exporting the numbers out and fix an integer overflow while at it.
v1 -> v2:...
openpic: Memory API conversion for mpic
This patch converts mpic to the new memory API (through old mmio).
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Avi Kivity <avi@redhat.com>
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
pci: rename pci_register_bar_region() to pci_register_bar()
Reviewed-by: Richard Henderson <rth@twiddle.net>Reviewed-by: Anthony Liguori <aliguori@us.ibm.com>Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
ppc: convert to memory API
openpic: Replace explicit byte swap with endian hints
This patch replaces explicit bswaps with endianness hints to themmio layer.
Signed-off-by: Alexander Graf <agraf@suse.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Add endianness as io mem parameter
As stated before, devices can be little, big or native endian. Thetarget endianness is not of their concern, so we need to push thingsdown a level.
This patch adds a parameter to cpu_register_io_memory that allows adevice to choose its endianness. For now, all devices simply choose...
pci: Replace unneeded type casts in calls of pci_register_bar
There is no need for these type casts (as other existingcode shows). So re-write the first argument withouttype cast (and remove a related TODO comment).
Cc: Michael S. Tsirkin <mst@redhat.com>...
pci: don't overwrite multi functio bit in pci header type.
Don't overwrite pci header type.Otherwise, multi function bit which pci_init_header_type() setsappropriately is lost.Anyway PCI_HEADER_TYPE_NORMAL is zero, so it is unnecessary to zerowhich is already zero cleared....
savevm: Add DeviceState param
When available, we'd like to be able to access the DeviceStatewhen registering a savevm. For buses with a get_dev_path()function, this will allow us to create more unique savevmid strings.
Signed-off-by: Alex Williamson <alex.williamson@redhat.com>...
Compile openpic only once
Replace TARGET_PAGE_SIZE with 4096. Make byte swapping unconditionalsince PPC is big endian.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-ppc: Initialize OpenPIC properly
When lowering an IRQ line, we search for the line we're supposed to lower.
Usually we run into an optimization there that queues up interrupts. Thisqueue ends with -1. Unfortunately we didn't set the first item to -1....
hw/openpic.c: replace tabs by spaces
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
PCI: make duplicate devfn allocation fatal
Only two callers of pci_create_simple/pci_register_device botheredto check the return value. Other cases were prone to crashing withspurious NULL pointer dereferences.
Make QEMU exit with an error message when devfn is attempted to...
pci: introduce pcibus_t to represent pci bus address/size instead of uint32_t
This patch is preliminary for 64 bit BAR support.Introduce dedicated type, pcibus_t, to represent pci bus address/sizeinstead of uint32_t.Later this type will be changed to uint64_t....
pci: s/PCI_ADDRESS_SPACE_/PCI_BASE_ADDRESS_SPACE_/ to match pci_regs.h
make constants for pci base address match pci_regs.h byrenaming PCI_ADDRESS_SPACE_xxx to PCI_BASE_ADDRESS_SPACE_xxx.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>Acked-by: Michael S. Tsirkin <mst@redhat.com>...
PPC: remove unneeded calls to device reset
Revert "Get rid of _t suffix"
In the very least, a change like this requires discussion on the list.
The naming convention is goofy and it causes a massive merge problem. Somethinglike this must be presented on the list first so people can provide input...
Get rid of _t suffix
Some not so obvious bits, slirp and Xen were left alone for the timebeing.
Signed-off-by: malc <av1474@comtv.ru>
Make CPURead/WriteFunc structure 'const'
Fix most warnings (errors with -Werror) when debugging is enabled
I used the following command to enable debugging:perl -p -i -e 's/^\/\/#define DEBUG/#define DEBUG/g' * /* *//*
Revert "Introduce reset notifier order"
This reverts commit 8217606e6edb49591b4a6fd5a0d1229cebe470a9 (andupdates later added users of qemu_register_reset), we solved theproblem it originally addressed less invasively.
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
Rename pci_register_io_region() to pci_register_bar()
This function is used to manage a PCI BAR, so make the more genericpci_register_io_region() available to other uses.
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Remove io_index argument from cpu_register_io_memory()
The parameter is always zero except when registering the three internalio regions (ROM, unassigned, notdirty). Remove the parameter to reducethe API's power, thus facilitating future change.
Signed-off-by: Avi Kivity <avi@redhat.com>...
Introduce reset notifier order
Add the parameter 'order' to qemu_register_reset and sort callbacks onregistration. On system reset, callbacks with lower order will beinvoked before those with higher order. Update all existing users to thestandard order 0....
Replace gcc variadic macro extension with C99 version
use PCI_HEADER_TYPE.
use symbolic value instead of 0x0e and related value.
Signed-off-by: Isaku Yamahata <yamahata@valinux.co.jp>
Delete some unused macros detected with -Wp,-Wunused-macros use
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6856 c046a42c-6fe2-441c-8c8c-71466251a162
hw/openpic: define list in mpic_init() const
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6660 c046a42c-6fe2-441c-8c8c-71466251a162
kvm/powerpc: Enable MPIC for E500 platform.
MPIC and OpenPIC have very similar design.So a lot of code can be reused.
Signed-off-by: Liu Yu <yu.liu@freescale.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6659 c046a42c-6fe2-441c-8c8c-71466251a162
Add savevm and reset support for OpenPic
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6544 c046a42c-6fe2-441c-8c8c-71466251a162
Add and use #defines for PCI device classes
This patch adds and uses #defines for PCI device classes and subclases,using a new pci_config_set_class() function, similar to the recentlyadded pci_config_set_vendor_id() and pci_config_set_device_id().
Change since v1: fixed compilation of hw/sun4u.c...
Update #defines for PCI vendor and device IDs from OpenBIOS and Linux
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6490 c046a42c-6fe2-441c-8c8c-71466251a162
Define PCI vendor and device IDs in pci.h (Stuart Brady)
This patch defines PCI vendor and device IDs in pci.h (matching thosefrom Linux's pci_ids.h), and uses those definitions where appropriate.
Change from v1: Introduces pci_config_set_vendor_id() / pci_config_set_device_id()...
powerpc/kvm: fix a openpic bug (Liu Yu)
An external interrupt should not interrupted in-servicing interrupt with equal priority.
Signed-off-by: Liu Yu <yu.liu@freescale.com>Acked-by: Hollis Blanchard <hollisb@us.ibm.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Fix undeclared symbol warnings from sparse
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5539 c046a42c-6fe2-441c-8c8c-71466251a162
Break up vl.h.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3674 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]*$//g' # Yes, again. Note the star in the regex.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3177 c046a42c-6fe2-441c-8c8c-71466251a162
find -type f | xargs sed -i 's/[\t ]$//g' # on most files
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@3173 c046a42c-6fe2-441c-8c8c-71466251a162
Implement embedded IRQ controller for PowerPC 6xx/740 & 750.Fix PowerPC external interrupt input handling and lowering.Fix OpenPIC output pins management.Fix multiples bugs in OpenPIC IRQ management.Fix OpenPIC CPU reset function.Fix Mac99 machine to properly route OpenPIC outputs to the PowerPC input pins....
Unify IRQ handling.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2635 c046a42c-6fe2-441c-8c8c-71466251a162
Better fix for OpenPIC: should not depend on PowerPC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@2552 c046a42c-6fe2-441c-8c8c-71466251a162
New model for PowerPC CPU hardware interrupt events:move all PowerPC specific code into target-ppc/helper.c to avoid pollutingthe common code in cpu-exec.c. This makes implementation of new features(ie embedded PowerPC timers, critical interrupts, ...) easier....
openpic SMP support (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1655 c046a42c-6fe2-441c-8c8c-71466251a162
cpu_single_env usage fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1644 c046a42c-6fe2-441c-8c8c-71466251a162
more generic IRQ support
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1445 c046a42c-6fe2-441c-8c8c-71466251a162
spelling fix
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1274 c046a42c-6fe2-441c-8c8c-71466251a162
typo
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@1211 c046a42c-6fe2-441c-8c8c-71466251a162
disable PCI device for PMAC
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@966 c046a42c-6fe2-441c-8c8c-71466251a162
added PCI bus
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@961 c046a42c-6fe2-441c-8c8c-71466251a162
openpic fixes
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@954 c046a42c-6fe2-441c-8c8c-71466251a162
OpenPIC support (Jocelyn Mayer)
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@926 c046a42c-6fe2-441c-8c8c-71466251a162