target-sparc: Fix mixup of uint64 and uint64_t
Commit 793a137a41ad4125011c7022cf16a1baa40a5ab6 (target-sparc:Implement BMASK/BSHUFFLE.) introduced a stray usage of softfloat uint64type.
Use uint64_t instead.
Signed-off-by: Andreas Färber <afaerber@suse.de>...
sparc: avoid cpu_get_physical_page_desc()
This reaches into the innards of the memory core, which are beingchanged. Switch to a memory API version.
Signed-off-by: Avi Kivity <avi@redhat.com>
fix spelling in target sub directory
Cc: Richard Henderson <rth@twiddle.net>Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Alexander Graf <agraf@suse.de>Cc: Aurelien Jarno <aurelien@aurel32.net>Cc: Blue Swirl <blauwirbel@gmail.com>...
Improve "ta 0" shutdown
This patch replace the previous implementation with this simplified andmore complete version (no shutdown when psret == 1).
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Implement EDGE* instructions.
Signed-off-by: Richard Henderson <rth@twiddle.net>
target-sparc: Implement ALIGNADDR* inline.
While ALIGNADDR was implemented out-of-line, ALIGNADDRL was notimplemeneted at all. However, this is a very simple operationso we're better off doing this inline.
target-sparc: Implement BMASK/BSHUFFLE.
target-sparc: Implement FALIGNDATA inline.
This is a relatively simple sequence of shifts.
target-sparc: Implement fpack{16,32,fix}.
target-sparc: Implement PDIST.
target-sparc: Do exceptions management fully inside the helpers.
This reduces the size of the individual translation blocks, sincewe only emit a single call for each FOP rather than three. Inaddition, clear_float_exceptions expands inline to a single byte store....
target-sparc: Extract float128 move to a function.
target-sparc: Undo cpu_fpr rename.
target-sparc: Change fpr representation to doubles.
This allows a more efficient representation for 64-bit hosts.It should be about the same for 32-bit hosts, as we can stillaccess the individual pieces of the double.
target-sparc: Extract common code for floating-point operations.
target-sparc: Mark fprs dirty in store accessor.
target-sparc: Add accessors for double-precision fpr access.
Begin using i64 quantities to manipulate double-precision values.On a 64-bit host this will, for the moment, generate less efficientcode; on a 32-bit host code quality should be largely unchanged....
target-sparc: Pass float64 parameters instead of dt0/1 temporaries.
target-sparc: Make FPU/VIS helpers const when possible.
This also removes the unused ENV parameter from these helpers.
target-sparc: Add accessors for single-precision fpr access.
Load, store, and "create destination". This version attempts tochange the behaviour of the translator as little as possible. Wepreviously used cpu_tmp32 as the temporary destination, and we...
Sparc: split load and store op helpers
Move load and store op helpers top ldst_helper.c.
Reviewed-by: Richard Henderson <rth@twiddle.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: convert win_helper to trace framework
Sparc: convert interrupt helpers to trace framework
Sparc: convert mmu_helper to trace framework
Sparc: split MMU helpers
Move MMU helpers to mmu_helper.c.
Sparc: fix coding style in helper.c
Before the next patch, fix coding style of the areas affected.
Sparc: avoid AREG0 for division op helpers
Make [su]div{,cc} helpers take a parameter for CPUState insteadof relying on global env. Move the functions to helper.c.
Sparc: avoid AREG0 for softint op helpers and Leon cache control
Make softint op helpers and Leon cache irq manager take a parameterfor CPUState instead of relying on global env. Move the functionsto int{32,64}_helper.c.
Reviewed-by: Richard Henderson <rth@twiddle.net>...
Sparc: avoid AREG0 for CWP and PSTATE helpers
Make CWP and PSTATE helpers take a parameter for CPUState insteadof relying on global env. Remove wrapper functions.
target-sparc: Fix use of g_new0 / g_free
g_malloc0 needs g_free instead of free.While fixing this, I also replaced g_malloc0 by g_new0as was suggested by Stuart Brady.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <sw@weilnetz.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: Fix order of function parameters
The MinGW-w64 gcc complains about wrong parameters forgen_helper_fpadd16_s and three other functions.
gen_helper_fpadd16_s is declared like this (hidden in lots of macros):
static inline void gen_helper_fpadd16s(TCGv_i32 retval, TCGv_ptr arg1,...
Sparc: split CWP and PSTATE op helpers
Move CWP and PSTATE op helpers to win_helper.c.
Sparc: avoid AREG0 for lazy condition code helpers
Make lazy condition code helpers take a parameter for CPUState insteadof relying on global env.
Sparc: split lazy condition code handling op helpers
Move lazy condition code handling op helpers to cc_helper.c.
Sparc: avoid AREG0 for float and VIS ops
Make floating point and VIS ops take a parameter for CPUState insteadof relying on global env.
Sparc: split FPU and VIS op helpers
Move FPU op helpers to fop_helper.c. Move VIS op helpers to vis_helper.c,compile it only for Sparc64.
Sparc: fix coding style
Before the next patches, fix coding style of the areas affected.
Sparc: avoid AREG0 for raise_exception and helper_debug
Make raise_exception() and helper_debug() take a parameter forCPUState instead of relying on global env. Move the functionsto helper.c.
Sparc: move trivial functions from op_helper.c
These functions don't need access to CPUState or already pass it,so relocating them from op_helper.c to helper.c and int64_helper.cis trivial.
Sparc: split helper.c
Move CPU init to cpu_init.c and interrupt handling to int32_helper.cfor Sparc32 and int64_helper.c for Sparc64.
softmmu_header: pass CPUState to tlb_fill
Pass CPUState pointer to tlb_fill() instead of architecture localcpu_single_env hacks.
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Gdbstub: Fix back-trace on SPARC32
Gdb expects all registers windows to be flushed in ram, which is not the casein Qemu. Therefore the back-trace generation doesn't work. This patch adds afunction to handle reads (and only read) in stack frames as if windows were...
Sparc64: remove useless variable
Remove a useless variable, spotted by clang analyzer:/src/qemu/target-sparc/op_helper.c:3904:18: warning: unused variable 'tmp' [-Wunused-variable] target_ulong tmp = val;The error message is actually incorrect since the variable is used....
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
Remove unused is_softmmu parameter from cpu_handle_mmu_fault
Parameter is_softmmu (and its evil mutant twin brother is_softmuu)is not used in cpu_*_handle_mmu_fault() functions, remove themand adjust callers.
Acked-by: Richard Henderson <rth@twiddle.net>...
Fix handling of conditional branches in delay slot of a conditional branch
Check whether dc->npc is dynamic before using its value for branch.
Signed-off-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
Sparc: fix non-faulting unassigned memory accesses
Commit b14ef7c9ab41ea824c3ccadb070ad95567cca84eintroduced cpu_unassigned_access() function. On Sparc,the function does not restore AREG0 used for global CPUStateon function exit, causing bugs with non-faulting unassigned...
exec.h cleanup
Move softmmu_exec.h include directives from target-*/exec.h totarget-*/op_helper.c. Move also various other stuff only used inop_helper.c there.
Define global env in dyngen-exec.h.
For i386, move wrappers for segment and FPU helpers from user-exec.c...
SPARC64: fix fnor* and fnand*
Fix the problem that result values are not assigned to the destinationregisters.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
SPARC64: implement %fprs dirty bits
Implement %fprs.DU/DL bits.The FPU sets %fprs.DL and %fprs.DU when values are assigned to %f0-31and %f32-63 respectively.
target-sparc: Fix compiler errors (format strings)
This change is needed because commit 06e12b65now uses an unsigned long long value(uint64_t && unsigned long long => unsigned long long).
Cc: Tsuneo Saito <tsnsaito@gmail.com>Cc: Blue Swirl <blauwirbel@gmail.com>...
SPARC64: implement addtional MMU faults related to nonfaulting load
This patch implements MMU faults caused by TTE.NFO and TTE.E:- access other than nonfaulting load to a page marked NFO should raise data_access_exception- nonfaulting load to a page marked with E bit should raise...
SPARC64: implement MMU miss traps on nonfaulting loads
Nonfaulting loads should raise fast_data_access_MMU_miss traps asnormal loads do. It is up to the guest OS kernel that detect MMU misseson nonfaulting load instructions and make them complete without signaling....
SPARC64: fix fault status overwritten on nonfaulting load
cpu_get_phys_page_nofault() calls get_physical_address() twice,that results in overwriting the fault status in the SFSR.We need this change in order for nonfaulting loads to raising MMU faultsas normal loads do....
SPARC64: split cpu_get_phys_page_debug() from cpu_get_phys_page_nofault()
This patch makes cpu_get_phys_page_debug() independent fromcpu_get_phys_page_nofault() in advance of implementing nonfaulting load.This also modifies cpu_get_phys_page_nofault() to be compiled only on...
SPARC64: introduce a convenience function for getting physical addresses
Introduce cpu_sparc_get_phys_page() to be used as a help for splittingcpu_get_phys_page_debug() from cpu_get_phys_page_nofault().
SPARC64: SFSR cleanup and fix
Add macros for SFSR fields and use macros instead of magic numbers.Also fix the update of the register fields on MMU faults.
SPARC64: TTE bits cleanup
Add macros for TTE bits and modify to use macros instead ofmagic numbers.
Fix unassigned memory access handling
cea5f9a28faa528b6b1b117c9ab2d8828f473fef exposed bugs in unassigned memoryaccess handling. Fix them by always passing CPUState to the handlers.
Reported-by: Hervé Poussineau <hpoussin@reactos.org>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
SPARC64: treat UA2007 ASI_BLK_* as translating ASIs.
UA2007 ASI_BLK_* should be added in is_translating_asi().
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>Acked-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
SPARC64: add missing break on fmovdcc
"break" is missing on V9 fmovdcc (%icc).
SPARC64: fix VIS1 SIMD signed compare instructions
The destination registers of SIMD signed compare instructions(fcmp*<16|32>) are not FP registers but general purpose r registers.Comparisons should be freg_rs1 CMP freg_rs2, that were reversed.
Signed-off-by: Tsuneo Saito <tsnsaito@gmail.com>...
Sparc: fix FPU and AM enable checks for translation
Translation used incorrectly CPUState fields directly to checkfor FPU enable state and 32 bit address masking on Sparc64.
Fix by using TB flags instead.
SPARC64: C99 comment fix for block-transfer ASIs
Fixed C99 comments on block-tranfer ASIs.
SPARC64: Add JPS1 ASI_BLK_AIU[PS]L ASIs for ldfa and stfa
Support JPS1 little endian block transfer ASIs.
SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for stfa
Support UA2007 block store ASIs for stfa instructions.
SPARC64: Add UA2007 ASI_BLK_AIU[PS]L? ASIs for ldfa
Support UA2007 block load ASIs for ldfa instructions.
SPARC64: fp_disabled checks on stfa/stdfa/stqfa
stfa/stdfa/stqfa instructions should raise fp_disabled exceptionsif %pstate.PEF==0 or %fprs.FEF==0.
SPARC64: Implement stfa/stdfa/stqfa instrcutions properly
This patch implements sparcv9 stfa/stdfa/stqfa instructionswith non block-store ASIs.
SPARC64: fp_disabled checks on ldfa/lddfa/ldqfa
ldfa/lddfa/ldqfa instructions should raise fp_disabled exceptionsif %pstate.PEF==0 or %fprs.FEF==0.
SPARC64: Implement ldfa/lddfa/ldqfa instructions properly
This patch implements sparcv9 ldfa/lddfa/ldqfa instructionswith non block-load ASIs.
fix cpu_cc_src and cpu_cc_src2 corruption in udivx and sdivx
udivx and sdvix don't modify condition flags, so they shall notoverwrite cpu_cc_*
Remove exec-all.h include directives
Most exec-all.h include directives are now useless, remove them.
Move cpu_has_work and cpu_pc_from_tb to cpu.h
Move functions cpu_has_work() and cpu_pc_from_tb() from exec.h to cpu.h. This isneeded by later patches.
exec.h: fix coding style and change cpu_has_work to return bool
Change the type of the return value from cpu_has_work() andqemu_cpu_has_work() to bool.
sparc: move do_interrupt to helper.c
do_interrupt() was mixing CPUState pointer passed from callerand global env (AREG0).
Fix by moving the function to helper.c. Introduce a helper for callingchange_pstate() safely from outside of execution context.
sparc: fix coding style of the area to be moved
cpu_loop_exit: avoid using AREG0
Make cpu_loop_exit() take a parameter for CPUState instead of relyingon global env.
Sparc32: dummy implementation of MXCC MMU breakpoint registers
Add dummy registers for SuperSPARC MXCC MMU counter breakpoints, saveand load all MXCC registers.
Fix compilation warning due to missing header for sigaction (followup)
This patch removes all references to signal.h when qemu-common.h is includedas they become redundant.
Signed-off-by: Alexandre Raymond <cerbere@gmail.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Delete unused tb_invalidate_page_range
tb_invalidate_page_range() was intended to be used to invalidate anarea of a TB which the guest explicitly flushes from i-cache. However,QEMU detects writes to code areas where TBs have been generated, sohis has never been useful....
sparc64: fix incorrect BPcc target sign extension
Fix wrong number of bits used when sign extending the branch offset of BPccinstructions.
Reported-by: Artyom Tarasenko <atar4qemu@gmail.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
sparc64: fix wrpstate and wrtl on delay slot
Use TCG local to work around TCG register flush due to a branch.
Thanks to Artyom Tarasenko, Igor Kovalenko and Aurelien Jarno.
Remove unused function parameter from cpu_restore_state
The previous patch removed the need for parameter puc.Is is now unused, so remove it.
Cc: Aurelien Jarno <aurelien@aurel32.net>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Stefan Weil <weil@mail.berlios.de>
Remove unused function parameters from gen_pc_load and rename the function
Function gen_pc_load was introduced in commitd2856f1ad4c259e5766847c49acbb4e390731bd4.The only reason for parameter searched_pc wasa debug statement in target-i386/translate.c....
Fix conversions from pointer to tcg_target_long
tcg_gen_exit_tb takes a parameter of type tcg_target_long,so the type casts of pointer to long should be replaced bytype casts of pointer to tcg_target_long (suggested by Blue Swirl).
These changes are needed for build environments where...
inline cpu_halted into sole caller
All implementations are now the same, and there is only one caller,so inline the function there.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
SPARC: Fix Leon3 cache control
The "leon3_cache_control_int" (op_helper.c) function is called within leon3.cwhich leads to segfault error with the global "env".
Now cache control is a CPU feature and everything is handled in op_helper.c.
Signed-off-by: Fabien Chouteau <chouteau@adacore.com>...
SPARC: Emulation of Leon3
Leon3 is an open-source VHDL System-On-Chip, well known in space industry (moreinformation on http://www.gaisler.com).
Leon3 is made of multiple components available in the GrLib VHDL library.Three devices are implemented: uart, timers and IRQ manager....
SPARC: Add asr17 register support
This register is activated by CPU_FEATURE_ASR17 in the feature field.
sparc: fix NaN handling
Fix several bugs in NaN handling: * e in fcmpe* only changes qNaN handling * FCC is unchanged if an exception is raised * clear previous FTT before setting it
Reported-by: Mateusz Loskot <mateusz@loskot.net>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: fix udiv(cc) and sdiv(cc)
Since commit 5a4bb580cdb10b066f9fd67658b31cac4a4ea5e5, Xorg crashes ona Debian Etch image. The commit itself is fine, but it triggers a bugdue to wrong computation of flags for udiv(cc) and sdiv(cc).
This patch only compute cc_src2 for the cc version of udiv/sdiv. It...
Sparc: implement monitor command 'info tlb'
Use existing dump_mmu() to implement monitor command 'info tlb'.
target-sparc: Use fprintf_function (format checking)
This change was missing in commit9a78eead0c74333a394c0f7bbfc4423ac746fcd5.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-sparc: remove unused functions cpu_lock(), cpu_unlock()
target-xxx: Use fprintf_function (format checking)
fprintf_function uses format checking with GCC_FMT_ATTR.
Cc: Blue Swirl <blauwirbel@gmail.com>Signed-off-by: Stefan Weil <weil@mail.berlios.de>...
remove exec-all.h inclusion from cpu.h
move cpu_pc_from_tb to target-*/exec.h
sparc64: fix umul and smul insns
- truncate and sign or zero extend operands before multiplication- factor out common code to gen_op_multiply() with parameter to sign/zero extend- call gen_op_multiply from gen_op_umul and gen_op_smul
Signed-off-by: Igor V. Kovalenko <igor.v.kovalenko@gmail.com>...