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LICENSE 146 Bytes
README 15.9 kB
TODO 394 Bytes
optimize.c 34.3 kB
tcg-op.h 94.3 kB
tcg-opc.h 9.6 kB
tcg-runtime.h 825 Bytes
tcg.c 82.4 kB
tcg.h 23.6 kB

Latest revisions

# Date Author Comment
fc4d60ee 04/27/2013 02:19 am Richard Henderson

tcg-arm: Fix local stack frame

We were not allocating TCG_STATIC_CALL_ARGS_SIZE, so this meant that
any helper with more than 4 arguments would clobber the saved regs.
Realizing that we're supposed to have this memory pre-allocated means
we can clean up the tcg_out_arg functions, which were trying to do...
ed605126 04/27/2013 02:10 am Aurelien Jarno

tcg: fix deposit_i64 op on 32-bit targets

On 32-bit TCG targets, when emulating deposit_i64 with a mov_i32 +
deposit_i32, care should be taken to not overwrite the low part of
the second argument before the deposit when it is the same the
destination.

This fixes the shld instruction in qemu-system-x86_64, which in turns...
39dc85b9 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Handle deposit of zero

The TCG optimizer does great work when inserting constants, being able
to fold the open-coded deposit expansion to just an AND or an OR. Avoid
a bit the regression caused by having the deposit opcode by expanding
deposit of zero as an AND....
027ffea9 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement movcond

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
1e6e9aca 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Use getauxval for ISA detection

Glibc 2.16 includes an easy way to get feature bits previously
buried in /proc or the program startup auxiliary vector. Use it.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
6c858762 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement add2/sub2_i64

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
6645c147 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Implement mulu2/muls2_i64

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
991041a4 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Cleanup i32 constants to tcg_out_cmp

Nothing else in the call chain ensures that these
constants don't have garbage in the high bits.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>
6995a4a0 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Use MFOCRF instead of MFCR

It takes half the cycles to read one CR register instead of all 8.
This is a backward compatible addition to the ISA, so chips prior
to Power 2.00 spec will simply continue to read the entire CR register.

Reviewed-by: Aurelien Jarno <>...
70fac59a 04/15/2013 09:09 pm Richard Henderson

tcg-ppc64: Use ISEL for setcond

There are a few simple special cases that should be handled first.
Break these out to subroutines to avoid code duplication.

Reviewed-by: Aurelien Jarno <>
Signed-off-by: Richard Henderson <>

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