PPC: booke: add tlbnps handling
When using MAV 2.0 TLB registers, we have another range of TLB registersavailable to read the supported page sizes from.
Add SPR definitions for those and add a helper function that we can useto receive such a bitmap even when using MAV 1.0....
PPC: booke206: Check for min/max TLB entry size
When setting a TLB entry, we need to check if the TLB we're putting it inactually supports the given size. According to the 2.06 PowerPC ISA, avalue that's out of range can either be redefined to something implementation...
PPC: booke206: Implement tlbilx
The PowerPC 2.06 BookE ISA defines an opcode called "tlbilx" which is usedto flush TLB entries. It's the recommended way of flushing in virtualizedenvironments.
So far we got away without implementing it, but Linux for e500mc uses this...
PPC: booke206: Check for TLB overrun
Our internal helpers to fetch TLB entries were not able to tell usthat an entry doesn't even exist. Pass an error out if we hit sucha case to not accidently pass beyond the TLB array.
Signed-off-by: Alexander Graf <agraf@suse.de>
PPC: booke206: move avail check to tlbwe
We can have TLBs that only support a single page size. This is definedby the absence of the AVAIL flag in TLBnCFG. If this is the case, wecurrently write invalid size info into the TLB, but override it oninternal fault....
KVM: Fix compilation on non-x86
Commit 84b058d broke compilation for KVM on non-x86 targets, whichdon't have KVM_CAP_IRQ_ROUTING defined.
Fix by not using the unavailable constant when it's not around.
PPC: E500: Add some more excp vectors
Our EXCP list is getting outdated. By now, 3 new exception vectors havebeen introduced. Update the list so we have everything at one place.
PPC: e500: msync is 440 only, e500 has real sync
The e500 CPUs don't use 440's msync which falls on the same opcode IDs,but instead use the real powerpc sync instruction. This is important,since the invalid mask differs between the two.
PPC: rename msync to msync_4xx
The msync instruction as defined today is only valid on 4xx cores, noton e500 which also supports msync, but treats it the same way as sync.
Rename it to reflect that it's 4xx only.
PPC: booke206: allow NULL raddr in ppcmas_tlb_check
We might want to call the tlb check function without actually caring aboutthe real address resolution. Check if we really should write the valueback.
View all revisions | View revisions
Also available in: Atom