root / target-openrisc / translate.c @ 216db403
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1 | e67db06e | Jia Liu | /*
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2 | e67db06e | Jia Liu | * OpenRISC translation
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3 | e67db06e | Jia Liu | *
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4 | e67db06e | Jia Liu | * Copyright (c) 2011-2012 Jia Liu <proljc@gmail.com>
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5 | e67db06e | Jia Liu | * Feng Gao <gf91597@gmail.com>
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6 | e67db06e | Jia Liu | *
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7 | e67db06e | Jia Liu | * This library is free software; you can redistribute it and/or
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8 | e67db06e | Jia Liu | * modify it under the terms of the GNU Lesser General Public
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9 | e67db06e | Jia Liu | * License as published by the Free Software Foundation; either
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10 | e67db06e | Jia Liu | * version 2 of the License, or (at your option) any later version.
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11 | e67db06e | Jia Liu | *
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12 | e67db06e | Jia Liu | * This library is distributed in the hope that it will be useful,
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13 | e67db06e | Jia Liu | * but WITHOUT ANY WARRANTY; without even the implied warranty of
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14 | e67db06e | Jia Liu | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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15 | e67db06e | Jia Liu | * Lesser General Public License for more details.
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16 | e67db06e | Jia Liu | *
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17 | e67db06e | Jia Liu | * You should have received a copy of the GNU Lesser General Public
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18 | e67db06e | Jia Liu | * License along with this library; if not, see <http://www.gnu.org/licenses/>.
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19 | e67db06e | Jia Liu | */
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20 | e67db06e | Jia Liu | |
21 | e67db06e | Jia Liu | #include "cpu.h" |
22 | 022c62cb | Paolo Bonzini | #include "exec/exec-all.h" |
23 | 76cad711 | Paolo Bonzini | #include "disas/disas.h" |
24 | e67db06e | Jia Liu | #include "tcg-op.h" |
25 | e67db06e | Jia Liu | #include "qemu-common.h" |
26 | 1de7afc9 | Paolo Bonzini | #include "qemu/log.h" |
27 | e67db06e | Jia Liu | #include "config.h" |
28 | 1de7afc9 | Paolo Bonzini | #include "qemu/bitops.h" |
29 | bbe418f2 | Jia Liu | |
30 | bbe418f2 | Jia Liu | #include "helper.h" |
31 | bbe418f2 | Jia Liu | #define GEN_HELPER 1 |
32 | bbe418f2 | Jia Liu | #include "helper.h" |
33 | e67db06e | Jia Liu | |
34 | e67db06e | Jia Liu | #define OPENRISC_DISAS
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35 | e67db06e | Jia Liu | |
36 | e67db06e | Jia Liu | #ifdef OPENRISC_DISAS
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37 | e67db06e | Jia Liu | # define LOG_DIS(...) qemu_log_mask(CPU_LOG_TB_IN_ASM, ## __VA_ARGS__) |
38 | e67db06e | Jia Liu | #else
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39 | e67db06e | Jia Liu | # define LOG_DIS(...) do { } while (0) |
40 | e67db06e | Jia Liu | #endif
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41 | e67db06e | Jia Liu | |
42 | bbe418f2 | Jia Liu | typedef struct DisasContext { |
43 | bbe418f2 | Jia Liu | TranslationBlock *tb; |
44 | bbe418f2 | Jia Liu | target_ulong pc, ppc, npc; |
45 | bbe418f2 | Jia Liu | uint32_t tb_flags, synced_flags, flags; |
46 | bbe418f2 | Jia Liu | uint32_t is_jmp; |
47 | bbe418f2 | Jia Liu | uint32_t mem_idx; |
48 | bbe418f2 | Jia Liu | int singlestep_enabled;
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49 | bbe418f2 | Jia Liu | uint32_t delayed_branch; |
50 | bbe418f2 | Jia Liu | } DisasContext; |
51 | bbe418f2 | Jia Liu | |
52 | bbe418f2 | Jia Liu | static TCGv_ptr cpu_env;
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53 | bbe418f2 | Jia Liu | static TCGv cpu_sr;
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54 | bbe418f2 | Jia Liu | static TCGv cpu_R[32]; |
55 | bbe418f2 | Jia Liu | static TCGv cpu_pc;
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56 | bbe418f2 | Jia Liu | static TCGv jmp_pc; /* l.jr/l.jalr temp pc */ |
57 | bbe418f2 | Jia Liu | static TCGv cpu_npc;
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58 | bbe418f2 | Jia Liu | static TCGv cpu_ppc;
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59 | bbe418f2 | Jia Liu | static TCGv_i32 env_btaken; /* bf/bnf , F flag taken */ |
60 | bbe418f2 | Jia Liu | static TCGv_i32 fpcsr;
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61 | bbe418f2 | Jia Liu | static TCGv machi, maclo;
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62 | bbe418f2 | Jia Liu | static TCGv fpmaddhi, fpmaddlo;
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63 | bbe418f2 | Jia Liu | static TCGv_i32 env_flags;
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64 | 022c62cb | Paolo Bonzini | #include "exec/gen-icount.h" |
65 | bbe418f2 | Jia Liu | |
66 | e67db06e | Jia Liu | void openrisc_translate_init(void) |
67 | e67db06e | Jia Liu | { |
68 | bbe418f2 | Jia Liu | static const char * const regnames[] = { |
69 | bbe418f2 | Jia Liu | "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", |
70 | bbe418f2 | Jia Liu | "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", |
71 | bbe418f2 | Jia Liu | "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", |
72 | bbe418f2 | Jia Liu | "r24", "r25", "r26", "r27", "r28", "r29", "r30", "r31", |
73 | bbe418f2 | Jia Liu | }; |
74 | bbe418f2 | Jia Liu | int i;
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75 | bbe418f2 | Jia Liu | |
76 | bbe418f2 | Jia Liu | cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env");
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77 | bbe418f2 | Jia Liu | cpu_sr = tcg_global_mem_new(TCG_AREG0, |
78 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, sr), "sr");
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79 | bbe418f2 | Jia Liu | env_flags = tcg_global_mem_new_i32(TCG_AREG0, |
80 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, flags), |
81 | bbe418f2 | Jia Liu | "flags");
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82 | bbe418f2 | Jia Liu | cpu_pc = tcg_global_mem_new(TCG_AREG0, |
83 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, pc), "pc");
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84 | bbe418f2 | Jia Liu | cpu_npc = tcg_global_mem_new(TCG_AREG0, |
85 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, npc), "npc");
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86 | bbe418f2 | Jia Liu | cpu_ppc = tcg_global_mem_new(TCG_AREG0, |
87 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, ppc), "ppc");
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88 | bbe418f2 | Jia Liu | jmp_pc = tcg_global_mem_new(TCG_AREG0, |
89 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, jmp_pc), "jmp_pc");
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90 | bbe418f2 | Jia Liu | env_btaken = tcg_global_mem_new_i32(TCG_AREG0, |
91 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, btaken), |
92 | bbe418f2 | Jia Liu | "btaken");
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93 | bbe418f2 | Jia Liu | fpcsr = tcg_global_mem_new_i32(TCG_AREG0, |
94 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, fpcsr), |
95 | bbe418f2 | Jia Liu | "fpcsr");
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96 | bbe418f2 | Jia Liu | machi = tcg_global_mem_new(TCG_AREG0, |
97 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, machi), |
98 | bbe418f2 | Jia Liu | "machi");
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99 | bbe418f2 | Jia Liu | maclo = tcg_global_mem_new(TCG_AREG0, |
100 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, maclo), |
101 | bbe418f2 | Jia Liu | "maclo");
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102 | bbe418f2 | Jia Liu | fpmaddhi = tcg_global_mem_new(TCG_AREG0, |
103 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, fpmaddhi), |
104 | bbe418f2 | Jia Liu | "fpmaddhi");
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105 | bbe418f2 | Jia Liu | fpmaddlo = tcg_global_mem_new(TCG_AREG0, |
106 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, fpmaddlo), |
107 | bbe418f2 | Jia Liu | "fpmaddlo");
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108 | bbe418f2 | Jia Liu | for (i = 0; i < 32; i++) { |
109 | bbe418f2 | Jia Liu | cpu_R[i] = tcg_global_mem_new(TCG_AREG0, |
110 | bbe418f2 | Jia Liu | offsetof(CPUOpenRISCState, gpr[i]), |
111 | bbe418f2 | Jia Liu | regnames[i]); |
112 | bbe418f2 | Jia Liu | } |
113 | bbe418f2 | Jia Liu | } |
114 | bbe418f2 | Jia Liu | |
115 | 2e0fc3a4 | Stefan Weil | /* Writeback SR_F translation space to execution space. */
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116 | bbe418f2 | Jia Liu | static inline void wb_SR_F(void) |
117 | bbe418f2 | Jia Liu | { |
118 | bbe418f2 | Jia Liu | int label;
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119 | bbe418f2 | Jia Liu | |
120 | bbe418f2 | Jia Liu | label = gen_new_label(); |
121 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(cpu_sr, cpu_sr, ~SR_F); |
122 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_EQ, env_btaken, 0, label);
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123 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, SR_F); |
124 | bbe418f2 | Jia Liu | gen_set_label(label); |
125 | bbe418f2 | Jia Liu | } |
126 | bbe418f2 | Jia Liu | |
127 | bbe418f2 | Jia Liu | static inline int zero_extend(unsigned int val, int width) |
128 | bbe418f2 | Jia Liu | { |
129 | bbe418f2 | Jia Liu | return val & ((1 << width) - 1); |
130 | bbe418f2 | Jia Liu | } |
131 | bbe418f2 | Jia Liu | |
132 | bbe418f2 | Jia Liu | static inline int sign_extend(unsigned int val, int width) |
133 | bbe418f2 | Jia Liu | { |
134 | bbe418f2 | Jia Liu | int sval;
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135 | bbe418f2 | Jia Liu | |
136 | bbe418f2 | Jia Liu | /* LSL */
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137 | bbe418f2 | Jia Liu | val <<= TARGET_LONG_BITS - width; |
138 | bbe418f2 | Jia Liu | sval = val; |
139 | bbe418f2 | Jia Liu | /* ASR. */
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140 | bbe418f2 | Jia Liu | sval >>= TARGET_LONG_BITS - width; |
141 | bbe418f2 | Jia Liu | return sval;
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142 | bbe418f2 | Jia Liu | } |
143 | bbe418f2 | Jia Liu | |
144 | bbe418f2 | Jia Liu | static inline void gen_sync_flags(DisasContext *dc) |
145 | bbe418f2 | Jia Liu | { |
146 | bbe418f2 | Jia Liu | /* Sync the tb dependent flag between translate and runtime. */
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147 | bbe418f2 | Jia Liu | if (dc->tb_flags != dc->synced_flags) {
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148 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(env_flags, dc->tb_flags); |
149 | bbe418f2 | Jia Liu | dc->synced_flags = dc->tb_flags; |
150 | bbe418f2 | Jia Liu | } |
151 | bbe418f2 | Jia Liu | } |
152 | bbe418f2 | Jia Liu | |
153 | bbe418f2 | Jia Liu | static void gen_exception(DisasContext *dc, unsigned int excp) |
154 | bbe418f2 | Jia Liu | { |
155 | bbe418f2 | Jia Liu | TCGv_i32 tmp = tcg_const_i32(excp); |
156 | bbe418f2 | Jia Liu | gen_helper_exception(cpu_env, tmp); |
157 | bbe418f2 | Jia Liu | tcg_temp_free_i32(tmp); |
158 | bbe418f2 | Jia Liu | } |
159 | bbe418f2 | Jia Liu | |
160 | bbe418f2 | Jia Liu | static void gen_illegal_exception(DisasContext *dc) |
161 | bbe418f2 | Jia Liu | { |
162 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
163 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_ILLEGAL); |
164 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_UPDATE; |
165 | bbe418f2 | Jia Liu | } |
166 | bbe418f2 | Jia Liu | |
167 | bbe418f2 | Jia Liu | /* not used yet, open it when we need or64. */
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168 | bbe418f2 | Jia Liu | /*#ifdef TARGET_OPENRISC64
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169 | bbe418f2 | Jia Liu | static void check_ob64s(DisasContext *dc)
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170 | bbe418f2 | Jia Liu | {
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171 | bbe418f2 | Jia Liu | if (!(dc->flags & CPUCFGR_OB64S)) {
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172 | bbe418f2 | Jia Liu | gen_illegal_exception(dc);
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173 | bbe418f2 | Jia Liu | }
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174 | bbe418f2 | Jia Liu | }
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175 | bbe418f2 | Jia Liu | |
176 | bbe418f2 | Jia Liu | static void check_of64s(DisasContext *dc)
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177 | bbe418f2 | Jia Liu | {
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178 | bbe418f2 | Jia Liu | if (!(dc->flags & CPUCFGR_OF64S)) {
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179 | bbe418f2 | Jia Liu | gen_illegal_exception(dc);
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180 | bbe418f2 | Jia Liu | }
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181 | bbe418f2 | Jia Liu | }
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182 | bbe418f2 | Jia Liu | |
183 | bbe418f2 | Jia Liu | static void check_ov64s(DisasContext *dc)
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184 | bbe418f2 | Jia Liu | {
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185 | bbe418f2 | Jia Liu | if (!(dc->flags & CPUCFGR_OV64S)) {
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186 | bbe418f2 | Jia Liu | gen_illegal_exception(dc);
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187 | bbe418f2 | Jia Liu | }
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188 | bbe418f2 | Jia Liu | }
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189 | bbe418f2 | Jia Liu | #endif*/
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190 | bbe418f2 | Jia Liu | |
191 | bbe418f2 | Jia Liu | static void gen_goto_tb(DisasContext *dc, int n, target_ulong dest) |
192 | bbe418f2 | Jia Liu | { |
193 | bbe418f2 | Jia Liu | TranslationBlock *tb; |
194 | bbe418f2 | Jia Liu | tb = dc->tb; |
195 | bbe418f2 | Jia Liu | if ((tb->pc & TARGET_PAGE_MASK) == (dest & TARGET_PAGE_MASK) &&
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196 | bbe418f2 | Jia Liu | likely(!dc->singlestep_enabled)) { |
197 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dest); |
198 | bbe418f2 | Jia Liu | tcg_gen_goto_tb(n); |
199 | 8cfd0495 | Richard Henderson | tcg_gen_exit_tb((uintptr_t)tb + n); |
200 | bbe418f2 | Jia Liu | } else {
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201 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dest); |
202 | bbe418f2 | Jia Liu | if (dc->singlestep_enabled) {
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203 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_DEBUG); |
204 | bbe418f2 | Jia Liu | } |
205 | bbe418f2 | Jia Liu | tcg_gen_exit_tb(0);
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206 | bbe418f2 | Jia Liu | } |
207 | bbe418f2 | Jia Liu | } |
208 | bbe418f2 | Jia Liu | |
209 | bbe418f2 | Jia Liu | static void gen_jump(DisasContext *dc, uint32_t imm, uint32_t reg, uint32_t op0) |
210 | bbe418f2 | Jia Liu | { |
211 | bbe418f2 | Jia Liu | target_ulong tmp_pc; |
212 | bbe418f2 | Jia Liu | /* N26, 26bits imm */
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213 | bbe418f2 | Jia Liu | tmp_pc = sign_extend((imm<<2), 26) + dc->pc; |
214 | bbe418f2 | Jia Liu | |
215 | da1d7759 | Sebastian Macke | switch (op0) {
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216 | da1d7759 | Sebastian Macke | case 0x00: /* l.j */ |
217 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(jmp_pc, tmp_pc); |
218 | da1d7759 | Sebastian Macke | break;
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219 | da1d7759 | Sebastian Macke | case 0x01: /* l.jal */ |
220 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8)); |
221 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(jmp_pc, tmp_pc); |
222 | da1d7759 | Sebastian Macke | break;
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223 | da1d7759 | Sebastian Macke | case 0x03: /* l.bnf */ |
224 | da1d7759 | Sebastian Macke | case 0x04: /* l.bf */ |
225 | da1d7759 | Sebastian Macke | { |
226 | da1d7759 | Sebastian Macke | int lab = gen_new_label();
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227 | da1d7759 | Sebastian Macke | TCGv sr_f = tcg_temp_new(); |
228 | da1d7759 | Sebastian Macke | tcg_gen_movi_tl(jmp_pc, dc->pc+8);
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229 | da1d7759 | Sebastian Macke | tcg_gen_andi_tl(sr_f, cpu_sr, SR_F); |
230 | da1d7759 | Sebastian Macke | tcg_gen_brcondi_i32(op0 == 0x03 ? TCG_COND_EQ : TCG_COND_NE,
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231 | da1d7759 | Sebastian Macke | sr_f, SR_F, lab); |
232 | da1d7759 | Sebastian Macke | tcg_gen_movi_tl(jmp_pc, tmp_pc); |
233 | da1d7759 | Sebastian Macke | gen_set_label(lab); |
234 | da1d7759 | Sebastian Macke | tcg_temp_free(sr_f); |
235 | da1d7759 | Sebastian Macke | } |
236 | da1d7759 | Sebastian Macke | break;
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237 | da1d7759 | Sebastian Macke | case 0x11: /* l.jr */ |
238 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(jmp_pc, cpu_R[reg]); |
239 | da1d7759 | Sebastian Macke | break;
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240 | da1d7759 | Sebastian Macke | case 0x12: /* l.jalr */ |
241 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[9], (dc->pc + 8)); |
242 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(jmp_pc, cpu_R[reg]); |
243 | da1d7759 | Sebastian Macke | break;
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244 | da1d7759 | Sebastian Macke | default:
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245 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
246 | da1d7759 | Sebastian Macke | break;
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247 | bbe418f2 | Jia Liu | } |
248 | bbe418f2 | Jia Liu | |
249 | bbe418f2 | Jia Liu | dc->delayed_branch = 2;
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250 | bbe418f2 | Jia Liu | dc->tb_flags |= D_FLAG; |
251 | bbe418f2 | Jia Liu | gen_sync_flags(dc); |
252 | bbe418f2 | Jia Liu | } |
253 | bbe418f2 | Jia Liu | |
254 | da1d7759 | Sebastian Macke | |
255 | bbe418f2 | Jia Liu | static void dec_calc(DisasContext *dc, uint32_t insn) |
256 | bbe418f2 | Jia Liu | { |
257 | bbe418f2 | Jia Liu | uint32_t op0, op1, op2; |
258 | bbe418f2 | Jia Liu | uint32_t ra, rb, rd; |
259 | bbe418f2 | Jia Liu | op0 = extract32(insn, 0, 4); |
260 | bbe418f2 | Jia Liu | op1 = extract32(insn, 8, 2); |
261 | bbe418f2 | Jia Liu | op2 = extract32(insn, 6, 2); |
262 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
263 | bbe418f2 | Jia Liu | rb = extract32(insn, 11, 5); |
264 | bbe418f2 | Jia Liu | rd = extract32(insn, 21, 5); |
265 | bbe418f2 | Jia Liu | |
266 | bbe418f2 | Jia Liu | switch (op0) {
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267 | bbe418f2 | Jia Liu | case 0x0000: |
268 | bbe418f2 | Jia Liu | switch (op1) {
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269 | bbe418f2 | Jia Liu | case 0x00: /* l.add */ |
270 | bbe418f2 | Jia Liu | LOG_DIS("l.add r%d, r%d, r%d\n", rd, ra, rb);
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271 | bbe418f2 | Jia Liu | { |
272 | bbe418f2 | Jia Liu | int lab = gen_new_label();
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273 | bbe418f2 | Jia Liu | TCGv_i64 ta = tcg_temp_new_i64(); |
274 | bbe418f2 | Jia Liu | TCGv_i64 tb = tcg_temp_new_i64(); |
275 | bbe418f2 | Jia Liu | TCGv_i64 td = tcg_temp_local_new_i64(); |
276 | bbe418f2 | Jia Liu | TCGv_i32 res = tcg_temp_local_new_i32(); |
277 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
278 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(ta, cpu_R[ra]); |
279 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tb, cpu_R[rb]); |
280 | bbe418f2 | Jia Liu | tcg_gen_add_i64(td, ta, tb); |
281 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(res, td); |
282 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(td, td, 31);
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283 | bbe418f2 | Jia Liu | tcg_gen_andi_i64(td, td, 0x3);
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284 | bbe418f2 | Jia Liu | /* Jump to lab when no overflow. */
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285 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x0, lab);
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286 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x3, lab);
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287 | bbe418f2 | Jia Liu | tcg_gen_ori_i32(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
288 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_ove, cpu_sr, SR_OVE); |
289 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i32(TCG_COND_NE, sr_ove, SR_OVE, lab); |
290 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
291 | bbe418f2 | Jia Liu | gen_set_label(lab); |
292 | bbe418f2 | Jia Liu | tcg_gen_mov_i32(cpu_R[rd], res); |
293 | bbe418f2 | Jia Liu | tcg_temp_free_i64(ta); |
294 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tb); |
295 | bbe418f2 | Jia Liu | tcg_temp_free_i64(td); |
296 | bbe418f2 | Jia Liu | tcg_temp_free_i32(res); |
297 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
298 | bbe418f2 | Jia Liu | } |
299 | bbe418f2 | Jia Liu | break;
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300 | bbe418f2 | Jia Liu | default:
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301 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
302 | bbe418f2 | Jia Liu | break;
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303 | bbe418f2 | Jia Liu | } |
304 | bbe418f2 | Jia Liu | break;
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305 | bbe418f2 | Jia Liu | |
306 | bbe418f2 | Jia Liu | case 0x0001: /* l.addc */ |
307 | bbe418f2 | Jia Liu | switch (op1) {
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308 | bbe418f2 | Jia Liu | case 0x00: |
309 | bbe418f2 | Jia Liu | LOG_DIS("l.addc r%d, r%d, r%d\n", rd, ra, rb);
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310 | bbe418f2 | Jia Liu | { |
311 | bbe418f2 | Jia Liu | int lab = gen_new_label();
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312 | bbe418f2 | Jia Liu | TCGv_i64 ta = tcg_temp_new_i64(); |
313 | bbe418f2 | Jia Liu | TCGv_i64 tb = tcg_temp_new_i64(); |
314 | bbe418f2 | Jia Liu | TCGv_i64 tcy = tcg_temp_local_new_i64(); |
315 | bbe418f2 | Jia Liu | TCGv_i64 td = tcg_temp_local_new_i64(); |
316 | bbe418f2 | Jia Liu | TCGv_i32 res = tcg_temp_local_new_i32(); |
317 | bbe418f2 | Jia Liu | TCGv_i32 sr_cy = tcg_temp_local_new_i32(); |
318 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
319 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(ta, cpu_R[ra]); |
320 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tb, cpu_R[rb]); |
321 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_cy, cpu_sr, SR_CY); |
322 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tcy, sr_cy); |
323 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(tcy, tcy, 10);
|
324 | bbe418f2 | Jia Liu | tcg_gen_add_i64(td, ta, tb); |
325 | bbe418f2 | Jia Liu | tcg_gen_add_i64(td, td, tcy); |
326 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(res, td); |
327 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(td, td, 32);
|
328 | bbe418f2 | Jia Liu | tcg_gen_andi_i64(td, td, 0x3);
|
329 | bbe418f2 | Jia Liu | /* Jump to lab when no overflow. */
|
330 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x0, lab);
|
331 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x3, lab);
|
332 | bbe418f2 | Jia Liu | tcg_gen_ori_i32(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
333 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_ove, cpu_sr, SR_OVE); |
334 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i32(TCG_COND_NE, sr_ove, SR_OVE, lab); |
335 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
336 | bbe418f2 | Jia Liu | gen_set_label(lab); |
337 | bbe418f2 | Jia Liu | tcg_gen_mov_i32(cpu_R[rd], res); |
338 | bbe418f2 | Jia Liu | tcg_temp_free_i64(ta); |
339 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tb); |
340 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tcy); |
341 | bbe418f2 | Jia Liu | tcg_temp_free_i64(td); |
342 | bbe418f2 | Jia Liu | tcg_temp_free_i32(res); |
343 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_cy); |
344 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
345 | bbe418f2 | Jia Liu | } |
346 | bbe418f2 | Jia Liu | break;
|
347 | bbe418f2 | Jia Liu | default:
|
348 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
349 | bbe418f2 | Jia Liu | break;
|
350 | bbe418f2 | Jia Liu | } |
351 | bbe418f2 | Jia Liu | break;
|
352 | bbe418f2 | Jia Liu | |
353 | bbe418f2 | Jia Liu | case 0x0002: /* l.sub */ |
354 | bbe418f2 | Jia Liu | switch (op1) {
|
355 | bbe418f2 | Jia Liu | case 0x00: |
356 | bbe418f2 | Jia Liu | LOG_DIS("l.sub r%d, r%d, r%d\n", rd, ra, rb);
|
357 | bbe418f2 | Jia Liu | { |
358 | bbe418f2 | Jia Liu | int lab = gen_new_label();
|
359 | bbe418f2 | Jia Liu | TCGv_i64 ta = tcg_temp_new_i64(); |
360 | bbe418f2 | Jia Liu | TCGv_i64 tb = tcg_temp_new_i64(); |
361 | bbe418f2 | Jia Liu | TCGv_i64 td = tcg_temp_local_new_i64(); |
362 | bbe418f2 | Jia Liu | TCGv_i32 res = tcg_temp_local_new_i32(); |
363 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
364 | bbe418f2 | Jia Liu | |
365 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(ta, cpu_R[ra]); |
366 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tb, cpu_R[rb]); |
367 | bbe418f2 | Jia Liu | tcg_gen_sub_i64(td, ta, tb); |
368 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(res, td); |
369 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(td, td, 31);
|
370 | bbe418f2 | Jia Liu | tcg_gen_andi_i64(td, td, 0x3);
|
371 | bbe418f2 | Jia Liu | /* Jump to lab when no overflow. */
|
372 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x0, lab);
|
373 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x3, lab);
|
374 | bbe418f2 | Jia Liu | tcg_gen_ori_i32(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
375 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_ove, cpu_sr, SR_OVE); |
376 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i32(TCG_COND_NE, sr_ove, SR_OVE, lab); |
377 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
378 | bbe418f2 | Jia Liu | gen_set_label(lab); |
379 | bbe418f2 | Jia Liu | tcg_gen_mov_i32(cpu_R[rd], res); |
380 | bbe418f2 | Jia Liu | tcg_temp_free_i64(ta); |
381 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tb); |
382 | bbe418f2 | Jia Liu | tcg_temp_free_i64(td); |
383 | bbe418f2 | Jia Liu | tcg_temp_free_i32(res); |
384 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
385 | bbe418f2 | Jia Liu | } |
386 | bbe418f2 | Jia Liu | break;
|
387 | bbe418f2 | Jia Liu | default:
|
388 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
389 | bbe418f2 | Jia Liu | break;
|
390 | bbe418f2 | Jia Liu | } |
391 | bbe418f2 | Jia Liu | break;
|
392 | bbe418f2 | Jia Liu | |
393 | bbe418f2 | Jia Liu | case 0x0003: /* l.and */ |
394 | bbe418f2 | Jia Liu | switch (op1) {
|
395 | bbe418f2 | Jia Liu | case 0x00: |
396 | bbe418f2 | Jia Liu | LOG_DIS("l.and r%d, r%d, r%d\n", rd, ra, rb);
|
397 | bbe418f2 | Jia Liu | tcg_gen_and_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
398 | bbe418f2 | Jia Liu | break;
|
399 | bbe418f2 | Jia Liu | default:
|
400 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
401 | bbe418f2 | Jia Liu | break;
|
402 | bbe418f2 | Jia Liu | } |
403 | bbe418f2 | Jia Liu | break;
|
404 | bbe418f2 | Jia Liu | |
405 | bbe418f2 | Jia Liu | case 0x0004: /* l.or */ |
406 | bbe418f2 | Jia Liu | switch (op1) {
|
407 | bbe418f2 | Jia Liu | case 0x00: |
408 | bbe418f2 | Jia Liu | LOG_DIS("l.or r%d, r%d, r%d\n", rd, ra, rb);
|
409 | bbe418f2 | Jia Liu | tcg_gen_or_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
410 | bbe418f2 | Jia Liu | break;
|
411 | bbe418f2 | Jia Liu | default:
|
412 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
413 | bbe418f2 | Jia Liu | break;
|
414 | bbe418f2 | Jia Liu | } |
415 | bbe418f2 | Jia Liu | break;
|
416 | bbe418f2 | Jia Liu | |
417 | bbe418f2 | Jia Liu | case 0x0005: |
418 | bbe418f2 | Jia Liu | switch (op1) {
|
419 | bbe418f2 | Jia Liu | case 0x00: /* l.xor */ |
420 | bbe418f2 | Jia Liu | LOG_DIS("l.xor r%d, r%d, r%d\n", rd, ra, rb);
|
421 | bbe418f2 | Jia Liu | tcg_gen_xor_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
422 | bbe418f2 | Jia Liu | break;
|
423 | bbe418f2 | Jia Liu | default:
|
424 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
425 | bbe418f2 | Jia Liu | break;
|
426 | bbe418f2 | Jia Liu | } |
427 | bbe418f2 | Jia Liu | break;
|
428 | bbe418f2 | Jia Liu | |
429 | bbe418f2 | Jia Liu | case 0x0006: |
430 | bbe418f2 | Jia Liu | switch (op1) {
|
431 | bbe418f2 | Jia Liu | case 0x03: /* l.mul */ |
432 | bbe418f2 | Jia Liu | LOG_DIS("l.mul r%d, r%d, r%d\n", rd, ra, rb);
|
433 | bbe418f2 | Jia Liu | if (ra != 0 && rb != 0) { |
434 | bbe418f2 | Jia Liu | gen_helper_mul32(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
435 | bbe418f2 | Jia Liu | } else {
|
436 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[rd], 0x0);
|
437 | bbe418f2 | Jia Liu | } |
438 | bbe418f2 | Jia Liu | break;
|
439 | bbe418f2 | Jia Liu | default:
|
440 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
441 | bbe418f2 | Jia Liu | break;
|
442 | bbe418f2 | Jia Liu | } |
443 | bbe418f2 | Jia Liu | break;
|
444 | bbe418f2 | Jia Liu | |
445 | bbe418f2 | Jia Liu | case 0x0009: |
446 | bbe418f2 | Jia Liu | switch (op1) {
|
447 | bbe418f2 | Jia Liu | case 0x03: /* l.div */ |
448 | bbe418f2 | Jia Liu | LOG_DIS("l.div r%d, r%d, r%d\n", rd, ra, rb);
|
449 | bbe418f2 | Jia Liu | { |
450 | bbe418f2 | Jia Liu | int lab0 = gen_new_label();
|
451 | bbe418f2 | Jia Liu | int lab1 = gen_new_label();
|
452 | bbe418f2 | Jia Liu | int lab2 = gen_new_label();
|
453 | bbe418f2 | Jia Liu | int lab3 = gen_new_label();
|
454 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
455 | bbe418f2 | Jia Liu | if (rb == 0) { |
456 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
457 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |
458 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab0); |
459 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
460 | bbe418f2 | Jia Liu | gen_set_label(lab0); |
461 | bbe418f2 | Jia Liu | } else {
|
462 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_EQ, cpu_R[rb], |
463 | bbe418f2 | Jia Liu | 0x00000000, lab1);
|
464 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, cpu_R[ra], |
465 | bbe418f2 | Jia Liu | 0x80000000, lab2);
|
466 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, cpu_R[rb], |
467 | bbe418f2 | Jia Liu | 0xffffffff, lab2);
|
468 | bbe418f2 | Jia Liu | gen_set_label(lab1); |
469 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
470 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |
471 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab3); |
472 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
473 | bbe418f2 | Jia Liu | gen_set_label(lab2); |
474 | bbe418f2 | Jia Liu | tcg_gen_div_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
475 | bbe418f2 | Jia Liu | gen_set_label(lab3); |
476 | bbe418f2 | Jia Liu | } |
477 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
478 | bbe418f2 | Jia Liu | } |
479 | bbe418f2 | Jia Liu | break;
|
480 | bbe418f2 | Jia Liu | |
481 | bbe418f2 | Jia Liu | default:
|
482 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
483 | bbe418f2 | Jia Liu | break;
|
484 | bbe418f2 | Jia Liu | } |
485 | bbe418f2 | Jia Liu | break;
|
486 | bbe418f2 | Jia Liu | |
487 | bbe418f2 | Jia Liu | case 0x000a: |
488 | bbe418f2 | Jia Liu | switch (op1) {
|
489 | bbe418f2 | Jia Liu | case 0x03: /* l.divu */ |
490 | bbe418f2 | Jia Liu | LOG_DIS("l.divu r%d, r%d, r%d\n", rd, ra, rb);
|
491 | bbe418f2 | Jia Liu | { |
492 | bbe418f2 | Jia Liu | int lab0 = gen_new_label();
|
493 | bbe418f2 | Jia Liu | int lab1 = gen_new_label();
|
494 | bbe418f2 | Jia Liu | int lab2 = gen_new_label();
|
495 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
496 | bbe418f2 | Jia Liu | if (rb == 0) { |
497 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
498 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |
499 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab0); |
500 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
501 | bbe418f2 | Jia Liu | gen_set_label(lab0); |
502 | bbe418f2 | Jia Liu | } else {
|
503 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, cpu_R[rb], |
504 | bbe418f2 | Jia Liu | 0x00000000, lab1);
|
505 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
506 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |
507 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab2); |
508 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
509 | bbe418f2 | Jia Liu | gen_set_label(lab1); |
510 | bbe418f2 | Jia Liu | tcg_gen_divu_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
511 | bbe418f2 | Jia Liu | gen_set_label(lab2); |
512 | bbe418f2 | Jia Liu | } |
513 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
514 | bbe418f2 | Jia Liu | } |
515 | bbe418f2 | Jia Liu | break;
|
516 | bbe418f2 | Jia Liu | |
517 | bbe418f2 | Jia Liu | default:
|
518 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
519 | bbe418f2 | Jia Liu | break;
|
520 | bbe418f2 | Jia Liu | } |
521 | bbe418f2 | Jia Liu | break;
|
522 | bbe418f2 | Jia Liu | |
523 | bbe418f2 | Jia Liu | case 0x000b: |
524 | bbe418f2 | Jia Liu | switch (op1) {
|
525 | bbe418f2 | Jia Liu | case 0x03: /* l.mulu */ |
526 | bbe418f2 | Jia Liu | LOG_DIS("l.mulu r%d, r%d, r%d\n", rd, ra, rb);
|
527 | bbe418f2 | Jia Liu | if (rb != 0 && ra != 0) { |
528 | bbe418f2 | Jia Liu | TCGv_i64 result = tcg_temp_local_new_i64(); |
529 | bbe418f2 | Jia Liu | TCGv_i64 tra = tcg_temp_local_new_i64(); |
530 | bbe418f2 | Jia Liu | TCGv_i64 trb = tcg_temp_local_new_i64(); |
531 | bbe418f2 | Jia Liu | TCGv_i64 high = tcg_temp_new_i64(); |
532 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
533 | bbe418f2 | Jia Liu | int lab = gen_new_label();
|
534 | bbe418f2 | Jia Liu | /* Calculate the each result. */
|
535 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tra, cpu_R[ra]); |
536 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(trb, cpu_R[rb]); |
537 | bbe418f2 | Jia Liu | tcg_gen_mul_i64(result, tra, trb); |
538 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tra); |
539 | bbe418f2 | Jia Liu | tcg_temp_free_i64(trb); |
540 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(high, result, TARGET_LONG_BITS); |
541 | bbe418f2 | Jia Liu | /* Overflow or not. */
|
542 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, high, 0x00000000, lab);
|
543 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
544 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_ove, cpu_sr, SR_OVE); |
545 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_ove, SR_OVE, lab); |
546 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
547 | bbe418f2 | Jia Liu | gen_set_label(lab); |
548 | bbe418f2 | Jia Liu | tcg_temp_free_i64(high); |
549 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_tl(cpu_R[rd], result); |
550 | bbe418f2 | Jia Liu | tcg_temp_free_i64(result); |
551 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
552 | bbe418f2 | Jia Liu | } else {
|
553 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[rd], 0);
|
554 | bbe418f2 | Jia Liu | } |
555 | bbe418f2 | Jia Liu | break;
|
556 | bbe418f2 | Jia Liu | |
557 | bbe418f2 | Jia Liu | default:
|
558 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
559 | bbe418f2 | Jia Liu | break;
|
560 | bbe418f2 | Jia Liu | } |
561 | bbe418f2 | Jia Liu | break;
|
562 | bbe418f2 | Jia Liu | |
563 | bbe418f2 | Jia Liu | case 0x000e: |
564 | bbe418f2 | Jia Liu | switch (op1) {
|
565 | bbe418f2 | Jia Liu | case 0x00: /* l.cmov */ |
566 | bbe418f2 | Jia Liu | LOG_DIS("l.cmov r%d, r%d, r%d\n", rd, ra, rb);
|
567 | bbe418f2 | Jia Liu | { |
568 | bbe418f2 | Jia Liu | int lab = gen_new_label();
|
569 | bbe418f2 | Jia Liu | TCGv res = tcg_temp_local_new(); |
570 | bbe418f2 | Jia Liu | TCGv sr_f = tcg_temp_new(); |
571 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(sr_f, cpu_sr, SR_F); |
572 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(res, cpu_R[rb]); |
573 | bbe418f2 | Jia Liu | tcg_gen_brcondi_tl(TCG_COND_NE, sr_f, SR_F, lab); |
574 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(res, cpu_R[ra]); |
575 | bbe418f2 | Jia Liu | gen_set_label(lab); |
576 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(cpu_R[rd], res); |
577 | bbe418f2 | Jia Liu | tcg_temp_free(sr_f); |
578 | bbe418f2 | Jia Liu | tcg_temp_free(res); |
579 | bbe418f2 | Jia Liu | } |
580 | bbe418f2 | Jia Liu | break;
|
581 | bbe418f2 | Jia Liu | |
582 | bbe418f2 | Jia Liu | default:
|
583 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
584 | bbe418f2 | Jia Liu | break;
|
585 | bbe418f2 | Jia Liu | } |
586 | bbe418f2 | Jia Liu | break;
|
587 | bbe418f2 | Jia Liu | |
588 | bbe418f2 | Jia Liu | case 0x000f: |
589 | bbe418f2 | Jia Liu | switch (op1) {
|
590 | bbe418f2 | Jia Liu | case 0x00: /* l.ff1 */ |
591 | bbe418f2 | Jia Liu | LOG_DIS("l.ff1 r%d, r%d, r%d\n", rd, ra, rb);
|
592 | bbe418f2 | Jia Liu | gen_helper_ff1(cpu_R[rd], cpu_R[ra]); |
593 | bbe418f2 | Jia Liu | break;
|
594 | bbe418f2 | Jia Liu | case 0x01: /* l.fl1 */ |
595 | bbe418f2 | Jia Liu | LOG_DIS("l.fl1 r%d, r%d, r%d\n", rd, ra, rb);
|
596 | bbe418f2 | Jia Liu | gen_helper_fl1(cpu_R[rd], cpu_R[ra]); |
597 | bbe418f2 | Jia Liu | break;
|
598 | bbe418f2 | Jia Liu | |
599 | bbe418f2 | Jia Liu | default:
|
600 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
601 | bbe418f2 | Jia Liu | break;
|
602 | bbe418f2 | Jia Liu | } |
603 | bbe418f2 | Jia Liu | break;
|
604 | bbe418f2 | Jia Liu | |
605 | bbe418f2 | Jia Liu | case 0x0008: |
606 | bbe418f2 | Jia Liu | switch (op1) {
|
607 | bbe418f2 | Jia Liu | case 0x00: |
608 | bbe418f2 | Jia Liu | switch (op2) {
|
609 | bbe418f2 | Jia Liu | case 0x00: /* l.sll */ |
610 | bbe418f2 | Jia Liu | LOG_DIS("l.sll r%d, r%d, r%d\n", rd, ra, rb);
|
611 | bbe418f2 | Jia Liu | tcg_gen_shl_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
612 | bbe418f2 | Jia Liu | break;
|
613 | bbe418f2 | Jia Liu | case 0x01: /* l.srl */ |
614 | bbe418f2 | Jia Liu | LOG_DIS("l.srl r%d, r%d, r%d\n", rd, ra, rb);
|
615 | bbe418f2 | Jia Liu | tcg_gen_shr_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
616 | bbe418f2 | Jia Liu | break;
|
617 | bbe418f2 | Jia Liu | case 0x02: /* l.sra */ |
618 | bbe418f2 | Jia Liu | LOG_DIS("l.sra r%d, r%d, r%d\n", rd, ra, rb);
|
619 | bbe418f2 | Jia Liu | tcg_gen_sar_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
620 | bbe418f2 | Jia Liu | break;
|
621 | bbe418f2 | Jia Liu | case 0x03: /* l.ror */ |
622 | bbe418f2 | Jia Liu | LOG_DIS("l.ror r%d, r%d, r%d\n", rd, ra, rb);
|
623 | bbe418f2 | Jia Liu | tcg_gen_rotr_tl(cpu_R[rd], cpu_R[ra], cpu_R[rb]); |
624 | bbe418f2 | Jia Liu | break;
|
625 | bbe418f2 | Jia Liu | |
626 | bbe418f2 | Jia Liu | default:
|
627 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
628 | bbe418f2 | Jia Liu | break;
|
629 | bbe418f2 | Jia Liu | } |
630 | bbe418f2 | Jia Liu | break;
|
631 | bbe418f2 | Jia Liu | |
632 | bbe418f2 | Jia Liu | default:
|
633 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
634 | bbe418f2 | Jia Liu | break;
|
635 | bbe418f2 | Jia Liu | } |
636 | bbe418f2 | Jia Liu | break;
|
637 | bbe418f2 | Jia Liu | |
638 | bbe418f2 | Jia Liu | case 0x000c: |
639 | bbe418f2 | Jia Liu | switch (op1) {
|
640 | bbe418f2 | Jia Liu | case 0x00: |
641 | bbe418f2 | Jia Liu | switch (op2) {
|
642 | bbe418f2 | Jia Liu | case 0x00: /* l.exths */ |
643 | bbe418f2 | Jia Liu | LOG_DIS("l.exths r%d, r%d\n", rd, ra);
|
644 | bbe418f2 | Jia Liu | tcg_gen_ext16s_tl(cpu_R[rd], cpu_R[ra]); |
645 | bbe418f2 | Jia Liu | break;
|
646 | bbe418f2 | Jia Liu | case 0x01: /* l.extbs */ |
647 | bbe418f2 | Jia Liu | LOG_DIS("l.extbs r%d, r%d\n", rd, ra);
|
648 | bbe418f2 | Jia Liu | tcg_gen_ext8s_tl(cpu_R[rd], cpu_R[ra]); |
649 | bbe418f2 | Jia Liu | break;
|
650 | bbe418f2 | Jia Liu | case 0x02: /* l.exthz */ |
651 | bbe418f2 | Jia Liu | LOG_DIS("l.exthz r%d, r%d\n", rd, ra);
|
652 | bbe418f2 | Jia Liu | tcg_gen_ext16u_tl(cpu_R[rd], cpu_R[ra]); |
653 | bbe418f2 | Jia Liu | break;
|
654 | bbe418f2 | Jia Liu | case 0x03: /* l.extbz */ |
655 | bbe418f2 | Jia Liu | LOG_DIS("l.extbz r%d, r%d\n", rd, ra);
|
656 | bbe418f2 | Jia Liu | tcg_gen_ext8u_tl(cpu_R[rd], cpu_R[ra]); |
657 | bbe418f2 | Jia Liu | break;
|
658 | bbe418f2 | Jia Liu | |
659 | bbe418f2 | Jia Liu | default:
|
660 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
661 | bbe418f2 | Jia Liu | break;
|
662 | bbe418f2 | Jia Liu | } |
663 | bbe418f2 | Jia Liu | break;
|
664 | bbe418f2 | Jia Liu | |
665 | bbe418f2 | Jia Liu | default:
|
666 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
667 | bbe418f2 | Jia Liu | break;
|
668 | bbe418f2 | Jia Liu | } |
669 | bbe418f2 | Jia Liu | break;
|
670 | bbe418f2 | Jia Liu | |
671 | bbe418f2 | Jia Liu | case 0x000d: |
672 | bbe418f2 | Jia Liu | switch (op1) {
|
673 | bbe418f2 | Jia Liu | case 0x00: |
674 | bbe418f2 | Jia Liu | switch (op2) {
|
675 | bbe418f2 | Jia Liu | case 0x00: /* l.extws */ |
676 | bbe418f2 | Jia Liu | LOG_DIS("l.extws r%d, r%d\n", rd, ra);
|
677 | bbe418f2 | Jia Liu | tcg_gen_ext32s_tl(cpu_R[rd], cpu_R[ra]); |
678 | bbe418f2 | Jia Liu | break;
|
679 | bbe418f2 | Jia Liu | case 0x01: /* l.extwz */ |
680 | bbe418f2 | Jia Liu | LOG_DIS("l.extwz r%d, r%d\n", rd, ra);
|
681 | bbe418f2 | Jia Liu | tcg_gen_ext32u_tl(cpu_R[rd], cpu_R[ra]); |
682 | bbe418f2 | Jia Liu | break;
|
683 | bbe418f2 | Jia Liu | |
684 | bbe418f2 | Jia Liu | default:
|
685 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
686 | bbe418f2 | Jia Liu | break;
|
687 | bbe418f2 | Jia Liu | } |
688 | bbe418f2 | Jia Liu | break;
|
689 | bbe418f2 | Jia Liu | |
690 | bbe418f2 | Jia Liu | default:
|
691 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
692 | bbe418f2 | Jia Liu | break;
|
693 | bbe418f2 | Jia Liu | } |
694 | bbe418f2 | Jia Liu | break;
|
695 | bbe418f2 | Jia Liu | |
696 | bbe418f2 | Jia Liu | default:
|
697 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
698 | bbe418f2 | Jia Liu | break;
|
699 | bbe418f2 | Jia Liu | } |
700 | bbe418f2 | Jia Liu | } |
701 | bbe418f2 | Jia Liu | |
702 | bbe418f2 | Jia Liu | static void dec_misc(DisasContext *dc, uint32_t insn) |
703 | bbe418f2 | Jia Liu | { |
704 | bbe418f2 | Jia Liu | uint32_t op0, op1; |
705 | bbe418f2 | Jia Liu | uint32_t ra, rb, rd; |
706 | bbe418f2 | Jia Liu | #ifdef OPENRISC_DISAS
|
707 | bbe418f2 | Jia Liu | uint32_t L6, K5; |
708 | bbe418f2 | Jia Liu | #endif
|
709 | bbe418f2 | Jia Liu | uint32_t I16, I5, I11, N26, tmp; |
710 | 5631e69c | Richard Henderson | TCGMemOp mop; |
711 | 5631e69c | Richard Henderson | |
712 | bbe418f2 | Jia Liu | op0 = extract32(insn, 26, 6); |
713 | bbe418f2 | Jia Liu | op1 = extract32(insn, 24, 2); |
714 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
715 | bbe418f2 | Jia Liu | rb = extract32(insn, 11, 5); |
716 | bbe418f2 | Jia Liu | rd = extract32(insn, 21, 5); |
717 | bbe418f2 | Jia Liu | #ifdef OPENRISC_DISAS
|
718 | bbe418f2 | Jia Liu | L6 = extract32(insn, 5, 6); |
719 | bbe418f2 | Jia Liu | K5 = extract32(insn, 0, 5); |
720 | bbe418f2 | Jia Liu | #endif
|
721 | bbe418f2 | Jia Liu | I16 = extract32(insn, 0, 16); |
722 | bbe418f2 | Jia Liu | I5 = extract32(insn, 21, 5); |
723 | bbe418f2 | Jia Liu | I11 = extract32(insn, 0, 11); |
724 | bbe418f2 | Jia Liu | N26 = extract32(insn, 0, 26); |
725 | bbe418f2 | Jia Liu | tmp = (I5<<11) + I11;
|
726 | bbe418f2 | Jia Liu | |
727 | bbe418f2 | Jia Liu | switch (op0) {
|
728 | bbe418f2 | Jia Liu | case 0x00: /* l.j */ |
729 | bbe418f2 | Jia Liu | LOG_DIS("l.j %d\n", N26);
|
730 | bbe418f2 | Jia Liu | gen_jump(dc, N26, 0, op0);
|
731 | bbe418f2 | Jia Liu | break;
|
732 | bbe418f2 | Jia Liu | |
733 | bbe418f2 | Jia Liu | case 0x01: /* l.jal */ |
734 | bbe418f2 | Jia Liu | LOG_DIS("l.jal %d\n", N26);
|
735 | bbe418f2 | Jia Liu | gen_jump(dc, N26, 0, op0);
|
736 | bbe418f2 | Jia Liu | break;
|
737 | bbe418f2 | Jia Liu | |
738 | bbe418f2 | Jia Liu | case 0x03: /* l.bnf */ |
739 | bbe418f2 | Jia Liu | LOG_DIS("l.bnf %d\n", N26);
|
740 | bbe418f2 | Jia Liu | gen_jump(dc, N26, 0, op0);
|
741 | bbe418f2 | Jia Liu | break;
|
742 | bbe418f2 | Jia Liu | |
743 | bbe418f2 | Jia Liu | case 0x04: /* l.bf */ |
744 | bbe418f2 | Jia Liu | LOG_DIS("l.bf %d\n", N26);
|
745 | bbe418f2 | Jia Liu | gen_jump(dc, N26, 0, op0);
|
746 | bbe418f2 | Jia Liu | break;
|
747 | bbe418f2 | Jia Liu | |
748 | bbe418f2 | Jia Liu | case 0x05: |
749 | bbe418f2 | Jia Liu | switch (op1) {
|
750 | bbe418f2 | Jia Liu | case 0x01: /* l.nop */ |
751 | bbe418f2 | Jia Liu | LOG_DIS("l.nop %d\n", I16);
|
752 | bbe418f2 | Jia Liu | break;
|
753 | bbe418f2 | Jia Liu | |
754 | bbe418f2 | Jia Liu | default:
|
755 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
756 | bbe418f2 | Jia Liu | break;
|
757 | bbe418f2 | Jia Liu | } |
758 | bbe418f2 | Jia Liu | break;
|
759 | bbe418f2 | Jia Liu | |
760 | bbe418f2 | Jia Liu | case 0x11: /* l.jr */ |
761 | bbe418f2 | Jia Liu | LOG_DIS("l.jr r%d\n", rb);
|
762 | bbe418f2 | Jia Liu | gen_jump(dc, 0, rb, op0);
|
763 | bbe418f2 | Jia Liu | break;
|
764 | bbe418f2 | Jia Liu | |
765 | bbe418f2 | Jia Liu | case 0x12: /* l.jalr */ |
766 | bbe418f2 | Jia Liu | LOG_DIS("l.jalr r%d\n", rb);
|
767 | bbe418f2 | Jia Liu | gen_jump(dc, 0, rb, op0);
|
768 | bbe418f2 | Jia Liu | break;
|
769 | bbe418f2 | Jia Liu | |
770 | bbe418f2 | Jia Liu | case 0x13: /* l.maci */ |
771 | bbe418f2 | Jia Liu | LOG_DIS("l.maci %d, r%d, %d\n", I5, ra, I11);
|
772 | bbe418f2 | Jia Liu | { |
773 | bbe418f2 | Jia Liu | TCGv_i64 t1 = tcg_temp_new_i64(); |
774 | bbe418f2 | Jia Liu | TCGv_i64 t2 = tcg_temp_new_i64(); |
775 | bbe418f2 | Jia Liu | TCGv_i32 dst = tcg_temp_new_i32(); |
776 | bbe418f2 | Jia Liu | TCGv ttmp = tcg_const_tl(tmp); |
777 | bbe418f2 | Jia Liu | tcg_gen_mul_tl(dst, cpu_R[ra], ttmp); |
778 | bbe418f2 | Jia Liu | tcg_gen_ext_i32_i64(t1, dst); |
779 | bbe418f2 | Jia Liu | tcg_gen_concat_i32_i64(t2, maclo, machi); |
780 | bbe418f2 | Jia Liu | tcg_gen_add_i64(t2, t2, t1); |
781 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(maclo, t2); |
782 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(t2, t2, 32);
|
783 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(machi, t2); |
784 | bbe418f2 | Jia Liu | tcg_temp_free_i32(dst); |
785 | bbe418f2 | Jia Liu | tcg_temp_free(ttmp); |
786 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t1); |
787 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t2); |
788 | bbe418f2 | Jia Liu | } |
789 | bbe418f2 | Jia Liu | break;
|
790 | bbe418f2 | Jia Liu | |
791 | bbe418f2 | Jia Liu | case 0x09: /* l.rfe */ |
792 | bbe418f2 | Jia Liu | LOG_DIS("l.rfe\n");
|
793 | bbe418f2 | Jia Liu | { |
794 | bbe418f2 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
795 | bbe418f2 | Jia Liu | return;
|
796 | bbe418f2 | Jia Liu | #else
|
797 | bbe418f2 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
798 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
799 | bbe418f2 | Jia Liu | return;
|
800 | bbe418f2 | Jia Liu | } |
801 | bbe418f2 | Jia Liu | gen_helper_rfe(cpu_env); |
802 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_UPDATE; |
803 | bbe418f2 | Jia Liu | #endif
|
804 | bbe418f2 | Jia Liu | } |
805 | bbe418f2 | Jia Liu | break;
|
806 | bbe418f2 | Jia Liu | |
807 | bbe418f2 | Jia Liu | case 0x1c: /* l.cust1 */ |
808 | bbe418f2 | Jia Liu | LOG_DIS("l.cust1\n");
|
809 | bbe418f2 | Jia Liu | break;
|
810 | bbe418f2 | Jia Liu | |
811 | bbe418f2 | Jia Liu | case 0x1d: /* l.cust2 */ |
812 | bbe418f2 | Jia Liu | LOG_DIS("l.cust2\n");
|
813 | bbe418f2 | Jia Liu | break;
|
814 | bbe418f2 | Jia Liu | |
815 | bbe418f2 | Jia Liu | case 0x1e: /* l.cust3 */ |
816 | bbe418f2 | Jia Liu | LOG_DIS("l.cust3\n");
|
817 | bbe418f2 | Jia Liu | break;
|
818 | bbe418f2 | Jia Liu | |
819 | bbe418f2 | Jia Liu | case 0x1f: /* l.cust4 */ |
820 | bbe418f2 | Jia Liu | LOG_DIS("l.cust4\n");
|
821 | bbe418f2 | Jia Liu | break;
|
822 | bbe418f2 | Jia Liu | |
823 | bbe418f2 | Jia Liu | case 0x3c: /* l.cust5 */ |
824 | bbe418f2 | Jia Liu | LOG_DIS("l.cust5 r%d, r%d, r%d, %d, %d\n", rd, ra, rb, L6, K5);
|
825 | bbe418f2 | Jia Liu | break;
|
826 | bbe418f2 | Jia Liu | |
827 | bbe418f2 | Jia Liu | case 0x3d: /* l.cust6 */ |
828 | bbe418f2 | Jia Liu | LOG_DIS("l.cust6\n");
|
829 | bbe418f2 | Jia Liu | break;
|
830 | bbe418f2 | Jia Liu | |
831 | bbe418f2 | Jia Liu | case 0x3e: /* l.cust7 */ |
832 | bbe418f2 | Jia Liu | LOG_DIS("l.cust7\n");
|
833 | bbe418f2 | Jia Liu | break;
|
834 | bbe418f2 | Jia Liu | |
835 | bbe418f2 | Jia Liu | case 0x3f: /* l.cust8 */ |
836 | bbe418f2 | Jia Liu | LOG_DIS("l.cust8\n");
|
837 | bbe418f2 | Jia Liu | break;
|
838 | bbe418f2 | Jia Liu | |
839 | bbe418f2 | Jia Liu | /* not used yet, open it when we need or64. */
|
840 | bbe418f2 | Jia Liu | /*#ifdef TARGET_OPENRISC64
|
841 | bbe418f2 | Jia Liu | case 0x20: l.ld
|
842 | bbe418f2 | Jia Liu | LOG_DIS("l.ld r%d, r%d, %d\n", rd, ra, I16);
|
843 | 5631e69c | Richard Henderson | check_ob64s(dc);
|
844 | 5631e69c | Richard Henderson | mop = MO_TEQ;
|
845 | 5631e69c | Richard Henderson | goto do_load;
|
846 | bbe418f2 | Jia Liu | #endif*/
|
847 | bbe418f2 | Jia Liu | |
848 | bbe418f2 | Jia Liu | case 0x21: /* l.lwz */ |
849 | bbe418f2 | Jia Liu | LOG_DIS("l.lwz r%d, r%d, %d\n", rd, ra, I16);
|
850 | 5631e69c | Richard Henderson | mop = MO_TEUL; |
851 | 5631e69c | Richard Henderson | goto do_load;
|
852 | bbe418f2 | Jia Liu | |
853 | bbe418f2 | Jia Liu | case 0x22: /* l.lws */ |
854 | bbe418f2 | Jia Liu | LOG_DIS("l.lws r%d, r%d, %d\n", rd, ra, I16);
|
855 | 5631e69c | Richard Henderson | mop = MO_TESL; |
856 | 5631e69c | Richard Henderson | goto do_load;
|
857 | bbe418f2 | Jia Liu | |
858 | bbe418f2 | Jia Liu | case 0x23: /* l.lbz */ |
859 | bbe418f2 | Jia Liu | LOG_DIS("l.lbz r%d, r%d, %d\n", rd, ra, I16);
|
860 | 5631e69c | Richard Henderson | mop = MO_UB; |
861 | 5631e69c | Richard Henderson | goto do_load;
|
862 | bbe418f2 | Jia Liu | |
863 | bbe418f2 | Jia Liu | case 0x24: /* l.lbs */ |
864 | bbe418f2 | Jia Liu | LOG_DIS("l.lbs r%d, r%d, %d\n", rd, ra, I16);
|
865 | 5631e69c | Richard Henderson | mop = MO_SB; |
866 | 5631e69c | Richard Henderson | goto do_load;
|
867 | bbe418f2 | Jia Liu | |
868 | bbe418f2 | Jia Liu | case 0x25: /* l.lhz */ |
869 | bbe418f2 | Jia Liu | LOG_DIS("l.lhz r%d, r%d, %d\n", rd, ra, I16);
|
870 | 5631e69c | Richard Henderson | mop = MO_TEUW; |
871 | 5631e69c | Richard Henderson | goto do_load;
|
872 | bbe418f2 | Jia Liu | |
873 | bbe418f2 | Jia Liu | case 0x26: /* l.lhs */ |
874 | bbe418f2 | Jia Liu | LOG_DIS("l.lhs r%d, r%d, %d\n", rd, ra, I16);
|
875 | 5631e69c | Richard Henderson | mop = MO_TESW; |
876 | 5631e69c | Richard Henderson | goto do_load;
|
877 | 5631e69c | Richard Henderson | |
878 | 5631e69c | Richard Henderson | do_load:
|
879 | bbe418f2 | Jia Liu | { |
880 | bbe418f2 | Jia Liu | TCGv t0 = tcg_temp_new(); |
881 | bbe418f2 | Jia Liu | tcg_gen_addi_tl(t0, cpu_R[ra], sign_extend(I16, 16));
|
882 | 5631e69c | Richard Henderson | tcg_gen_qemu_ld_tl(cpu_R[rd], t0, dc->mem_idx, mop); |
883 | bbe418f2 | Jia Liu | tcg_temp_free(t0); |
884 | bbe418f2 | Jia Liu | } |
885 | bbe418f2 | Jia Liu | break;
|
886 | bbe418f2 | Jia Liu | |
887 | bbe418f2 | Jia Liu | case 0x27: /* l.addi */ |
888 | bbe418f2 | Jia Liu | LOG_DIS("l.addi r%d, r%d, %d\n", rd, ra, I16);
|
889 | bbe418f2 | Jia Liu | { |
890 | 352367e8 | Sebastian Macke | if (I16 == 0) { |
891 | 352367e8 | Sebastian Macke | tcg_gen_mov_tl(cpu_R[rd], cpu_R[ra]); |
892 | 352367e8 | Sebastian Macke | } else {
|
893 | 352367e8 | Sebastian Macke | int lab = gen_new_label();
|
894 | 352367e8 | Sebastian Macke | TCGv_i64 ta = tcg_temp_new_i64(); |
895 | 352367e8 | Sebastian Macke | TCGv_i64 td = tcg_temp_local_new_i64(); |
896 | 352367e8 | Sebastian Macke | TCGv_i32 res = tcg_temp_local_new_i32(); |
897 | 352367e8 | Sebastian Macke | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
898 | 352367e8 | Sebastian Macke | tcg_gen_extu_i32_i64(ta, cpu_R[ra]); |
899 | 352367e8 | Sebastian Macke | tcg_gen_addi_i64(td, ta, sign_extend(I16, 16));
|
900 | 352367e8 | Sebastian Macke | tcg_gen_trunc_i64_i32(res, td); |
901 | 352367e8 | Sebastian Macke | tcg_gen_shri_i64(td, td, 32);
|
902 | 352367e8 | Sebastian Macke | tcg_gen_andi_i64(td, td, 0x3);
|
903 | 352367e8 | Sebastian Macke | /* Jump to lab when no overflow. */
|
904 | 352367e8 | Sebastian Macke | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x0, lab);
|
905 | 352367e8 | Sebastian Macke | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x3, lab);
|
906 | 352367e8 | Sebastian Macke | tcg_gen_ori_i32(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
907 | 352367e8 | Sebastian Macke | tcg_gen_andi_i32(sr_ove, cpu_sr, SR_OVE); |
908 | 352367e8 | Sebastian Macke | tcg_gen_brcondi_i32(TCG_COND_NE, sr_ove, SR_OVE, lab); |
909 | 352367e8 | Sebastian Macke | gen_exception(dc, EXCP_RANGE); |
910 | 352367e8 | Sebastian Macke | gen_set_label(lab); |
911 | 352367e8 | Sebastian Macke | tcg_gen_mov_i32(cpu_R[rd], res); |
912 | 352367e8 | Sebastian Macke | tcg_temp_free_i64(ta); |
913 | 352367e8 | Sebastian Macke | tcg_temp_free_i64(td); |
914 | 352367e8 | Sebastian Macke | tcg_temp_free_i32(res); |
915 | 352367e8 | Sebastian Macke | tcg_temp_free_i32(sr_ove); |
916 | 352367e8 | Sebastian Macke | } |
917 | bbe418f2 | Jia Liu | } |
918 | bbe418f2 | Jia Liu | break;
|
919 | bbe418f2 | Jia Liu | |
920 | bbe418f2 | Jia Liu | case 0x28: /* l.addic */ |
921 | bbe418f2 | Jia Liu | LOG_DIS("l.addic r%d, r%d, %d\n", rd, ra, I16);
|
922 | bbe418f2 | Jia Liu | { |
923 | bbe418f2 | Jia Liu | int lab = gen_new_label();
|
924 | bbe418f2 | Jia Liu | TCGv_i64 ta = tcg_temp_new_i64(); |
925 | bbe418f2 | Jia Liu | TCGv_i64 td = tcg_temp_local_new_i64(); |
926 | bbe418f2 | Jia Liu | TCGv_i64 tcy = tcg_temp_local_new_i64(); |
927 | bbe418f2 | Jia Liu | TCGv_i32 res = tcg_temp_local_new_i32(); |
928 | bbe418f2 | Jia Liu | TCGv_i32 sr_cy = tcg_temp_local_new_i32(); |
929 | bbe418f2 | Jia Liu | TCGv_i32 sr_ove = tcg_temp_local_new_i32(); |
930 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(ta, cpu_R[ra]); |
931 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_cy, cpu_sr, SR_CY); |
932 | bbe418f2 | Jia Liu | tcg_gen_shri_i32(sr_cy, sr_cy, 10);
|
933 | bbe418f2 | Jia Liu | tcg_gen_extu_i32_i64(tcy, sr_cy); |
934 | bbe418f2 | Jia Liu | tcg_gen_addi_i64(td, ta, sign_extend(I16, 16));
|
935 | bbe418f2 | Jia Liu | tcg_gen_add_i64(td, td, tcy); |
936 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(res, td); |
937 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(td, td, 32);
|
938 | bbe418f2 | Jia Liu | tcg_gen_andi_i64(td, td, 0x3);
|
939 | bbe418f2 | Jia Liu | /* Jump to lab when no overflow. */
|
940 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x0, lab);
|
941 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i64(TCG_COND_EQ, td, 0x3, lab);
|
942 | bbe418f2 | Jia Liu | tcg_gen_ori_i32(cpu_sr, cpu_sr, (SR_OV | SR_CY)); |
943 | bbe418f2 | Jia Liu | tcg_gen_andi_i32(sr_ove, cpu_sr, SR_OVE); |
944 | bbe418f2 | Jia Liu | tcg_gen_brcondi_i32(TCG_COND_NE, sr_ove, SR_OVE, lab); |
945 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_RANGE); |
946 | bbe418f2 | Jia Liu | gen_set_label(lab); |
947 | bbe418f2 | Jia Liu | tcg_gen_mov_i32(cpu_R[rd], res); |
948 | bbe418f2 | Jia Liu | tcg_temp_free_i64(ta); |
949 | bbe418f2 | Jia Liu | tcg_temp_free_i64(td); |
950 | bbe418f2 | Jia Liu | tcg_temp_free_i64(tcy); |
951 | bbe418f2 | Jia Liu | tcg_temp_free_i32(res); |
952 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_cy); |
953 | bbe418f2 | Jia Liu | tcg_temp_free_i32(sr_ove); |
954 | bbe418f2 | Jia Liu | } |
955 | bbe418f2 | Jia Liu | break;
|
956 | bbe418f2 | Jia Liu | |
957 | bbe418f2 | Jia Liu | case 0x29: /* l.andi */ |
958 | bbe418f2 | Jia Liu | LOG_DIS("l.andi r%d, r%d, %d\n", rd, ra, I16);
|
959 | bbe418f2 | Jia Liu | tcg_gen_andi_tl(cpu_R[rd], cpu_R[ra], zero_extend(I16, 16));
|
960 | bbe418f2 | Jia Liu | break;
|
961 | bbe418f2 | Jia Liu | |
962 | bbe418f2 | Jia Liu | case 0x2a: /* l.ori */ |
963 | bbe418f2 | Jia Liu | LOG_DIS("l.ori r%d, r%d, %d\n", rd, ra, I16);
|
964 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(cpu_R[rd], cpu_R[ra], zero_extend(I16, 16));
|
965 | bbe418f2 | Jia Liu | break;
|
966 | bbe418f2 | Jia Liu | |
967 | bbe418f2 | Jia Liu | case 0x2b: /* l.xori */ |
968 | bbe418f2 | Jia Liu | LOG_DIS("l.xori r%d, r%d, %d\n", rd, ra, I16);
|
969 | bbe418f2 | Jia Liu | tcg_gen_xori_tl(cpu_R[rd], cpu_R[ra], sign_extend(I16, 16));
|
970 | bbe418f2 | Jia Liu | break;
|
971 | bbe418f2 | Jia Liu | |
972 | bbe418f2 | Jia Liu | case 0x2c: /* l.muli */ |
973 | bbe418f2 | Jia Liu | LOG_DIS("l.muli r%d, r%d, %d\n", rd, ra, I16);
|
974 | bbe418f2 | Jia Liu | if (ra != 0 && I16 != 0) { |
975 | bbe418f2 | Jia Liu | TCGv_i32 im = tcg_const_i32(I16); |
976 | bbe418f2 | Jia Liu | gen_helper_mul32(cpu_R[rd], cpu_env, cpu_R[ra], im); |
977 | bbe418f2 | Jia Liu | tcg_temp_free_i32(im); |
978 | bbe418f2 | Jia Liu | } else {
|
979 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[rd], 0x0);
|
980 | bbe418f2 | Jia Liu | } |
981 | bbe418f2 | Jia Liu | break;
|
982 | bbe418f2 | Jia Liu | |
983 | bbe418f2 | Jia Liu | case 0x2d: /* l.mfspr */ |
984 | bbe418f2 | Jia Liu | LOG_DIS("l.mfspr r%d, r%d, %d\n", rd, ra, I16);
|
985 | 4dd044c6 | Jia Liu | { |
986 | 4dd044c6 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
987 | 4dd044c6 | Jia Liu | return;
|
988 | 4dd044c6 | Jia Liu | #else
|
989 | 4dd044c6 | Jia Liu | TCGv_i32 ti = tcg_const_i32(I16); |
990 | 4dd044c6 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
991 | 4dd044c6 | Jia Liu | gen_illegal_exception(dc); |
992 | 4dd044c6 | Jia Liu | return;
|
993 | 4dd044c6 | Jia Liu | } |
994 | 4dd044c6 | Jia Liu | gen_helper_mfspr(cpu_R[rd], cpu_env, cpu_R[rd], cpu_R[ra], ti); |
995 | 4dd044c6 | Jia Liu | tcg_temp_free_i32(ti); |
996 | 4dd044c6 | Jia Liu | #endif
|
997 | 4dd044c6 | Jia Liu | } |
998 | bbe418f2 | Jia Liu | break;
|
999 | bbe418f2 | Jia Liu | |
1000 | bbe418f2 | Jia Liu | case 0x30: /* l.mtspr */ |
1001 | bbe418f2 | Jia Liu | LOG_DIS("l.mtspr %d, r%d, r%d, %d\n", I5, ra, rb, I11);
|
1002 | 4dd044c6 | Jia Liu | { |
1003 | 4dd044c6 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
1004 | 4dd044c6 | Jia Liu | return;
|
1005 | 4dd044c6 | Jia Liu | #else
|
1006 | 4dd044c6 | Jia Liu | TCGv_i32 im = tcg_const_i32(tmp); |
1007 | 4dd044c6 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
1008 | 4dd044c6 | Jia Liu | gen_illegal_exception(dc); |
1009 | 4dd044c6 | Jia Liu | return;
|
1010 | 4dd044c6 | Jia Liu | } |
1011 | 4dd044c6 | Jia Liu | gen_helper_mtspr(cpu_env, cpu_R[ra], cpu_R[rb], im); |
1012 | 4dd044c6 | Jia Liu | tcg_temp_free_i32(im); |
1013 | 4dd044c6 | Jia Liu | #endif
|
1014 | 4dd044c6 | Jia Liu | } |
1015 | bbe418f2 | Jia Liu | break;
|
1016 | bbe418f2 | Jia Liu | |
1017 | bbe418f2 | Jia Liu | /* not used yet, open it when we need or64. */
|
1018 | bbe418f2 | Jia Liu | /*#ifdef TARGET_OPENRISC64
|
1019 | bbe418f2 | Jia Liu | case 0x34: l.sd
|
1020 | bbe418f2 | Jia Liu | LOG_DIS("l.sd %d, r%d, r%d, %d\n", I5, ra, rb, I11);
|
1021 | 5631e69c | Richard Henderson | check_ob64s(dc);
|
1022 | 5631e69c | Richard Henderson | mop = MO_TEQ;
|
1023 | 5631e69c | Richard Henderson | goto do_store;
|
1024 | bbe418f2 | Jia Liu | #endif*/
|
1025 | bbe418f2 | Jia Liu | |
1026 | bbe418f2 | Jia Liu | case 0x35: /* l.sw */ |
1027 | bbe418f2 | Jia Liu | LOG_DIS("l.sw %d, r%d, r%d, %d\n", I5, ra, rb, I11);
|
1028 | 5631e69c | Richard Henderson | mop = MO_TEUL; |
1029 | 5631e69c | Richard Henderson | goto do_store;
|
1030 | bbe418f2 | Jia Liu | |
1031 | bbe418f2 | Jia Liu | case 0x36: /* l.sb */ |
1032 | bbe418f2 | Jia Liu | LOG_DIS("l.sb %d, r%d, r%d, %d\n", I5, ra, rb, I11);
|
1033 | 5631e69c | Richard Henderson | mop = MO_UB; |
1034 | 5631e69c | Richard Henderson | goto do_store;
|
1035 | bbe418f2 | Jia Liu | |
1036 | bbe418f2 | Jia Liu | case 0x37: /* l.sh */ |
1037 | bbe418f2 | Jia Liu | LOG_DIS("l.sh %d, r%d, r%d, %d\n", I5, ra, rb, I11);
|
1038 | 5631e69c | Richard Henderson | mop = MO_TEUW; |
1039 | 5631e69c | Richard Henderson | goto do_store;
|
1040 | 5631e69c | Richard Henderson | |
1041 | 5631e69c | Richard Henderson | do_store:
|
1042 | bbe418f2 | Jia Liu | { |
1043 | bbe418f2 | Jia Liu | TCGv t0 = tcg_temp_new(); |
1044 | bbe418f2 | Jia Liu | tcg_gen_addi_tl(t0, cpu_R[ra], sign_extend(tmp, 16));
|
1045 | 5631e69c | Richard Henderson | tcg_gen_qemu_st_tl(cpu_R[rb], t0, dc->mem_idx, mop); |
1046 | bbe418f2 | Jia Liu | tcg_temp_free(t0); |
1047 | bbe418f2 | Jia Liu | } |
1048 | bbe418f2 | Jia Liu | break;
|
1049 | bbe418f2 | Jia Liu | |
1050 | bbe418f2 | Jia Liu | default:
|
1051 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1052 | bbe418f2 | Jia Liu | break;
|
1053 | bbe418f2 | Jia Liu | } |
1054 | bbe418f2 | Jia Liu | } |
1055 | bbe418f2 | Jia Liu | |
1056 | bbe418f2 | Jia Liu | static void dec_mac(DisasContext *dc, uint32_t insn) |
1057 | bbe418f2 | Jia Liu | { |
1058 | bbe418f2 | Jia Liu | uint32_t op0; |
1059 | bbe418f2 | Jia Liu | uint32_t ra, rb; |
1060 | bbe418f2 | Jia Liu | op0 = extract32(insn, 0, 4); |
1061 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
1062 | bbe418f2 | Jia Liu | rb = extract32(insn, 11, 5); |
1063 | bbe418f2 | Jia Liu | |
1064 | bbe418f2 | Jia Liu | switch (op0) {
|
1065 | bbe418f2 | Jia Liu | case 0x0001: /* l.mac */ |
1066 | bbe418f2 | Jia Liu | LOG_DIS("l.mac r%d, r%d\n", ra, rb);
|
1067 | bbe418f2 | Jia Liu | { |
1068 | bbe418f2 | Jia Liu | TCGv_i32 t0 = tcg_temp_new_i32(); |
1069 | bbe418f2 | Jia Liu | TCGv_i64 t1 = tcg_temp_new_i64(); |
1070 | bbe418f2 | Jia Liu | TCGv_i64 t2 = tcg_temp_new_i64(); |
1071 | bbe418f2 | Jia Liu | tcg_gen_mul_tl(t0, cpu_R[ra], cpu_R[rb]); |
1072 | bbe418f2 | Jia Liu | tcg_gen_ext_i32_i64(t1, t0); |
1073 | bbe418f2 | Jia Liu | tcg_gen_concat_i32_i64(t2, maclo, machi); |
1074 | bbe418f2 | Jia Liu | tcg_gen_add_i64(t2, t2, t1); |
1075 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(maclo, t2); |
1076 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(t2, t2, 32);
|
1077 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(machi, t2); |
1078 | bbe418f2 | Jia Liu | tcg_temp_free_i32(t0); |
1079 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t1); |
1080 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t2); |
1081 | bbe418f2 | Jia Liu | } |
1082 | bbe418f2 | Jia Liu | break;
|
1083 | bbe418f2 | Jia Liu | |
1084 | bbe418f2 | Jia Liu | case 0x0002: /* l.msb */ |
1085 | bbe418f2 | Jia Liu | LOG_DIS("l.msb r%d, r%d\n", ra, rb);
|
1086 | bbe418f2 | Jia Liu | { |
1087 | bbe418f2 | Jia Liu | TCGv_i32 t0 = tcg_temp_new_i32(); |
1088 | bbe418f2 | Jia Liu | TCGv_i64 t1 = tcg_temp_new_i64(); |
1089 | bbe418f2 | Jia Liu | TCGv_i64 t2 = tcg_temp_new_i64(); |
1090 | bbe418f2 | Jia Liu | tcg_gen_mul_tl(t0, cpu_R[ra], cpu_R[rb]); |
1091 | bbe418f2 | Jia Liu | tcg_gen_ext_i32_i64(t1, t0); |
1092 | bbe418f2 | Jia Liu | tcg_gen_concat_i32_i64(t2, maclo, machi); |
1093 | bbe418f2 | Jia Liu | tcg_gen_sub_i64(t2, t2, t1); |
1094 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(maclo, t2); |
1095 | bbe418f2 | Jia Liu | tcg_gen_shri_i64(t2, t2, 32);
|
1096 | bbe418f2 | Jia Liu | tcg_gen_trunc_i64_i32(machi, t2); |
1097 | bbe418f2 | Jia Liu | tcg_temp_free_i32(t0); |
1098 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t1); |
1099 | bbe418f2 | Jia Liu | tcg_temp_free_i64(t2); |
1100 | bbe418f2 | Jia Liu | } |
1101 | bbe418f2 | Jia Liu | break;
|
1102 | bbe418f2 | Jia Liu | |
1103 | bbe418f2 | Jia Liu | default:
|
1104 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1105 | bbe418f2 | Jia Liu | break;
|
1106 | bbe418f2 | Jia Liu | } |
1107 | bbe418f2 | Jia Liu | } |
1108 | bbe418f2 | Jia Liu | |
1109 | bbe418f2 | Jia Liu | static void dec_logic(DisasContext *dc, uint32_t insn) |
1110 | bbe418f2 | Jia Liu | { |
1111 | bbe418f2 | Jia Liu | uint32_t op0; |
1112 | bbe418f2 | Jia Liu | uint32_t rd, ra, L6; |
1113 | bbe418f2 | Jia Liu | op0 = extract32(insn, 6, 2); |
1114 | bbe418f2 | Jia Liu | rd = extract32(insn, 21, 5); |
1115 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
1116 | bbe418f2 | Jia Liu | L6 = extract32(insn, 0, 6); |
1117 | bbe418f2 | Jia Liu | |
1118 | bbe418f2 | Jia Liu | switch (op0) {
|
1119 | bbe418f2 | Jia Liu | case 0x00: /* l.slli */ |
1120 | bbe418f2 | Jia Liu | LOG_DIS("l.slli r%d, r%d, %d\n", rd, ra, L6);
|
1121 | bbe418f2 | Jia Liu | tcg_gen_shli_tl(cpu_R[rd], cpu_R[ra], (L6 & 0x1f));
|
1122 | bbe418f2 | Jia Liu | break;
|
1123 | bbe418f2 | Jia Liu | |
1124 | bbe418f2 | Jia Liu | case 0x01: /* l.srli */ |
1125 | bbe418f2 | Jia Liu | LOG_DIS("l.srli r%d, r%d, %d\n", rd, ra, L6);
|
1126 | bbe418f2 | Jia Liu | tcg_gen_shri_tl(cpu_R[rd], cpu_R[ra], (L6 & 0x1f));
|
1127 | bbe418f2 | Jia Liu | break;
|
1128 | bbe418f2 | Jia Liu | |
1129 | bbe418f2 | Jia Liu | case 0x02: /* l.srai */ |
1130 | bbe418f2 | Jia Liu | LOG_DIS("l.srai r%d, r%d, %d\n", rd, ra, L6);
|
1131 | bbe418f2 | Jia Liu | tcg_gen_sari_tl(cpu_R[rd], cpu_R[ra], (L6 & 0x1f)); break; |
1132 | bbe418f2 | Jia Liu | |
1133 | bbe418f2 | Jia Liu | case 0x03: /* l.rori */ |
1134 | bbe418f2 | Jia Liu | LOG_DIS("l.rori r%d, r%d, %d\n", rd, ra, L6);
|
1135 | bbe418f2 | Jia Liu | tcg_gen_rotri_tl(cpu_R[rd], cpu_R[ra], (L6 & 0x1f));
|
1136 | bbe418f2 | Jia Liu | break;
|
1137 | bbe418f2 | Jia Liu | |
1138 | bbe418f2 | Jia Liu | default:
|
1139 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1140 | bbe418f2 | Jia Liu | break;
|
1141 | bbe418f2 | Jia Liu | } |
1142 | bbe418f2 | Jia Liu | } |
1143 | bbe418f2 | Jia Liu | |
1144 | bbe418f2 | Jia Liu | static void dec_M(DisasContext *dc, uint32_t insn) |
1145 | bbe418f2 | Jia Liu | { |
1146 | bbe418f2 | Jia Liu | uint32_t op0; |
1147 | bbe418f2 | Jia Liu | uint32_t rd; |
1148 | bbe418f2 | Jia Liu | uint32_t K16; |
1149 | bbe418f2 | Jia Liu | op0 = extract32(insn, 16, 1); |
1150 | bbe418f2 | Jia Liu | rd = extract32(insn, 21, 5); |
1151 | bbe418f2 | Jia Liu | K16 = extract32(insn, 0, 16); |
1152 | bbe418f2 | Jia Liu | |
1153 | bbe418f2 | Jia Liu | switch (op0) {
|
1154 | bbe418f2 | Jia Liu | case 0x0: /* l.movhi */ |
1155 | bbe418f2 | Jia Liu | LOG_DIS("l.movhi r%d, %d\n", rd, K16);
|
1156 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_R[rd], (K16 << 16));
|
1157 | bbe418f2 | Jia Liu | break;
|
1158 | bbe418f2 | Jia Liu | |
1159 | bbe418f2 | Jia Liu | case 0x1: /* l.macrc */ |
1160 | bbe418f2 | Jia Liu | LOG_DIS("l.macrc r%d\n", rd);
|
1161 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(cpu_R[rd], maclo); |
1162 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(maclo, 0x0);
|
1163 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(machi, 0x0);
|
1164 | bbe418f2 | Jia Liu | break;
|
1165 | bbe418f2 | Jia Liu | |
1166 | bbe418f2 | Jia Liu | default:
|
1167 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1168 | bbe418f2 | Jia Liu | break;
|
1169 | bbe418f2 | Jia Liu | } |
1170 | bbe418f2 | Jia Liu | } |
1171 | bbe418f2 | Jia Liu | |
1172 | bbe418f2 | Jia Liu | static void dec_comp(DisasContext *dc, uint32_t insn) |
1173 | bbe418f2 | Jia Liu | { |
1174 | bbe418f2 | Jia Liu | uint32_t op0; |
1175 | bbe418f2 | Jia Liu | uint32_t ra, rb; |
1176 | bbe418f2 | Jia Liu | |
1177 | bbe418f2 | Jia Liu | op0 = extract32(insn, 21, 5); |
1178 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
1179 | bbe418f2 | Jia Liu | rb = extract32(insn, 11, 5); |
1180 | bbe418f2 | Jia Liu | |
1181 | bbe418f2 | Jia Liu | tcg_gen_movi_i32(env_btaken, 0x0);
|
1182 | bbe418f2 | Jia Liu | /* unsigned integers */
|
1183 | bbe418f2 | Jia Liu | tcg_gen_ext32u_tl(cpu_R[ra], cpu_R[ra]); |
1184 | bbe418f2 | Jia Liu | tcg_gen_ext32u_tl(cpu_R[rb], cpu_R[rb]); |
1185 | bbe418f2 | Jia Liu | |
1186 | bbe418f2 | Jia Liu | switch (op0) {
|
1187 | bbe418f2 | Jia Liu | case 0x0: /* l.sfeq */ |
1188 | bbe418f2 | Jia Liu | LOG_DIS("l.sfeq r%d, r%d\n", ra, rb);
|
1189 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_EQ, env_btaken, cpu_R[ra], cpu_R[rb]); |
1190 | bbe418f2 | Jia Liu | break;
|
1191 | bbe418f2 | Jia Liu | |
1192 | bbe418f2 | Jia Liu | case 0x1: /* l.sfne */ |
1193 | bbe418f2 | Jia Liu | LOG_DIS("l.sfne r%d, r%d\n", ra, rb);
|
1194 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_NE, env_btaken, cpu_R[ra], cpu_R[rb]); |
1195 | bbe418f2 | Jia Liu | break;
|
1196 | bbe418f2 | Jia Liu | |
1197 | bbe418f2 | Jia Liu | case 0x2: /* l.sfgtu */ |
1198 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgtu r%d, r%d\n", ra, rb);
|
1199 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_GTU, env_btaken, cpu_R[ra], cpu_R[rb]); |
1200 | bbe418f2 | Jia Liu | break;
|
1201 | bbe418f2 | Jia Liu | |
1202 | bbe418f2 | Jia Liu | case 0x3: /* l.sfgeu */ |
1203 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgeu r%d, r%d\n", ra, rb);
|
1204 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_GEU, env_btaken, cpu_R[ra], cpu_R[rb]); |
1205 | bbe418f2 | Jia Liu | break;
|
1206 | bbe418f2 | Jia Liu | |
1207 | bbe418f2 | Jia Liu | case 0x4: /* l.sfltu */ |
1208 | bbe418f2 | Jia Liu | LOG_DIS("l.sfltu r%d, r%d\n", ra, rb);
|
1209 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_LTU, env_btaken, cpu_R[ra], cpu_R[rb]); |
1210 | bbe418f2 | Jia Liu | break;
|
1211 | bbe418f2 | Jia Liu | |
1212 | bbe418f2 | Jia Liu | case 0x5: /* l.sfleu */ |
1213 | bbe418f2 | Jia Liu | LOG_DIS("l.sfleu r%d, r%d\n", ra, rb);
|
1214 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_LEU, env_btaken, cpu_R[ra], cpu_R[rb]); |
1215 | bbe418f2 | Jia Liu | break;
|
1216 | bbe418f2 | Jia Liu | |
1217 | bbe418f2 | Jia Liu | case 0xa: /* l.sfgts */ |
1218 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgts r%d, r%d\n", ra, rb);
|
1219 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_GT, env_btaken, cpu_R[ra], cpu_R[rb]); |
1220 | bbe418f2 | Jia Liu | break;
|
1221 | bbe418f2 | Jia Liu | |
1222 | bbe418f2 | Jia Liu | case 0xb: /* l.sfges */ |
1223 | bbe418f2 | Jia Liu | LOG_DIS("l.sfges r%d, r%d\n", ra, rb);
|
1224 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_GE, env_btaken, cpu_R[ra], cpu_R[rb]); |
1225 | bbe418f2 | Jia Liu | break;
|
1226 | bbe418f2 | Jia Liu | |
1227 | bbe418f2 | Jia Liu | case 0xc: /* l.sflts */ |
1228 | bbe418f2 | Jia Liu | LOG_DIS("l.sflts r%d, r%d\n", ra, rb);
|
1229 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_LT, env_btaken, cpu_R[ra], cpu_R[rb]); |
1230 | bbe418f2 | Jia Liu | break;
|
1231 | bbe418f2 | Jia Liu | |
1232 | bbe418f2 | Jia Liu | case 0xd: /* l.sfles */ |
1233 | bbe418f2 | Jia Liu | LOG_DIS("l.sfles r%d, r%d\n", ra, rb);
|
1234 | bbe418f2 | Jia Liu | tcg_gen_setcond_tl(TCG_COND_LE, env_btaken, cpu_R[ra], cpu_R[rb]); |
1235 | bbe418f2 | Jia Liu | break;
|
1236 | bbe418f2 | Jia Liu | |
1237 | bbe418f2 | Jia Liu | default:
|
1238 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1239 | bbe418f2 | Jia Liu | break;
|
1240 | bbe418f2 | Jia Liu | } |
1241 | bbe418f2 | Jia Liu | wb_SR_F(); |
1242 | bbe418f2 | Jia Liu | } |
1243 | bbe418f2 | Jia Liu | |
1244 | bbe418f2 | Jia Liu | static void dec_compi(DisasContext *dc, uint32_t insn) |
1245 | bbe418f2 | Jia Liu | { |
1246 | bbe418f2 | Jia Liu | uint32_t op0; |
1247 | bbe418f2 | Jia Liu | uint32_t ra, I16; |
1248 | bbe418f2 | Jia Liu | |
1249 | bbe418f2 | Jia Liu | op0 = extract32(insn, 21, 5); |
1250 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
1251 | bbe418f2 | Jia Liu | I16 = extract32(insn, 0, 16); |
1252 | bbe418f2 | Jia Liu | |
1253 | bbe418f2 | Jia Liu | tcg_gen_movi_i32(env_btaken, 0x0);
|
1254 | bbe418f2 | Jia Liu | I16 = sign_extend(I16, 16);
|
1255 | bbe418f2 | Jia Liu | |
1256 | bbe418f2 | Jia Liu | switch (op0) {
|
1257 | bbe418f2 | Jia Liu | case 0x0: /* l.sfeqi */ |
1258 | bbe418f2 | Jia Liu | LOG_DIS("l.sfeqi r%d, %d\n", ra, I16);
|
1259 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_EQ, env_btaken, cpu_R[ra], I16); |
1260 | bbe418f2 | Jia Liu | break;
|
1261 | bbe418f2 | Jia Liu | |
1262 | bbe418f2 | Jia Liu | case 0x1: /* l.sfnei */ |
1263 | bbe418f2 | Jia Liu | LOG_DIS("l.sfnei r%d, %d\n", ra, I16);
|
1264 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_NE, env_btaken, cpu_R[ra], I16); |
1265 | bbe418f2 | Jia Liu | break;
|
1266 | bbe418f2 | Jia Liu | |
1267 | bbe418f2 | Jia Liu | case 0x2: /* l.sfgtui */ |
1268 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgtui r%d, %d\n", ra, I16);
|
1269 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_GTU, env_btaken, cpu_R[ra], I16); |
1270 | bbe418f2 | Jia Liu | break;
|
1271 | bbe418f2 | Jia Liu | |
1272 | bbe418f2 | Jia Liu | case 0x3: /* l.sfgeui */ |
1273 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgeui r%d, %d\n", ra, I16);
|
1274 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_GEU, env_btaken, cpu_R[ra], I16); |
1275 | bbe418f2 | Jia Liu | break;
|
1276 | bbe418f2 | Jia Liu | |
1277 | bbe418f2 | Jia Liu | case 0x4: /* l.sfltui */ |
1278 | bbe418f2 | Jia Liu | LOG_DIS("l.sfltui r%d, %d\n", ra, I16);
|
1279 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_LTU, env_btaken, cpu_R[ra], I16); |
1280 | bbe418f2 | Jia Liu | break;
|
1281 | bbe418f2 | Jia Liu | |
1282 | bbe418f2 | Jia Liu | case 0x5: /* l.sfleui */ |
1283 | bbe418f2 | Jia Liu | LOG_DIS("l.sfleui r%d, %d\n", ra, I16);
|
1284 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_LEU, env_btaken, cpu_R[ra], I16); |
1285 | bbe418f2 | Jia Liu | break;
|
1286 | bbe418f2 | Jia Liu | |
1287 | bbe418f2 | Jia Liu | case 0xa: /* l.sfgtsi */ |
1288 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgtsi r%d, %d\n", ra, I16);
|
1289 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_GT, env_btaken, cpu_R[ra], I16); |
1290 | bbe418f2 | Jia Liu | break;
|
1291 | bbe418f2 | Jia Liu | |
1292 | bbe418f2 | Jia Liu | case 0xb: /* l.sfgesi */ |
1293 | bbe418f2 | Jia Liu | LOG_DIS("l.sfgesi r%d, %d\n", ra, I16);
|
1294 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_GE, env_btaken, cpu_R[ra], I16); |
1295 | bbe418f2 | Jia Liu | break;
|
1296 | bbe418f2 | Jia Liu | |
1297 | bbe418f2 | Jia Liu | case 0xc: /* l.sfltsi */ |
1298 | bbe418f2 | Jia Liu | LOG_DIS("l.sfltsi r%d, %d\n", ra, I16);
|
1299 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_LT, env_btaken, cpu_R[ra], I16); |
1300 | bbe418f2 | Jia Liu | break;
|
1301 | bbe418f2 | Jia Liu | |
1302 | bbe418f2 | Jia Liu | case 0xd: /* l.sflesi */ |
1303 | bbe418f2 | Jia Liu | LOG_DIS("l.sflesi r%d, %d\n", ra, I16);
|
1304 | bbe418f2 | Jia Liu | tcg_gen_setcondi_tl(TCG_COND_LE, env_btaken, cpu_R[ra], I16); |
1305 | bbe418f2 | Jia Liu | break;
|
1306 | bbe418f2 | Jia Liu | |
1307 | bbe418f2 | Jia Liu | default:
|
1308 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1309 | bbe418f2 | Jia Liu | break;
|
1310 | bbe418f2 | Jia Liu | } |
1311 | bbe418f2 | Jia Liu | wb_SR_F(); |
1312 | bbe418f2 | Jia Liu | } |
1313 | bbe418f2 | Jia Liu | |
1314 | bbe418f2 | Jia Liu | static void dec_sys(DisasContext *dc, uint32_t insn) |
1315 | bbe418f2 | Jia Liu | { |
1316 | bbe418f2 | Jia Liu | uint32_t op0; |
1317 | bbe418f2 | Jia Liu | #ifdef OPENRISC_DISAS
|
1318 | bbe418f2 | Jia Liu | uint32_t K16; |
1319 | bbe418f2 | Jia Liu | #endif
|
1320 | bbe418f2 | Jia Liu | op0 = extract32(insn, 16, 8); |
1321 | bbe418f2 | Jia Liu | #ifdef OPENRISC_DISAS
|
1322 | bbe418f2 | Jia Liu | K16 = extract32(insn, 0, 16); |
1323 | bbe418f2 | Jia Liu | #endif
|
1324 | bbe418f2 | Jia Liu | |
1325 | bbe418f2 | Jia Liu | switch (op0) {
|
1326 | bbe418f2 | Jia Liu | case 0x000: /* l.sys */ |
1327 | bbe418f2 | Jia Liu | LOG_DIS("l.sys %d\n", K16);
|
1328 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
1329 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_SYSCALL); |
1330 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_UPDATE; |
1331 | bbe418f2 | Jia Liu | break;
|
1332 | bbe418f2 | Jia Liu | |
1333 | bbe418f2 | Jia Liu | case 0x100: /* l.trap */ |
1334 | bbe418f2 | Jia Liu | LOG_DIS("l.trap %d\n", K16);
|
1335 | bbe418f2 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
1336 | bbe418f2 | Jia Liu | return;
|
1337 | bbe418f2 | Jia Liu | #else
|
1338 | bbe418f2 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
1339 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1340 | bbe418f2 | Jia Liu | return;
|
1341 | bbe418f2 | Jia Liu | } |
1342 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
1343 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_TRAP); |
1344 | bbe418f2 | Jia Liu | #endif
|
1345 | bbe418f2 | Jia Liu | break;
|
1346 | bbe418f2 | Jia Liu | |
1347 | bbe418f2 | Jia Liu | case 0x300: /* l.csync */ |
1348 | bbe418f2 | Jia Liu | LOG_DIS("l.csync\n");
|
1349 | bbe418f2 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
1350 | bbe418f2 | Jia Liu | return;
|
1351 | bbe418f2 | Jia Liu | #else
|
1352 | bbe418f2 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
1353 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1354 | bbe418f2 | Jia Liu | return;
|
1355 | bbe418f2 | Jia Liu | } |
1356 | bbe418f2 | Jia Liu | #endif
|
1357 | bbe418f2 | Jia Liu | break;
|
1358 | bbe418f2 | Jia Liu | |
1359 | bbe418f2 | Jia Liu | case 0x200: /* l.msync */ |
1360 | bbe418f2 | Jia Liu | LOG_DIS("l.msync\n");
|
1361 | bbe418f2 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
1362 | bbe418f2 | Jia Liu | return;
|
1363 | bbe418f2 | Jia Liu | #else
|
1364 | bbe418f2 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
1365 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1366 | bbe418f2 | Jia Liu | return;
|
1367 | bbe418f2 | Jia Liu | } |
1368 | bbe418f2 | Jia Liu | #endif
|
1369 | bbe418f2 | Jia Liu | break;
|
1370 | bbe418f2 | Jia Liu | |
1371 | bbe418f2 | Jia Liu | case 0x270: /* l.psync */ |
1372 | bbe418f2 | Jia Liu | LOG_DIS("l.psync\n");
|
1373 | bbe418f2 | Jia Liu | #if defined(CONFIG_USER_ONLY)
|
1374 | bbe418f2 | Jia Liu | return;
|
1375 | bbe418f2 | Jia Liu | #else
|
1376 | bbe418f2 | Jia Liu | if (dc->mem_idx == MMU_USER_IDX) {
|
1377 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1378 | bbe418f2 | Jia Liu | return;
|
1379 | bbe418f2 | Jia Liu | } |
1380 | bbe418f2 | Jia Liu | #endif
|
1381 | bbe418f2 | Jia Liu | break;
|
1382 | bbe418f2 | Jia Liu | |
1383 | bbe418f2 | Jia Liu | default:
|
1384 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1385 | bbe418f2 | Jia Liu | break;
|
1386 | bbe418f2 | Jia Liu | } |
1387 | bbe418f2 | Jia Liu | } |
1388 | bbe418f2 | Jia Liu | |
1389 | bbe418f2 | Jia Liu | static void dec_float(DisasContext *dc, uint32_t insn) |
1390 | bbe418f2 | Jia Liu | { |
1391 | bbe418f2 | Jia Liu | uint32_t op0; |
1392 | bbe418f2 | Jia Liu | uint32_t ra, rb, rd; |
1393 | bbe418f2 | Jia Liu | op0 = extract32(insn, 0, 8); |
1394 | bbe418f2 | Jia Liu | ra = extract32(insn, 16, 5); |
1395 | bbe418f2 | Jia Liu | rb = extract32(insn, 11, 5); |
1396 | bbe418f2 | Jia Liu | rd = extract32(insn, 21, 5); |
1397 | bbe418f2 | Jia Liu | |
1398 | bbe418f2 | Jia Liu | switch (op0) {
|
1399 | bbe418f2 | Jia Liu | case 0x00: /* lf.add.s */ |
1400 | bbe418f2 | Jia Liu | LOG_DIS("lf.add.s r%d, r%d, r%d\n", rd, ra, rb);
|
1401 | bbe418f2 | Jia Liu | gen_helper_float_add_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1402 | bbe418f2 | Jia Liu | break;
|
1403 | bbe418f2 | Jia Liu | |
1404 | bbe418f2 | Jia Liu | case 0x01: /* lf.sub.s */ |
1405 | bbe418f2 | Jia Liu | LOG_DIS("lf.sub.s r%d, r%d, r%d\n", rd, ra, rb);
|
1406 | bbe418f2 | Jia Liu | gen_helper_float_sub_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1407 | bbe418f2 | Jia Liu | break;
|
1408 | bbe418f2 | Jia Liu | |
1409 | bbe418f2 | Jia Liu | |
1410 | bbe418f2 | Jia Liu | case 0x02: /* lf.mul.s */ |
1411 | bbe418f2 | Jia Liu | LOG_DIS("lf.mul.s r%d, r%d, r%d\n", rd, ra, rb);
|
1412 | bbe418f2 | Jia Liu | if (ra != 0 && rb != 0) { |
1413 | bbe418f2 | Jia Liu | gen_helper_float_mul_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1414 | bbe418f2 | Jia Liu | } else {
|
1415 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(fpcsr, fpcsr, FPCSR_ZF); |
1416 | bbe418f2 | Jia Liu | tcg_gen_movi_i32(cpu_R[rd], 0x0);
|
1417 | bbe418f2 | Jia Liu | } |
1418 | bbe418f2 | Jia Liu | break;
|
1419 | bbe418f2 | Jia Liu | |
1420 | bbe418f2 | Jia Liu | case 0x03: /* lf.div.s */ |
1421 | bbe418f2 | Jia Liu | LOG_DIS("lf.div.s r%d, r%d, r%d\n", rd, ra, rb);
|
1422 | bbe418f2 | Jia Liu | gen_helper_float_div_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1423 | bbe418f2 | Jia Liu | break;
|
1424 | bbe418f2 | Jia Liu | |
1425 | bbe418f2 | Jia Liu | case 0x04: /* lf.itof.s */ |
1426 | bbe418f2 | Jia Liu | LOG_DIS("lf.itof r%d, r%d\n", rd, ra);
|
1427 | bbe418f2 | Jia Liu | gen_helper_itofs(cpu_R[rd], cpu_env, cpu_R[ra]); |
1428 | bbe418f2 | Jia Liu | break;
|
1429 | bbe418f2 | Jia Liu | |
1430 | bbe418f2 | Jia Liu | case 0x05: /* lf.ftoi.s */ |
1431 | bbe418f2 | Jia Liu | LOG_DIS("lf.ftoi r%d, r%d\n", rd, ra);
|
1432 | bbe418f2 | Jia Liu | gen_helper_ftois(cpu_R[rd], cpu_env, cpu_R[ra]); |
1433 | bbe418f2 | Jia Liu | break;
|
1434 | bbe418f2 | Jia Liu | |
1435 | bbe418f2 | Jia Liu | case 0x06: /* lf.rem.s */ |
1436 | bbe418f2 | Jia Liu | LOG_DIS("lf.rem.s r%d, r%d, r%d\n", rd, ra, rb);
|
1437 | bbe418f2 | Jia Liu | gen_helper_float_rem_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1438 | bbe418f2 | Jia Liu | break;
|
1439 | bbe418f2 | Jia Liu | |
1440 | bbe418f2 | Jia Liu | case 0x07: /* lf.madd.s */ |
1441 | bbe418f2 | Jia Liu | LOG_DIS("lf.madd.s r%d, r%d, r%d\n", rd, ra, rb);
|
1442 | bbe418f2 | Jia Liu | gen_helper_float_muladd_s(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]); |
1443 | bbe418f2 | Jia Liu | break;
|
1444 | bbe418f2 | Jia Liu | |
1445 | bbe418f2 | Jia Liu | case 0x08: /* lf.sfeq.s */ |
1446 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfeq.s r%d, r%d\n", ra, rb);
|
1447 | bbe418f2 | Jia Liu | gen_helper_float_eq_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1448 | bbe418f2 | Jia Liu | break;
|
1449 | bbe418f2 | Jia Liu | |
1450 | bbe418f2 | Jia Liu | case 0x09: /* lf.sfne.s */ |
1451 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfne.s r%d, r%d\n", ra, rb);
|
1452 | bbe418f2 | Jia Liu | gen_helper_float_ne_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1453 | bbe418f2 | Jia Liu | break;
|
1454 | bbe418f2 | Jia Liu | |
1455 | bbe418f2 | Jia Liu | case 0x0a: /* lf.sfgt.s */ |
1456 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfgt.s r%d, r%d\n", ra, rb);
|
1457 | bbe418f2 | Jia Liu | gen_helper_float_gt_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1458 | bbe418f2 | Jia Liu | break;
|
1459 | bbe418f2 | Jia Liu | |
1460 | bbe418f2 | Jia Liu | case 0x0b: /* lf.sfge.s */ |
1461 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfge.s r%d, r%d\n", ra, rb);
|
1462 | bbe418f2 | Jia Liu | gen_helper_float_ge_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1463 | bbe418f2 | Jia Liu | break;
|
1464 | bbe418f2 | Jia Liu | |
1465 | bbe418f2 | Jia Liu | case 0x0c: /* lf.sflt.s */ |
1466 | bbe418f2 | Jia Liu | LOG_DIS("lf.sflt.s r%d, r%d\n", ra, rb);
|
1467 | bbe418f2 | Jia Liu | gen_helper_float_lt_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1468 | bbe418f2 | Jia Liu | break;
|
1469 | bbe418f2 | Jia Liu | |
1470 | bbe418f2 | Jia Liu | case 0x0d: /* lf.sfle.s */ |
1471 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfle.s r%d, r%d\n", ra, rb);
|
1472 | bbe418f2 | Jia Liu | gen_helper_float_le_s(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]); |
1473 | bbe418f2 | Jia Liu | break;
|
1474 | bbe418f2 | Jia Liu | |
1475 | bbe418f2 | Jia Liu | /* not used yet, open it when we need or64. */
|
1476 | bbe418f2 | Jia Liu | /*#ifdef TARGET_OPENRISC64
|
1477 | bbe418f2 | Jia Liu | case 0x10: lf.add.d
|
1478 | bbe418f2 | Jia Liu | LOG_DIS("lf.add.d r%d, r%d, r%d\n", rd, ra, rb);
|
1479 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1480 | bbe418f2 | Jia Liu | gen_helper_float_add_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1481 | bbe418f2 | Jia Liu | break;
|
1482 | bbe418f2 | Jia Liu | |
1483 | bbe418f2 | Jia Liu | case 0x11: lf.sub.d
|
1484 | bbe418f2 | Jia Liu | LOG_DIS("lf.sub.d r%d, r%d, r%d\n", rd, ra, rb);
|
1485 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1486 | bbe418f2 | Jia Liu | gen_helper_float_sub_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1487 | bbe418f2 | Jia Liu | break;
|
1488 | bbe418f2 | Jia Liu | |
1489 | bbe418f2 | Jia Liu | case 0x12: lf.mul.d
|
1490 | bbe418f2 | Jia Liu | LOG_DIS("lf.mul.d r%d, r%d, r%d\n", rd, ra, rb);
|
1491 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1492 | bbe418f2 | Jia Liu | if (ra != 0 && rb != 0) {
|
1493 | bbe418f2 | Jia Liu | gen_helper_float_mul_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1494 | bbe418f2 | Jia Liu | } else {
|
1495 | bbe418f2 | Jia Liu | tcg_gen_ori_tl(fpcsr, fpcsr, FPCSR_ZF);
|
1496 | bbe418f2 | Jia Liu | tcg_gen_movi_i64(cpu_R[rd], 0x0);
|
1497 | bbe418f2 | Jia Liu | }
|
1498 | bbe418f2 | Jia Liu | break;
|
1499 | bbe418f2 | Jia Liu | |
1500 | bbe418f2 | Jia Liu | case 0x13: lf.div.d
|
1501 | bbe418f2 | Jia Liu | LOG_DIS("lf.div.d r%d, r%d, r%d\n", rd, ra, rb);
|
1502 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1503 | bbe418f2 | Jia Liu | gen_helper_float_div_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1504 | bbe418f2 | Jia Liu | break;
|
1505 | bbe418f2 | Jia Liu | |
1506 | bbe418f2 | Jia Liu | case 0x14: lf.itof.d
|
1507 | bbe418f2 | Jia Liu | LOG_DIS("lf.itof r%d, r%d\n", rd, ra);
|
1508 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1509 | bbe418f2 | Jia Liu | gen_helper_itofd(cpu_R[rd], cpu_env, cpu_R[ra]);
|
1510 | bbe418f2 | Jia Liu | break;
|
1511 | bbe418f2 | Jia Liu | |
1512 | bbe418f2 | Jia Liu | case 0x15: lf.ftoi.d
|
1513 | bbe418f2 | Jia Liu | LOG_DIS("lf.ftoi r%d, r%d\n", rd, ra);
|
1514 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1515 | bbe418f2 | Jia Liu | gen_helper_ftoid(cpu_R[rd], cpu_env, cpu_R[ra]);
|
1516 | bbe418f2 | Jia Liu | break;
|
1517 | bbe418f2 | Jia Liu | |
1518 | bbe418f2 | Jia Liu | case 0x16: lf.rem.d
|
1519 | bbe418f2 | Jia Liu | LOG_DIS("lf.rem.d r%d, r%d, r%d\n", rd, ra, rb);
|
1520 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1521 | bbe418f2 | Jia Liu | gen_helper_float_rem_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1522 | bbe418f2 | Jia Liu | break;
|
1523 | bbe418f2 | Jia Liu | |
1524 | bbe418f2 | Jia Liu | case 0x17: lf.madd.d
|
1525 | bbe418f2 | Jia Liu | LOG_DIS("lf.madd.d r%d, r%d, r%d\n", rd, ra, rb);
|
1526 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1527 | bbe418f2 | Jia Liu | gen_helper_float_muladd_d(cpu_R[rd], cpu_env, cpu_R[ra], cpu_R[rb]);
|
1528 | bbe418f2 | Jia Liu | break;
|
1529 | bbe418f2 | Jia Liu | |
1530 | bbe418f2 | Jia Liu | case 0x18: lf.sfeq.d
|
1531 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfeq.d r%d, r%d\n", ra, rb);
|
1532 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1533 | bbe418f2 | Jia Liu | gen_helper_float_eq_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1534 | bbe418f2 | Jia Liu | break;
|
1535 | bbe418f2 | Jia Liu | |
1536 | bbe418f2 | Jia Liu | case 0x1a: lf.sfgt.d
|
1537 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfgt.d r%d, r%d\n", ra, rb);
|
1538 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1539 | bbe418f2 | Jia Liu | gen_helper_float_gt_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1540 | bbe418f2 | Jia Liu | break;
|
1541 | bbe418f2 | Jia Liu | |
1542 | bbe418f2 | Jia Liu | case 0x1b: lf.sfge.d
|
1543 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfge.d r%d, r%d\n", ra, rb);
|
1544 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1545 | bbe418f2 | Jia Liu | gen_helper_float_ge_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1546 | bbe418f2 | Jia Liu | break;
|
1547 | bbe418f2 | Jia Liu | |
1548 | bbe418f2 | Jia Liu | case 0x19: lf.sfne.d
|
1549 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfne.d r%d, r%d\n", ra, rb);
|
1550 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1551 | bbe418f2 | Jia Liu | gen_helper_float_ne_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1552 | bbe418f2 | Jia Liu | break;
|
1553 | bbe418f2 | Jia Liu | |
1554 | bbe418f2 | Jia Liu | case 0x1c: lf.sflt.d
|
1555 | bbe418f2 | Jia Liu | LOG_DIS("lf.sflt.d r%d, r%d\n", ra, rb);
|
1556 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1557 | bbe418f2 | Jia Liu | gen_helper_float_lt_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1558 | bbe418f2 | Jia Liu | break;
|
1559 | bbe418f2 | Jia Liu | |
1560 | bbe418f2 | Jia Liu | case 0x1d: lf.sfle.d
|
1561 | bbe418f2 | Jia Liu | LOG_DIS("lf.sfle.d r%d, r%d\n", ra, rb);
|
1562 | bbe418f2 | Jia Liu | check_of64s(dc);
|
1563 | bbe418f2 | Jia Liu | gen_helper_float_le_d(env_btaken, cpu_env, cpu_R[ra], cpu_R[rb]);
|
1564 | bbe418f2 | Jia Liu | break;
|
1565 | bbe418f2 | Jia Liu | #endif*/
|
1566 | bbe418f2 | Jia Liu | |
1567 | bbe418f2 | Jia Liu | default:
|
1568 | bbe418f2 | Jia Liu | gen_illegal_exception(dc); |
1569 | bbe418f2 | Jia Liu | break;
|
1570 | bbe418f2 | Jia Liu | } |
1571 | bbe418f2 | Jia Liu | wb_SR_F(); |
1572 | bbe418f2 | Jia Liu | } |
1573 | bbe418f2 | Jia Liu | |
1574 | bbe418f2 | Jia Liu | static void disas_openrisc_insn(DisasContext *dc, OpenRISCCPU *cpu) |
1575 | bbe418f2 | Jia Liu | { |
1576 | bbe418f2 | Jia Liu | uint32_t op0; |
1577 | bbe418f2 | Jia Liu | uint32_t insn; |
1578 | bbe418f2 | Jia Liu | insn = cpu_ldl_code(&cpu->env, dc->pc); |
1579 | bbe418f2 | Jia Liu | op0 = extract32(insn, 26, 6); |
1580 | bbe418f2 | Jia Liu | |
1581 | bbe418f2 | Jia Liu | switch (op0) {
|
1582 | bbe418f2 | Jia Liu | case 0x06: |
1583 | bbe418f2 | Jia Liu | dec_M(dc, insn); |
1584 | bbe418f2 | Jia Liu | break;
|
1585 | bbe418f2 | Jia Liu | |
1586 | bbe418f2 | Jia Liu | case 0x08: |
1587 | bbe418f2 | Jia Liu | dec_sys(dc, insn); |
1588 | bbe418f2 | Jia Liu | break;
|
1589 | bbe418f2 | Jia Liu | |
1590 | bbe418f2 | Jia Liu | case 0x2e: |
1591 | bbe418f2 | Jia Liu | dec_logic(dc, insn); |
1592 | bbe418f2 | Jia Liu | break;
|
1593 | bbe418f2 | Jia Liu | |
1594 | bbe418f2 | Jia Liu | case 0x2f: |
1595 | bbe418f2 | Jia Liu | dec_compi(dc, insn); |
1596 | bbe418f2 | Jia Liu | break;
|
1597 | bbe418f2 | Jia Liu | |
1598 | bbe418f2 | Jia Liu | case 0x31: |
1599 | bbe418f2 | Jia Liu | dec_mac(dc, insn); |
1600 | bbe418f2 | Jia Liu | break;
|
1601 | bbe418f2 | Jia Liu | |
1602 | bbe418f2 | Jia Liu | case 0x32: |
1603 | bbe418f2 | Jia Liu | dec_float(dc, insn); |
1604 | bbe418f2 | Jia Liu | break;
|
1605 | bbe418f2 | Jia Liu | |
1606 | bbe418f2 | Jia Liu | case 0x38: |
1607 | bbe418f2 | Jia Liu | dec_calc(dc, insn); |
1608 | bbe418f2 | Jia Liu | break;
|
1609 | bbe418f2 | Jia Liu | |
1610 | bbe418f2 | Jia Liu | case 0x39: |
1611 | bbe418f2 | Jia Liu | dec_comp(dc, insn); |
1612 | bbe418f2 | Jia Liu | break;
|
1613 | bbe418f2 | Jia Liu | |
1614 | bbe418f2 | Jia Liu | default:
|
1615 | bbe418f2 | Jia Liu | dec_misc(dc, insn); |
1616 | bbe418f2 | Jia Liu | break;
|
1617 | bbe418f2 | Jia Liu | } |
1618 | bbe418f2 | Jia Liu | } |
1619 | bbe418f2 | Jia Liu | |
1620 | bbe418f2 | Jia Liu | static void check_breakpoint(OpenRISCCPU *cpu, DisasContext *dc) |
1621 | bbe418f2 | Jia Liu | { |
1622 | bbe418f2 | Jia Liu | CPUBreakpoint *bp; |
1623 | bbe418f2 | Jia Liu | |
1624 | bbe418f2 | Jia Liu | if (unlikely(!QTAILQ_EMPTY(&cpu->env.breakpoints))) {
|
1625 | bbe418f2 | Jia Liu | QTAILQ_FOREACH(bp, &cpu->env.breakpoints, entry) { |
1626 | bbe418f2 | Jia Liu | if (bp->pc == dc->pc) {
|
1627 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
1628 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_DEBUG); |
1629 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_UPDATE; |
1630 | bbe418f2 | Jia Liu | } |
1631 | bbe418f2 | Jia Liu | } |
1632 | bbe418f2 | Jia Liu | } |
1633 | e67db06e | Jia Liu | } |
1634 | e67db06e | Jia Liu | |
1635 | e67db06e | Jia Liu | static inline void gen_intermediate_code_internal(OpenRISCCPU *cpu, |
1636 | e67db06e | Jia Liu | TranslationBlock *tb, |
1637 | e67db06e | Jia Liu | int search_pc)
|
1638 | e67db06e | Jia Liu | { |
1639 | ed2803da | Andreas Färber | CPUState *cs = CPU(cpu); |
1640 | bbe418f2 | Jia Liu | struct DisasContext ctx, *dc = &ctx;
|
1641 | bbe418f2 | Jia Liu | uint16_t *gen_opc_end; |
1642 | bbe418f2 | Jia Liu | uint32_t pc_start; |
1643 | bbe418f2 | Jia Liu | int j, k;
|
1644 | bbe418f2 | Jia Liu | uint32_t next_page_start; |
1645 | bbe418f2 | Jia Liu | int num_insns;
|
1646 | bbe418f2 | Jia Liu | int max_insns;
|
1647 | bbe418f2 | Jia Liu | |
1648 | bbe418f2 | Jia Liu | pc_start = tb->pc; |
1649 | bbe418f2 | Jia Liu | dc->tb = tb; |
1650 | bbe418f2 | Jia Liu | |
1651 | 92414b31 | Evgeny Voevodin | gen_opc_end = tcg_ctx.gen_opc_buf + OPC_MAX_SIZE; |
1652 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_NEXT; |
1653 | bbe418f2 | Jia Liu | dc->ppc = pc_start; |
1654 | bbe418f2 | Jia Liu | dc->pc = pc_start; |
1655 | bbe418f2 | Jia Liu | dc->flags = cpu->env.cpucfgr; |
1656 | bbe418f2 | Jia Liu | dc->mem_idx = cpu_mmu_index(&cpu->env); |
1657 | bbe418f2 | Jia Liu | dc->synced_flags = dc->tb_flags = tb->flags; |
1658 | bbe418f2 | Jia Liu | dc->delayed_branch = !!(dc->tb_flags & D_FLAG); |
1659 | ed2803da | Andreas Färber | dc->singlestep_enabled = cs->singlestep_enabled; |
1660 | bbe418f2 | Jia Liu | if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
|
1661 | bbe418f2 | Jia Liu | qemu_log("-----------------------------------------\n");
|
1662 | a0762859 | Andreas Färber | log_cpu_state(CPU(cpu), 0);
|
1663 | bbe418f2 | Jia Liu | } |
1664 | bbe418f2 | Jia Liu | |
1665 | bbe418f2 | Jia Liu | next_page_start = (pc_start & TARGET_PAGE_MASK) + TARGET_PAGE_SIZE; |
1666 | bbe418f2 | Jia Liu | k = -1;
|
1667 | bbe418f2 | Jia Liu | num_insns = 0;
|
1668 | bbe418f2 | Jia Liu | max_insns = tb->cflags & CF_COUNT_MASK; |
1669 | bbe418f2 | Jia Liu | |
1670 | bbe418f2 | Jia Liu | if (max_insns == 0) { |
1671 | bbe418f2 | Jia Liu | max_insns = CF_COUNT_MASK; |
1672 | bbe418f2 | Jia Liu | } |
1673 | bbe418f2 | Jia Liu | |
1674 | 806f352d | Peter Maydell | gen_tb_start(); |
1675 | bbe418f2 | Jia Liu | |
1676 | bbe418f2 | Jia Liu | do {
|
1677 | bbe418f2 | Jia Liu | check_breakpoint(cpu, dc); |
1678 | bbe418f2 | Jia Liu | if (search_pc) {
|
1679 | 92414b31 | Evgeny Voevodin | j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; |
1680 | bbe418f2 | Jia Liu | if (k < j) {
|
1681 | bbe418f2 | Jia Liu | k++; |
1682 | bbe418f2 | Jia Liu | while (k < j) {
|
1683 | ab1103de | Evgeny Voevodin | tcg_ctx.gen_opc_instr_start[k++] = 0;
|
1684 | bbe418f2 | Jia Liu | } |
1685 | bbe418f2 | Jia Liu | } |
1686 | 25983cad | Evgeny Voevodin | tcg_ctx.gen_opc_pc[k] = dc->pc; |
1687 | ab1103de | Evgeny Voevodin | tcg_ctx.gen_opc_instr_start[k] = 1;
|
1688 | c9c99c22 | Evgeny Voevodin | tcg_ctx.gen_opc_icount[k] = num_insns; |
1689 | bbe418f2 | Jia Liu | } |
1690 | bbe418f2 | Jia Liu | |
1691 | fdefe51c | Richard Henderson | if (unlikely(qemu_loglevel_mask(CPU_LOG_TB_OP | CPU_LOG_TB_OP_OPT))) {
|
1692 | bbe418f2 | Jia Liu | tcg_gen_debug_insn_start(dc->pc); |
1693 | bbe418f2 | Jia Liu | } |
1694 | bbe418f2 | Jia Liu | |
1695 | bbe418f2 | Jia Liu | if (num_insns + 1 == max_insns && (tb->cflags & CF_LAST_IO)) { |
1696 | bbe418f2 | Jia Liu | gen_io_start(); |
1697 | bbe418f2 | Jia Liu | } |
1698 | bbe418f2 | Jia Liu | dc->ppc = dc->pc - 4;
|
1699 | bbe418f2 | Jia Liu | dc->npc = dc->pc + 4;
|
1700 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_ppc, dc->ppc); |
1701 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_npc, dc->npc); |
1702 | bbe418f2 | Jia Liu | disas_openrisc_insn(dc, cpu); |
1703 | bbe418f2 | Jia Liu | dc->pc = dc->npc; |
1704 | bbe418f2 | Jia Liu | num_insns++; |
1705 | bbe418f2 | Jia Liu | /* delay slot */
|
1706 | bbe418f2 | Jia Liu | if (dc->delayed_branch) {
|
1707 | bbe418f2 | Jia Liu | dc->delayed_branch--; |
1708 | bbe418f2 | Jia Liu | if (!dc->delayed_branch) {
|
1709 | bbe418f2 | Jia Liu | dc->tb_flags &= ~D_FLAG; |
1710 | bbe418f2 | Jia Liu | gen_sync_flags(dc); |
1711 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(cpu_pc, jmp_pc); |
1712 | bbe418f2 | Jia Liu | tcg_gen_mov_tl(cpu_npc, jmp_pc); |
1713 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(jmp_pc, 0);
|
1714 | bbe418f2 | Jia Liu | tcg_gen_exit_tb(0);
|
1715 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_JUMP; |
1716 | bbe418f2 | Jia Liu | break;
|
1717 | bbe418f2 | Jia Liu | } |
1718 | bbe418f2 | Jia Liu | } |
1719 | bbe418f2 | Jia Liu | } while (!dc->is_jmp
|
1720 | efd7f486 | Evgeny Voevodin | && tcg_ctx.gen_opc_ptr < gen_opc_end |
1721 | ed2803da | Andreas Färber | && !cs->singlestep_enabled |
1722 | bbe418f2 | Jia Liu | && !singlestep |
1723 | bbe418f2 | Jia Liu | && (dc->pc < next_page_start) |
1724 | bbe418f2 | Jia Liu | && num_insns < max_insns); |
1725 | bbe418f2 | Jia Liu | |
1726 | bbe418f2 | Jia Liu | if (tb->cflags & CF_LAST_IO) {
|
1727 | bbe418f2 | Jia Liu | gen_io_end(); |
1728 | bbe418f2 | Jia Liu | } |
1729 | bbe418f2 | Jia Liu | if (dc->is_jmp == DISAS_NEXT) {
|
1730 | bbe418f2 | Jia Liu | dc->is_jmp = DISAS_UPDATE; |
1731 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
1732 | bbe418f2 | Jia Liu | } |
1733 | ed2803da | Andreas Färber | if (unlikely(cs->singlestep_enabled)) {
|
1734 | bbe418f2 | Jia Liu | if (dc->is_jmp == DISAS_NEXT) {
|
1735 | bbe418f2 | Jia Liu | tcg_gen_movi_tl(cpu_pc, dc->pc); |
1736 | bbe418f2 | Jia Liu | } |
1737 | bbe418f2 | Jia Liu | gen_exception(dc, EXCP_DEBUG); |
1738 | bbe418f2 | Jia Liu | } else {
|
1739 | bbe418f2 | Jia Liu | switch (dc->is_jmp) {
|
1740 | bbe418f2 | Jia Liu | case DISAS_NEXT:
|
1741 | bbe418f2 | Jia Liu | gen_goto_tb(dc, 0, dc->pc);
|
1742 | bbe418f2 | Jia Liu | break;
|
1743 | bbe418f2 | Jia Liu | default:
|
1744 | bbe418f2 | Jia Liu | case DISAS_JUMP:
|
1745 | bbe418f2 | Jia Liu | break;
|
1746 | bbe418f2 | Jia Liu | case DISAS_UPDATE:
|
1747 | bbe418f2 | Jia Liu | /* indicate that the hash table must be used
|
1748 | bbe418f2 | Jia Liu | to find the next TB */
|
1749 | bbe418f2 | Jia Liu | tcg_gen_exit_tb(0);
|
1750 | bbe418f2 | Jia Liu | break;
|
1751 | bbe418f2 | Jia Liu | case DISAS_TB_JUMP:
|
1752 | bbe418f2 | Jia Liu | /* nothing more to generate */
|
1753 | bbe418f2 | Jia Liu | break;
|
1754 | bbe418f2 | Jia Liu | } |
1755 | bbe418f2 | Jia Liu | } |
1756 | bbe418f2 | Jia Liu | |
1757 | 806f352d | Peter Maydell | gen_tb_end(tb, num_insns); |
1758 | efd7f486 | Evgeny Voevodin | *tcg_ctx.gen_opc_ptr = INDEX_op_end; |
1759 | bbe418f2 | Jia Liu | if (search_pc) {
|
1760 | 92414b31 | Evgeny Voevodin | j = tcg_ctx.gen_opc_ptr - tcg_ctx.gen_opc_buf; |
1761 | bbe418f2 | Jia Liu | k++; |
1762 | bbe418f2 | Jia Liu | while (k <= j) {
|
1763 | ab1103de | Evgeny Voevodin | tcg_ctx.gen_opc_instr_start[k++] = 0;
|
1764 | bbe418f2 | Jia Liu | } |
1765 | bbe418f2 | Jia Liu | } else {
|
1766 | bbe418f2 | Jia Liu | tb->size = dc->pc - pc_start; |
1767 | bbe418f2 | Jia Liu | tb->icount = num_insns; |
1768 | bbe418f2 | Jia Liu | } |
1769 | bbe418f2 | Jia Liu | |
1770 | bbe418f2 | Jia Liu | #ifdef DEBUG_DISAS
|
1771 | bbe418f2 | Jia Liu | if (qemu_loglevel_mask(CPU_LOG_TB_IN_ASM)) {
|
1772 | bbe418f2 | Jia Liu | qemu_log("\n");
|
1773 | f4359b9f | Blue Swirl | log_target_disas(&cpu->env, pc_start, dc->pc - pc_start, 0);
|
1774 | bbe418f2 | Jia Liu | qemu_log("\nisize=%d osize=%td\n",
|
1775 | 92414b31 | Evgeny Voevodin | dc->pc - pc_start, tcg_ctx.gen_opc_ptr - |
1776 | 92414b31 | Evgeny Voevodin | tcg_ctx.gen_opc_buf); |
1777 | bbe418f2 | Jia Liu | } |
1778 | bbe418f2 | Jia Liu | #endif
|
1779 | e67db06e | Jia Liu | } |
1780 | e67db06e | Jia Liu | |
1781 | e67db06e | Jia Liu | void gen_intermediate_code(CPUOpenRISCState *env, struct TranslationBlock *tb) |
1782 | e67db06e | Jia Liu | { |
1783 | e67db06e | Jia Liu | gen_intermediate_code_internal(openrisc_env_get_cpu(env), tb, 0);
|
1784 | e67db06e | Jia Liu | } |
1785 | e67db06e | Jia Liu | |
1786 | e67db06e | Jia Liu | void gen_intermediate_code_pc(CPUOpenRISCState *env,
|
1787 | e67db06e | Jia Liu | struct TranslationBlock *tb)
|
1788 | e67db06e | Jia Liu | { |
1789 | e67db06e | Jia Liu | gen_intermediate_code_internal(openrisc_env_get_cpu(env), tb, 1);
|
1790 | e67db06e | Jia Liu | } |
1791 | e67db06e | Jia Liu | |
1792 | 878096ee | Andreas Färber | void openrisc_cpu_dump_state(CPUState *cs, FILE *f,
|
1793 | 878096ee | Andreas Färber | fprintf_function cpu_fprintf, |
1794 | 878096ee | Andreas Färber | int flags)
|
1795 | e67db06e | Jia Liu | { |
1796 | 878096ee | Andreas Färber | OpenRISCCPU *cpu = OPENRISC_CPU(cs); |
1797 | 878096ee | Andreas Färber | CPUOpenRISCState *env = &cpu->env; |
1798 | e67db06e | Jia Liu | int i;
|
1799 | 878096ee | Andreas Färber | |
1800 | e67db06e | Jia Liu | cpu_fprintf(f, "PC=%08x\n", env->pc);
|
1801 | e67db06e | Jia Liu | for (i = 0; i < 32; ++i) { |
1802 | 878096ee | Andreas Färber | cpu_fprintf(f, "R%02d=%08x%c", i, env->gpr[i],
|
1803 | e67db06e | Jia Liu | (i % 4) == 3 ? '\n' : ' '); |
1804 | e67db06e | Jia Liu | } |
1805 | e67db06e | Jia Liu | } |
1806 | e67db06e | Jia Liu | |
1807 | e67db06e | Jia Liu | void restore_state_to_opc(CPUOpenRISCState *env, TranslationBlock *tb,
|
1808 | e67db06e | Jia Liu | int pc_pos)
|
1809 | e67db06e | Jia Liu | { |
1810 | 25983cad | Evgeny Voevodin | env->pc = tcg_ctx.gen_opc_pc[pc_pos]; |
1811 | e67db06e | Jia Liu | } |