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pseries: Add tracepoints to the XICS interrupt controller
This patch adds tracing / debugging calls to the XICS interrupt controllerimplementation used on the pseries machine.
Signed-off-by: Ben Herrenschmidt <benh@kernel.crashing.org>Signed-off-by: David Gibson <david@gibson.dropbear.id.au>...
pseries: Split xics irq configuration from state information
Currently the XICS irq controller code has a per-irq state structure whichamongst other things includes whether the interrupt is level or messagetriggered - this is configured by the platform code, and is not directly...
pseries: Fix incorrect initialization of interrupt controller
Currently in the reset code for the XICS interrupt controller, weinitialize the pending_priority field to 0 (most favored, by XICSconvention). This is incorrect, since there is no pending interrupt, it...
pseries: Use #define for XICS base irq number
Currently the lowest "real" irq number for the XICS irq controller (asopposed to numbers reserved for IPIs and other special purposes) ishard coded as 16 in two places - in xics_system_init() and in spapr.c....
Merge remote-tracking branch 'afaerber/qom-cpu' into staging
pseries: Clean up inconsistent variable name in xics.c
Throughout xics.c 'nr' is used to refer to a global interrupt number, and'server' is used to refer to an interrupt server number (i.e. CPU number).Except in icp_set_mfrr(), where 'nr' is used as a server number. Fix this...
pseries: Cleanup duplications of ics_valid_irq() code
A couple of places in xics.c open-coded the same logic as is alreadyimplemented in ics_valid_irq(). This patch fixes the code duplication.
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>Signed-off-by: Alexander Graf <agraf@suse.de>
spapr: Pass PowerPCCPU to hypercalls
Needed for changing cpu_has_work() argument type to CPUState,used in h_cede().
Signed-off-by: Andreas Färber <afaerber@suse.de>
pseries: Remove XICS irq type enum type
Currently the XICS interrupt controller emulation uses a custom enum tospecify whether a given interrupt is level-sensitive or message-triggered.This enum makes life awkward for saving the state, and isn't particularly...
pseries: Fix semantics of RTAS int-on, int-off and set-xive functions
Currently the ibm,int-on and ibm,int-off RTAS functions are implemented asno-ops. This is because when implemented as specified in PAPR they causedLinux (which calls both int-on/off and set-xive) to end up with interrupts...
pseries: Fix XICS reset
The XICS interrupt controller used on the pseries machine currently has noreset handler. We can get away with this under some circumstances, butit's not correct, and can cause failures if the XICS happens to be in thewrong state at the time of reset....
pseries: Remove C bitfields from xics code
The XICS interrupt controller emulation uses some C bitfield variables inits internal state structure. This makes like awkward for saving the statebecause we don't have easy VMSTATE helpers for bitfields.
This patch removes the bitfields, instead using explicit bit masking in a...
pseries: Rework irq assignment to avoid carrying qemu_irqs around
Currently, the interfaces in the pseries machine code for assignmentand setup of interrupts pass around qemu_irq objects. That was donein an attempt not to be too closely linked to the specific XICS...
pseries: Add support for level interrupts to XICS
The pseries "xics" interrupt controller, like most interruptcontrollers can support both message (i.e. edge sensitive) interruptsand level sensitive interrupts, but it needs to know which are which.
When I implemented the xics emulation for qemu, the only devices we...
ppc hw/: Don't use CPUState
Scripted conversion: for file in hw/ppc*.[hc] hw/mpc8544_guts.c hw/spapr*.[hc] hw/virtex_ml507.c hw/xics.c; do sed -i "s/CPUState/CPUPPCState/g" $file done
Signed-off-by: Andreas Färber <afaerber@suse.de>Acked-by: Anthony Liguori <aliguori@us.ibm.com>
pseries: Bugfixes for interrupt numbering in XICS code
The implementation of the XICS interrupt controller contains several(difficult to trigger) bugs due to the fact that we were not 100%consistent with which irq numbering we used. In most places, global...
Drop unneeded pthread.h inclusions
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>Signed-off-by: Stefan Hajnoczi <stefanha@linux.vnet.ibm.com>
Use glib memory allocation and free functions
qemu_malloc/qemu_free no longer exist after this commit.
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
pseries: Abolish envs array
Currently the pseries machine init code builds up an array, envs, ofCPUState pointers for all the cpus in the system. This is kind ofpointless, given the generic code already has a perfectly good linked listof the cpus.
In addition, there are a number of places which assume that the cpu's...
Implement the PAPR (pSeries) virtualized interrupt controller (xics)
PAPR defines an interrupt control architecture which is logically dividedinto ICS (Interrupt Control Presentation, each unit is responsible forpresenting interrupts to a particular "interrupt server", i.e. CPU) and...