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root / target-arm @ 3a554c0f

Name Size
cpu.h 14.2 kB
exec.h 1.6 kB
helper.c 71.4 kB
helpers.h 16 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 34.2 kB
op_addsub.h 1.8 kB
op_helper.c 10.9 kB
translate.c 303.4 kB

Latest revisions

# Date Author Comment
a6445c52 10/18/2009 12:52 am Filip Navara

target-arm: convert gen_lookup_tb not to use cpu_T

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
19457615 10/18/2009 12:52 am Filip Navara

target-arm: convert NEON VZIP/VUZP/VTRN helper functions to pure TCG

The neon_trn_u8, neon_trn_u16, neon_unzip_u8, neon_zip_u8 and neon_zip_u16
helpers used fixed registers to return values. This patch replaces that with
TCG code, so T0/T1 is no longer directly used by the helper functions....
15bb4eac 10/18/2009 12:52 am Filip Navara

target-arm: fix TANDC and TORC instructions

Uninitialized register was used instead of proper TCG variable.

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
396e467c 10/18/2009 12:52 am Filip Navara

target-arm: replace thumb usage of cpu_T registers by proper register allocations

The goal is eventually to get rid of all cpu_T register usage and to use
just short-lived tmp/tmp2 registers. This patch converts all the places where
cpu_T was used in the Thumb code and replaces it with explicit TCG register...
3174f8e9 10/18/2009 12:52 am Filip Navara

target-arm: convert rest of disas_arm_insn / disas_thumb2_insn not to use cpu_T

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
dd8fbd78 10/18/2009 12:52 am Filip Navara

target-arm: convert disas_neon_data_insn and helpers not to use cpu_T

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
1b2b1e54 10/18/2009 12:52 am Filip Navara

target-arm: convert disas_neon_ls_insn not to use cpu_T

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
3a554c0f 10/18/2009 12:52 am Filip Navara

target-arm: convert disas_dsp_insn not use cpu_T

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>
c67b6b71 10/18/2009 12:52 am Filip Navara

target-arm: fix SRS/RFE instructions

The encoding of 'IA' and 'DB' conditions was swapped.
SRS instruction must store banked SPSR instead of CPSR at the specific address.
Missing 'return' statement at the end of RFE handling.
Fixed write-back code to reference correct registers....
2fbac54b 10/18/2009 12:52 am Filip Navara

target-arm: get rid of gen_set_psr_T0 and replace it by gen_set_psr/gen_set_psr_im

Signed-off-by: Filip Navara <>
Signed-off-by: Aurelien Jarno <>

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