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root / target-arm @ 46eece9d

Name Size
cpu.h 16.8 kB
exec.h 1.6 kB
helper.c 74.6 kB
helpers.h 16.1 kB
iwmmxt_helper.c 24.7 kB
machine.c 6.6 kB
neon_helper.c 35.9 kB
op_addsub.h 1.8 kB
op_helper.c 10.5 kB
translate.c 316.5 kB

Latest revisions

# Date Author Comment
46eece9d 01/29/2011 04:16 pm Juha Riihimäki

target-arm: Fix Neon VQDMULH.S16 instructions

Correct an error in the implementation of the 16 bit
forms of VQDMULH, bringing them into line with the
32 bit implementation.

Signed-off-by: Juha Riihimäki <>
Reviewed-by: Peter Maydell <>...
40d3c433 01/26/2011 03:30 pm Christophe Lyon

Support saturation with shift=0.

This patch fixes corner-case saturations, when the target range is
zero. It merely removes the guard against (sh == 0), and makes:
_ssat(0x87654321, 1) return 0xffffffff and set the saturation flag
_usat(0x87654321, 0) return 0 and set the saturation flag...
c6067f04 01/26/2011 03:30 pm Christophe Lyon

target-arm: Fix garbage collection of temporaries in Neon emulation.

Fix garbage collection of temporaries in Neon emulation.

Signed-off-by: Christophe Lyon <>
Reviewed-by: Peter Maydell <>
Signed-off-by: Aurelien Jarno <>
0fad6efc 01/26/2011 03:30 pm Peter Maydell

target-arm: Fix loading of scalar value for Neon multiply-by-scalar

Fix the register and part of register we get the scalar from in
the various "multiply vector by scalar" ops (VMUL by scalar
and friends).

Signed-off-by: Peter Maydell <>...
5642463a 01/18/2011 04:23 pm Peter Maydell

target-arm: Log instruction start in TCG code

Add support for logging the start of instructions in TCG
code debug dumps for ARM targets.

Signed-off-by: Peter Maydell <>
Signed-off-by: Edgar E. Iglesias <>
05ed9a99 01/14/2011 09:39 pm Peter Maydell

target-arm: Set privileged bit in TB flags correctly for M profile

M profile ARM cores don't have a CPSR mode field. Set the bit in the
TB flags that indicates non-user mode correctly for these cores.

Signed-off-by: Peter Maydell <>...
61f74d6a 01/14/2011 09:39 pm Peter Maydell

target-arm: Translate with user-state from TB flags, not CPUState

When translating, get the user/priv state from the TB flags, not
the CPUState.

Signed-off-by: Peter Maydell <>
Reviewed-by: Aurelien Jarno <>
Signed-off-by: Aurelien Jarno <>
5de3a9d3 01/14/2011 09:39 pm Peter Maydell

target-arm: Remove redundant setting of IT bits before Thumb SWI

Remove a redundant call to gen_set_condexec() in the translation of Thumb
mode SWI. (SWI and WFI generate "exceptions" which happen after the
execution of the instruction, ie when PC and IT bits have updated....
bc4a0de0 01/14/2011 09:39 pm Peter Maydell

target-arm: Refactor translation of exception generating instructions

Create a new function which does the common sequence of gen_set_condexec,
gen_set_pc_im, gen_exception, set is_jmp to DISAS_JUMP.

Signed-off-by: Peter Maydell <>...
e12ce78d 01/14/2011 09:39 pm Peter Maydell

target-arm: Restore IT bits when resuming after an exception

We were not correctly restoring the IT bits when resuming execution
after taking an unexpected exception in the middle of an IT block.
Fix this by tracking them along with PC changes and restoring in...

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