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Replace gcc variadic macro extension with C99 version
Signed-off-by: Blue Swirl <blauwirbel@gmail.com>
target-mips: proper sign extension for 'SUBU rd, zero, rt'
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
target-mips: fix comments about SUB/DSUB
qemu: introduce qemu_init_vcpu (Marcelo Tosatti)
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7242 c046a42c-6fe2-441c-8c8c-71466251a162
Enable access to SYNCI_Step register in usermode emulation.
Signed-off-by: Paul Brook <paul@codesourcery.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7191 c046a42c-6fe2-441c-8c8c-71466251a162
Revert "target-mips: fix call to check_*() functions"
This reverts commit r7127, r7132 is a better fix for that.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7133 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: simplify exception generation
There is no need to exit the tb after a call to helper_raise_exceptionas it already calls cpu_loop_exit().
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7132 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix revision r7126
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7128 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix call to check_*() functions
check_*() functions may in fine call generate_exception(), which endsby a call to tcg_gen_exit_tb(). As a consequence, we have to make surethat no TCG temp variables are crossing a check_*() function.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
target-mips: optimize gen_flt3_ldst()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7126 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_flt_ldst()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7125 c046a42c-6fe2-441c-8c8c-71466251a162
Stop translation after a syscall instruciton.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7124 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: mark zero register as unused.
Suggested by Stuart Brady.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7107 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: variable names consistency
Use a consistent naming of arguments and TCG variables across the wholefile, the same as in tcg/tcg-op.h:- arg1, arg2, ... for arguments- t0, t1, t2, ... for variables
target-mips: fix commits 7040 and 7042
CPU state should also be saved for helpers that in fine callcpu_unlink_tb(). Reported by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7096 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix commit 7046
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7095 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: don't map zero register as a TCG global
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7094 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_ldst()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7093 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_arith_imm()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7092 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix commit r7076
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7078 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_movcf_d()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7077 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize a few tcg_temp_free()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7076 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_farith()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7046 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_flt3_arith()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7045 c046a42c-6fe2-441c-8c8c-71466251a162
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7044 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_arith()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7043 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize decode_opc()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7042 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_cp1()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7041 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_cp0()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@7040 c046a42c-6fe2-441c-8c8c-71466251a162
Add new command line option -singlestep for tcg single stepping.
This replaces a compile time option for some targets and addsthis feature to targets which did not have a compile time option.
Add monitor command to enable or disable single step mode.
Modify monitor command "info status" to display single step mode....
target-mips: optimize gen_movcf_*()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6957 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_movci()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6956 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_compute_branch1()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6955 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: don't map FP registers as TCG global variables
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6950 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix divu instruction
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6949 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize write to env->hflags
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6941 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_muldiv()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6940 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_HILO()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6938 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_trap()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6937 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_compute_branch()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6936 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: don't mix result and arguments in gen_op_*
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6935 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: gen_bshfl()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6934 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_mul_vr54xx()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6933 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_cl()
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6932 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix FPU in 64-bit mode
TCG does not allow the same memory location to be aliased in twodifferent global registers, fpu_fpr32 and fpu_fpr64.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6915 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: use nor instead of or + not
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6801 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize mflo and mfhi
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6794 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: rename helpers from do_ to helper_
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6773 c046a42c-6fe2-441c-8c8c-71466251a162
targets: remove error handling from qemu_malloc() callers (Avi Kivity)
Signed-off-by: Avi Kivity <avi@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6530 c046a42c-6fe2-441c-8c8c-71466251a162
Log reset events (Jan Kiszka)
Original idea&code by Kevin Wolf, split-up in two patches and added morearchs.
This patch introduces a flag to log CPU resets. Useful for tracingunexpected resets (such as those triggered by x86 triple faults).
Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>...
global s/loglevel & X/qemu_loglevel_mask(X)/ (Eduardo Habkost)
These are references to 'loglevel' that aren't on a simple 'if (loglevel &X) qemu_log()' statement.
Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>...
Convert references to logfile/loglevel to use qemu_log*() macros
This is a large patch that changes all occurrences of logfile/loglevelglobal variables to use the new qemu_log*() macros.
Clean up debugging code #ifdefs (Eduardo Habkost)
Use macros to avoid #ifdefs on debugging code.
This patch doesn't try to merge logging macros from different files,but just unify the debugging code #ifdefs onto a macro on each file. Afurther cleanup can unify the debugging macros on a common header, later...
target-mips: optimize some gpr accesses
Optimize gpr accesses when it is known at translation time that gpr != 0.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6307 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix indentation
Remove all tabs from target-mips/*
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6306 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: get rid of tests on env->user_mode_only
Replace runtime checks on env->user_mode_only by compile timechecks on CONFIG_USER_ONLY.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@6276 c046a42c-6fe2-441c-8c8c-71466251a162
Update FSF address in GPL/LGPL boilerplate
The attached patch updates the FSF address in the GPL/LGPL boilerplatein most GPL/LGPLed files, and also in COPYING.LIB.
Signed-off-by: Stuart Brady <stuart.brady@gmail.com>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>...
Use sys-queue.h for break/watchpoint managment (Jan Kiszka)
This switches cpu_break/watchpoint_* to TAILQ wrappers, simplifying thecode and also fixing a use after release issue incpu_break/watchpoint_remove_all.
Refactor and enhance break/watchpoint API (Jan Kiszka)
This patch prepares the QEMU cpu_watchpoint/breakpoint API to allow thesucceeding enhancements this series comes with.
First of all, it overcomes MAX_BREAKPOINTS/MAX_WATCHPOINTS by switchingto dynamically allocated data structures that are kept in linked lists....
TCG variable type checking.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5729 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: avoid tcg internal error in mfc0/dmfc0
Set t0 to 0 for unimplemented mfc0/dmfc0 instructions. This fixes a tcginternal error while booting mips linux.
Noticed by Julia Longtin.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5723 c046a42c-6fe2-441c-8c8c-71466251a162
Revert commits 5685 to 5688 committed by mistake
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5691 c046a42c-6fe2-441c-8c8c-71466251a162
Don't stop translation for mtc0 compare
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5686 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: gen_compute_branch1()
Optimize code generation in gen_compute_branch1():- Directly use I32 variables instead of converting values from _tl to _i32 and back to _tl.- Write the result directly to bcond instead of passing by a local variable....
target-mips: optimize movc*()
Optimize code generation in gen_movc*():- Temp variables are valid up to and including the brcond instruction. Use them instead of temp local variables.- Avoid using temporary variables to transfer values.- Access fpu_fcr31 directly in gen_movcf_ps()....
Optimize code generation in gen_farith():- Temp variables are valid up to and including the brcond instruction. Use them instead of temp local variables.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5682 c046a42c-6fe2-441c-8c8c-71466251a162
Optimize code generation in gen_muldiv():- Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE).- Access the LO, HI registers directly instead of writting them through...
target-mips: optimize gen_arith()/gen_arith_imm()
Optimize code generation in gen_arith()/gen_arith_imm():- Don't do sign extension when the value is already guaranteed to be sign extended (otherwise, results are marked as UNPREDICTABLE).- When the value is sign extended, compare the value to 0 instead of...
target-mips: convert bit shuffle ops to TCG
Bit shuffle operations can be written with very few TCG instructions(between 5 and 8), so it is worth converting them to TCG.
This code also move all bit shuffle generation code to a separatefunction in order to have a cleaner exception code path, that is it...
target-mips: convert bitfield ops to TCG
Bitfield operations can be written with very few TCG instructions(between 2 and 5), so it is worth converting them to TCG.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5678 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_op_addr_add() (2/2)
Instead of dynamically generating different code depending on the UXflag, add a new flag in ctx->flags to generate different code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5677 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_op_addr_add() (1/2)
The user mode can be tested at translation time using ctx->hflags.This simplifies gen_op_addr_add().
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5676 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: optimize gen_save_pc()
We obviously don't need to use a temporary variable to write PC.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5675 c046a42c-6fe2-441c-8c8c-71466251a162
target-mips: fix mft* helpers/call
This patch attempts to fix mft* helpers and the associated TCG calls.mft* helpers do not take a register in argument, however:- some helpers are called with an argument while they do not take one.- some helpers are declared with an argument they don't use....
target-mips: fix temporary variable freeing in op_ldst_##insn()
Move tcg_temp_free() out of the conditional part to make surethe TCG temporary variable is freed in all cases.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Acked-by: Thiemo Seufer <ths@networkno.de>...
target-mips: use the new rotr/rotri instructions
Acked-by: Thiemo Seufer <ths@networkno.de>Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5622 c046a42c-6fe2-441c-8c8c-71466251a162
Use concet TCG instructions in the MIPS target.
Signed-off-by: Thiemo Seufer <ths@networkno.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5303 c046a42c-6fe2-441c-8c8c-71466251a162
Add concat_i32_i64 op.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5280 c046a42c-6fe2-441c-8c8c-71466251a162
Use TCG registers for most CPU register accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5253 c046a42c-6fe2-441c-8c8c-71466251a162
Move the active FPU registers into env again, and use more TCG registersto access them.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5252 c046a42c-6fe2-441c-8c8c-71466251a162
TCG fixes for target-mips
This patch fixes TCG errors reported on the MIPS target when TCG_DEBUGis enabled.
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>Acked-by: Thiemo Seufer <ths@networkno.de>
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5164 c046a42c-6fe2-441c-8c8c-71466251a162
MIPS: don't free TCG temporary variable twice
In gen_dmtc0 function, TCG temporary variable t0 is freed at the end ofthe function. Variable is freed again in the gen_dmtc0 caller.I removed the free in gen_dmtc0, to do like in gen_dmfc0, gen_mfc0,gen_mtc0....
Delete unused variable.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4981 c046a42c-6fe2-441c-8c8c-71466251a162
Less hardcoding of TARGET_USER_ONLY.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4928 c046a42c-6fe2-441c-8c8c-71466251a162
A bunch of minor code improvements in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4921 c046a42c-6fe2-441c-8c8c-71466251a162
Fix logging output for MIPS HI, LO registers, by Stefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4916 c046a42c-6fe2-441c-8c8c-71466251a162
Simplify conditional FP moves.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4913 c046a42c-6fe2-441c-8c8c-71466251a162
Small cleanup of gen_intermediate_code(_internal), by Laurent Desnogues.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4891 c046a42c-6fe2-441c-8c8c-71466251a162
Use temporary registers for the MIPS FPU emulation.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4861 c046a42c-6fe2-441c-8c8c-71466251a162
Fix typo in comment.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4852 c046a42c-6fe2-441c-8c8c-71466251a162
Static'ify some functions, and use standard inline in translate.c.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4813 c046a42c-6fe2-441c-8c8c-71466251a162
Delete duplicate code.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4811 c046a42c-6fe2-441c-8c8c-71466251a162
Spelling fixes, spotted by Stuart Brady.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4809 c046a42c-6fe2-441c-8c8c-71466251a162
Make bcond and btarget TCG registers.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4805 c046a42c-6fe2-441c-8c8c-71466251a162
Remove unnecessary helper arguments, and fix some typos.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4802 c046a42c-6fe2-441c-8c8c-71466251a162
Add missing file. Fix spelling errors.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4800 c046a42c-6fe2-441c-8c8c-71466251a162
Add instruction counter.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4799 c046a42c-6fe2-441c-8c8c-71466251a162
Avoid unused input arguments which triggered tcg errors. Spotted byStefan Weil.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4795 c046a42c-6fe2-441c-8c8c-71466251a162
More efficient target register / TC accesses.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4794 c046a42c-6fe2-441c-8c8c-71466251a162
Remove remaining uses of T0 in the MIPS target.
git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@4788 c046a42c-6fe2-441c-8c8c-71466251a162