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target-arm: Store AIF bits in env->pstate for AArch32
To avoid complication in code that otherwise would not need tocare about whether EL1 is AArch32 or AArch64, we should storethe interrupt mask bits (CPSR.AIF in AArch32 and PSTATE.DAIFin AArch64) in one place consistently regardless of EL1's mode....
target-arm: Implement AArch64 TTBR*
Implement the AArch64 TTBR* registers. For v7 these were already 64 bitsto handle LPAE, but implemented as two separate uint32_t fields.Combine them into a single uint64_t which can be used for all purposes.Since this requires touching every use, take the opportunity to rename...
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20140220' into staging
target-arm queue: * Fix a bug causing an assertion in the NVIC on ARMv7M models * More A64 Neon instructions * Refactor cpreg API to separate out access check functions, as...
target-arm: Drop success/fail return from cpreg read and write functions
All cpreg read and write functions now return 0, so we can clean uptheir prototypes: * write functions return void * read functions return the value rather than taking a pointer to write the value to...
i2c: Rename i2c_bus to I2CBus
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
pxa2xx: QOM'ify I2C slave
Replace usages of FROM_I2C_SLAVE() and direct parent field accesses withQOM cast macro. Rename parent field to assure we caught all. Reuse typeconstant in pxa2xx_i2c_init().
Add some missing braces while at it.
Signed-off-by: Andreas Färber <afaerber@suse.de>
vmstate: Make VMSTATE_STRUCT_POINTER take type, not ptr-to-type
The VMSTATE_STRUCT_POINTER macros are a bit odd in that theymust be passed an argument "FooType *" rather than just takingthe FooType. They're only used in one place, so it's easy totidy this up. This also lets us use the macro to replace the...
aio / timers: Convert rtc_clock to be a QEMUClockType
Convert rtc_clock to be a QEMUClockType
Move rtc_clock users to use the new API
Signed-off-by: Alex Bligh <alex@alex.org.uk>Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
aio / timers: Switch entire codebase to the new timer API
This is an autogenerated patch using scripts/switch-timer-api.
Switch the entire code base to using the new timer API.
Note this patch may introduce some line length issues.
Signed-off-by: Alex Bligh <alex@alex.org.uk>...
pxa2xx: Avoid object_get_link_property() assertion for "parent_bus"
pxa2xx_i2c_init() creates a pxa2xx-i2c-slave device on a second i2c-bus,which has a NULL parent device. This causes an assertion inobject_get_canonical_path() when accessing pxa2xx-i2c-slave's...
pxa2xx: QOM cast cleanup for PXA2xxSSPState
Introduce a type constant, use QOM casts, rename the parent field andprepare for QOM realize.
pxa2xx: QOM cast cleanup for PXA2xxRTCState
Introduce a type constant, use QOM casts and rename the parent field.
pxa2xx: QOM cast cleanup for PXA2xxI2CState
cpu: Replace cpu_single_env with CPUState current_cpu
Move it to qom/cpu.h.
hw/a*: pass owner to memory_region_init* functions
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
memory: add owner argument to initialization functions
sysemu: avoid proliferation of include/ subdirectories
hw: move headers to include/
Many of these should be cleaned up with proper qdev-/QOM-ification.Right now there are many catch-all headers in include/hw/ARCH dependingon cpu.h, and this makes it necessary to compile these files per-target.However, fixing this does not belong in these patches....
qemu-char: Call fe_claim / fe_release when not using qdev chr properties
chardev-frontends need to explictly check, increase and decrement theavail_connections "property" of the chardev when they are not using aqdev-chardev-property for the chardev.
This fixes things like:...
cpu: Pass CPUState to cpu_interrupt()
Move it to qom/cpu.h to avoid issues with include order.
Change pc_acpi_smi_interrupt() opaque to X86CPU.
arm: move files referencing CPU to hw/arm/