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# Date Author Comment
18da9326 02/20/2012 06:07 pm Max Filippov

target-xtensa: add DEBUG_SECTION to overlay tool

Fill debug configuration from overlay definitions in the DEBUG_SECTION.
Add DEBUG_SECTION to DC232B and FSF cores.

Signed-off-by: Max Filippov <>
b96ac3e4 02/17/2012 11:25 pm Max Filippov

target-xtensa: define TLB_TEMPLATE for MMU-less cores

TLB_TEMPLATE macro specifies TLB geometry in the core configuration.
Make TLB_TEMPLATE available for region protection core variants,
defining 1 way ITLB and DTLB with 8 entries each.

Signed-off-by: Max Filippov <>
0fdd2e1d 11/26/2011 11:44 am Max Filippov

target-xtensa: fix MMUv3 initialization

- ITLB/DTLB ways 5 and 6 have 4 and 8 entries respectively;
- ITLB/DTLB way 6 attr field is set to 3 on reset.

Signed-off-by: Max Filippov <>
Signed-off-by: Blue Swirl <>
0c852e17 11/02/2011 03:05 am Max Filippov

target-xtensa: handle cache options in the overlay tool

Cache options must be enabled for the cores that have cache to avoid
illegal instruction exceptions.

Signed-off-by: Max Filippov <>
ac8b7db4 10/16/2011 01:39 pm Max Filippov

target-xtensa: extract core configuration from overlay

Introduce overlay_tool.h that defines core configuration blocks from
data available in the linux architecture variant overlay.

Overlay data is automatically generated in the core configuration
process by Tensilica tools and can be directly converted to qemu xtensa...