Merge remote-tracking branch 'qemu-kvm/uq/master' into staging
kvm: always update the MPX model specific register
The original patch from Liu Jinsong restricted them to reset or fullstate updates, but that's unnecessary (and wrong) since the BNDCFGSMSR has no side effects.
Cc: Liu Jinsong <jinsong.liu@intel.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Merge remote branch 'luiz/queue/qmp' into qmpq
Merge remote-tracking branch 'afaerber/tags/qom-cpu-for-anthony' into staging
QOM CPUState refactorings / X86CPU
Merge remote-tracking branch 'rth/ldst-i386-2' into staging
target-i386: Tidy ljmp
Remove an unnecessary move opcode.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>Signed-off-by: Richard Henderson <rth@twiddle.net>
target-i386: Rename gen_op_jmp_T0 to gen_op_jmp_v
And make the destination argument explicit.
target-i386: Tidy some size computation
Clean up relics of multiple size domains: - MO_16 + 1 => - 1 + 1 => 0.
target-i386: Remove gen_op_mov_reg_A0
Replace with its definition.
target-i386: Remove gen_op_mov_TN_reg
target-i386: Remove gen_op_addl_T0_T1
target-i386: Remove gen_op_mov_reg_T1
target-i386: Remove gen_op_mov_reg_T0
target-i386: Tidy cpu_regs initialization
target-i386: Tidy addr16 code in gen_lea_modrm
Unlike the addr32, there was no bug. But we can use the sametechnique to reduce the number of TCG ops.
target-i386: Combine gen_push_T* into gen_push_v
Reduce ifdefs, share more code between paths, reduce the number of TCGops generated.
Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case.
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
target_i386: Clean up gen_pop_T0
Reduce ifdefs, share more code between paths, reduce the number of TCGops generated. Avoid re-computing the size of the operation acrossgen_pop_T0 and gen_pop_update.
Add forgotten zero-extension in the TARGET_X86_64, !CODE64, ss32 case....
target-i386: Change dflag to TCGMemOp
Changing the domain to TCGMemOp makes it easier to interoperatewith other portions of the rest of the translator.
We now only have one domain for size operands inside the translator,which makes things less confusing all the way around. There are...
target-i386: Change gen_op_mov_reg_A0 size parameter to TCGMemOp
Change the domain of the parameter and update all callers.Which lets us defer completely to gen_op_mov_reg_v.
target-i386: Change aflag to TCGMemOp
target-i386: Change gen_op_add_reg_* size parameter to TCGMemOp
These functions used the aflags/dflags domain, which is log2-1of the byte size. Confusingly, they used enumeration valuesfrom the log2 domain.
Change the domain of the parameter and update all callers....
target-i386: Change gen_op_j*z_ecx size parameter to TCGMemOp
Change the domain of the parameter and update all callers.
target-i386: Use TCGMemOp for 'ot' variables
The 'ot' variables (operand type?) hold the log2(byte size) ofthe operand being manipulated. This is the same as the MO_SIZEsubset of the TCGMemOp. Indeed, we often pass 'ot' to thetcg_gen_qemu_ld/st functions....
target-i386: Remove gen_op_movl_T0_T1
Replace it with its definition.
target-i386: Remove gen_op_andl_A0_ffff
Replace it with tcg_gen_ext16u_tl, and in two cases merge with aprevious move from cpu_regs.
target-i386: Tidy extend + store
We can now use tcg_gen_qemu_st_i32 directly to avoid the extension.
target-i386: Tidy extend + move
For the known MO_32/MO_64 cases, we don't need to extend a 32-bit tempinto a 64-bit temp before storing into the hardware register.
We do need the extension for the MO_8/MO_16 cases, in order for thedeposit_tl operation to work, so leave those alone....
target-i386: Remove gen_op_movl_T0_0
Propagate its definition into all users.
target-i386: Remove gen_op_movl_T0_im*
Propagate the definition of gen_op_movl_T0_im to all users.The function gen_op_movl_T0_imu was unused.
Propagate the definitions into all users. The only time thatgen_op_movl_T1_imu was used, the input was type 'unsigned',so the replacement works identically.
target-i386: Remove gen_op_mov*_A0_im
Propagate the definitions into all users. In two cases, this allowsus to share code between the 32-bit and 64-bit immediate moves.
target-i386: Remove gen_movtl_T*_im
Propagate the definitions into all users.
target-i386: Remove gen_op_andl_T0_ffff
Replace it with tcg_gen_ext16u_tl. In four places we can combine thatwith a previous move into cpu_T0, and in one place we can infer thatthe zero-extension has already happened via the previous load.
target-i386: Remove gen_op_andl_T0_im
target-i386: Remove gen_op_st_T0_A0
target-i386: Remove gen_op_st_T1_A0
target-i386: Fix typo in gen_push_T1
By inspection, obviously we should be storing T1 not T0.This could only happen for x86_64 in 64-bit mode with 0x66prefix to call insn -- i.e. never.
target-i386: Tidy mov[sz][bw]
We can use the MO_SIGN bit to tidy the reg-reg switch statementas well as pass it on to gen_op_ld_v, eliminating one call.
target-i386: Tidy movsl
Always perform a sign-extending load. In the extremely unlikelycase that we've used an 0x66 prefix, the extension to 64-bits isunnecessary but not wrong; the store will still examine only 16 bits.
target-i386: Remove unused arguments to gen_lea_modrm
The reg_ptr and offset_ptr outputs are universally unused.
target-i386: Use MO_BE for movbe
Fold the bswap into the memory operation.
target-i386: Tidy gen_op_mov_TN_reg+tcg_gen_trunc_tl_i32
For the 16 and 32-bit cases, we don't need to truncate viaa temporary register.
target-i386: Tidy load + truncate
We can now use tcg_gen_qemu_ld_i32 directly to avoid the truncation.
target-i386: Remove gen_op_ld_T0_A0
target-i386: Remove gen_op_ldu_T0_A0
target-i386: Remove gen_op_ld_T1_A0
target-i386: Remove gen_op_lds_T0_A0
Replace its users by gen_op_ld_v with the MO_SIGN bit set.
target-i386: Introduce gen_op_st_rm_T0_A0
Too many places have the same test vs OR_TMP0 to indicatea write back to memory. Hoist that to a subroutine.
target-i386: Replace OT_* constants with MO_* constants
The MO_8/16/32/64 constants have the same encoding and meaningas the OT_BYTE/WORD/LONG/QUAD. Since we rely on them being thesame, for the qemu_ld/st helpers, standardize on the common names.
target-i386: Use new tcg_gen_qemu_st_* helpers
In preference to the older helpers. Stores only in this patch.
target-i386: Use new tcg_gen_qemu_ld_* helpers
In preference to the older helpers. Loads only in this patch.
target-i386: Stop encoding DisasContext.mem_index
Now that we don't combine mem_index with operand size info,we don't need to encode it. Which tidies many places thataccess it.
target-i386: Push DisasContext into load/store helpers
Rather than add s->mem_index into a combined size+mem_indexargument, pass the context down. This will allow cleaningup s->mem_index later.
target-i386: Remove assert_no_error usage
Replace an assert_no_error() usage with the error_abort system.
Signed-off-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>Reviewed-by: Markus Armbruster <armbru@redhat.com>Signed-off-by: Luiz Capitulino <lcapitulino@redhat.com>
target-i386: Cleanup 'foo' feature handling
Features check, enforce, hv_relaxed and hv_vapic are treated as booleanset to 'on' when passed from command line, so it's not necessary tohandle each of them separately. Collapse them to one catch-all branchwhich will treat any feature in format 'foo' as boolean set to 'on'....
target-i386: Cleanup 'foo=val' feature handling
Features family, model, stepping, level, hv_spinlocks are treated similarlywhen passed from command line, so it's not necessary to handle each of themindividually. Collapse them to one catch-all branch which will treat...
target-i386: Convert 'check' and 'enforce' to static properties
Signed-off-by: Igor Mammedov <imammedo@redhat.com>...
target-i386: Convert 'hv_relaxed' to static property
Signed-off-by: Igor Mammedov <imammedo@redhat.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Convert 'hv_vapic' to static property
target-i386: Convert 'hv_spinlocks' to static property
target-i386: Move apic_state field from CPUX86State to X86CPU
This motion is preparing for refactoring vCPU APIC subsequently.
Signed-off-by: Chen Fan <chen.fan.fnst@cn.fujitsu.com>Signed-off-by: Andreas Färber <afaerber@suse.de>
x86: only allow real mode to access 32bit without LMA
When we're running in non-64bit mode with qemu-system-x86_64 we canstill end up with virtual addresses that are above the 32bit boundaryif a segment offset is set up.
GNU Hurd does exactly that. It sets the segment offset to 0x80000000 and...
kvm: x86: Separately write feature control MSR on reset
If the guest is running in nested mode on system reset, clearing thefeature MSR signals the kernel to leave this mode. Recent kernelsprocesses this properly, but leave the VCPU state undefined behind. It...
target-i386: clear guest TSC on reset
VCPU TSC is not cleared by a warm reset (*), which leaves some types of Linux guests (non-pvops guests and those with the kernel parameter no-kvmclock set)vulnerable to the overflow in cyc2ns_offset fixed by upstream commit...
target-i386: do not special case TSC writeback
Newer kernels are capable of synchronizing TSC values of multiple VCPUson writeback, but we were excluding the power up case, which is not neededanymore.
Signed-off-by: Fernando Luis Vazquez Cao <fernando@oss.ntt.co.jp>...
target-i386: Intel MPX
Add some MPX related definiation, and hardcode sizes and offsetsof xsave features 3 and 4. It also add corresponding part tokvm_get/put_xsave, and vmstate.
Signed-off-by: Liu Jinsong <jinsong.liu@intel.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-i386: fix cpuid leaf 0x0d
Fix cpuid leaf 0x0d which incorrectly parsed eax and ebx.
However, before this patch the CPUID worked fine -- the .offsetfield contained the size and was stored in the register thatis supposed to hold the size (eax), and likewise the .size field...
Merge remote-tracking branch 'bonzini/tags/for-anthony' into staging
Here are a bunch of 1.7-tagged patches that I was afraidwere getting forgotten or that did not have a clear maintainer responsiblefor making a pull request.
target-i386: yield to another VCPU on PAUSE
After commit b1bbfe7 (aio / timers: On timer modification, qemu_notifyor aio_notify, 2013-08-21) FreeBSD guests report a huge slowdown.
The problem shows up as soon as FreeBSD turns out its periodic (~1 ms)tick, but the timers are only the trigger for a pre-existing problem....
target-i386: Fix build by providing stub kvm_arch_get_supported_cpuid()
Fix build failures with clang when KVM is not enabled byproviding a stub version of kvm_arch_get_supported_cpuid().We retain the compile time check that this function isn'tcalled when CONFIG_KVM is not set by guarding the stub with...
target-i386: Fix addr32 prefix in gen_lea_modrm
Fix the following run-test-x86_64 testsuite failures:
-lea (%eax) = 0000000000000001-lea (%ebx) = 0000000000000002-lea (%ecx) = 0000000000000004-lea (%edx) = 0000000000000008-lea (%%esi) = 0000000000000010...
target-i386: do not override nr_cores for -cpu host
Commit 787aaf5 (target-i386: forward CPUID cache leaves when -cpu host isused, 2013-09-02) brings bits 31..26 of CPUID leaf 04h out of sync withthe APIC IDs that QEMU reserves for each package. This number must come...
kvm: Fix uninitialized cpuid_data
This error was reported by valgrind when running qemu-system-x86_64with kvm:
KVM: x86: fix typo in KVM_GET_XCRS
Only the first item of the array was ever looked at. Nopractical effect, but still worth fixing.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>Signed-off-by: Gleb Natapov <gleb@redhat.com>
Merge remote-tracking branch 'bonzini/configure' into staging
Makefile.target: CONFIG_NO_* variables removed
CONFIG_NO_* variables replaced with the lnot logical function
Signed-off-by: Ákos Kovács <akoskovacs@gmx.com>[PMM: fixed a few CONFIG_NO_* uses that were missed]Signed-off-by: Peter Maydell <peter.maydell@linaro.org>...
Merge remote-tracking branch 'rth/tcg-pull' into staging
tcg: Move helper registration into tcg_context_init
No longer needs to be done on a per-target basis.
Signed-off-by: Richard Henderson <rth@twiddle.net>
cpu: Drop cpu_model_str from CPU_COMMON
Since this is only read in cpu_copy() and linux-user has a globalcpu_model, drop the field from generic code.
Signed-off-by: Andreas Färber <afaerber@suse.de>
target-i386: Fix compiler warning (integer constant is too large)
From buildbot default_i386_rhel61:
CC i386-softmmu/target-i386/arch_memory_mapping.otarget-i386/arch_memory_mapping.c: In function 'walk_pde':target-i386/arch_memory_mapping.c:110: warning:...
x86: cpuid: reconstruct leaf 0Dh data
The data in leaf 0Dh depends on information from other feature bits.Instead of passing it blindly from the host, compute it based onwhether these feature bits are enabled.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>...
x86: fix migration from pre-version 12
On KVM, the KVM_SET_XSAVE would be executed with a 0 xstate_bv,and not restore anything.
Since FP and SSE data are always valid, set them in xstate_bv at resettime. In fact, that value is the same that KVM_GET_XSAVE returns on...
target-i386: Set model=6 on qemu64 & qemu32 CPU models
There's no Intel CPU with family=6,model=2, and Linux and Windows guestsdisable SEP when seeing that combination due to Pentium Pro erratum #82.
In addition to just having SEP ignored by guests, Skype (and maybe other...
Merge remote-tracking branch 'mjt/trivial-patches' into staging
target-i386: Fix segment cache dump
When in Long Mode, cpu_x86_seg_cache() logs "DS16" because the Defaultoperation size bit (D/B bit) is not set for Long Mode Data Segments sincethere are only Data Segments in Long Mode and no explicit 16/32/64-bitDescriptors....
target-i386: add feature kvm_pv_unhalt
I don't know yet if want this feature on by default, so for now I'mjust adding support for "-cpu ...,+kvm_pv_unhalt".
Signed-off-by: Andrew Jones <drjones@redhat.com>Reviewed-by: Eduardo Habkost <ehabkost@redhat.com>...
target-i386: forward CPUID cache leaves when -cpu host is used
Some users running cpu intensive tasks checking the cache CPUID leaves atstartup and making decisions based on the result reported that the guest wasnot reflecting the host CPUID leaves when -cpu host is used....
cpu: Move cpu state syncs up into cpu_dump_state()
The x86 and ppc targets call cpu_synchronize_state() from their*_cpu_dump_state() callbacks to ensure that up to date state is dumpedwhen KVM is enabled (for example when a KVM internal error occurs)....
fix steal time MSR vmsd callback to proper opaque type
Convert steal time MSR vmsd callback pointer to proper X86CPU type.
Signed-off-by: Marcelo Tosatti <mtosatti@redhat.com>Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
target-i386: Only provide CMOV and friends if feature bit set
The instructions CMOVcc, FCMOVcc and F[U]COMI[P] should only bepresent if the CMOV feature bit is set. Add missing feature bitchecks so we correctly fault if emulating a 486 or 586.This fixes bug LP:1201446....
target-i386: fix disassembly with PAE=1, PG=0
CR4.PAE=1 will not enable paging if CR0.PG=0, but the "if" chainin x86_cpu_get_phys_page_debug says otherwise. Check CR0.PGbefore everything else.
Fixes "-d in_asm" for a code section at the beginning of OVMF....
target-i386: Use #defines instead of magic numbers for CPUID cache info
This is an attempt to make the CPUID cache topology code clearer, byreplacing the magic numbers in the code with #defines, and moving allthe cache information to the same place in the file....
cpu: Use QTAILQ for CPU list
Introduce CPU_FOREACH(), CPU_FOREACH_SAFE() and CPU_NEXT() shorthandmacros.
tcg: Change tcg_gen_exit_tb argument to uintptr_t
And update all users.
Reviewed-by: Aurelien Jarno <aurelien@aurel32.net>Signed-off-by: Richard Henderson <rth@twiddle.net>
Merge remote-tracking branch 'qemu-kvm/uq/master' into stable-1.5