qxl: clear irq on reset
Without this we occasionally trigger an assert athw/pci/pci.c:pcibus_reset that asserts the irq_count is zero on reset.
This has become a problem with the new drm driver for linux, since doinga reboot from console causes a race between console updates that set the...
hw/display/qxl: fix signed to unsigned comparison
Several small signedness / overflow corrections to qxl_create_guest_primary:1. use 64 bit unsigned for size to avoid overflow possible from two 32bit multiplicants.2. correct sign for requested_height3. add a more verbose error message when setting guest bug state (which...
Add the ability to vary Spice playback and record rates, to facilitate Opus support.
Signed-off-by: Jeremy White <jwhite@codeweavers.com>Signed-off-by: Gerd Hoffmann <kraxel@redhat.com>
Merge remote-tracking branch 'qmp-unstable/queue/qmp' into staging
Merge remote-tracking branch 'pmaydell/tags/pull-target-arm-20140131' into staging
target-arm queue: * implementation of first part of the A64 Neon instruction set * v8 AArch32 rounding and 16<->64 fp conversion instructions * fix MIDR value on Zynq boards...
Merge remote-tracking branch 'remotes/awilliam/tags/vfio-pci-for-qemu-20140128.0' into staging
vfio-pci updates include: - Destroy MemoryRegions on device teardown - Print warnings around PCI option ROM failures - Skip bogus mappings from 64bit BAR sizing...
Merge remote-tracking branch 'remotes/sstabellini/xen-140130' into staging
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
arm_gic: Introduce define for GIC_NR_SGIS
Instead of hardcoding 16 various places in the code, use a define tomake it more clear what is going on.
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>Reviewed-by: Peter Maydell <peter.maydell@linaro.org>...
arm_gic: Fix GICD_ICPENDR and GICD_ISPENDR writes
Fix two bugs that would allow changing the state of SGIs through theICPENDR and ISPENDRs.
target-arm: A64: Add SIMD shift by immediate
This implements a subset of the AdvSIMD shift operations (namely all thenone saturating or narrowing ones). The actual shift generation codeitself is common for both the scalar and vector cases but wrapped with...
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