root / hw / spapr.c @ 83c9f4ca
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1 | 9fdf0c29 | David Gibson | /*
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2 | 9fdf0c29 | David Gibson | * QEMU PowerPC pSeries Logical Partition (aka sPAPR) hardware System Emulator
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3 | 9fdf0c29 | David Gibson | *
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4 | 9fdf0c29 | David Gibson | * Copyright (c) 2004-2007 Fabrice Bellard
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5 | 9fdf0c29 | David Gibson | * Copyright (c) 2007 Jocelyn Mayer
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6 | 9fdf0c29 | David Gibson | * Copyright (c) 2010 David Gibson, IBM Corporation.
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7 | 9fdf0c29 | David Gibson | *
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8 | 9fdf0c29 | David Gibson | * Permission is hereby granted, free of charge, to any person obtaining a copy
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9 | 9fdf0c29 | David Gibson | * of this software and associated documentation files (the "Software"), to deal
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10 | 9fdf0c29 | David Gibson | * in the Software without restriction, including without limitation the rights
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11 | 9fdf0c29 | David Gibson | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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12 | 9fdf0c29 | David Gibson | * copies of the Software, and to permit persons to whom the Software is
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13 | 9fdf0c29 | David Gibson | * furnished to do so, subject to the following conditions:
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14 | 9fdf0c29 | David Gibson | *
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15 | 9fdf0c29 | David Gibson | * The above copyright notice and this permission notice shall be included in
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16 | 9fdf0c29 | David Gibson | * all copies or substantial portions of the Software.
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17 | 9fdf0c29 | David Gibson | *
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18 | 9fdf0c29 | David Gibson | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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19 | 9fdf0c29 | David Gibson | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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20 | 9fdf0c29 | David Gibson | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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21 | 9fdf0c29 | David Gibson | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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22 | 9fdf0c29 | David Gibson | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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23 | 9fdf0c29 | David Gibson | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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24 | 9fdf0c29 | David Gibson | * THE SOFTWARE.
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25 | 9fdf0c29 | David Gibson | *
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26 | 9fdf0c29 | David Gibson | */
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27 | 9c17d615 | Paolo Bonzini | #include "sysemu/sysemu.h" |
28 | 83c9f4ca | Paolo Bonzini | #include "hw/hw.h" |
29 | 9fdf0c29 | David Gibson | #include "elf.h" |
30 | 1422e32d | Paolo Bonzini | #include "net/net.h" |
31 | 9c17d615 | Paolo Bonzini | #include "sysemu/blockdev.h" |
32 | 9c17d615 | Paolo Bonzini | #include "sysemu/cpus.h" |
33 | 9c17d615 | Paolo Bonzini | #include "sysemu/kvm.h" |
34 | e97c3636 | David Gibson | #include "kvm_ppc.h" |
35 | 9fdf0c29 | David Gibson | |
36 | 9fdf0c29 | David Gibson | #include "hw/boards.h" |
37 | 9fdf0c29 | David Gibson | #include "hw/ppc.h" |
38 | 9fdf0c29 | David Gibson | #include "hw/loader.h" |
39 | 9fdf0c29 | David Gibson | |
40 | 9fdf0c29 | David Gibson | #include "hw/spapr.h" |
41 | 4040ab72 | David Gibson | #include "hw/spapr_vio.h" |
42 | 3384f95c | David Gibson | #include "hw/spapr_pci.h" |
43 | b5cec4c5 | David Gibson | #include "hw/xics.h" |
44 | a2cb15b0 | Michael S. Tsirkin | #include "hw/pci/msi.h" |
45 | 9fdf0c29 | David Gibson | |
46 | 9c17d615 | Paolo Bonzini | #include "sysemu/kvm.h" |
47 | f61b4bed | Alexander Graf | #include "kvm_ppc.h" |
48 | 83c9f4ca | Paolo Bonzini | #include "hw/pci/pci.h" |
49 | f61b4bed | Alexander Graf | |
50 | 022c62cb | Paolo Bonzini | #include "exec/address-spaces.h" |
51 | 35139a59 | David Gibson | #include "hw/usb.h" |
52 | 1de7afc9 | Paolo Bonzini | #include "qemu/config-file.h" |
53 | 890c2b77 | Avi Kivity | |
54 | 9fdf0c29 | David Gibson | #include <libfdt.h> |
55 | 9fdf0c29 | David Gibson | |
56 | 4d8d5467 | Benjamin Herrenschmidt | /* SLOF memory layout:
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57 | 4d8d5467 | Benjamin Herrenschmidt | *
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58 | 4d8d5467 | Benjamin Herrenschmidt | * SLOF raw image loaded at 0, copies its romfs right below the flat
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59 | 4d8d5467 | Benjamin Herrenschmidt | * device-tree, then position SLOF itself 31M below that
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60 | 4d8d5467 | Benjamin Herrenschmidt | *
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61 | 4d8d5467 | Benjamin Herrenschmidt | * So we set FW_OVERHEAD to 40MB which should account for all of that
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62 | 4d8d5467 | Benjamin Herrenschmidt | * and more
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63 | 4d8d5467 | Benjamin Herrenschmidt | *
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64 | 4d8d5467 | Benjamin Herrenschmidt | * We load our kernel at 4M, leaving space for SLOF initial image
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65 | 4d8d5467 | Benjamin Herrenschmidt | */
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66 | 9fdf0c29 | David Gibson | #define FDT_MAX_SIZE 0x10000 |
67 | 39ac8455 | David Gibson | #define RTAS_MAX_SIZE 0x10000 |
68 | a9f8ad8f | David Gibson | #define FW_MAX_SIZE 0x400000 |
69 | a9f8ad8f | David Gibson | #define FW_FILE_NAME "slof.bin" |
70 | 4d8d5467 | Benjamin Herrenschmidt | #define FW_OVERHEAD 0x2800000 |
71 | 4d8d5467 | Benjamin Herrenschmidt | #define KERNEL_LOAD_ADDR FW_MAX_SIZE
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72 | a9f8ad8f | David Gibson | |
73 | 4d8d5467 | Benjamin Herrenschmidt | #define MIN_RMA_SLOF 128UL |
74 | 9fdf0c29 | David Gibson | |
75 | 9fdf0c29 | David Gibson | #define TIMEBASE_FREQ 512000000ULL |
76 | 9fdf0c29 | David Gibson | |
77 | 41019fec | Anton Blanchard | #define MAX_CPUS 256 |
78 | 4d8d5467 | Benjamin Herrenschmidt | #define XICS_IRQS 1024 |
79 | 9fdf0c29 | David Gibson | |
80 | 0c103f8e | David Gibson | #define PHANDLE_XICP 0x00001111 |
81 | 0c103f8e | David Gibson | |
82 | 7f763a5d | David Gibson | #define HTAB_SIZE(spapr) (1ULL << ((spapr)->htab_shift)) |
83 | 7f763a5d | David Gibson | |
84 | 9fdf0c29 | David Gibson | sPAPREnvironment *spapr; |
85 | 9fdf0c29 | David Gibson | |
86 | ff9d2afa | David Gibson | int spapr_allocate_irq(int hint, bool lsi) |
87 | e6c866d4 | David Gibson | { |
88 | a307d594 | Alexey Kardashevskiy | int irq;
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89 | e6c866d4 | David Gibson | |
90 | e6c866d4 | David Gibson | if (hint) {
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91 | e6c866d4 | David Gibson | irq = hint; |
92 | e6c866d4 | David Gibson | /* FIXME: we should probably check for collisions somehow */
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93 | e6c866d4 | David Gibson | } else {
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94 | e6c866d4 | David Gibson | irq = spapr->next_irq++; |
95 | e6c866d4 | David Gibson | } |
96 | e6c866d4 | David Gibson | |
97 | a307d594 | Alexey Kardashevskiy | /* Configure irq type */
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98 | a307d594 | Alexey Kardashevskiy | if (!xics_get_qirq(spapr->icp, irq)) {
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99 | a307d594 | Alexey Kardashevskiy | return 0; |
100 | e6c866d4 | David Gibson | } |
101 | e6c866d4 | David Gibson | |
102 | ff9d2afa | David Gibson | xics_set_irq_type(spapr->icp, irq, lsi); |
103 | e6c866d4 | David Gibson | |
104 | a307d594 | Alexey Kardashevskiy | return irq;
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105 | e6c866d4 | David Gibson | } |
106 | e6c866d4 | David Gibson | |
107 | f4b9523b | Alexey Kardashevskiy | /* Allocate block of consequtive IRQs, returns a number of the first */
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108 | ff9d2afa | David Gibson | int spapr_allocate_irq_block(int num, bool lsi) |
109 | f4b9523b | Alexey Kardashevskiy | { |
110 | f4b9523b | Alexey Kardashevskiy | int first = -1; |
111 | f4b9523b | Alexey Kardashevskiy | int i;
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112 | f4b9523b | Alexey Kardashevskiy | |
113 | f4b9523b | Alexey Kardashevskiy | for (i = 0; i < num; ++i) { |
114 | f4b9523b | Alexey Kardashevskiy | int irq;
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115 | f4b9523b | Alexey Kardashevskiy | |
116 | ff9d2afa | David Gibson | irq = spapr_allocate_irq(0, lsi);
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117 | f4b9523b | Alexey Kardashevskiy | if (!irq) {
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118 | f4b9523b | Alexey Kardashevskiy | return -1; |
119 | f4b9523b | Alexey Kardashevskiy | } |
120 | f4b9523b | Alexey Kardashevskiy | |
121 | f4b9523b | Alexey Kardashevskiy | if (0 == i) { |
122 | f4b9523b | Alexey Kardashevskiy | first = irq; |
123 | f4b9523b | Alexey Kardashevskiy | } |
124 | f4b9523b | Alexey Kardashevskiy | |
125 | f4b9523b | Alexey Kardashevskiy | /* If the above doesn't create a consecutive block then that's
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126 | f4b9523b | Alexey Kardashevskiy | * an internal bug */
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127 | f4b9523b | Alexey Kardashevskiy | assert(irq == (first + i)); |
128 | f4b9523b | Alexey Kardashevskiy | } |
129 | f4b9523b | Alexey Kardashevskiy | |
130 | f4b9523b | Alexey Kardashevskiy | return first;
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131 | f4b9523b | Alexey Kardashevskiy | } |
132 | f4b9523b | Alexey Kardashevskiy | |
133 | 7f763a5d | David Gibson | static int spapr_fixup_cpu_dt(void *fdt, sPAPREnvironment *spapr) |
134 | 6e806cc3 | Bharata B Rao | { |
135 | 6e806cc3 | Bharata B Rao | int ret = 0, offset; |
136 | e2684c0b | Andreas Färber | CPUPPCState *env; |
137 | 1b1ed8dc | Andreas Färber | CPUState *cpu; |
138 | 6e806cc3 | Bharata B Rao | char cpu_model[32]; |
139 | 6e806cc3 | Bharata B Rao | int smt = kvmppc_smt_threads();
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140 | 7f763a5d | David Gibson | uint32_t pft_size_prop[] = {0, cpu_to_be32(spapr->htab_shift)};
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141 | 6e806cc3 | Bharata B Rao | |
142 | 6e806cc3 | Bharata B Rao | assert(spapr->cpu_model); |
143 | 6e806cc3 | Bharata B Rao | |
144 | 6e806cc3 | Bharata B Rao | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
145 | 55e5c285 | Andreas Färber | cpu = CPU(ppc_env_get_cpu(env)); |
146 | 6e806cc3 | Bharata B Rao | uint32_t associativity[] = {cpu_to_be32(0x5),
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147 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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148 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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149 | 6e806cc3 | Bharata B Rao | cpu_to_be32(0x0),
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150 | 1b1ed8dc | Andreas Färber | cpu_to_be32(cpu->numa_node), |
151 | 55e5c285 | Andreas Färber | cpu_to_be32(cpu->cpu_index)}; |
152 | 6e806cc3 | Bharata B Rao | |
153 | 55e5c285 | Andreas Färber | if ((cpu->cpu_index % smt) != 0) { |
154 | 6e806cc3 | Bharata B Rao | continue;
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155 | 6e806cc3 | Bharata B Rao | } |
156 | 6e806cc3 | Bharata B Rao | |
157 | 6e806cc3 | Bharata B Rao | snprintf(cpu_model, 32, "/cpus/%s@%x", spapr->cpu_model, |
158 | 55e5c285 | Andreas Färber | cpu->cpu_index); |
159 | 6e806cc3 | Bharata B Rao | |
160 | 6e806cc3 | Bharata B Rao | offset = fdt_path_offset(fdt, cpu_model); |
161 | 6e806cc3 | Bharata B Rao | if (offset < 0) { |
162 | 6e806cc3 | Bharata B Rao | return offset;
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163 | 6e806cc3 | Bharata B Rao | } |
164 | 6e806cc3 | Bharata B Rao | |
165 | 7f763a5d | David Gibson | if (nb_numa_nodes > 1) { |
166 | 7f763a5d | David Gibson | ret = fdt_setprop(fdt, offset, "ibm,associativity", associativity,
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167 | 7f763a5d | David Gibson | sizeof(associativity));
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168 | 7f763a5d | David Gibson | if (ret < 0) { |
169 | 7f763a5d | David Gibson | return ret;
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170 | 7f763a5d | David Gibson | } |
171 | 7f763a5d | David Gibson | } |
172 | 7f763a5d | David Gibson | |
173 | 7f763a5d | David Gibson | ret = fdt_setprop(fdt, offset, "ibm,pft-size",
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174 | 7f763a5d | David Gibson | pft_size_prop, sizeof(pft_size_prop));
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175 | 6e806cc3 | Bharata B Rao | if (ret < 0) { |
176 | 6e806cc3 | Bharata B Rao | return ret;
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177 | 6e806cc3 | Bharata B Rao | } |
178 | 6e806cc3 | Bharata B Rao | } |
179 | 6e806cc3 | Bharata B Rao | return ret;
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180 | 6e806cc3 | Bharata B Rao | } |
181 | 6e806cc3 | Bharata B Rao | |
182 | 5af9873d | Benjamin Herrenschmidt | |
183 | 5af9873d | Benjamin Herrenschmidt | static size_t create_page_sizes_prop(CPUPPCState *env, uint32_t *prop,
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184 | 5af9873d | Benjamin Herrenschmidt | size_t maxsize) |
185 | 5af9873d | Benjamin Herrenschmidt | { |
186 | 5af9873d | Benjamin Herrenschmidt | size_t maxcells = maxsize / sizeof(uint32_t);
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187 | 5af9873d | Benjamin Herrenschmidt | int i, j, count;
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188 | 5af9873d | Benjamin Herrenschmidt | uint32_t *p = prop; |
189 | 5af9873d | Benjamin Herrenschmidt | |
190 | 5af9873d | Benjamin Herrenschmidt | for (i = 0; i < PPC_PAGE_SIZES_MAX_SZ; i++) { |
191 | 5af9873d | Benjamin Herrenschmidt | struct ppc_one_seg_page_size *sps = &env->sps.sps[i];
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192 | 5af9873d | Benjamin Herrenschmidt | |
193 | 5af9873d | Benjamin Herrenschmidt | if (!sps->page_shift) {
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194 | 5af9873d | Benjamin Herrenschmidt | break;
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195 | 5af9873d | Benjamin Herrenschmidt | } |
196 | 5af9873d | Benjamin Herrenschmidt | for (count = 0; count < PPC_PAGE_SIZES_MAX_SZ; count++) { |
197 | 5af9873d | Benjamin Herrenschmidt | if (sps->enc[count].page_shift == 0) { |
198 | 5af9873d | Benjamin Herrenschmidt | break;
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199 | 5af9873d | Benjamin Herrenschmidt | } |
200 | 5af9873d | Benjamin Herrenschmidt | } |
201 | 5af9873d | Benjamin Herrenschmidt | if ((p - prop) >= (maxcells - 3 - count * 2)) { |
202 | 5af9873d | Benjamin Herrenschmidt | break;
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203 | 5af9873d | Benjamin Herrenschmidt | } |
204 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->page_shift); |
205 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->slb_enc); |
206 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(count); |
207 | 5af9873d | Benjamin Herrenschmidt | for (j = 0; j < count; j++) { |
208 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].page_shift); |
209 | 5af9873d | Benjamin Herrenschmidt | *(p++) = cpu_to_be32(sps->enc[j].pte_enc); |
210 | 5af9873d | Benjamin Herrenschmidt | } |
211 | 5af9873d | Benjamin Herrenschmidt | } |
212 | 5af9873d | Benjamin Herrenschmidt | |
213 | 5af9873d | Benjamin Herrenschmidt | return (p - prop) * sizeof(uint32_t); |
214 | 5af9873d | Benjamin Herrenschmidt | } |
215 | 5af9873d | Benjamin Herrenschmidt | |
216 | 7f763a5d | David Gibson | #define _FDT(exp) \
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217 | 7f763a5d | David Gibson | do { \
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218 | 7f763a5d | David Gibson | int ret = (exp); \
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219 | 7f763a5d | David Gibson | if (ret < 0) { \ |
220 | 7f763a5d | David Gibson | fprintf(stderr, "qemu: error creating device tree: %s: %s\n", \
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221 | 7f763a5d | David Gibson | #exp, fdt_strerror(ret)); \
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222 | 7f763a5d | David Gibson | exit(1); \
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223 | 7f763a5d | David Gibson | } \ |
224 | 7f763a5d | David Gibson | } while (0) |
225 | 7f763a5d | David Gibson | |
226 | 7f763a5d | David Gibson | |
227 | a3467baa | David Gibson | static void *spapr_create_fdt_skel(const char *cpu_model, |
228 | a8170e5e | Avi Kivity | hwaddr initrd_base, |
229 | a8170e5e | Avi Kivity | hwaddr initrd_size, |
230 | a8170e5e | Avi Kivity | hwaddr kernel_size, |
231 | a3467baa | David Gibson | const char *boot_device, |
232 | 74d042e5 | David Gibson | const char *kernel_cmdline, |
233 | 74d042e5 | David Gibson | uint32_t epow_irq) |
234 | 9fdf0c29 | David Gibson | { |
235 | 9fdf0c29 | David Gibson | void *fdt;
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236 | e2684c0b | Andreas Färber | CPUPPCState *env; |
237 | 9fdf0c29 | David Gibson | uint32_t start_prop = cpu_to_be32(initrd_base); |
238 | 9fdf0c29 | David Gibson | uint32_t end_prop = cpu_to_be32(initrd_base + initrd_size); |
239 | ee86dfee | David Gibson | char hypertas_prop[] = "hcall-pft\0hcall-term\0hcall-dabr\0hcall-interrupt" |
240 | a3d0abae | David Gibson | "\0hcall-tce\0hcall-vio\0hcall-splpar\0hcall-bulk";
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241 | c73e3771 | Benjamin Herrenschmidt | char qemu_hypertas_prop[] = "hcall-memop1"; |
242 | 7f763a5d | David Gibson | uint32_t refpoints[] = {cpu_to_be32(0x4), cpu_to_be32(0x4)}; |
243 | b5cec4c5 | David Gibson | uint32_t interrupt_server_ranges_prop[] = {0, cpu_to_be32(smp_cpus)};
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244 | 9fdf0c29 | David Gibson | char *modelname;
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245 | 7f763a5d | David Gibson | int i, smt = kvmppc_smt_threads();
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246 | 6e806cc3 | Bharata B Rao | unsigned char vec5[] = {0x0, 0x0, 0x0, 0x0, 0x0, 0x80}; |
247 | 9fdf0c29 | David Gibson | |
248 | 7267c094 | Anthony Liguori | fdt = g_malloc0(FDT_MAX_SIZE); |
249 | 9fdf0c29 | David Gibson | _FDT((fdt_create(fdt, FDT_MAX_SIZE))); |
250 | 9fdf0c29 | David Gibson | |
251 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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252 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, KERNEL_LOAD_ADDR, kernel_size))); |
253 | 4d8d5467 | Benjamin Herrenschmidt | } |
254 | 4d8d5467 | Benjamin Herrenschmidt | if (initrd_size) {
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255 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_add_reservemap_entry(fdt, initrd_base, initrd_size))); |
256 | 4d8d5467 | Benjamin Herrenschmidt | } |
257 | 9fdf0c29 | David Gibson | _FDT((fdt_finish_reservemap(fdt))); |
258 | 9fdf0c29 | David Gibson | |
259 | 9fdf0c29 | David Gibson | /* Root node */
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260 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "")));
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261 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "chrp"))); |
262 | 5d73dd66 | David Gibson | _FDT((fdt_property_string(fdt, "model", "IBM pSeries (emulated by qemu)"))); |
263 | 9fdf0c29 | David Gibson | |
264 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x2))); |
265 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x2))); |
266 | 9fdf0c29 | David Gibson | |
267 | 9fdf0c29 | David Gibson | /* /chosen */
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268 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "chosen")));
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269 | 9fdf0c29 | David Gibson | |
270 | 6e806cc3 | Bharata B Rao | /* Set Form1_affinity */
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271 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,architecture-vec-5", vec5, sizeof(vec5)))); |
272 | 6e806cc3 | Bharata B Rao | |
273 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "bootargs", kernel_cmdline)));
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274 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-start",
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275 | 9fdf0c29 | David Gibson | &start_prop, sizeof(start_prop))));
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276 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "linux,initrd-end",
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277 | 9fdf0c29 | David Gibson | &end_prop, sizeof(end_prop))));
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278 | 4d8d5467 | Benjamin Herrenschmidt | if (kernel_size) {
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279 | 4d8d5467 | Benjamin Herrenschmidt | uint64_t kprop[2] = { cpu_to_be64(KERNEL_LOAD_ADDR),
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280 | 4d8d5467 | Benjamin Herrenschmidt | cpu_to_be64(kernel_size) }; |
281 | 9fdf0c29 | David Gibson | |
282 | 4d8d5467 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,boot-kernel", &kprop, sizeof(kprop)))); |
283 | 4d8d5467 | Benjamin Herrenschmidt | } |
284 | 2c9ee029 | Avik Sil | if (boot_device) {
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285 | 2c9ee029 | Avik Sil | _FDT((fdt_property_string(fdt, "qemu,boot-device", boot_device)));
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286 | 2c9ee029 | Avik Sil | } |
287 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-width", graphic_width)));
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288 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-height", graphic_height)));
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289 | f28359d8 | zhlcindy@gmail.com | _FDT((fdt_property_cell(fdt, "qemu,graphic-depth", graphic_depth)));
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290 | 3384f95c | David Gibson | |
291 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
292 | 9fdf0c29 | David Gibson | |
293 | 9fdf0c29 | David Gibson | /* cpus */
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294 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, "cpus")));
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295 | 9fdf0c29 | David Gibson | |
296 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
297 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
298 | 9fdf0c29 | David Gibson | |
299 | 7267c094 | Anthony Liguori | modelname = g_strdup(cpu_model); |
300 | 9fdf0c29 | David Gibson | |
301 | 9fdf0c29 | David Gibson | for (i = 0; i < strlen(modelname); i++) { |
302 | 9fdf0c29 | David Gibson | modelname[i] = toupper(modelname[i]); |
303 | 9fdf0c29 | David Gibson | } |
304 | 9fdf0c29 | David Gibson | |
305 | 6e806cc3 | Bharata B Rao | /* This is needed during FDT finalization */
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306 | 6e806cc3 | Bharata B Rao | spapr->cpu_model = g_strdup(modelname); |
307 | 6e806cc3 | Bharata B Rao | |
308 | c7a5c0c9 | David Gibson | for (env = first_cpu; env != NULL; env = env->next_cpu) { |
309 | 55e5c285 | Andreas Färber | CPUState *cpu = CPU(ppc_env_get_cpu(env)); |
310 | 55e5c285 | Andreas Färber | int index = cpu->cpu_index;
|
311 | e97c3636 | David Gibson | uint32_t servers_prop[smp_threads]; |
312 | e97c3636 | David Gibson | uint32_t gservers_prop[smp_threads * 2];
|
313 | 9fdf0c29 | David Gibson | char *nodename;
|
314 | 9fdf0c29 | David Gibson | uint32_t segs[] = {cpu_to_be32(28), cpu_to_be32(40), |
315 | 9fdf0c29 | David Gibson | 0xffffffff, 0xffffffff}; |
316 | 0a8b2938 | Alexander Graf | uint32_t tbfreq = kvm_enabled() ? kvmppc_get_tbfreq() : TIMEBASE_FREQ; |
317 | 0a8b2938 | Alexander Graf | uint32_t cpufreq = kvm_enabled() ? kvmppc_get_clockfreq() : 1000000000;
|
318 | 5af9873d | Benjamin Herrenschmidt | uint32_t page_sizes_prop[64];
|
319 | 5af9873d | Benjamin Herrenschmidt | size_t page_sizes_prop_size; |
320 | 9fdf0c29 | David Gibson | |
321 | e97c3636 | David Gibson | if ((index % smt) != 0) { |
322 | e97c3636 | David Gibson | continue;
|
323 | e97c3636 | David Gibson | } |
324 | e97c3636 | David Gibson | |
325 | 4ecf8aa5 | Stefan Weil | nodename = g_strdup_printf("%s@%x", modelname, index);
|
326 | 9fdf0c29 | David Gibson | |
327 | 9fdf0c29 | David Gibson | _FDT((fdt_begin_node(fdt, nodename))); |
328 | 9fdf0c29 | David Gibson | |
329 | 4ecf8aa5 | Stefan Weil | g_free(nodename); |
330 | 9fdf0c29 | David Gibson | |
331 | c7a5c0c9 | David Gibson | _FDT((fdt_property_cell(fdt, "reg", index)));
|
332 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "cpu"))); |
333 | 9fdf0c29 | David Gibson | |
334 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "cpu-version", env->spr[SPR_PVR])));
|
335 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "dcache-block-size",
|
336 | 9fdf0c29 | David Gibson | env->dcache_line_size))); |
337 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "icache-block-size",
|
338 | 9fdf0c29 | David Gibson | env->icache_line_size))); |
339 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "timebase-frequency", tbfreq)));
|
340 | 0a8b2938 | Alexander Graf | _FDT((fdt_property_cell(fdt, "clock-frequency", cpufreq)));
|
341 | 9fdf0c29 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,slb-size", env->slb_nr)));
|
342 | 9fdf0c29 | David Gibson | _FDT((fdt_property_string(fdt, "status", "okay"))); |
343 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "64-bit", NULL, 0))); |
344 | e97c3636 | David Gibson | |
345 | e97c3636 | David Gibson | /* Build interrupt servers and gservers properties */
|
346 | e97c3636 | David Gibson | for (i = 0; i < smp_threads; i++) { |
347 | e97c3636 | David Gibson | servers_prop[i] = cpu_to_be32(index + i); |
348 | e97c3636 | David Gibson | /* Hack, direct the group queues back to cpu 0 */
|
349 | e97c3636 | David Gibson | gservers_prop[i*2] = cpu_to_be32(index + i);
|
350 | e97c3636 | David Gibson | gservers_prop[i*2 + 1] = 0; |
351 | e97c3636 | David Gibson | } |
352 | e97c3636 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-server#s",
|
353 | e97c3636 | David Gibson | servers_prop, sizeof(servers_prop))));
|
354 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,ppc-interrupt-gserver#s",
|
355 | e97c3636 | David Gibson | gservers_prop, sizeof(gservers_prop))));
|
356 | 9fdf0c29 | David Gibson | |
357 | c7a5c0c9 | David Gibson | if (env->mmu_model & POWERPC_MMU_1TSEG) {
|
358 | 9fdf0c29 | David Gibson | _FDT((fdt_property(fdt, "ibm,processor-segment-sizes",
|
359 | 9fdf0c29 | David Gibson | segs, sizeof(segs))));
|
360 | 9fdf0c29 | David Gibson | } |
361 | 9fdf0c29 | David Gibson | |
362 | 6659394f | David Gibson | /* Advertise VMX/VSX (vector extensions) if available
|
363 | 6659394f | David Gibson | * 0 / no property == no vector extensions
|
364 | 6659394f | David Gibson | * 1 == VMX / Altivec available
|
365 | 6659394f | David Gibson | * 2 == VSX available */
|
366 | a7342588 | David Gibson | if (env->insns_flags & PPC_ALTIVEC) {
|
367 | a7342588 | David Gibson | uint32_t vmx = (env->insns_flags2 & PPC2_VSX) ? 2 : 1; |
368 | a7342588 | David Gibson | |
369 | 6659394f | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,vmx", vmx)));
|
370 | 6659394f | David Gibson | } |
371 | 6659394f | David Gibson | |
372 | 6659394f | David Gibson | /* Advertise DFP (Decimal Floating Point) if available
|
373 | 6659394f | David Gibson | * 0 / no property == no DFP
|
374 | 6659394f | David Gibson | * 1 == DFP available */
|
375 | a7342588 | David Gibson | if (env->insns_flags2 & PPC2_DFP) {
|
376 | a7342588 | David Gibson | _FDT((fdt_property_cell(fdt, "ibm,dfp", 1))); |
377 | 6659394f | David Gibson | } |
378 | 6659394f | David Gibson | |
379 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop_size = create_page_sizes_prop(env, page_sizes_prop, |
380 | 5af9873d | Benjamin Herrenschmidt | sizeof(page_sizes_prop));
|
381 | 5af9873d | Benjamin Herrenschmidt | if (page_sizes_prop_size) {
|
382 | 5af9873d | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "ibm,segment-page-sizes",
|
383 | 5af9873d | Benjamin Herrenschmidt | page_sizes_prop, page_sizes_prop_size))); |
384 | 5af9873d | Benjamin Herrenschmidt | } |
385 | 5af9873d | Benjamin Herrenschmidt | |
386 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
387 | 9fdf0c29 | David Gibson | } |
388 | 9fdf0c29 | David Gibson | |
389 | 7267c094 | Anthony Liguori | g_free(modelname); |
390 | 9fdf0c29 | David Gibson | |
391 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); |
392 | 9fdf0c29 | David Gibson | |
393 | f43e3525 | David Gibson | /* RTAS */
|
394 | f43e3525 | David Gibson | _FDT((fdt_begin_node(fdt, "rtas")));
|
395 | f43e3525 | David Gibson | |
396 | f43e3525 | David Gibson | _FDT((fdt_property(fdt, "ibm,hypertas-functions", hypertas_prop,
|
397 | f43e3525 | David Gibson | sizeof(hypertas_prop))));
|
398 | c73e3771 | Benjamin Herrenschmidt | _FDT((fdt_property(fdt, "qemu,hypertas-functions", qemu_hypertas_prop,
|
399 | c73e3771 | Benjamin Herrenschmidt | sizeof(qemu_hypertas_prop))));
|
400 | f43e3525 | David Gibson | |
401 | 6e806cc3 | Bharata B Rao | _FDT((fdt_property(fdt, "ibm,associativity-reference-points",
|
402 | 6e806cc3 | Bharata B Rao | refpoints, sizeof(refpoints))));
|
403 | 6e806cc3 | Bharata B Rao | |
404 | 74d042e5 | David Gibson | _FDT((fdt_property_cell(fdt, "rtas-error-log-max", RTAS_ERROR_LOG_MAX)));
|
405 | 74d042e5 | David Gibson | |
406 | f43e3525 | David Gibson | _FDT((fdt_end_node(fdt))); |
407 | f43e3525 | David Gibson | |
408 | b5cec4c5 | David Gibson | /* interrupt controller */
|
409 | 9dfef5aa | David Gibson | _FDT((fdt_begin_node(fdt, "interrupt-controller")));
|
410 | b5cec4c5 | David Gibson | |
411 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "device_type",
|
412 | b5cec4c5 | David Gibson | "PowerPC-External-Interrupt-Presentation")));
|
413 | b5cec4c5 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,ppc-xicp"))); |
414 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
415 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "ibm,interrupt-server-ranges",
|
416 | b5cec4c5 | David Gibson | interrupt_server_ranges_prop, |
417 | b5cec4c5 | David Gibson | sizeof(interrupt_server_ranges_prop))));
|
418 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 2))); |
419 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "linux,phandle", PHANDLE_XICP)));
|
420 | 0c103f8e | David Gibson | _FDT((fdt_property_cell(fdt, "phandle", PHANDLE_XICP)));
|
421 | b5cec4c5 | David Gibson | |
422 | b5cec4c5 | David Gibson | _FDT((fdt_end_node(fdt))); |
423 | b5cec4c5 | David Gibson | |
424 | 4040ab72 | David Gibson | /* vdevice */
|
425 | 4040ab72 | David Gibson | _FDT((fdt_begin_node(fdt, "vdevice")));
|
426 | 4040ab72 | David Gibson | |
427 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "device_type", "vdevice"))); |
428 | 4040ab72 | David Gibson | _FDT((fdt_property_string(fdt, "compatible", "IBM,vdevice"))); |
429 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#address-cells", 0x1))); |
430 | 4040ab72 | David Gibson | _FDT((fdt_property_cell(fdt, "#size-cells", 0x0))); |
431 | b5cec4c5 | David Gibson | _FDT((fdt_property_cell(fdt, "#interrupt-cells", 0x2))); |
432 | b5cec4c5 | David Gibson | _FDT((fdt_property(fdt, "interrupt-controller", NULL, 0))); |
433 | 4040ab72 | David Gibson | |
434 | 4040ab72 | David Gibson | _FDT((fdt_end_node(fdt))); |
435 | 4040ab72 | David Gibson | |
436 | 74d042e5 | David Gibson | /* event-sources */
|
437 | 74d042e5 | David Gibson | spapr_events_fdt_skel(fdt, epow_irq); |
438 | 74d042e5 | David Gibson | |
439 | 9fdf0c29 | David Gibson | _FDT((fdt_end_node(fdt))); /* close root node */
|
440 | 9fdf0c29 | David Gibson | _FDT((fdt_finish(fdt))); |
441 | 9fdf0c29 | David Gibson | |
442 | a3467baa | David Gibson | return fdt;
|
443 | a3467baa | David Gibson | } |
444 | a3467baa | David Gibson | |
445 | 7f763a5d | David Gibson | static int spapr_populate_memory(sPAPREnvironment *spapr, void *fdt) |
446 | 7f763a5d | David Gibson | { |
447 | 7f763a5d | David Gibson | uint32_t associativity[] = {cpu_to_be32(0x4), cpu_to_be32(0x0), |
448 | 7f763a5d | David Gibson | cpu_to_be32(0x0), cpu_to_be32(0x0), |
449 | 7f763a5d | David Gibson | cpu_to_be32(0x0)};
|
450 | 7f763a5d | David Gibson | char mem_name[32]; |
451 | a8170e5e | Avi Kivity | hwaddr node0_size, mem_start; |
452 | 7f763a5d | David Gibson | uint64_t mem_reg_property[2];
|
453 | 7f763a5d | David Gibson | int i, off;
|
454 | 7f763a5d | David Gibson | |
455 | 7f763a5d | David Gibson | /* memory node(s) */
|
456 | 7f763a5d | David Gibson | node0_size = (nb_numa_nodes > 1) ? node_mem[0] : ram_size; |
457 | 7f763a5d | David Gibson | if (spapr->rma_size > node0_size) {
|
458 | 7f763a5d | David Gibson | spapr->rma_size = node0_size; |
459 | 7f763a5d | David Gibson | } |
460 | 7f763a5d | David Gibson | |
461 | 7f763a5d | David Gibson | /* RMA */
|
462 | 7f763a5d | David Gibson | mem_reg_property[0] = 0; |
463 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(spapr->rma_size);
|
464 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, "memory@0"); |
465 | 7f763a5d | David Gibson | _FDT(off); |
466 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
467 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
468 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
469 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
470 | 7f763a5d | David Gibson | sizeof(associativity))));
|
471 | 7f763a5d | David Gibson | |
472 | 7f763a5d | David Gibson | /* RAM: Node 0 */
|
473 | 7f763a5d | David Gibson | if (node0_size > spapr->rma_size) {
|
474 | 7f763a5d | David Gibson | mem_reg_property[0] = cpu_to_be64(spapr->rma_size);
|
475 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(node0_size - spapr->rma_size);
|
476 | 7f763a5d | David Gibson | |
477 | 7f763a5d | David Gibson | sprintf(mem_name, "memory@" TARGET_FMT_lx, spapr->rma_size);
|
478 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, mem_name);
|
479 | 7f763a5d | David Gibson | _FDT(off); |
480 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
481 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
482 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
483 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
484 | 7f763a5d | David Gibson | sizeof(associativity))));
|
485 | 7f763a5d | David Gibson | } |
486 | 7f763a5d | David Gibson | |
487 | 7f763a5d | David Gibson | /* RAM: Node 1 and beyond */
|
488 | 7f763a5d | David Gibson | mem_start = node0_size; |
489 | 7f763a5d | David Gibson | for (i = 1; i < nb_numa_nodes; i++) { |
490 | 7f763a5d | David Gibson | mem_reg_property[0] = cpu_to_be64(mem_start);
|
491 | 7f763a5d | David Gibson | mem_reg_property[1] = cpu_to_be64(node_mem[i]);
|
492 | 7f763a5d | David Gibson | associativity[3] = associativity[4] = cpu_to_be32(i); |
493 | 7f763a5d | David Gibson | sprintf(mem_name, "memory@" TARGET_FMT_lx, mem_start);
|
494 | 7f763a5d | David Gibson | off = fdt_add_subnode(fdt, 0, mem_name);
|
495 | 7f763a5d | David Gibson | _FDT(off); |
496 | 7f763a5d | David Gibson | _FDT((fdt_setprop_string(fdt, off, "device_type", "memory"))); |
497 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "reg", mem_reg_property,
|
498 | 7f763a5d | David Gibson | sizeof(mem_reg_property))));
|
499 | 7f763a5d | David Gibson | _FDT((fdt_setprop(fdt, off, "ibm,associativity", associativity,
|
500 | 7f763a5d | David Gibson | sizeof(associativity))));
|
501 | 7f763a5d | David Gibson | mem_start += node_mem[i]; |
502 | 7f763a5d | David Gibson | } |
503 | 7f763a5d | David Gibson | |
504 | 7f763a5d | David Gibson | return 0; |
505 | 7f763a5d | David Gibson | } |
506 | 7f763a5d | David Gibson | |
507 | a3467baa | David Gibson | static void spapr_finalize_fdt(sPAPREnvironment *spapr, |
508 | a8170e5e | Avi Kivity | hwaddr fdt_addr, |
509 | a8170e5e | Avi Kivity | hwaddr rtas_addr, |
510 | a8170e5e | Avi Kivity | hwaddr rtas_size) |
511 | a3467baa | David Gibson | { |
512 | a3467baa | David Gibson | int ret;
|
513 | a3467baa | David Gibson | void *fdt;
|
514 | 3384f95c | David Gibson | sPAPRPHBState *phb; |
515 | a3467baa | David Gibson | |
516 | 7267c094 | Anthony Liguori | fdt = g_malloc(FDT_MAX_SIZE); |
517 | a3467baa | David Gibson | |
518 | a3467baa | David Gibson | /* open out the base tree into a temp buffer for the final tweaks */
|
519 | a3467baa | David Gibson | _FDT((fdt_open_into(spapr->fdt_skel, fdt, FDT_MAX_SIZE))); |
520 | 4040ab72 | David Gibson | |
521 | 7f763a5d | David Gibson | ret = spapr_populate_memory(spapr, fdt); |
522 | 7f763a5d | David Gibson | if (ret < 0) { |
523 | 7f763a5d | David Gibson | fprintf(stderr, "couldn't setup memory nodes in fdt\n");
|
524 | 7f763a5d | David Gibson | exit(1);
|
525 | 7f763a5d | David Gibson | } |
526 | 7f763a5d | David Gibson | |
527 | 4040ab72 | David Gibson | ret = spapr_populate_vdevice(spapr->vio_bus, fdt); |
528 | 4040ab72 | David Gibson | if (ret < 0) { |
529 | 4040ab72 | David Gibson | fprintf(stderr, "couldn't setup vio devices in fdt\n");
|
530 | 4040ab72 | David Gibson | exit(1);
|
531 | 4040ab72 | David Gibson | } |
532 | 4040ab72 | David Gibson | |
533 | 3384f95c | David Gibson | QLIST_FOREACH(phb, &spapr->phbs, list) { |
534 | e0fdbd7c | Alexey Kardashevskiy | ret = spapr_populate_pci_dt(phb, PHANDLE_XICP, fdt); |
535 | 3384f95c | David Gibson | } |
536 | 3384f95c | David Gibson | |
537 | 3384f95c | David Gibson | if (ret < 0) { |
538 | 3384f95c | David Gibson | fprintf(stderr, "couldn't setup PCI devices in fdt\n");
|
539 | 3384f95c | David Gibson | exit(1);
|
540 | 3384f95c | David Gibson | } |
541 | 3384f95c | David Gibson | |
542 | 39ac8455 | David Gibson | /* RTAS */
|
543 | 39ac8455 | David Gibson | ret = spapr_rtas_device_tree_setup(fdt, rtas_addr, rtas_size); |
544 | 39ac8455 | David Gibson | if (ret < 0) { |
545 | 39ac8455 | David Gibson | fprintf(stderr, "Couldn't set up RTAS device tree properties\n");
|
546 | 39ac8455 | David Gibson | } |
547 | 39ac8455 | David Gibson | |
548 | 6e806cc3 | Bharata B Rao | /* Advertise NUMA via ibm,associativity */
|
549 | 7f763a5d | David Gibson | ret = spapr_fixup_cpu_dt(fdt, spapr); |
550 | 7f763a5d | David Gibson | if (ret < 0) { |
551 | 7f763a5d | David Gibson | fprintf(stderr, "Couldn't finalize CPU device tree properties\n");
|
552 | 6e806cc3 | Bharata B Rao | } |
553 | 6e806cc3 | Bharata B Rao | |
554 | 3fc5acde | Alexander Graf | if (!spapr->has_graphics) {
|
555 | f28359d8 | zhlcindy@gmail.com | spapr_populate_chosen_stdout(fdt, spapr->vio_bus); |
556 | f28359d8 | zhlcindy@gmail.com | } |
557 | 68f3a94c | David Gibson | |
558 | 4040ab72 | David Gibson | _FDT((fdt_pack(fdt))); |
559 | 4040ab72 | David Gibson | |
560 | 4d8d5467 | Benjamin Herrenschmidt | if (fdt_totalsize(fdt) > FDT_MAX_SIZE) {
|
561 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("FDT too big ! 0x%x bytes (max is 0x%x)\n",
|
562 | 4d8d5467 | Benjamin Herrenschmidt | fdt_totalsize(fdt), FDT_MAX_SIZE); |
563 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
564 | 4d8d5467 | Benjamin Herrenschmidt | } |
565 | 4d8d5467 | Benjamin Herrenschmidt | |
566 | a3467baa | David Gibson | cpu_physical_memory_write(fdt_addr, fdt, fdt_totalsize(fdt)); |
567 | 9fdf0c29 | David Gibson | |
568 | 7267c094 | Anthony Liguori | g_free(fdt); |
569 | 9fdf0c29 | David Gibson | } |
570 | 9fdf0c29 | David Gibson | |
571 | 9fdf0c29 | David Gibson | static uint64_t translate_kernel_address(void *opaque, uint64_t addr) |
572 | 9fdf0c29 | David Gibson | { |
573 | 9fdf0c29 | David Gibson | return (addr & 0x0fffffff) + KERNEL_LOAD_ADDR; |
574 | 9fdf0c29 | David Gibson | } |
575 | 9fdf0c29 | David Gibson | |
576 | 1b14670a | Andreas Färber | static void emulate_spapr_hypercall(PowerPCCPU *cpu) |
577 | 9fdf0c29 | David Gibson | { |
578 | 1b14670a | Andreas Färber | CPUPPCState *env = &cpu->env; |
579 | 1b14670a | Andreas Färber | |
580 | efcb9383 | David Gibson | if (msr_pr) {
|
581 | efcb9383 | David Gibson | hcall_dprintf("Hypercall made with MSR[PR]=1\n");
|
582 | efcb9383 | David Gibson | env->gpr[3] = H_PRIVILEGE;
|
583 | efcb9383 | David Gibson | } else {
|
584 | aa100fa4 | Andreas Färber | env->gpr[3] = spapr_hypercall(cpu, env->gpr[3], &env->gpr[4]); |
585 | efcb9383 | David Gibson | } |
586 | 9fdf0c29 | David Gibson | } |
587 | 9fdf0c29 | David Gibson | |
588 | 7f763a5d | David Gibson | static void spapr_reset_htab(sPAPREnvironment *spapr) |
589 | 7f763a5d | David Gibson | { |
590 | 7f763a5d | David Gibson | long shift;
|
591 | 7f763a5d | David Gibson | |
592 | 7f763a5d | David Gibson | /* allocate hash page table. For now we always make this 16mb,
|
593 | 7f763a5d | David Gibson | * later we should probably make it scale to the size of guest
|
594 | 7f763a5d | David Gibson | * RAM */
|
595 | 7f763a5d | David Gibson | |
596 | 7f763a5d | David Gibson | shift = kvmppc_reset_htab(spapr->htab_shift); |
597 | 7f763a5d | David Gibson | |
598 | 7f763a5d | David Gibson | if (shift > 0) { |
599 | 7f763a5d | David Gibson | /* Kernel handles htab, we don't need to allocate one */
|
600 | 7f763a5d | David Gibson | spapr->htab_shift = shift; |
601 | 7f763a5d | David Gibson | } else {
|
602 | 7f763a5d | David Gibson | if (!spapr->htab) {
|
603 | 7f763a5d | David Gibson | /* Allocate an htab if we don't yet have one */
|
604 | 7f763a5d | David Gibson | spapr->htab = qemu_memalign(HTAB_SIZE(spapr), HTAB_SIZE(spapr)); |
605 | 7f763a5d | David Gibson | } |
606 | 7f763a5d | David Gibson | |
607 | 7f763a5d | David Gibson | /* And clear it */
|
608 | 7f763a5d | David Gibson | memset(spapr->htab, 0, HTAB_SIZE(spapr));
|
609 | 7f763a5d | David Gibson | } |
610 | 7f763a5d | David Gibson | |
611 | 7f763a5d | David Gibson | /* Update the RMA size if necessary */
|
612 | 7f763a5d | David Gibson | if (spapr->vrma_adjust) {
|
613 | 7f763a5d | David Gibson | spapr->rma_size = kvmppc_rma_size(ram_size, spapr->htab_shift); |
614 | 7f763a5d | David Gibson | } |
615 | 9fdf0c29 | David Gibson | } |
616 | 9fdf0c29 | David Gibson | |
617 | c8787ad4 | David Gibson | static void ppc_spapr_reset(void) |
618 | a3467baa | David Gibson | { |
619 | 7f763a5d | David Gibson | /* Reset the hash table & recalc the RMA */
|
620 | 7f763a5d | David Gibson | spapr_reset_htab(spapr); |
621 | a3467baa | David Gibson | |
622 | c8787ad4 | David Gibson | qemu_devices_reset(); |
623 | a3467baa | David Gibson | |
624 | a3467baa | David Gibson | /* Load the fdt */
|
625 | a3467baa | David Gibson | spapr_finalize_fdt(spapr, spapr->fdt_addr, spapr->rtas_addr, |
626 | a3467baa | David Gibson | spapr->rtas_size); |
627 | a3467baa | David Gibson | |
628 | a3467baa | David Gibson | /* Set up the entry state */
|
629 | a3467baa | David Gibson | first_cpu->gpr[3] = spapr->fdt_addr;
|
630 | a3467baa | David Gibson | first_cpu->gpr[5] = 0; |
631 | a3467baa | David Gibson | first_cpu->halted = 0;
|
632 | a3467baa | David Gibson | first_cpu->nip = spapr->entry_point; |
633 | a3467baa | David Gibson | |
634 | a3467baa | David Gibson | } |
635 | a3467baa | David Gibson | |
636 | 1bba0dc9 | Andreas Färber | static void spapr_cpu_reset(void *opaque) |
637 | 1bba0dc9 | Andreas Färber | { |
638 | 5b2038e0 | Andreas Färber | PowerPCCPU *cpu = opaque; |
639 | 048706d9 | David Gibson | CPUPPCState *env = &cpu->env; |
640 | 1bba0dc9 | Andreas Färber | |
641 | 5b2038e0 | Andreas Färber | cpu_reset(CPU(cpu)); |
642 | 048706d9 | David Gibson | |
643 | 048706d9 | David Gibson | /* All CPUs start halted. CPU0 is unhalted from the machine level
|
644 | 048706d9 | David Gibson | * reset code and the rest are explicitly started up by the guest
|
645 | 048706d9 | David Gibson | * using an RTAS call */
|
646 | 048706d9 | David Gibson | env->halted = 1;
|
647 | 048706d9 | David Gibson | |
648 | 048706d9 | David Gibson | env->spr[SPR_HIOR] = 0;
|
649 | 7f763a5d | David Gibson | |
650 | 7f763a5d | David Gibson | env->external_htab = spapr->htab; |
651 | 7f763a5d | David Gibson | env->htab_base = -1;
|
652 | 7f763a5d | David Gibson | env->htab_mask = HTAB_SIZE(spapr) - 1;
|
653 | 7f763a5d | David Gibson | env->spr[SPR_SDR1] = (unsigned long)spapr->htab | |
654 | 7f763a5d | David Gibson | (spapr->htab_shift - 18);
|
655 | 1bba0dc9 | Andreas Färber | } |
656 | 1bba0dc9 | Andreas Färber | |
657 | 639e8102 | David Gibson | static void spapr_create_nvram(sPAPREnvironment *spapr) |
658 | 639e8102 | David Gibson | { |
659 | 639e8102 | David Gibson | QemuOpts *machine_opts; |
660 | 639e8102 | David Gibson | DeviceState *dev; |
661 | 639e8102 | David Gibson | |
662 | 639e8102 | David Gibson | dev = qdev_create(&spapr->vio_bus->bus, "spapr-nvram");
|
663 | 639e8102 | David Gibson | |
664 | 639e8102 | David Gibson | machine_opts = qemu_opts_find(qemu_find_opts("machine"), 0); |
665 | 639e8102 | David Gibson | if (machine_opts) {
|
666 | 639e8102 | David Gibson | const char *drivename; |
667 | 639e8102 | David Gibson | |
668 | 639e8102 | David Gibson | drivename = qemu_opt_get(machine_opts, "nvram");
|
669 | 639e8102 | David Gibson | if (drivename) {
|
670 | 639e8102 | David Gibson | BlockDriverState *bs; |
671 | 639e8102 | David Gibson | |
672 | 639e8102 | David Gibson | bs = bdrv_find(drivename); |
673 | 639e8102 | David Gibson | if (!bs) {
|
674 | 639e8102 | David Gibson | fprintf(stderr, "No such block device \"%s\" for nvram\n",
|
675 | 639e8102 | David Gibson | drivename); |
676 | 639e8102 | David Gibson | exit(1);
|
677 | 639e8102 | David Gibson | } |
678 | 639e8102 | David Gibson | qdev_prop_set_drive_nofail(dev, "drive", bs);
|
679 | 639e8102 | David Gibson | } |
680 | 639e8102 | David Gibson | } |
681 | 639e8102 | David Gibson | |
682 | 639e8102 | David Gibson | qdev_init_nofail(dev); |
683 | 639e8102 | David Gibson | |
684 | 639e8102 | David Gibson | spapr->nvram = (struct sPAPRNVRAM *)dev;
|
685 | 639e8102 | David Gibson | } |
686 | 639e8102 | David Gibson | |
687 | 8c57b867 | Alexander Graf | /* Returns whether we want to use VGA or not */
|
688 | f28359d8 | zhlcindy@gmail.com | static int spapr_vga_init(PCIBus *pci_bus) |
689 | f28359d8 | zhlcindy@gmail.com | { |
690 | 8c57b867 | Alexander Graf | switch (vga_interface_type) {
|
691 | 8c57b867 | Alexander Graf | case VGA_NONE:
|
692 | 1ddcae82 | Aurelien Jarno | case VGA_STD:
|
693 | 1ddcae82 | Aurelien Jarno | return pci_vga_init(pci_bus) != NULL; |
694 | 8c57b867 | Alexander Graf | default:
|
695 | f28359d8 | zhlcindy@gmail.com | fprintf(stderr, "This vga model is not supported,"
|
696 | f28359d8 | zhlcindy@gmail.com | "currently it only supports -vga std\n");
|
697 | 8c57b867 | Alexander Graf | exit(0);
|
698 | 8c57b867 | Alexander Graf | break;
|
699 | f28359d8 | zhlcindy@gmail.com | } |
700 | f28359d8 | zhlcindy@gmail.com | } |
701 | f28359d8 | zhlcindy@gmail.com | |
702 | 9fdf0c29 | David Gibson | /* pSeries LPAR / sPAPR hardware init */
|
703 | 5f072e1f | Eduardo Habkost | static void ppc_spapr_init(QEMUMachineInitArgs *args) |
704 | 9fdf0c29 | David Gibson | { |
705 | 5f072e1f | Eduardo Habkost | ram_addr_t ram_size = args->ram_size; |
706 | 5f072e1f | Eduardo Habkost | const char *cpu_model = args->cpu_model; |
707 | 5f072e1f | Eduardo Habkost | const char *kernel_filename = args->kernel_filename; |
708 | 5f072e1f | Eduardo Habkost | const char *kernel_cmdline = args->kernel_cmdline; |
709 | 5f072e1f | Eduardo Habkost | const char *initrd_filename = args->initrd_filename; |
710 | 5f072e1f | Eduardo Habkost | const char *boot_device = args->boot_device; |
711 | 05769733 | Andreas Färber | PowerPCCPU *cpu; |
712 | e2684c0b | Andreas Färber | CPUPPCState *env; |
713 | 8c9f64df | Andreas Färber | PCIHostState *phb; |
714 | 9fdf0c29 | David Gibson | int i;
|
715 | 890c2b77 | Avi Kivity | MemoryRegion *sysmem = get_system_memory(); |
716 | 890c2b77 | Avi Kivity | MemoryRegion *ram = g_new(MemoryRegion, 1);
|
717 | a8170e5e | Avi Kivity | hwaddr rma_alloc_size; |
718 | 4d8d5467 | Benjamin Herrenschmidt | uint32_t initrd_base = 0;
|
719 | 4d8d5467 | Benjamin Herrenschmidt | long kernel_size = 0, initrd_size = 0; |
720 | 4d8d5467 | Benjamin Herrenschmidt | long load_limit, rtas_limit, fw_size;
|
721 | 39ac8455 | David Gibson | char *filename;
|
722 | 9fdf0c29 | David Gibson | |
723 | 0ee2c058 | Alexey Kardashevskiy | msi_supported = true;
|
724 | 0ee2c058 | Alexey Kardashevskiy | |
725 | d43b45e2 | David Gibson | spapr = g_malloc0(sizeof(*spapr));
|
726 | d43b45e2 | David Gibson | QLIST_INIT(&spapr->phbs); |
727 | d43b45e2 | David Gibson | |
728 | 9fdf0c29 | David Gibson | cpu_ppc_hypercall = emulate_spapr_hypercall; |
729 | 9fdf0c29 | David Gibson | |
730 | 354ac20a | David Gibson | /* Allocate RMA if necessary */
|
731 | 354ac20a | David Gibson | rma_alloc_size = kvmppc_alloc_rma("ppc_spapr.rma", sysmem);
|
732 | 354ac20a | David Gibson | |
733 | 354ac20a | David Gibson | if (rma_alloc_size == -1) { |
734 | 354ac20a | David Gibson | hw_error("qemu: Unable to create RMA\n");
|
735 | 354ac20a | David Gibson | exit(1);
|
736 | 354ac20a | David Gibson | } |
737 | 7f763a5d | David Gibson | |
738 | 354ac20a | David Gibson | if (rma_alloc_size && (rma_alloc_size < ram_size)) {
|
739 | 7f763a5d | David Gibson | spapr->rma_size = rma_alloc_size; |
740 | 354ac20a | David Gibson | } else {
|
741 | 7f763a5d | David Gibson | spapr->rma_size = ram_size; |
742 | 7f763a5d | David Gibson | |
743 | 7f763a5d | David Gibson | /* With KVM, we don't actually know whether KVM supports an
|
744 | 7f763a5d | David Gibson | * unbounded RMA (PR KVM) or is limited by the hash table size
|
745 | 7f763a5d | David Gibson | * (HV KVM using VRMA), so we always assume the latter
|
746 | 7f763a5d | David Gibson | *
|
747 | 7f763a5d | David Gibson | * In that case, we also limit the initial allocations for RTAS
|
748 | 7f763a5d | David Gibson | * etc... to 256M since we have no way to know what the VRMA size
|
749 | 7f763a5d | David Gibson | * is going to be as it depends on the size of the hash table
|
750 | 7f763a5d | David Gibson | * isn't determined yet.
|
751 | 7f763a5d | David Gibson | */
|
752 | 7f763a5d | David Gibson | if (kvm_enabled()) {
|
753 | 7f763a5d | David Gibson | spapr->vrma_adjust = 1;
|
754 | 7f763a5d | David Gibson | spapr->rma_size = MIN(spapr->rma_size, 0x10000000);
|
755 | 7f763a5d | David Gibson | } |
756 | 354ac20a | David Gibson | } |
757 | 354ac20a | David Gibson | |
758 | 4d8d5467 | Benjamin Herrenschmidt | /* We place the device tree and RTAS just below either the top of the RMA,
|
759 | 354ac20a | David Gibson | * or just below 2GB, whichever is lowere, so that it can be
|
760 | 354ac20a | David Gibson | * processed with 32-bit real mode code if necessary */
|
761 | 7f763a5d | David Gibson | rtas_limit = MIN(spapr->rma_size, 0x80000000);
|
762 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_addr = rtas_limit - RTAS_MAX_SIZE; |
763 | 4d8d5467 | Benjamin Herrenschmidt | spapr->fdt_addr = spapr->rtas_addr - FDT_MAX_SIZE; |
764 | 4d8d5467 | Benjamin Herrenschmidt | load_limit = spapr->fdt_addr - FW_OVERHEAD; |
765 | 9fdf0c29 | David Gibson | |
766 | 382be75d | David Gibson | /* We aim for a hash table of size 1/128 the size of RAM. The
|
767 | 382be75d | David Gibson | * normal rule of thumb is 1/64 the size of RAM, but that's much
|
768 | 382be75d | David Gibson | * more than needed for the Linux guests we support. */
|
769 | 382be75d | David Gibson | spapr->htab_shift = 18; /* Minimum architected size */ |
770 | 382be75d | David Gibson | while (spapr->htab_shift <= 46) { |
771 | 382be75d | David Gibson | if ((1ULL << (spapr->htab_shift + 7)) >= ram_size) { |
772 | 382be75d | David Gibson | break;
|
773 | 382be75d | David Gibson | } |
774 | 382be75d | David Gibson | spapr->htab_shift++; |
775 | 382be75d | David Gibson | } |
776 | 7f763a5d | David Gibson | |
777 | 9fdf0c29 | David Gibson | /* init CPUs */
|
778 | 9fdf0c29 | David Gibson | if (cpu_model == NULL) { |
779 | 6b7a2cf6 | David Gibson | cpu_model = kvm_enabled() ? "host" : "POWER7"; |
780 | 9fdf0c29 | David Gibson | } |
781 | 9fdf0c29 | David Gibson | for (i = 0; i < smp_cpus; i++) { |
782 | 05769733 | Andreas Färber | cpu = cpu_ppc_init(cpu_model); |
783 | 05769733 | Andreas Färber | if (cpu == NULL) { |
784 | 9fdf0c29 | David Gibson | fprintf(stderr, "Unable to find PowerPC CPU definition\n");
|
785 | 9fdf0c29 | David Gibson | exit(1);
|
786 | 9fdf0c29 | David Gibson | } |
787 | 05769733 | Andreas Färber | env = &cpu->env; |
788 | 05769733 | Andreas Färber | |
789 | 9fdf0c29 | David Gibson | /* Set time-base frequency to 512 MHz */
|
790 | 9fdf0c29 | David Gibson | cpu_ppc_tb_init(env, TIMEBASE_FREQ); |
791 | 9fdf0c29 | David Gibson | |
792 | 048706d9 | David Gibson | /* PAPR always has exception vectors in RAM not ROM */
|
793 | 9fdf0c29 | David Gibson | env->hreset_excp_prefix = 0;
|
794 | 048706d9 | David Gibson | |
795 | 048706d9 | David Gibson | /* Tell KVM that we're in PAPR mode */
|
796 | 048706d9 | David Gibson | if (kvm_enabled()) {
|
797 | 1bc22652 | Andreas Färber | kvmppc_set_papr(cpu); |
798 | 048706d9 | David Gibson | } |
799 | 048706d9 | David Gibson | |
800 | 048706d9 | David Gibson | qemu_register_reset(spapr_cpu_reset, cpu); |
801 | 9fdf0c29 | David Gibson | } |
802 | 9fdf0c29 | David Gibson | |
803 | 9fdf0c29 | David Gibson | /* allocate RAM */
|
804 | f73a2575 | David Gibson | spapr->ram_limit = ram_size; |
805 | 354ac20a | David Gibson | if (spapr->ram_limit > rma_alloc_size) {
|
806 | 354ac20a | David Gibson | ram_addr_t nonrma_base = rma_alloc_size; |
807 | 354ac20a | David Gibson | ram_addr_t nonrma_size = spapr->ram_limit - rma_alloc_size; |
808 | 354ac20a | David Gibson | |
809 | c5705a77 | Avi Kivity | memory_region_init_ram(ram, "ppc_spapr.ram", nonrma_size);
|
810 | c5705a77 | Avi Kivity | vmstate_register_ram_global(ram); |
811 | 354ac20a | David Gibson | memory_region_add_subregion(sysmem, nonrma_base, ram); |
812 | 354ac20a | David Gibson | } |
813 | 9fdf0c29 | David Gibson | |
814 | 39ac8455 | David Gibson | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, "spapr-rtas.bin");
|
815 | a3467baa | David Gibson | spapr->rtas_size = load_image_targphys(filename, spapr->rtas_addr, |
816 | 4d8d5467 | Benjamin Herrenschmidt | rtas_limit - spapr->rtas_addr); |
817 | a3467baa | David Gibson | if (spapr->rtas_size < 0) { |
818 | 39ac8455 | David Gibson | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
819 | 39ac8455 | David Gibson | exit(1);
|
820 | 39ac8455 | David Gibson | } |
821 | 4d8d5467 | Benjamin Herrenschmidt | if (spapr->rtas_size > RTAS_MAX_SIZE) {
|
822 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("RTAS too big ! 0x%lx bytes (max is 0x%x)\n",
|
823 | 4d8d5467 | Benjamin Herrenschmidt | spapr->rtas_size, RTAS_MAX_SIZE); |
824 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
825 | 4d8d5467 | Benjamin Herrenschmidt | } |
826 | 7267c094 | Anthony Liguori | g_free(filename); |
827 | 39ac8455 | David Gibson | |
828 | 4d8d5467 | Benjamin Herrenschmidt | |
829 | b5cec4c5 | David Gibson | /* Set up Interrupt Controller */
|
830 | c7a5c0c9 | David Gibson | spapr->icp = xics_system_init(XICS_IRQS); |
831 | bf3bc4c4 | Ben Herrenschmidt | spapr->next_irq = XICS_IRQ_BASE; |
832 | b5cec4c5 | David Gibson | |
833 | 74d042e5 | David Gibson | /* Set up EPOW events infrastructure */
|
834 | 74d042e5 | David Gibson | spapr_events_init(spapr); |
835 | 74d042e5 | David Gibson | |
836 | ad0ebb91 | David Gibson | /* Set up IOMMU */
|
837 | ad0ebb91 | David Gibson | spapr_iommu_init(); |
838 | ad0ebb91 | David Gibson | |
839 | b5cec4c5 | David Gibson | /* Set up VIO bus */
|
840 | 4040ab72 | David Gibson | spapr->vio_bus = spapr_vio_bus_init(); |
841 | 4040ab72 | David Gibson | |
842 | 277f9acf | Paolo Bonzini | for (i = 0; i < MAX_SERIAL_PORTS; i++) { |
843 | 4040ab72 | David Gibson | if (serial_hds[i]) {
|
844 | d601fac4 | David Gibson | spapr_vty_create(spapr->vio_bus, serial_hds[i]); |
845 | 4040ab72 | David Gibson | } |
846 | 4040ab72 | David Gibson | } |
847 | 9fdf0c29 | David Gibson | |
848 | 639e8102 | David Gibson | /* We always have at least the nvram device on VIO */
|
849 | 639e8102 | David Gibson | spapr_create_nvram(spapr); |
850 | 639e8102 | David Gibson | |
851 | 3384f95c | David Gibson | /* Set up PCI */
|
852 | fa28f71b | Alexey Kardashevskiy | spapr_pci_rtas_init(); |
853 | fa28f71b | Alexey Kardashevskiy | |
854 | caae58cb | David Gibson | phb = spapr_create_phb(spapr, 0, "pci"); |
855 | 3384f95c | David Gibson | |
856 | 277f9acf | Paolo Bonzini | for (i = 0; i < nb_nics; i++) { |
857 | 8d90ad90 | David Gibson | NICInfo *nd = &nd_table[i]; |
858 | 8d90ad90 | David Gibson | |
859 | 8d90ad90 | David Gibson | if (!nd->model) {
|
860 | 7267c094 | Anthony Liguori | nd->model = g_strdup("ibmveth");
|
861 | 8d90ad90 | David Gibson | } |
862 | 8d90ad90 | David Gibson | |
863 | 8d90ad90 | David Gibson | if (strcmp(nd->model, "ibmveth") == 0) { |
864 | d601fac4 | David Gibson | spapr_vlan_create(spapr->vio_bus, nd); |
865 | 8d90ad90 | David Gibson | } else {
|
866 | 3384f95c | David Gibson | pci_nic_init_nofail(&nd_table[i], nd->model, NULL);
|
867 | 8d90ad90 | David Gibson | } |
868 | 8d90ad90 | David Gibson | } |
869 | 8d90ad90 | David Gibson | |
870 | 6e270446 | Ben Herrenschmidt | for (i = 0; i <= drive_get_max_bus(IF_SCSI); i++) { |
871 | d601fac4 | David Gibson | spapr_vscsi_create(spapr->vio_bus); |
872 | 6e270446 | Ben Herrenschmidt | } |
873 | 6e270446 | Ben Herrenschmidt | |
874 | f28359d8 | zhlcindy@gmail.com | /* Graphics */
|
875 | 8c9f64df | Andreas Färber | if (spapr_vga_init(phb->bus)) {
|
876 | 3fc5acde | Alexander Graf | spapr->has_graphics = true;
|
877 | f28359d8 | zhlcindy@gmail.com | } |
878 | f28359d8 | zhlcindy@gmail.com | |
879 | 094b287f | zhlcindy@gmail.com | if (usb_enabled(spapr->has_graphics)) {
|
880 | 8c9f64df | Andreas Färber | pci_create_simple(phb->bus, -1, "pci-ohci"); |
881 | 35139a59 | David Gibson | if (spapr->has_graphics) {
|
882 | 35139a59 | David Gibson | usbdevice_create("keyboard");
|
883 | 35139a59 | David Gibson | usbdevice_create("mouse");
|
884 | 35139a59 | David Gibson | } |
885 | 35139a59 | David Gibson | } |
886 | 35139a59 | David Gibson | |
887 | 7f763a5d | David Gibson | if (spapr->rma_size < (MIN_RMA_SLOF << 20)) { |
888 | 4d8d5467 | Benjamin Herrenschmidt | fprintf(stderr, "qemu: pSeries SLOF firmware requires >= "
|
889 | 4d8d5467 | Benjamin Herrenschmidt | "%ldM guest RMA (Real Mode Area memory)\n", MIN_RMA_SLOF);
|
890 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
891 | 4d8d5467 | Benjamin Herrenschmidt | } |
892 | 4d8d5467 | Benjamin Herrenschmidt | |
893 | 9fdf0c29 | David Gibson | if (kernel_filename) {
|
894 | 9fdf0c29 | David Gibson | uint64_t lowaddr = 0;
|
895 | 9fdf0c29 | David Gibson | |
896 | 9fdf0c29 | David Gibson | kernel_size = load_elf(kernel_filename, translate_kernel_address, NULL,
|
897 | 9fdf0c29 | David Gibson | NULL, &lowaddr, NULL, 1, ELF_MACHINE, 0); |
898 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
899 | a3467baa | David Gibson | kernel_size = load_image_targphys(kernel_filename, |
900 | a3467baa | David Gibson | KERNEL_LOAD_ADDR, |
901 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - KERNEL_LOAD_ADDR); |
902 | 9fdf0c29 | David Gibson | } |
903 | 9fdf0c29 | David Gibson | if (kernel_size < 0) { |
904 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load kernel '%s'\n",
|
905 | 9fdf0c29 | David Gibson | kernel_filename); |
906 | 9fdf0c29 | David Gibson | exit(1);
|
907 | 9fdf0c29 | David Gibson | } |
908 | 9fdf0c29 | David Gibson | |
909 | 9fdf0c29 | David Gibson | /* load initrd */
|
910 | 9fdf0c29 | David Gibson | if (initrd_filename) {
|
911 | 4d8d5467 | Benjamin Herrenschmidt | /* Try to locate the initrd in the gap between the kernel
|
912 | 4d8d5467 | Benjamin Herrenschmidt | * and the firmware. Add a bit of space just in case
|
913 | 4d8d5467 | Benjamin Herrenschmidt | */
|
914 | 4d8d5467 | Benjamin Herrenschmidt | initrd_base = (KERNEL_LOAD_ADDR + kernel_size + 0x1ffff) & ~0xffff; |
915 | 9fdf0c29 | David Gibson | initrd_size = load_image_targphys(initrd_filename, initrd_base, |
916 | 4d8d5467 | Benjamin Herrenschmidt | load_limit - initrd_base); |
917 | 9fdf0c29 | David Gibson | if (initrd_size < 0) { |
918 | 9fdf0c29 | David Gibson | fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
|
919 | 9fdf0c29 | David Gibson | initrd_filename); |
920 | 9fdf0c29 | David Gibson | exit(1);
|
921 | 9fdf0c29 | David Gibson | } |
922 | 9fdf0c29 | David Gibson | } else {
|
923 | 9fdf0c29 | David Gibson | initrd_base = 0;
|
924 | 9fdf0c29 | David Gibson | initrd_size = 0;
|
925 | 9fdf0c29 | David Gibson | } |
926 | 4d8d5467 | Benjamin Herrenschmidt | } |
927 | a3467baa | David Gibson | |
928 | 4d8d5467 | Benjamin Herrenschmidt | filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, FW_FILE_NAME); |
929 | 4d8d5467 | Benjamin Herrenschmidt | fw_size = load_image_targphys(filename, 0, FW_MAX_SIZE);
|
930 | 4d8d5467 | Benjamin Herrenschmidt | if (fw_size < 0) { |
931 | 4d8d5467 | Benjamin Herrenschmidt | hw_error("qemu: could not load LPAR rtas '%s'\n", filename);
|
932 | 4d8d5467 | Benjamin Herrenschmidt | exit(1);
|
933 | 4d8d5467 | Benjamin Herrenschmidt | } |
934 | 4d8d5467 | Benjamin Herrenschmidt | g_free(filename); |
935 | 4d8d5467 | Benjamin Herrenschmidt | |
936 | 4d8d5467 | Benjamin Herrenschmidt | spapr->entry_point = 0x100;
|
937 | 4d8d5467 | Benjamin Herrenschmidt | |
938 | 9fdf0c29 | David Gibson | /* Prepare the device tree */
|
939 | 7f763a5d | David Gibson | spapr->fdt_skel = spapr_create_fdt_skel(cpu_model, |
940 | a3467baa | David Gibson | initrd_base, initrd_size, |
941 | 4d8d5467 | Benjamin Herrenschmidt | kernel_size, |
942 | 74d042e5 | David Gibson | boot_device, kernel_cmdline, |
943 | 74d042e5 | David Gibson | spapr->epow_irq); |
944 | a3467baa | David Gibson | assert(spapr->fdt_skel != NULL);
|
945 | 9fdf0c29 | David Gibson | } |
946 | 9fdf0c29 | David Gibson | |
947 | 9fdf0c29 | David Gibson | static QEMUMachine spapr_machine = {
|
948 | 9fdf0c29 | David Gibson | .name = "pseries",
|
949 | 9fdf0c29 | David Gibson | .desc = "pSeries Logical Partition (PAPR compliant)",
|
950 | 9fdf0c29 | David Gibson | .init = ppc_spapr_init, |
951 | c8787ad4 | David Gibson | .reset = ppc_spapr_reset, |
952 | 2d0d2837 | Christian Borntraeger | .block_default_type = IF_SCSI, |
953 | 9fdf0c29 | David Gibson | .max_cpus = MAX_CPUS, |
954 | 9fdf0c29 | David Gibson | .no_parallel = 1,
|
955 | 2c9ee029 | Avik Sil | .boot_order = NULL,
|
956 | 9fdf0c29 | David Gibson | }; |
957 | 9fdf0c29 | David Gibson | |
958 | 9fdf0c29 | David Gibson | static void spapr_machine_init(void) |
959 | 9fdf0c29 | David Gibson | { |
960 | 9fdf0c29 | David Gibson | qemu_register_machine(&spapr_machine); |
961 | 9fdf0c29 | David Gibson | } |
962 | 9fdf0c29 | David Gibson | |
963 | 9fdf0c29 | David Gibson | machine_init(spapr_machine_init); |